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ixgbe_osdep.c revision 1.2 
      1 /* $NetBSD: ixgbe_osdep.c,v 1.2 2017/08/30 08:49:18 msaitoh Exp $ */
      2 
      3 /******************************************************************************
      4 
      5   Copyright (c) 2001-2017, Intel Corporation
      6   All rights reserved.
      7 
      8   Redistribution and use in source and binary forms, with or without
      9   modification, are permitted provided that the following conditions are met:
     10 
     11    1. Redistributions of source code must retain the above copyright notice,
     12       this list of conditions and the following disclaimer.
     13 
     14    2. Redistributions in binary form must reproduce the above copyright
     15       notice, this list of conditions and the following disclaimer in the
     16       documentation and/or other materials provided with the distribution.
     17 
     18    3. Neither the name of the Intel Corporation nor the names of its
     19       contributors may be used to endorse or promote products derived from
     20       this software without specific prior written permission.
     21 
     22   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     23   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
     26   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     32   POSSIBILITY OF SUCH DAMAGE.
     33 
     34 ******************************************************************************/
     35 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_osdep.c 320688 2017-07-05 17:27:03Z erj $*/
     36 
     37 #include "ixgbe_osdep.h"
     38 #include "ixgbe.h"
     39 
     40 inline device_t
     41 ixgbe_dev_from_hw(struct ixgbe_hw *hw)
     42 {
     43 	return ((struct adapter *)hw->back)->dev;
     44 }
     45 
     46 u16
     47 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg)
     48 {
     49 	pci_chipset_tag_t  pc = hw->back->osdep.pc;
     50 	pcitag_t           tag = hw->back->osdep.tag;
     51 
     52 	switch (reg % 4) {
     53 	case 0:
     54 		return pci_conf_read(pc, tag, reg) & __BITS(15, 0);
     55 	case 2:
     56 		return __SHIFTOUT(pci_conf_read(pc, tag, reg - 2),
     57 		    __BITS(31, 16));
     58 	default:
     59 		panic("%s: invalid register (%" PRIx32, __func__, reg);
     60 		break;
     61 	}
     62 }
     63 
     64 void
     65 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value)
     66 {
     67 	pci_chipset_tag_t  pc = hw->back->osdep.pc;
     68 	pcitag_t           tag = hw->back->osdep.tag;
     69 	pcireg_t old;
     70 
     71 	switch (reg % 4) {
     72 	case 0:
     73 		old = pci_conf_read(pc, tag, reg) & __BITS(31, 16);
     74 		pci_conf_write(pc, tag, reg, value | old);
     75 		break;
     76 	case 2:
     77 		old = pci_conf_read(pc, tag, reg - 2) & __BITS(15, 0);
     78 		pci_conf_write(pc, tag, reg - 2,
     79 		    __SHIFTIN(value, __BITS(31, 16)) | old);
     80 		break;
     81 	default:
     82 		panic("%s: invalid register (%" PRIx32, __func__, reg);
     83 		break;
     84 	}
     85 
     86 	return;
     87 }
     88 
     89 inline u32
     90 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
     91 {
     92 	return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
     93 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle, reg);
     94 }
     95 
     96 inline void
     97 ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)
     98 {
     99 	bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
    100 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
    101 	    reg, val);
    102 }
    103 
    104 inline u32
    105 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset)
    106 {
    107 	return bus_space_read_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
    108 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
    109 	    reg + (offset << 2));
    110 }
    111 
    112 inline void
    113 ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)
    114 {
    115 	bus_space_write_4(((struct adapter *)hw->back)->osdep.mem_bus_space_tag,
    116 	    ((struct adapter *)hw->back)->osdep.mem_bus_space_handle,
    117 	    reg + (offset << 2), val);
    118 }
    119