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ixgbe_sriov.h revision 1.1.4.2
      1  1.1.4.2  snj /******************************************************************************
      2  1.1.4.2  snj 
      3  1.1.4.2  snj   Copyright (c) 2001-2017, Intel Corporation
      4  1.1.4.2  snj   All rights reserved.
      5  1.1.4.2  snj 
      6  1.1.4.2  snj   Redistribution and use in source and binary forms, with or without
      7  1.1.4.2  snj   modification, are permitted provided that the following conditions are met:
      8  1.1.4.2  snj 
      9  1.1.4.2  snj    1. Redistributions of source code must retain the above copyright notice,
     10  1.1.4.2  snj       this list of conditions and the following disclaimer.
     11  1.1.4.2  snj 
     12  1.1.4.2  snj    2. Redistributions in binary form must reproduce the above copyright
     13  1.1.4.2  snj       notice, this list of conditions and the following disclaimer in the
     14  1.1.4.2  snj       documentation and/or other materials provided with the distribution.
     15  1.1.4.2  snj 
     16  1.1.4.2  snj    3. Neither the name of the Intel Corporation nor the names of its
     17  1.1.4.2  snj       contributors may be used to endorse or promote products derived from
     18  1.1.4.2  snj       this software without specific prior written permission.
     19  1.1.4.2  snj 
     20  1.1.4.2  snj   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     21  1.1.4.2  snj   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     22  1.1.4.2  snj   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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     24  1.1.4.2  snj   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  1.1.4.2  snj   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  1.1.4.2  snj   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  1.1.4.2  snj   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  1.1.4.2  snj   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  1.1.4.2  snj   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  1.1.4.2  snj   POSSIBILITY OF SUCH DAMAGE.
     31  1.1.4.2  snj 
     32  1.1.4.2  snj ******************************************************************************/
     33  1.1.4.2  snj /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_sriov.h 320688 2017-07-05 17:27:03Z erj $*/
     34  1.1.4.2  snj 
     35  1.1.4.2  snj 
     36  1.1.4.2  snj #ifndef _IXGBE_SRIOV_H_
     37  1.1.4.2  snj #define _IXGBE_SRIOV_H_
     38  1.1.4.2  snj 
     39  1.1.4.2  snj #ifdef PCI_IOV
     40  1.1.4.2  snj 
     41  1.1.4.2  snj #include <sys/nv.h>
     42  1.1.4.2  snj #include <sys/iov_schema.h>
     43  1.1.4.2  snj #include <dev/pci/pci_iov.h>
     44  1.1.4.2  snj #include "ixgbe_mbx.h"
     45  1.1.4.2  snj 
     46  1.1.4.2  snj #define IXGBE_VF_CTS            (1 << 0) /* VF is clear to send. */
     47  1.1.4.2  snj #define IXGBE_VF_CAP_MAC        (1 << 1) /* VF is permitted to change MAC. */
     48  1.1.4.2  snj #define IXGBE_VF_CAP_VLAN       (1 << 2) /* VF is permitted to join vlans. */
     49  1.1.4.2  snj #define IXGBE_VF_ACTIVE         (1 << 3) /* VF is active. */
     50  1.1.4.2  snj #define IXGBE_VF_INDEX(vmdq)    ((vmdq) / 32)
     51  1.1.4.2  snj #define IXGBE_VF_BIT(vmdq)      (1 << ((vmdq) % 32))
     52  1.1.4.2  snj 
     53  1.1.4.2  snj #define IXGBE_VT_MSG_MASK	0xFFFF
     54  1.1.4.2  snj 
     55  1.1.4.2  snj #define IXGBE_VT_MSGINFO(msg)	\
     56  1.1.4.2  snj 	(((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)
     57  1.1.4.2  snj 
     58  1.1.4.2  snj #define IXGBE_VF_GET_QUEUES_RESP_LEN	5
     59  1.1.4.2  snj 
     60  1.1.4.2  snj #define IXGBE_API_VER_1_0	0
     61  1.1.4.2  snj #define IXGBE_API_VER_2_0	1	/* Solaris API.  Not supported. */
     62  1.1.4.2  snj #define IXGBE_API_VER_1_1	2
     63  1.1.4.2  snj #define IXGBE_API_VER_UNKNOWN	UINT16_MAX
     64  1.1.4.2  snj 
     65  1.1.4.2  snj #define IXGBE_NO_VM             0
     66  1.1.4.2  snj #define IXGBE_32_VM             32
     67  1.1.4.2  snj #define IXGBE_64_VM             64
     68  1.1.4.2  snj 
     69  1.1.4.2  snj int  ixgbe_add_vf(device_t, u16, const nvlist_t *);
     70  1.1.4.2  snj int  ixgbe_init_iov(device_t, u16, const nvlist_t *);
     71  1.1.4.2  snj void ixgbe_uninit_iov(device_t);
     72  1.1.4.2  snj void ixgbe_initialize_iov(struct adapter *);
     73  1.1.4.2  snj void ixgbe_recalculate_max_frame(struct adapter *);
     74  1.1.4.2  snj void ixgbe_ping_all_vfs(struct adapter *);
     75  1.1.4.2  snj int  ixgbe_pci_iov_detach(device_t);
     76  1.1.4.2  snj void ixgbe_define_iov_schemas(device_t, int *);
     77  1.1.4.2  snj void ixgbe_align_all_queue_indices(struct adapter *);
     78  1.1.4.2  snj u32  ixgbe_get_mtqc(int);
     79  1.1.4.2  snj u32  ixgbe_get_mrqc(int);
     80  1.1.4.2  snj 
     81  1.1.4.2  snj /******************************************************************************/
     82  1.1.4.2  snj #else  /* PCI_IOV */
     83  1.1.4.2  snj /******************************************************************************/
     84  1.1.4.2  snj 
     85  1.1.4.2  snj #define ixgbe_add_vf(_a,_b,_c)		do { } while (/*CONSTCOND*/false)
     86  1.1.4.2  snj #define ixgbe_init_iov(_a,_b,_c)	do { } while (/*CONSTCOND*/false)
     87  1.1.4.2  snj #define ixgbe_uninit_iov(_a)		do { } while (/*CONSTCOND*/false)
     88  1.1.4.2  snj #define ixgbe_initialize_iov(_a)	do { } while (/*CONSTCOND*/false)
     89  1.1.4.2  snj #define ixgbe_recalculate_max_frame(_a)	do { } while (/*CONSTCOND*/false)
     90  1.1.4.2  snj #define ixgbe_ping_all_vfs(_a)		do { } while (/*CONSTCOND*/false)
     91  1.1.4.2  snj #define ixgbe_pci_iov_detach(_a) 0
     92  1.1.4.2  snj #define ixgbe_define_iov_schemas(_a,_b)	do { } while (/*CONSTCOND*/false)
     93  1.1.4.2  snj #define ixgbe_align_all_queue_indices(_a) do { } while (/*CONSTCOND*/false)
     94  1.1.4.2  snj #define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
     95  1.1.4.2  snj #define ixgbe_get_mrqc(_a) 0
     96  1.1.4.2  snj 
     97  1.1.4.2  snj #endif /* PCI_IOV */
     98  1.1.4.2  snj 
     99  1.1.4.2  snj void ixgbe_handle_mbx(void *);
    100  1.1.4.2  snj int  ixgbe_vf_que_index(int, int, int);
    101  1.1.4.2  snj 
    102  1.1.4.2  snj #endif
    103