ixgbe_sriov.h revision 1.3.8.2 1 1.3.8.2 martin /* $NetBSD: ixgbe_sriov.h,v 1.3.8.2 2022/01/30 15:58:29 martin Exp $ */
2 1.1 msaitoh /******************************************************************************
3 1.1 msaitoh
4 1.3.8.2 martin Copyright (c) 2001-2020, Intel Corporation
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33 1.1 msaitoh ******************************************************************************/
34 1.3 msaitoh /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_sriov.h 327031 2017-12-20 18:15:06Z erj $*/
35 1.1 msaitoh
36 1.1 msaitoh
37 1.1 msaitoh #ifndef _IXGBE_SRIOV_H_
38 1.1 msaitoh #define _IXGBE_SRIOV_H_
39 1.1 msaitoh
40 1.1 msaitoh #ifdef PCI_IOV
41 1.1 msaitoh
42 1.1 msaitoh #include <sys/nv.h>
43 1.1 msaitoh #include <sys/iov_schema.h>
44 1.1 msaitoh #include <dev/pci/pci_iov.h>
45 1.1 msaitoh #include "ixgbe_mbx.h"
46 1.1 msaitoh
47 1.1 msaitoh #define IXGBE_VF_CTS (1 << 0) /* VF is clear to send. */
48 1.1 msaitoh #define IXGBE_VF_CAP_MAC (1 << 1) /* VF is permitted to change MAC. */
49 1.1 msaitoh #define IXGBE_VF_CAP_VLAN (1 << 2) /* VF is permitted to join vlans. */
50 1.1 msaitoh #define IXGBE_VF_ACTIVE (1 << 3) /* VF is active. */
51 1.1 msaitoh #define IXGBE_VF_INDEX(vmdq) ((vmdq) / 32)
52 1.1 msaitoh #define IXGBE_VF_BIT(vmdq) (1 << ((vmdq) % 32))
53 1.1 msaitoh
54 1.1 msaitoh #define IXGBE_VT_MSG_MASK 0xFFFF
55 1.1 msaitoh
56 1.1 msaitoh #define IXGBE_VT_MSGINFO(msg) \
57 1.1 msaitoh (((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)
58 1.1 msaitoh
59 1.1 msaitoh #define IXGBE_VF_GET_QUEUES_RESP_LEN 5
60 1.1 msaitoh
61 1.3 msaitoh #define IXGBE_API_VER_1_0 0
62 1.1 msaitoh #define IXGBE_API_VER_2_0 1 /* Solaris API. Not supported. */
63 1.1 msaitoh #define IXGBE_API_VER_1_1 2
64 1.1 msaitoh #define IXGBE_API_VER_UNKNOWN UINT16_MAX
65 1.1 msaitoh
66 1.1 msaitoh #define IXGBE_NO_VM 0
67 1.1 msaitoh #define IXGBE_32_VM 32
68 1.1 msaitoh #define IXGBE_64_VM 64
69 1.1 msaitoh
70 1.1 msaitoh int ixgbe_add_vf(device_t, u16, const nvlist_t *);
71 1.1 msaitoh int ixgbe_init_iov(device_t, u16, const nvlist_t *);
72 1.1 msaitoh void ixgbe_uninit_iov(device_t);
73 1.1 msaitoh void ixgbe_initialize_iov(struct adapter *);
74 1.1 msaitoh void ixgbe_recalculate_max_frame(struct adapter *);
75 1.1 msaitoh void ixgbe_ping_all_vfs(struct adapter *);
76 1.1 msaitoh int ixgbe_pci_iov_detach(device_t);
77 1.1 msaitoh void ixgbe_define_iov_schemas(device_t, int *);
78 1.1 msaitoh void ixgbe_align_all_queue_indices(struct adapter *);
79 1.2 msaitoh int ixgbe_vf_que_index(int, int, int);
80 1.1 msaitoh u32 ixgbe_get_mtqc(int);
81 1.1 msaitoh u32 ixgbe_get_mrqc(int);
82 1.1 msaitoh
83 1.1 msaitoh /******************************************************************************/
84 1.1 msaitoh #else /* PCI_IOV */
85 1.1 msaitoh /******************************************************************************/
86 1.1 msaitoh
87 1.1 msaitoh #define ixgbe_add_vf(_a,_b,_c) do { } while (/*CONSTCOND*/false)
88 1.1 msaitoh #define ixgbe_init_iov(_a,_b,_c) do { } while (/*CONSTCOND*/false)
89 1.1 msaitoh #define ixgbe_uninit_iov(_a) do { } while (/*CONSTCOND*/false)
90 1.1 msaitoh #define ixgbe_initialize_iov(_a) do { } while (/*CONSTCOND*/false)
91 1.1 msaitoh #define ixgbe_recalculate_max_frame(_a) do { } while (/*CONSTCOND*/false)
92 1.1 msaitoh #define ixgbe_ping_all_vfs(_a) do { } while (/*CONSTCOND*/false)
93 1.1 msaitoh #define ixgbe_pci_iov_detach(_a) 0
94 1.1 msaitoh #define ixgbe_define_iov_schemas(_a,_b) do { } while (/*CONSTCOND*/false)
95 1.1 msaitoh #define ixgbe_align_all_queue_indices(_a) do { } while (/*CONSTCOND*/false)
96 1.2 msaitoh #define ixgbe_vf_que_index(_a, _b, _c) (_c)
97 1.1 msaitoh #define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
98 1.1 msaitoh #define ixgbe_get_mrqc(_a) 0
99 1.1 msaitoh
100 1.1 msaitoh #endif /* PCI_IOV */
101 1.1 msaitoh
102 1.1 msaitoh void ixgbe_handle_mbx(void *);
103 1.1 msaitoh
104 1.1 msaitoh #endif
105