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ixgbe_sriov.h revision 1.4 
      1 /* $NetBSD: ixgbe_sriov.h,v 1.4 2021/04/30 06:41:36 msaitoh Exp $ */
      2 /******************************************************************************
      3 
      4   Copyright (c) 2001-2017, Intel Corporation
      5   All rights reserved.
      6 
      7   Redistribution and use in source and binary forms, with or without
      8   modification, are permitted provided that the following conditions are met:
      9 
     10    1. Redistributions of source code must retain the above copyright notice,
     11       this list of conditions and the following disclaimer.
     12 
     13    2. Redistributions in binary form must reproduce the above copyright
     14       notice, this list of conditions and the following disclaimer in the
     15       documentation and/or other materials provided with the distribution.
     16 
     17    3. Neither the name of the Intel Corporation nor the names of its
     18       contributors may be used to endorse or promote products derived from
     19       this software without specific prior written permission.
     20 
     21   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     22   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
     25   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31   POSSIBILITY OF SUCH DAMAGE.
     32 
     33 ******************************************************************************/
     34 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_sriov.h 327031 2017-12-20 18:15:06Z erj $*/
     35 
     36 
     37 #ifndef _IXGBE_SRIOV_H_
     38 #define _IXGBE_SRIOV_H_
     39 
     40 #ifdef PCI_IOV
     41 
     42 #include <sys/nv.h>
     43 #include <sys/iov_schema.h>
     44 #include <dev/pci/pci_iov.h>
     45 #include "ixgbe_mbx.h"
     46 
     47 #define IXGBE_VF_CTS            (1 << 0) /* VF is clear to send. */
     48 #define IXGBE_VF_CAP_MAC        (1 << 1) /* VF is permitted to change MAC. */
     49 #define IXGBE_VF_CAP_VLAN       (1 << 2) /* VF is permitted to join vlans. */
     50 #define IXGBE_VF_ACTIVE         (1 << 3) /* VF is active. */
     51 #define IXGBE_VF_INDEX(vmdq)    ((vmdq) / 32)
     52 #define IXGBE_VF_BIT(vmdq)      (1 << ((vmdq) % 32))
     53 
     54 #define IXGBE_VT_MSG_MASK	0xFFFF
     55 
     56 #define IXGBE_VT_MSGINFO(msg)	\
     57 	(((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT)
     58 
     59 #define IXGBE_VF_GET_QUEUES_RESP_LEN	5
     60 
     61 #define IXGBE_API_VER_1_0	0
     62 #define IXGBE_API_VER_2_0	1	/* Solaris API.  Not supported. */
     63 #define IXGBE_API_VER_1_1	2
     64 #define IXGBE_API_VER_UNKNOWN	UINT16_MAX
     65 
     66 #define IXGBE_NO_VM             0
     67 #define IXGBE_32_VM             32
     68 #define IXGBE_64_VM             64
     69 
     70 int  ixgbe_add_vf(device_t, u16, const nvlist_t *);
     71 int  ixgbe_init_iov(device_t, u16, const nvlist_t *);
     72 void ixgbe_uninit_iov(device_t);
     73 void ixgbe_initialize_iov(struct adapter *);
     74 void ixgbe_recalculate_max_frame(struct adapter *);
     75 void ixgbe_ping_all_vfs(struct adapter *);
     76 int  ixgbe_pci_iov_detach(device_t);
     77 void ixgbe_define_iov_schemas(device_t, int *);
     78 void ixgbe_align_all_queue_indices(struct adapter *);
     79 int  ixgbe_vf_que_index(int, int, int);
     80 u32  ixgbe_get_mtqc(int);
     81 u32  ixgbe_get_mrqc(int);
     82 
     83 /******************************************************************************/
     84 #else  /* PCI_IOV */
     85 /******************************************************************************/
     86 
     87 #define ixgbe_add_vf(_a,_b,_c)		do { } while (/*CONSTCOND*/false)
     88 #define ixgbe_init_iov(_a,_b,_c)	do { } while (/*CONSTCOND*/false)
     89 #define ixgbe_uninit_iov(_a)		do { } while (/*CONSTCOND*/false)
     90 #define ixgbe_initialize_iov(_a)	do { } while (/*CONSTCOND*/false)
     91 #define ixgbe_recalculate_max_frame(_a)	do { } while (/*CONSTCOND*/false)
     92 #define ixgbe_ping_all_vfs(_a)		do { } while (/*CONSTCOND*/false)
     93 #define ixgbe_pci_iov_detach(_a) 0
     94 #define ixgbe_define_iov_schemas(_a,_b)	do { } while (/*CONSTCOND*/false)
     95 #define ixgbe_align_all_queue_indices(_a) do { } while (/*CONSTCOND*/false)
     96 #define ixgbe_vf_que_index(_a, _b, _c) (_c)
     97 #define ixgbe_get_mtqc(_a) IXGBE_MTQC_64Q_1PB
     98 #define ixgbe_get_mrqc(_a) 0
     99 
    100 #endif /* PCI_IOV */
    101 
    102 void ixgbe_handle_mbx(void *);
    103 
    104 #endif
    105