ixpide.c revision 1.11
1 /* $NetBSD: ixpide.c,v 1.11 2008/03/18 20:46:36 cube Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of The NetBSD Foundation nor the names of its 16 * contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: ixpide.c,v 1.11 2008/03/18 20:46:36 cube Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 38 #include <dev/pci/pcivar.h> 39 #include <dev/pci/pcidevs.h> 40 #include <dev/pci/pciidereg.h> 41 #include <dev/pci/pciidevar.h> 42 #include <dev/pci/pciide_ixp_reg.h> 43 44 static int ixpide_match(device_t, cfdata_t, void *); 45 static void ixpide_attach(device_t, device_t, void *); 46 47 static void ixp_chip_map(struct pciide_softc *, struct pci_attach_args *); 48 static void ixp_setup_channel(struct ata_channel *); 49 50 CFATTACH_DECL_NEW(ixpide, sizeof(struct pciide_softc), 51 ixpide_match, ixpide_attach, NULL, NULL); 52 53 static const char ixpdesc[] = "ATI Technologies IXP IDE Controller"; 54 55 static const struct pciide_product_desc pciide_ixpide_products[] = { 56 { PCI_PRODUCT_ATI_IXP_IDE_200, 0, ixpdesc, ixp_chip_map }, 57 { PCI_PRODUCT_ATI_IXP_IDE_300, 0, ixpdesc, ixp_chip_map }, 58 { PCI_PRODUCT_ATI_IXP_IDE_400, 0, ixpdesc, ixp_chip_map }, 59 { PCI_PRODUCT_ATI_IXP_IDE_600, 0, ixpdesc, ixp_chip_map }, 60 { PCI_PRODUCT_ATI_SB400_SATA_1, 0, ixpdesc, ixp_chip_map }, 61 { PCI_PRODUCT_ATI_SB400_SATA_2, 0, ixpdesc, ixp_chip_map }, 62 { PCI_PRODUCT_ATI_SB600_SATA_1, 0, ixpdesc, ixp_chip_map }, 63 { PCI_PRODUCT_ATI_SB600_SATA_2, 0, ixpdesc, ixp_chip_map }, 64 { 0, 0, NULL, NULL } 65 }; 66 67 static int 68 ixpide_match(device_t parent, cfdata_t cfdata, void *aux) 69 { 70 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 71 72 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI && 73 PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE && 74 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE && 75 pciide_lookup_product(pa->pa_id, pciide_ixpide_products)) 76 return (2); 77 return (0); 78 } 79 80 static void 81 ixpide_attach(device_t parent, device_t self, void *aux) 82 { 83 struct pci_attach_args *pa = aux; 84 struct pciide_softc *sc = device_private(self); 85 86 sc->sc_wdcdev.sc_atac.atac_dev = self; 87 88 pciide_common_attach(sc, pa, 89 pciide_lookup_product(pa->pa_id, pciide_ixpide_products)); 90 } 91 92 static void 93 ixp_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 94 { 95 struct pciide_channel *cp; 96 int channel; 97 pcireg_t interface; 98 bus_size_t cmdsize, ctlsize; 99 100 if (pciide_chipen(sc, pa) == 0) 101 return; 102 103 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, 104 "bus-master DMA support present"); 105 pciide_mapreg_dma(sc, pa); 106 aprint_verbose("\n"); 107 108 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 109 if (sc->sc_dma_ok) { 110 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 111 sc->sc_wdcdev.irqack = pciide_irqack; 112 } 113 114 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 115 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 116 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 117 sc->sc_wdcdev.sc_atac.atac_set_modes = ixp_setup_channel; 118 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 119 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 120 121 interface = PCI_INTERFACE(pa->pa_class); 122 123 wdc_allocate_regs(&sc->sc_wdcdev); 124 125 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 126 channel++) { 127 cp = &sc->pciide_channels[channel]; 128 if (pciide_chansetup(sc, channel, interface) == 0) 129 continue; 130 pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 131 pciide_pci_intr); 132 } 133 } 134 135 /* Values from linux driver */ 136 static const uint8_t ixp_pio_timings[] = { 137 0x5d, 0x47, 0x34, 0x22, 0x20 138 }; 139 140 static const uint8_t ixp_mdma_timings[] = { 141 0x77, 0x21, 0x20 142 }; 143 144 static void 145 ixp_setup_channel(struct ata_channel *chp) 146 { 147 int drive, s; 148 struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 149 pcireg_t udma, mdma_timing, pio, pio_timing; 150 struct ata_drive_datas *drvp; 151 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 152 153 pio_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING); 154 pio = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL); 155 mdma_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING); 156 udma = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL); 157 158 pciide_channel_dma_setup(cp); 159 160 for (drive = 0; drive < 2; drive++) { 161 drvp = &chp->ch_drive[drive]; 162 if ((drvp->drive_flags & DRIVE) == 0) 163 continue; 164 if (drvp->drive_flags & DRIVE_UDMA) { 165 s = splbio(); 166 drvp->drive_flags &= ~DRIVE_DMA; 167 splx(s); 168 IXP_UDMA_ENABLE(udma, chp->ch_channel, drive); 169 IXP_SET_MODE(udma, chp->ch_channel, drive, drvp->UDMA_mode); 170 } else if (drvp->drive_flags & DRIVE_DMA) { 171 IXP_UDMA_DISABLE(udma, chp->ch_channel, drive); 172 IXP_SET_TIMING(mdma_timing, chp->ch_channel, drive, 173 ixp_mdma_timings[drvp->DMA_mode]); 174 } else 175 IXP_UDMA_DISABLE(udma, chp->ch_channel, drive); 176 177 /* 178 * Set PIO mode and timings 179 * Linux driver avoids PIO mode 1, let's do it too. 180 */ 181 if (drvp->PIO_mode == 1) 182 drvp->PIO_mode = 0; 183 184 IXP_SET_MODE(pio, chp->ch_channel, drive, drvp->PIO_mode); 185 IXP_SET_TIMING(pio_timing, chp->ch_channel, drive, 186 ixp_pio_timings[drvp->PIO_mode]); 187 } 188 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL, udma); 189 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING, mdma_timing); 190 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL, pio); 191 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING, pio_timing); 192 ATADEBUG_PRINT(("ixp_setup_channel: udma = %08x, mdma_timing = %08x, pio_mode = %08x," 193 " pio_timing = %08x\n", udma, mdma_timing, pio, pio_timing), DEBUG_PROBE); 194 } 195
Indexes created Thu Sep 25 08:09:54 GMT 2025