ixpide.c revision 1.5.16.1
1 /* $NetBSD: ixpide.c,v 1.5.16.1 2006/07/13 17:49:27 gdamore Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to the NetBSD Foundation 8 * by Quentin Garnier. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ixpide.c,v 1.5.16.1 2006/07/13 17:49:27 gdamore Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcidevs.h> 47 #include <dev/pci/pciidereg.h> 48 #include <dev/pci/pciidevar.h> 49 #include <dev/pci/pciide_ixp_reg.h> 50 51 static int ixpide_match(struct device *, struct cfdata *, void *); 52 static void ixpide_attach(struct device *, struct device *, void *); 53 54 static void ixp_chip_map(struct pciide_softc *, struct pci_attach_args *); 55 static void ixp_setup_channel(struct ata_channel *); 56 57 CFATTACH_DECL(ixpide, sizeof(struct pciide_softc), 58 ixpide_match, ixpide_attach, NULL, NULL); 59 60 static const char ixpdesc[] = "ATI Technologies IXP IDE Controller"; 61 62 static const struct pciide_product_desc pciide_ixpide_products[] = { 63 { PCI_PRODUCT_ATI_IXP_IDE_200, 0, ixpdesc, ixp_chip_map }, 64 { PCI_PRODUCT_ATI_IXP_IDE_300, 0, ixpdesc, ixp_chip_map }, 65 { PCI_PRODUCT_ATI_IXP_IDE_400, 0, ixpdesc, ixp_chip_map }, 66 { PCI_PRODUCT_ATI_IXP_IDE_600, 0, ixpdesc, ixp_chip_map }, 67 { PCI_PRODUCT_ATI_SB400_SATA_1, 0, ixpdesc, ixp_chip_map }, 68 { PCI_PRODUCT_ATI_SB400_SATA_2, 0, ixpdesc, ixp_chip_map }, 69 { PCI_PRODUCT_ATI_SB600_SATA_1, 0, ixpdesc, ixp_chip_map }, 70 { PCI_PRODUCT_ATI_SB600_SATA_2, 0, ixpdesc, ixp_chip_map }, 71 { 0, 0, NULL, NULL } 72 }; 73 74 static int 75 ixpide_match(struct device *parent, struct cfdata *cfdata, void *aux) 76 { 77 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 78 79 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI && 80 PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE && 81 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE && 82 pciide_lookup_product(pa->pa_id, pciide_ixpide_products)) 83 return (2); 84 return (0); 85 } 86 87 static void 88 ixpide_attach(struct device *parent, struct device *self, void *aux) 89 { 90 struct pci_attach_args *pa = aux; 91 struct pciide_softc *sc = (struct pciide_softc *)self; 92 93 pciide_common_attach(sc, pa, 94 pciide_lookup_product(pa->pa_id, pciide_ixpide_products)); 95 } 96 97 static void 98 ixp_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 99 { 100 struct pciide_channel *cp; 101 int channel; 102 pcireg_t interface; 103 bus_size_t cmdsize, ctlsize; 104 105 if (pciide_chipen(sc, pa) == 0) 106 return; 107 108 aprint_normal("%s: bus-master DMA support present", 109 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 110 pciide_mapreg_dma(sc, pa); 111 aprint_normal("\n"); 112 113 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 114 if (sc->sc_dma_ok) { 115 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 116 sc->sc_wdcdev.irqack = pciide_irqack; 117 } 118 119 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 120 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 121 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 122 sc->sc_wdcdev.sc_atac.atac_set_modes = ixp_setup_channel; 123 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 124 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 125 126 interface = PCI_INTERFACE(pa->pa_class); 127 128 wdc_allocate_regs(&sc->sc_wdcdev); 129 130 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 131 channel++) { 132 cp = &sc->pciide_channels[channel]; 133 if (pciide_chansetup(sc, channel, interface) == 0) 134 continue; 135 pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 136 pciide_pci_intr); 137 } 138 } 139 140 /* Values from linux driver */ 141 static const uint8_t ixp_pio_timings[] = { 142 0x5d, 0x47, 0x34, 0x22, 0x20 143 }; 144 145 static const uint8_t ixp_mdma_timings[] = { 146 0x77, 0x21, 0x20 147 }; 148 149 static void 150 ixp_setup_channel(struct ata_channel *chp) 151 { 152 int drive, s; 153 struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 154 pcireg_t udma, mdma_timing, pio, pio_timing; 155 struct ata_drive_datas *drvp; 156 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 157 158 pio_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING); 159 pio = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL); 160 mdma_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING); 161 udma = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL); 162 163 pciide_channel_dma_setup(cp); 164 165 for (drive = 0; drive < 2; drive++) { 166 drvp = &chp->ch_drive[drive]; 167 if ((drvp->drive_flags & DRIVE) == 0) 168 continue; 169 if (drvp->drive_flags & DRIVE_UDMA) { 170 s = splbio(); 171 drvp->drive_flags &= ~DRIVE_DMA; 172 splx(s); 173 IXP_UDMA_ENABLE(udma, chp->ch_channel, drive); 174 IXP_SET_MODE(udma, chp->ch_channel, drive, drvp->UDMA_mode); 175 } else if (drvp->drive_flags & DRIVE_DMA) { 176 IXP_UDMA_DISABLE(udma, chp->ch_channel, drive); 177 IXP_SET_TIMING(mdma_timing, chp->ch_channel, drive, 178 ixp_mdma_timings[drvp->DMA_mode]); 179 } else 180 IXP_UDMA_DISABLE(udma, chp->ch_channel, drive); 181 182 /* 183 * Set PIO mode and timings 184 * Linux driver avoids PIO mode 1, let's do it too. 185 */ 186 if (drvp->PIO_mode == 1) 187 drvp->PIO_mode = 0; 188 189 IXP_SET_MODE(pio, chp->ch_channel, drive, drvp->PIO_mode); 190 IXP_SET_TIMING(pio_timing, chp->ch_channel, drive, 191 ixp_pio_timings[drvp->PIO_mode]); 192 } 193 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL, udma); 194 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING, mdma_timing); 195 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL, pio); 196 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING, pio_timing); 197 ATADEBUG_PRINT(("ixp_setup_channel: udma = %08x, mdma_timing = %08x, pio_mode = %08x," 198 " pio_timing = %08x\n", udma, mdma_timing, pio, pio_timing), DEBUG_PROBE); 199 } 200
Indexes created Wed Oct 15 14:09:57 GMT 2025