ixpide.c revision 1.7
1 /* $NetBSD: ixpide.c,v 1.7 2006/10/12 01:31:31 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2004 The NetBSD Foundation. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to the NetBSD Foundation 8 * by Quentin Garnier. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: ixpide.c,v 1.7 2006/10/12 01:31:31 christos Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcidevs.h> 47 #include <dev/pci/pciidereg.h> 48 #include <dev/pci/pciidevar.h> 49 #include <dev/pci/pciide_ixp_reg.h> 50 51 static int ixpide_match(struct device *, struct cfdata *, void *); 52 static void ixpide_attach(struct device *, struct device *, void *); 53 54 static void ixp_chip_map(struct pciide_softc *, struct pci_attach_args *); 55 static void ixp_setup_channel(struct ata_channel *); 56 57 CFATTACH_DECL(ixpide, sizeof(struct pciide_softc), 58 ixpide_match, ixpide_attach, NULL, NULL); 59 60 static const char ixpdesc[] = "ATI Technologies IXP IDE Controller"; 61 62 static const struct pciide_product_desc pciide_ixpide_products[] = { 63 { PCI_PRODUCT_ATI_IXP_IDE_200, 0, ixpdesc, ixp_chip_map }, 64 { PCI_PRODUCT_ATI_IXP_IDE_300, 0, ixpdesc, ixp_chip_map }, 65 { PCI_PRODUCT_ATI_IXP_IDE_400, 0, ixpdesc, ixp_chip_map }, 66 { PCI_PRODUCT_ATI_IXP_IDE_600, 0, ixpdesc, ixp_chip_map }, 67 { PCI_PRODUCT_ATI_SB400_SATA_1, 0, ixpdesc, ixp_chip_map }, 68 { PCI_PRODUCT_ATI_SB400_SATA_2, 0, ixpdesc, ixp_chip_map }, 69 { PCI_PRODUCT_ATI_SB600_SATA_1, 0, ixpdesc, ixp_chip_map }, 70 { PCI_PRODUCT_ATI_SB600_SATA_2, 0, ixpdesc, ixp_chip_map }, 71 { 0, 0, NULL, NULL } 72 }; 73 74 static int 75 ixpide_match(struct device *parent __unused, struct cfdata *cfdata __unused, 76 void *aux) 77 { 78 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 79 80 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI && 81 PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE && 82 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE && 83 pciide_lookup_product(pa->pa_id, pciide_ixpide_products)) 84 return (2); 85 return (0); 86 } 87 88 static void 89 ixpide_attach(struct device *parent __unused, struct device *self, void *aux) 90 { 91 struct pci_attach_args *pa = aux; 92 struct pciide_softc *sc = (struct pciide_softc *)self; 93 94 pciide_common_attach(sc, pa, 95 pciide_lookup_product(pa->pa_id, pciide_ixpide_products)); 96 } 97 98 static void 99 ixp_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 100 { 101 struct pciide_channel *cp; 102 int channel; 103 pcireg_t interface; 104 bus_size_t cmdsize, ctlsize; 105 106 if (pciide_chipen(sc, pa) == 0) 107 return; 108 109 aprint_normal("%s: bus-master DMA support present", 110 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 111 pciide_mapreg_dma(sc, pa); 112 aprint_normal("\n"); 113 114 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 115 if (sc->sc_dma_ok) { 116 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 117 sc->sc_wdcdev.irqack = pciide_irqack; 118 } 119 120 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 121 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 122 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 123 sc->sc_wdcdev.sc_atac.atac_set_modes = ixp_setup_channel; 124 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 125 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 126 127 interface = PCI_INTERFACE(pa->pa_class); 128 129 wdc_allocate_regs(&sc->sc_wdcdev); 130 131 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 132 channel++) { 133 cp = &sc->pciide_channels[channel]; 134 if (pciide_chansetup(sc, channel, interface) == 0) 135 continue; 136 pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 137 pciide_pci_intr); 138 } 139 } 140 141 /* Values from linux driver */ 142 static const uint8_t ixp_pio_timings[] = { 143 0x5d, 0x47, 0x34, 0x22, 0x20 144 }; 145 146 static const uint8_t ixp_mdma_timings[] = { 147 0x77, 0x21, 0x20 148 }; 149 150 static void 151 ixp_setup_channel(struct ata_channel *chp) 152 { 153 int drive, s; 154 struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 155 pcireg_t udma, mdma_timing, pio, pio_timing; 156 struct ata_drive_datas *drvp; 157 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 158 159 pio_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING); 160 pio = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL); 161 mdma_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING); 162 udma = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL); 163 164 pciide_channel_dma_setup(cp); 165 166 for (drive = 0; drive < 2; drive++) { 167 drvp = &chp->ch_drive[drive]; 168 if ((drvp->drive_flags & DRIVE) == 0) 169 continue; 170 if (drvp->drive_flags & DRIVE_UDMA) { 171 s = splbio(); 172 drvp->drive_flags &= ~DRIVE_DMA; 173 splx(s); 174 IXP_UDMA_ENABLE(udma, chp->ch_channel, drive); 175 IXP_SET_MODE(udma, chp->ch_channel, drive, drvp->UDMA_mode); 176 } else if (drvp->drive_flags & DRIVE_DMA) { 177 IXP_UDMA_DISABLE(udma, chp->ch_channel, drive); 178 IXP_SET_TIMING(mdma_timing, chp->ch_channel, drive, 179 ixp_mdma_timings[drvp->DMA_mode]); 180 } else 181 IXP_UDMA_DISABLE(udma, chp->ch_channel, drive); 182 183 /* 184 * Set PIO mode and timings 185 * Linux driver avoids PIO mode 1, let's do it too. 186 */ 187 if (drvp->PIO_mode == 1) 188 drvp->PIO_mode = 0; 189 190 IXP_SET_MODE(pio, chp->ch_channel, drive, drvp->PIO_mode); 191 IXP_SET_TIMING(pio_timing, chp->ch_channel, drive, 192 ixp_pio_timings[drvp->PIO_mode]); 193 } 194 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL, udma); 195 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING, mdma_timing); 196 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL, pio); 197 pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING, pio_timing); 198 ATADEBUG_PRINT(("ixp_setup_channel: udma = %08x, mdma_timing = %08x, pio_mode = %08x," 199 " pio_timing = %08x\n", udma, mdma_timing, pio, pio_timing), DEBUG_PROBE); 200 } 201
Indexes created Wed Sep 24 05:09:52 GMT 2025