jmide.c revision 1.2.16.2
1 1.2.16.2 wrstuden /* $NetBSD: jmide.c,v 1.2.16.2 2007/09/03 07:04:35 wrstuden Exp $ */ 2 1.2.16.2 wrstuden 3 1.2.16.2 wrstuden /* 4 1.2.16.2 wrstuden * Copyright (c) 2007 Manuel Bouyer. 5 1.2.16.2 wrstuden * 6 1.2.16.2 wrstuden * Redistribution and use in source and binary forms, with or without 7 1.2.16.2 wrstuden * modification, are permitted provided that the following conditions 8 1.2.16.2 wrstuden * are met: 9 1.2.16.2 wrstuden * 1. Redistributions of source code must retain the above copyright 10 1.2.16.2 wrstuden * notice, this list of conditions and the following disclaimer. 11 1.2.16.2 wrstuden * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.16.2 wrstuden * notice, this list of conditions and the following disclaimer in the 13 1.2.16.2 wrstuden * documentation and/or other materials provided with the distribution. 14 1.2.16.2 wrstuden * 3. All advertising materials mentioning features or use of this software 15 1.2.16.2 wrstuden * must display the following acknowledgement: 16 1.2.16.2 wrstuden * This product includes software developed by Manuel Bouyer. 17 1.2.16.2 wrstuden * 4. The name of the author may not be used to endorse or promote products 18 1.2.16.2 wrstuden * derived from this software without specific prior written permission. 19 1.2.16.2 wrstuden * 20 1.2.16.2 wrstuden * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.2.16.2 wrstuden * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.2.16.2 wrstuden * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.2.16.2 wrstuden * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.2.16.2 wrstuden * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.2.16.2 wrstuden * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.2.16.2 wrstuden * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.2.16.2 wrstuden * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.2.16.2 wrstuden * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.2.16.2 wrstuden * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.2.16.2 wrstuden */ 31 1.2.16.2 wrstuden 32 1.2.16.2 wrstuden #include <sys/cdefs.h> 33 1.2.16.2 wrstuden __KERNEL_RCSID(0, "$NetBSD: jmide.c,v 1.2.16.2 2007/09/03 07:04:35 wrstuden Exp $"); 34 1.2.16.2 wrstuden 35 1.2.16.2 wrstuden #include <sys/param.h> 36 1.2.16.2 wrstuden #include <sys/systm.h> 37 1.2.16.2 wrstuden #include <sys/malloc.h> 38 1.2.16.2 wrstuden 39 1.2.16.2 wrstuden #include <dev/pci/pcivar.h> 40 1.2.16.2 wrstuden #include <dev/pci/pcidevs.h> 41 1.2.16.2 wrstuden #include <dev/pci/pciidereg.h> 42 1.2.16.2 wrstuden #include <dev/pci/pciidevar.h> 43 1.2.16.2 wrstuden 44 1.2.16.2 wrstuden #include <dev/pci/jmide_reg.h> 45 1.2.16.2 wrstuden 46 1.2.16.2 wrstuden #include <dev/ic/ahcisatavar.h> 47 1.2.16.2 wrstuden 48 1.2.16.2 wrstuden #include "jmide.h" 49 1.2.16.2 wrstuden 50 1.2.16.2 wrstuden static const struct jmide_product *jmide_lookup(pcireg_t); 51 1.2.16.2 wrstuden 52 1.2.16.2 wrstuden static int jmide_match(struct device *, struct cfdata *, void *); 53 1.2.16.2 wrstuden static void jmide_attach(struct device *, struct device *, void *); 54 1.2.16.2 wrstuden static int jmide_intr(void *); 55 1.2.16.2 wrstuden 56 1.2.16.2 wrstuden static void jmpata_chip_map(struct pciide_softc*, struct pci_attach_args*); 57 1.2.16.2 wrstuden static void jmpata_setup_channel(struct ata_channel*); 58 1.2.16.2 wrstuden 59 1.2.16.2 wrstuden static int jmahci_print(void *, const char *); 60 1.2.16.2 wrstuden 61 1.2.16.2 wrstuden struct jmide_product { 62 1.2.16.2 wrstuden u_int32_t jm_product; 63 1.2.16.2 wrstuden int jm_npata; 64 1.2.16.2 wrstuden int jm_nsata; 65 1.2.16.2 wrstuden }; 66 1.2.16.2 wrstuden 67 1.2.16.2 wrstuden static const struct jmide_product jm_products[] = { 68 1.2.16.2 wrstuden { PCI_PRODUCT_JMICRON_JMB360, 69 1.2.16.2 wrstuden 0, 70 1.2.16.2 wrstuden 1 71 1.2.16.2 wrstuden }, 72 1.2.16.2 wrstuden { PCI_PRODUCT_JMICRON_JMB361, 73 1.2.16.2 wrstuden 1, 74 1.2.16.2 wrstuden 1 75 1.2.16.2 wrstuden }, 76 1.2.16.2 wrstuden { PCI_PRODUCT_JMICRON_JMB363, 77 1.2.16.2 wrstuden 1, 78 1.2.16.2 wrstuden 2 79 1.2.16.2 wrstuden }, 80 1.2.16.2 wrstuden { PCI_PRODUCT_JMICRON_JMB365, 81 1.2.16.2 wrstuden 2, 82 1.2.16.2 wrstuden 1 83 1.2.16.2 wrstuden }, 84 1.2.16.2 wrstuden { PCI_PRODUCT_JMICRON_JMB366, 85 1.2.16.2 wrstuden 2, 86 1.2.16.2 wrstuden 2 87 1.2.16.2 wrstuden }, 88 1.2.16.2 wrstuden { PCI_PRODUCT_JMICRON_JMB368, 89 1.2.16.2 wrstuden 1, 90 1.2.16.2 wrstuden 0 91 1.2.16.2 wrstuden }, 92 1.2.16.2 wrstuden { 0, 93 1.2.16.2 wrstuden 0, 94 1.2.16.2 wrstuden 0 95 1.2.16.2 wrstuden } 96 1.2.16.2 wrstuden }; 97 1.2.16.2 wrstuden 98 1.2.16.2 wrstuden typedef enum { 99 1.2.16.2 wrstuden TYPE_INVALID = 0, 100 1.2.16.2 wrstuden TYPE_PATA, 101 1.2.16.2 wrstuden TYPE_SATA, 102 1.2.16.2 wrstuden TYPE_NONE 103 1.2.16.2 wrstuden } jmchan_t; 104 1.2.16.2 wrstuden 105 1.2.16.2 wrstuden struct jmide_softc { 106 1.2.16.2 wrstuden struct pciide_softc sc_pciide; 107 1.2.16.2 wrstuden void *sc_ahci; 108 1.2.16.2 wrstuden int sc_npata; 109 1.2.16.2 wrstuden int sc_nsata; 110 1.2.16.2 wrstuden jmchan_t sc_chan_type[PCIIDE_NUM_CHANNELS]; 111 1.2.16.2 wrstuden int sc_chan_swap; 112 1.2.16.2 wrstuden }; 113 1.2.16.2 wrstuden 114 1.2.16.2 wrstuden struct jmahci_attach_args { 115 1.2.16.2 wrstuden struct pci_attach_args *jma_pa; 116 1.2.16.2 wrstuden bus_space_tag_t jma_ahcit; 117 1.2.16.2 wrstuden bus_space_handle_t jma_ahcih; 118 1.2.16.2 wrstuden }; 119 1.2.16.2 wrstuden 120 1.2.16.2 wrstuden #define JM_NAME(sc) (sc->sc_pciide.sc_wdcdev.sc_atac.atac_dev.dv_xname) 121 1.2.16.2 wrstuden 122 1.2.16.2 wrstuden CFATTACH_DECL(jmide, sizeof(struct jmide_softc), 123 1.2.16.2 wrstuden jmide_match, jmide_attach, NULL, NULL); 124 1.2.16.2 wrstuden 125 1.2.16.2 wrstuden static const struct jmide_product * 126 1.2.16.2 wrstuden jmide_lookup(pcireg_t id) { 127 1.2.16.2 wrstuden const struct jmide_product *jp; 128 1.2.16.2 wrstuden 129 1.2.16.2 wrstuden for (jp = jm_products; jp->jm_product != 0; jp++) { 130 1.2.16.2 wrstuden if (jp->jm_product == PCI_PRODUCT(id)) 131 1.2.16.2 wrstuden return jp; 132 1.2.16.2 wrstuden } 133 1.2.16.2 wrstuden return NULL; 134 1.2.16.2 wrstuden } 135 1.2.16.2 wrstuden 136 1.2.16.2 wrstuden static int 137 1.2.16.2 wrstuden jmide_match(struct device *parent, struct cfdata *match, 138 1.2.16.2 wrstuden void *aux) 139 1.2.16.2 wrstuden { 140 1.2.16.2 wrstuden struct pci_attach_args *pa = aux; 141 1.2.16.2 wrstuden 142 1.2.16.2 wrstuden if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_JMICRON) { 143 1.2.16.2 wrstuden if (jmide_lookup(pa->pa_id)) 144 1.2.16.2 wrstuden return (4); /* highter than ahcisata */ 145 1.2.16.2 wrstuden } 146 1.2.16.2 wrstuden return (0); 147 1.2.16.2 wrstuden } 148 1.2.16.2 wrstuden 149 1.2.16.2 wrstuden static void 150 1.2.16.2 wrstuden jmide_attach(struct device *parent, struct device *self, void *aux) 151 1.2.16.2 wrstuden { 152 1.2.16.2 wrstuden struct pci_attach_args *pa = aux; 153 1.2.16.2 wrstuden struct jmide_softc *sc = (struct jmide_softc *)self; 154 1.2.16.2 wrstuden const struct jmide_product *jp; 155 1.2.16.2 wrstuden char devinfo[256]; 156 1.2.16.2 wrstuden const char *intrstr; 157 1.2.16.2 wrstuden pci_intr_handle_t intrhandle; 158 1.2.16.2 wrstuden u_int32_t pcictrl0 = pci_conf_read(pa->pa_pc, pa->pa_tag, 159 1.2.16.2 wrstuden PCI_JM_CONTROL0); 160 1.2.16.2 wrstuden u_int32_t pcictrl1 = pci_conf_read(pa->pa_pc, pa->pa_tag, 161 1.2.16.2 wrstuden PCI_JM_CONTROL1); 162 1.2.16.2 wrstuden struct pciide_product_desc *pp; 163 1.2.16.2 wrstuden int ahci_used = 0; 164 1.2.16.2 wrstuden 165 1.2.16.2 wrstuden jp = jmide_lookup(pa->pa_id); 166 1.2.16.2 wrstuden if (jp == NULL) { 167 1.2.16.2 wrstuden printf("jmide_attach: WTF?\n"); 168 1.2.16.2 wrstuden return; 169 1.2.16.2 wrstuden } 170 1.2.16.2 wrstuden sc->sc_npata = jp->jm_npata; 171 1.2.16.2 wrstuden sc->sc_nsata = jp->jm_nsata; 172 1.2.16.2 wrstuden 173 1.2.16.2 wrstuden pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 174 1.2.16.2 wrstuden aprint_naive(": JMICRON PATA/SATA disk controller\n"); 175 1.2.16.2 wrstuden aprint_normal(": %s\n", devinfo); 176 1.2.16.2 wrstuden 177 1.2.16.2 wrstuden aprint_normal("%s: ", JM_NAME(sc)); 178 1.2.16.2 wrstuden if (sc->sc_npata) 179 1.2.16.2 wrstuden aprint_normal("%d PATA port%s", sc->sc_npata, 180 1.2.16.2 wrstuden (sc->sc_npata > 1) ? "s" : ""); 181 1.2.16.2 wrstuden if (sc->sc_nsata) 182 1.2.16.2 wrstuden aprint_normal("%s%d SATA port%s", sc->sc_npata ? ", " : "", 183 1.2.16.2 wrstuden sc->sc_nsata, (sc->sc_nsata > 1) ? "s" : ""); 184 1.2.16.2 wrstuden aprint_normal("\n"); 185 1.2.16.2 wrstuden 186 1.2.16.2 wrstuden if (pci_intr_map(pa, &intrhandle) != 0) { 187 1.2.16.2 wrstuden aprint_error("%s: couldn't map interrupt\n", JM_NAME(sc)); 188 1.2.16.2 wrstuden return; 189 1.2.16.2 wrstuden } 190 1.2.16.2 wrstuden intrstr = pci_intr_string(pa->pa_pc, intrhandle); 191 1.2.16.2 wrstuden sc->sc_pciide.sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, 192 1.2.16.2 wrstuden IPL_BIO, jmide_intr, sc); 193 1.2.16.2 wrstuden if (sc->sc_pciide.sc_pci_ih == NULL) { 194 1.2.16.2 wrstuden aprint_error("%s: couldn't establish interrupt", JM_NAME(sc)); 195 1.2.16.2 wrstuden return; 196 1.2.16.2 wrstuden } 197 1.2.16.2 wrstuden aprint_normal("%s: interrupting at %s\n", JM_NAME(sc), 198 1.2.16.2 wrstuden intrstr ? intrstr : "unknown interrupt"); 199 1.2.16.2 wrstuden 200 1.2.16.2 wrstuden if (pcictrl0 & JM_CONTROL0_AHCI_EN) { 201 1.2.16.2 wrstuden bus_size_t size; 202 1.2.16.2 wrstuden struct jmahci_attach_args jma; 203 1.2.16.2 wrstuden u_int32_t saved_pcictrl0; 204 1.2.16.2 wrstuden /* 205 1.2.16.2 wrstuden * ahci controller enabled; disable sata on pciide and 206 1.2.16.2 wrstuden * enable on ahci 207 1.2.16.2 wrstuden */ 208 1.2.16.2 wrstuden saved_pcictrl0 = pcictrl0; 209 1.2.16.2 wrstuden pcictrl0 |= JM_CONTROL0_SATA0_AHCI | JM_CONTROL0_SATA1_AHCI; 210 1.2.16.2 wrstuden pcictrl0 &= ~(JM_CONTROL0_SATA0_IDE | JM_CONTROL0_SATA1_IDE); 211 1.2.16.2 wrstuden pci_conf_write(pa->pa_pc, pa->pa_tag, 212 1.2.16.2 wrstuden PCI_JM_CONTROL0, pcictrl0); 213 1.2.16.2 wrstuden /* attach ahci controller if on the right function */ 214 1.2.16.2 wrstuden if ((pa->pa_function == 0 && 215 1.2.16.2 wrstuden (pcictrl0 & JM_CONTROL0_AHCI_F1) == 0) || 216 1.2.16.2 wrstuden (pa->pa_function == 1 && 217 1.2.16.2 wrstuden (pcictrl0 & JM_CONTROL0_AHCI_F1) != 0)) { 218 1.2.16.2 wrstuden jma.jma_pa = pa; 219 1.2.16.2 wrstuden /* map registers */ 220 1.2.16.2 wrstuden if (pci_mapreg_map(pa, AHCI_PCI_ABAR, 221 1.2.16.2 wrstuden PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 222 1.2.16.2 wrstuden &jma.jma_ahcit, &jma.jma_ahcih, NULL, &size) != 0) { 223 1.2.16.2 wrstuden aprint_error("%s: can't map ahci registers\n", 224 1.2.16.2 wrstuden JM_NAME(sc)); 225 1.2.16.2 wrstuden } else { 226 1.2.16.2 wrstuden sc->sc_ahci = config_found_ia( 227 1.2.16.2 wrstuden &sc->sc_pciide.sc_wdcdev.sc_atac.atac_dev, 228 1.2.16.2 wrstuden "jmide_hl", &jma, jmahci_print); 229 1.2.16.2 wrstuden } 230 1.2.16.2 wrstuden /* 231 1.2.16.2 wrstuden * if we couldn't attach an ahci, try to fall back 232 1.2.16.2 wrstuden * to pciide. Note that this will not work if IDE 233 1.2.16.2 wrstuden * is on function 0 and AHCI on function 1. 234 1.2.16.2 wrstuden */ 235 1.2.16.2 wrstuden if (sc->sc_ahci == NULL) { 236 1.2.16.2 wrstuden pcictrl0 = saved_pcictrl0 & 237 1.2.16.2 wrstuden ~(JM_CONTROL0_SATA0_AHCI | 238 1.2.16.2 wrstuden JM_CONTROL0_SATA1_AHCI | 239 1.2.16.2 wrstuden JM_CONTROL0_AHCI_EN); 240 1.2.16.2 wrstuden pcictrl0 |= JM_CONTROL0_SATA1_IDE | 241 1.2.16.2 wrstuden JM_CONTROL0_SATA0_IDE; 242 1.2.16.2 wrstuden pci_conf_write(pa->pa_pc, pa->pa_tag, 243 1.2.16.2 wrstuden PCI_JM_CONTROL0, pcictrl0); 244 1.2.16.2 wrstuden } else 245 1.2.16.2 wrstuden ahci_used = 1; 246 1.2.16.2 wrstuden } 247 1.2.16.2 wrstuden } 248 1.2.16.2 wrstuden sc->sc_chan_swap = ((pcictrl0 & JM_CONTROL0_PCIIDE_CS) != 0); 249 1.2.16.2 wrstuden /* compute the type of internal primary channel */ 250 1.2.16.2 wrstuden if (pcictrl1 & JM_CONTROL1_PATA1_PRI) { 251 1.2.16.2 wrstuden if (sc->sc_npata > 1) 252 1.2.16.2 wrstuden sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_PATA; 253 1.2.16.2 wrstuden else 254 1.2.16.2 wrstuden sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_NONE; 255 1.2.16.2 wrstuden } else if (ahci_used == 0 && sc->sc_nsata > 0) 256 1.2.16.2 wrstuden sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_SATA; 257 1.2.16.2 wrstuden else 258 1.2.16.2 wrstuden sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_NONE; 259 1.2.16.2 wrstuden /* compute the type of internal secondary channel */ 260 1.2.16.2 wrstuden if (sc->sc_nsata > 1 && ahci_used == 0 && 261 1.2.16.2 wrstuden (pcictrl0 & JM_CONTROL0_PCIIDE0_MS) == 0) { 262 1.2.16.2 wrstuden sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_SATA; 263 1.2.16.2 wrstuden } else { 264 1.2.16.2 wrstuden /* only a drive if first PATA enabled */ 265 1.2.16.2 wrstuden if (sc->sc_npata > 0 && (pcictrl0 & JM_CONTROL0_PATA0_EN) 266 1.2.16.2 wrstuden && (pcictrl0 & 267 1.2.16.2 wrstuden (sc->sc_chan_swap ? JM_CONTROL0_PATA0_PRI: JM_CONTROL0_PATA0_SEC))) 268 1.2.16.2 wrstuden sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_PATA; 269 1.2.16.2 wrstuden else 270 1.2.16.2 wrstuden sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_NONE; 271 1.2.16.2 wrstuden } 272 1.2.16.2 wrstuden 273 1.2.16.2 wrstuden if (sc->sc_chan_type[0] == TYPE_NONE && 274 1.2.16.2 wrstuden sc->sc_chan_type[1] == TYPE_NONE) 275 1.2.16.2 wrstuden return; 276 1.2.16.2 wrstuden if (pa->pa_function == 0 && (pcictrl0 & JM_CONTROL0_PCIIDE_F1)) 277 1.2.16.2 wrstuden return; 278 1.2.16.2 wrstuden if (pa->pa_function == 1 && (pcictrl0 & JM_CONTROL0_PCIIDE_F1) == 0) 279 1.2.16.2 wrstuden return; 280 1.2.16.2 wrstuden pp = malloc(sizeof(struct pciide_product_desc), M_DEVBUF, M_NOWAIT); 281 1.2.16.2 wrstuden if (pp == NULL) { 282 1.2.16.2 wrstuden aprint_error("%s: can't malloc sc_pp\n", JM_NAME(sc)); 283 1.2.16.2 wrstuden return; 284 1.2.16.2 wrstuden } 285 1.2.16.2 wrstuden aprint_normal("%s: PCI IDE interface used", JM_NAME(sc)); 286 1.2.16.2 wrstuden pp->ide_product = 0; 287 1.2.16.2 wrstuden pp->ide_flags = 0; 288 1.2.16.2 wrstuden pp->ide_name = NULL; 289 1.2.16.2 wrstuden pp->chip_map = jmpata_chip_map; 290 1.2.16.2 wrstuden pciide_common_attach(&sc->sc_pciide, pa, pp); 291 1.2.16.2 wrstuden 292 1.2.16.2 wrstuden } 293 1.2.16.2 wrstuden 294 1.2.16.2 wrstuden static int 295 1.2.16.2 wrstuden jmide_intr(void *arg) 296 1.2.16.2 wrstuden { 297 1.2.16.2 wrstuden struct jmide_softc *sc = arg; 298 1.2.16.2 wrstuden int ret = 0; 299 1.2.16.2 wrstuden 300 1.2.16.2 wrstuden #ifdef NJMAHCI 301 1.2.16.2 wrstuden if (sc->sc_ahci) 302 1.2.16.2 wrstuden ret |= ahci_intr(sc->sc_ahci); 303 1.2.16.2 wrstuden #endif 304 1.2.16.2 wrstuden if (sc->sc_npata) 305 1.2.16.2 wrstuden ret |= pciide_pci_intr(&sc->sc_pciide); 306 1.2.16.2 wrstuden return ret; 307 1.2.16.2 wrstuden } 308 1.2.16.2 wrstuden 309 1.2.16.2 wrstuden static void 310 1.2.16.2 wrstuden jmpata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 311 1.2.16.2 wrstuden { 312 1.2.16.2 wrstuden struct jmide_softc *jmidesc = (struct jmide_softc *)sc; 313 1.2.16.2 wrstuden int channel; 314 1.2.16.2 wrstuden pcireg_t interface; 315 1.2.16.2 wrstuden bus_size_t cmdsize, ctlsize; 316 1.2.16.2 wrstuden struct pciide_channel *cp; 317 1.2.16.2 wrstuden 318 1.2.16.2 wrstuden if (pciide_chipen(sc, pa) == 0) 319 1.2.16.2 wrstuden return; 320 1.2.16.2 wrstuden aprint_verbose("%s: bus-master DMA support present", JM_NAME(jmidesc)); 321 1.2.16.2 wrstuden pciide_mapreg_dma(sc, pa); 322 1.2.16.2 wrstuden aprint_verbose("\n"); 323 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 324 1.2.16.2 wrstuden if (sc->sc_dma_ok) { 325 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 326 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 327 1.2.16.2 wrstuden } 328 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 329 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 330 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_set_modes = jmpata_setup_channel; 331 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 332 1.2.16.2 wrstuden sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 333 1.2.16.2 wrstuden wdc_allocate_regs(&sc->sc_wdcdev); 334 1.2.16.2 wrstuden /* 335 1.2.16.2 wrstuden * can't rely on the PCI_CLASS_REG content if the chip was in raid 336 1.2.16.2 wrstuden * mode. We have to fake interface 337 1.2.16.2 wrstuden */ 338 1.2.16.2 wrstuden interface = PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); 339 1.2.16.2 wrstuden for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 340 1.2.16.2 wrstuden channel++) { 341 1.2.16.2 wrstuden cp = &sc->pciide_channels[channel]; 342 1.2.16.2 wrstuden if (pciide_chansetup(sc, channel, interface) == 0) 343 1.2.16.2 wrstuden continue; 344 1.2.16.2 wrstuden aprint_normal("%s: %s channel is ", JM_NAME(jmidesc), 345 1.2.16.2 wrstuden PCIIDE_CHANNEL_NAME(channel)); 346 1.2.16.2 wrstuden switch(jmidesc->sc_chan_type[channel]) { 347 1.2.16.2 wrstuden case TYPE_PATA: 348 1.2.16.2 wrstuden aprint_normal("PATA"); 349 1.2.16.2 wrstuden break; 350 1.2.16.2 wrstuden case TYPE_SATA: 351 1.2.16.2 wrstuden aprint_normal("SATA"); 352 1.2.16.2 wrstuden break; 353 1.2.16.2 wrstuden case TYPE_NONE: 354 1.2.16.2 wrstuden aprint_normal("unused"); 355 1.2.16.2 wrstuden break; 356 1.2.16.2 wrstuden default: 357 1.2.16.2 wrstuden aprint_normal("impossible"); 358 1.2.16.2 wrstuden panic("jmide: wrong/uninitialised channel type"); 359 1.2.16.2 wrstuden } 360 1.2.16.2 wrstuden aprint_normal("\n"); 361 1.2.16.2 wrstuden if (jmidesc->sc_chan_type[channel] == TYPE_NONE) { 362 1.2.16.2 wrstuden cp->ata_channel.ch_flags |= ATACH_DISABLED; 363 1.2.16.2 wrstuden continue; 364 1.2.16.2 wrstuden } 365 1.2.16.2 wrstuden pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 366 1.2.16.2 wrstuden pciide_pci_intr); 367 1.2.16.2 wrstuden } 368 1.2.16.2 wrstuden } 369 1.2.16.2 wrstuden 370 1.2.16.2 wrstuden static void 371 1.2.16.2 wrstuden jmpata_setup_channel(struct ata_channel *chp) 372 1.2.16.2 wrstuden { 373 1.2.16.2 wrstuden struct ata_drive_datas *drvp; 374 1.2.16.2 wrstuden int drive, s; 375 1.2.16.2 wrstuden u_int32_t idedma_ctl; 376 1.2.16.2 wrstuden struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 377 1.2.16.2 wrstuden struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 378 1.2.16.2 wrstuden struct jmide_softc *jmidesc = (struct jmide_softc *)sc; 379 1.2.16.2 wrstuden int ide80p; 380 1.2.16.2 wrstuden 381 1.2.16.2 wrstuden /* setup DMA if needed */ 382 1.2.16.2 wrstuden pciide_channel_dma_setup(cp); 383 1.2.16.2 wrstuden 384 1.2.16.2 wrstuden idedma_ctl = 0; 385 1.2.16.2 wrstuden 386 1.2.16.2 wrstuden /* cable type detect */ 387 1.2.16.2 wrstuden ide80p = 1; 388 1.2.16.2 wrstuden if (chp->ch_channel == (jmidesc->sc_chan_swap ? 1 : 0)) { 389 1.2.16.2 wrstuden if (jmidesc->sc_chan_type[chp->ch_channel] == TYPE_PATA && 390 1.2.16.2 wrstuden (pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_JM_CONTROL1) & 391 1.2.16.2 wrstuden JM_CONTROL1_PATA1_40P)) 392 1.2.16.2 wrstuden ide80p = 0; 393 1.2.16.2 wrstuden } else { 394 1.2.16.2 wrstuden if (jmidesc->sc_chan_type[chp->ch_channel] == TYPE_PATA && 395 1.2.16.2 wrstuden (pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_JM_CONTROL0) & 396 1.2.16.2 wrstuden JM_CONTROL0_PATA0_40P)) 397 1.2.16.2 wrstuden ide80p = 0; 398 1.2.16.2 wrstuden } 399 1.2.16.2 wrstuden 400 1.2.16.2 wrstuden for (drive = 0; drive < 2; drive++) { 401 1.2.16.2 wrstuden drvp = &chp->ch_drive[drive]; 402 1.2.16.2 wrstuden /* If no drive, skip */ 403 1.2.16.2 wrstuden if ((drvp->drive_flags & DRIVE) == 0) 404 1.2.16.2 wrstuden continue; 405 1.2.16.2 wrstuden if (drvp->drive_flags & DRIVE_UDMA) { 406 1.2.16.2 wrstuden /* use Ultra/DMA */ 407 1.2.16.2 wrstuden s = splbio(); 408 1.2.16.2 wrstuden drvp->drive_flags &= ~DRIVE_DMA; 409 1.2.16.2 wrstuden if (drvp->UDMA_mode > 2 && ide80p == 0) 410 1.2.16.2 wrstuden drvp->UDMA_mode = 2; 411 1.2.16.2 wrstuden splx(s); 412 1.2.16.2 wrstuden idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 413 1.2.16.2 wrstuden } else if (drvp->drive_flags & DRIVE_DMA) { 414 1.2.16.2 wrstuden idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 415 1.2.16.2 wrstuden } 416 1.2.16.2 wrstuden } 417 1.2.16.2 wrstuden /* nothing to do to setup modes, the controller snoop SET_FEATURE cmd */ 418 1.2.16.2 wrstuden if (idedma_ctl != 0) { 419 1.2.16.2 wrstuden /* Add software bits in status register */ 420 1.2.16.2 wrstuden bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 421 1.2.16.2 wrstuden 0, idedma_ctl); 422 1.2.16.2 wrstuden } 423 1.2.16.2 wrstuden } 424 1.2.16.2 wrstuden 425 1.2.16.2 wrstuden static int 426 1.2.16.2 wrstuden jmahci_print(void *aux, const char *pnp) 427 1.2.16.2 wrstuden { 428 1.2.16.2 wrstuden if (pnp) 429 1.2.16.2 wrstuden aprint_normal("ahcisata at %s", pnp); 430 1.2.16.2 wrstuden 431 1.2.16.2 wrstuden return (UNCONF); 432 1.2.16.2 wrstuden } 433 1.2.16.2 wrstuden 434 1.2.16.2 wrstuden 435 1.2.16.2 wrstuden #ifdef NJMAHCI 436 1.2.16.2 wrstuden static int jmahci_match(struct device *, struct cfdata *, void *); 437 1.2.16.2 wrstuden static void jmahci_attach(struct device *, struct device *, void *); 438 1.2.16.2 wrstuden 439 1.2.16.2 wrstuden CFATTACH_DECL(jmahci, sizeof(struct ahci_softc), 440 1.2.16.2 wrstuden jmahci_match, jmahci_attach, NULL, NULL); 441 1.2.16.2 wrstuden 442 1.2.16.2 wrstuden static int 443 1.2.16.2 wrstuden jmahci_match(struct device *parent, struct cfdata *match, void *aux) 444 1.2.16.2 wrstuden { 445 1.2.16.2 wrstuden return 1; 446 1.2.16.2 wrstuden } 447 1.2.16.2 wrstuden 448 1.2.16.2 wrstuden static void 449 1.2.16.2 wrstuden jmahci_attach(struct device *parent, struct device *self, void *aux) 450 1.2.16.2 wrstuden { 451 1.2.16.2 wrstuden struct jmahci_attach_args *jma = aux; 452 1.2.16.2 wrstuden struct ahci_softc *sc = (struct ahci_softc *)self; 453 1.2.16.2 wrstuden 454 1.2.16.2 wrstuden aprint_naive(": AHCI disk controller\n"); 455 1.2.16.2 wrstuden aprint_normal("\n"); 456 1.2.16.2 wrstuden 457 1.2.16.2 wrstuden sc->sc_ahcit = jma->jma_ahcit; 458 1.2.16.2 wrstuden sc->sc_ahcih = jma->jma_ahcih; 459 1.2.16.2 wrstuden sc->sc_dmat = jma->jma_pa->pa_dmat; 460 1.2.16.2 wrstuden ahci_attach(sc); 461 1.2.16.2 wrstuden } 462 1.2.16.2 wrstuden #endif 463
Indexes created Tue Oct 21 05:10:09 GMT 2025