jmide.c revision 1.2.18.4
1 1.2.18.4 yamt /* $NetBSD: jmide.c,v 1.2.18.4 2008/03/24 09:38:51 yamt Exp $ */ 2 1.2.18.2 yamt 3 1.2.18.2 yamt /* 4 1.2.18.2 yamt * Copyright (c) 2007 Manuel Bouyer. 5 1.2.18.2 yamt * 6 1.2.18.2 yamt * Redistribution and use in source and binary forms, with or without 7 1.2.18.2 yamt * modification, are permitted provided that the following conditions 8 1.2.18.2 yamt * are met: 9 1.2.18.2 yamt * 1. Redistributions of source code must retain the above copyright 10 1.2.18.2 yamt * notice, this list of conditions and the following disclaimer. 11 1.2.18.2 yamt * 2. Redistributions in binary form must reproduce the above copyright 12 1.2.18.2 yamt * notice, this list of conditions and the following disclaimer in the 13 1.2.18.2 yamt * documentation and/or other materials provided with the distribution. 14 1.2.18.2 yamt * 3. All advertising materials mentioning features or use of this software 15 1.2.18.2 yamt * must display the following acknowledgement: 16 1.2.18.2 yamt * This product includes software developed by Manuel Bouyer. 17 1.2.18.2 yamt * 4. The name of the author may not be used to endorse or promote products 18 1.2.18.2 yamt * derived from this software without specific prior written permission. 19 1.2.18.2 yamt * 20 1.2.18.2 yamt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 1.2.18.2 yamt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 1.2.18.2 yamt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 1.2.18.2 yamt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 1.2.18.2 yamt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 1.2.18.2 yamt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 1.2.18.2 yamt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 1.2.18.2 yamt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 1.2.18.2 yamt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 1.2.18.2 yamt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 1.2.18.2 yamt */ 31 1.2.18.2 yamt 32 1.2.18.2 yamt #include <sys/cdefs.h> 33 1.2.18.4 yamt __KERNEL_RCSID(0, "$NetBSD: jmide.c,v 1.2.18.4 2008/03/24 09:38:51 yamt Exp $"); 34 1.2.18.2 yamt 35 1.2.18.2 yamt #include <sys/param.h> 36 1.2.18.2 yamt #include <sys/systm.h> 37 1.2.18.2 yamt #include <sys/malloc.h> 38 1.2.18.2 yamt 39 1.2.18.2 yamt #include <dev/pci/pcivar.h> 40 1.2.18.2 yamt #include <dev/pci/pcidevs.h> 41 1.2.18.2 yamt #include <dev/pci/pciidereg.h> 42 1.2.18.2 yamt #include <dev/pci/pciidevar.h> 43 1.2.18.2 yamt 44 1.2.18.2 yamt #include <dev/pci/jmide_reg.h> 45 1.2.18.2 yamt 46 1.2.18.2 yamt #include <dev/ic/ahcisatavar.h> 47 1.2.18.2 yamt 48 1.2.18.2 yamt #include "jmide.h" 49 1.2.18.2 yamt 50 1.2.18.2 yamt static const struct jmide_product *jmide_lookup(pcireg_t); 51 1.2.18.2 yamt 52 1.2.18.4 yamt static int jmide_match(device_t, cfdata_t, void *); 53 1.2.18.4 yamt static void jmide_attach(device_t, device_t, void *); 54 1.2.18.2 yamt static int jmide_intr(void *); 55 1.2.18.2 yamt 56 1.2.18.2 yamt static void jmpata_chip_map(struct pciide_softc*, struct pci_attach_args*); 57 1.2.18.2 yamt static void jmpata_setup_channel(struct ata_channel*); 58 1.2.18.2 yamt 59 1.2.18.2 yamt static int jmahci_print(void *, const char *); 60 1.2.18.2 yamt 61 1.2.18.2 yamt struct jmide_product { 62 1.2.18.2 yamt u_int32_t jm_product; 63 1.2.18.2 yamt int jm_npata; 64 1.2.18.2 yamt int jm_nsata; 65 1.2.18.2 yamt }; 66 1.2.18.2 yamt 67 1.2.18.2 yamt static const struct jmide_product jm_products[] = { 68 1.2.18.2 yamt { PCI_PRODUCT_JMICRON_JMB360, 69 1.2.18.2 yamt 0, 70 1.2.18.2 yamt 1 71 1.2.18.2 yamt }, 72 1.2.18.2 yamt { PCI_PRODUCT_JMICRON_JMB361, 73 1.2.18.2 yamt 1, 74 1.2.18.2 yamt 1 75 1.2.18.2 yamt }, 76 1.2.18.2 yamt { PCI_PRODUCT_JMICRON_JMB363, 77 1.2.18.2 yamt 1, 78 1.2.18.2 yamt 2 79 1.2.18.2 yamt }, 80 1.2.18.2 yamt { PCI_PRODUCT_JMICRON_JMB365, 81 1.2.18.2 yamt 2, 82 1.2.18.2 yamt 1 83 1.2.18.2 yamt }, 84 1.2.18.2 yamt { PCI_PRODUCT_JMICRON_JMB366, 85 1.2.18.2 yamt 2, 86 1.2.18.2 yamt 2 87 1.2.18.2 yamt }, 88 1.2.18.2 yamt { PCI_PRODUCT_JMICRON_JMB368, 89 1.2.18.2 yamt 1, 90 1.2.18.2 yamt 0 91 1.2.18.2 yamt }, 92 1.2.18.2 yamt { 0, 93 1.2.18.2 yamt 0, 94 1.2.18.2 yamt 0 95 1.2.18.2 yamt } 96 1.2.18.2 yamt }; 97 1.2.18.2 yamt 98 1.2.18.2 yamt typedef enum { 99 1.2.18.2 yamt TYPE_INVALID = 0, 100 1.2.18.2 yamt TYPE_PATA, 101 1.2.18.2 yamt TYPE_SATA, 102 1.2.18.2 yamt TYPE_NONE 103 1.2.18.2 yamt } jmchan_t; 104 1.2.18.2 yamt 105 1.2.18.2 yamt struct jmide_softc { 106 1.2.18.2 yamt struct pciide_softc sc_pciide; 107 1.2.18.2 yamt void *sc_ahci; 108 1.2.18.2 yamt int sc_npata; 109 1.2.18.2 yamt int sc_nsata; 110 1.2.18.2 yamt jmchan_t sc_chan_type[PCIIDE_NUM_CHANNELS]; 111 1.2.18.2 yamt int sc_chan_swap; 112 1.2.18.2 yamt }; 113 1.2.18.2 yamt 114 1.2.18.2 yamt struct jmahci_attach_args { 115 1.2.18.2 yamt struct pci_attach_args *jma_pa; 116 1.2.18.2 yamt bus_space_tag_t jma_ahcit; 117 1.2.18.2 yamt bus_space_handle_t jma_ahcih; 118 1.2.18.2 yamt }; 119 1.2.18.2 yamt 120 1.2.18.4 yamt #define JM_NAME(sc) (device_xname(sc->sc_pciide.sc_wdcdev.sc_atac.atac_dev)) 121 1.2.18.2 yamt 122 1.2.18.4 yamt CFATTACH_DECL_NEW(jmide, sizeof(struct jmide_softc), 123 1.2.18.2 yamt jmide_match, jmide_attach, NULL, NULL); 124 1.2.18.2 yamt 125 1.2.18.2 yamt static const struct jmide_product * 126 1.2.18.2 yamt jmide_lookup(pcireg_t id) { 127 1.2.18.2 yamt const struct jmide_product *jp; 128 1.2.18.2 yamt 129 1.2.18.2 yamt for (jp = jm_products; jp->jm_product != 0; jp++) { 130 1.2.18.2 yamt if (jp->jm_product == PCI_PRODUCT(id)) 131 1.2.18.2 yamt return jp; 132 1.2.18.2 yamt } 133 1.2.18.2 yamt return NULL; 134 1.2.18.2 yamt } 135 1.2.18.2 yamt 136 1.2.18.2 yamt static int 137 1.2.18.4 yamt jmide_match(device_t parent, cfdata_t match, void *aux) 138 1.2.18.2 yamt { 139 1.2.18.2 yamt struct pci_attach_args *pa = aux; 140 1.2.18.2 yamt 141 1.2.18.2 yamt if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_JMICRON) { 142 1.2.18.2 yamt if (jmide_lookup(pa->pa_id)) 143 1.2.18.2 yamt return (4); /* highter than ahcisata */ 144 1.2.18.2 yamt } 145 1.2.18.2 yamt return (0); 146 1.2.18.2 yamt } 147 1.2.18.2 yamt 148 1.2.18.2 yamt static void 149 1.2.18.4 yamt jmide_attach(device_t parent, device_t self, void *aux) 150 1.2.18.2 yamt { 151 1.2.18.2 yamt struct pci_attach_args *pa = aux; 152 1.2.18.4 yamt struct jmide_softc *sc = device_private(self); 153 1.2.18.2 yamt const struct jmide_product *jp; 154 1.2.18.2 yamt char devinfo[256]; 155 1.2.18.2 yamt const char *intrstr; 156 1.2.18.2 yamt pci_intr_handle_t intrhandle; 157 1.2.18.2 yamt u_int32_t pcictrl0 = pci_conf_read(pa->pa_pc, pa->pa_tag, 158 1.2.18.2 yamt PCI_JM_CONTROL0); 159 1.2.18.2 yamt u_int32_t pcictrl1 = pci_conf_read(pa->pa_pc, pa->pa_tag, 160 1.2.18.2 yamt PCI_JM_CONTROL1); 161 1.2.18.2 yamt struct pciide_product_desc *pp; 162 1.2.18.2 yamt int ahci_used = 0; 163 1.2.18.2 yamt 164 1.2.18.4 yamt sc->sc_pciide.sc_wdcdev.sc_atac.atac_dev = self; 165 1.2.18.4 yamt 166 1.2.18.2 yamt jp = jmide_lookup(pa->pa_id); 167 1.2.18.2 yamt if (jp == NULL) { 168 1.2.18.2 yamt printf("jmide_attach: WTF?\n"); 169 1.2.18.2 yamt return; 170 1.2.18.2 yamt } 171 1.2.18.2 yamt sc->sc_npata = jp->jm_npata; 172 1.2.18.2 yamt sc->sc_nsata = jp->jm_nsata; 173 1.2.18.2 yamt 174 1.2.18.2 yamt pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 175 1.2.18.2 yamt aprint_naive(": JMICRON PATA/SATA disk controller\n"); 176 1.2.18.2 yamt aprint_normal(": %s\n", devinfo); 177 1.2.18.2 yamt 178 1.2.18.2 yamt aprint_normal("%s: ", JM_NAME(sc)); 179 1.2.18.2 yamt if (sc->sc_npata) 180 1.2.18.2 yamt aprint_normal("%d PATA port%s", sc->sc_npata, 181 1.2.18.2 yamt (sc->sc_npata > 1) ? "s" : ""); 182 1.2.18.2 yamt if (sc->sc_nsata) 183 1.2.18.2 yamt aprint_normal("%s%d SATA port%s", sc->sc_npata ? ", " : "", 184 1.2.18.2 yamt sc->sc_nsata, (sc->sc_nsata > 1) ? "s" : ""); 185 1.2.18.2 yamt aprint_normal("\n"); 186 1.2.18.2 yamt 187 1.2.18.2 yamt if (pci_intr_map(pa, &intrhandle) != 0) { 188 1.2.18.2 yamt aprint_error("%s: couldn't map interrupt\n", JM_NAME(sc)); 189 1.2.18.2 yamt return; 190 1.2.18.2 yamt } 191 1.2.18.2 yamt intrstr = pci_intr_string(pa->pa_pc, intrhandle); 192 1.2.18.2 yamt sc->sc_pciide.sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, 193 1.2.18.2 yamt IPL_BIO, jmide_intr, sc); 194 1.2.18.2 yamt if (sc->sc_pciide.sc_pci_ih == NULL) { 195 1.2.18.2 yamt aprint_error("%s: couldn't establish interrupt", JM_NAME(sc)); 196 1.2.18.2 yamt return; 197 1.2.18.2 yamt } 198 1.2.18.2 yamt aprint_normal("%s: interrupting at %s\n", JM_NAME(sc), 199 1.2.18.2 yamt intrstr ? intrstr : "unknown interrupt"); 200 1.2.18.2 yamt 201 1.2.18.2 yamt if (pcictrl0 & JM_CONTROL0_AHCI_EN) { 202 1.2.18.2 yamt bus_size_t size; 203 1.2.18.2 yamt struct jmahci_attach_args jma; 204 1.2.18.2 yamt u_int32_t saved_pcictrl0; 205 1.2.18.2 yamt /* 206 1.2.18.2 yamt * ahci controller enabled; disable sata on pciide and 207 1.2.18.2 yamt * enable on ahci 208 1.2.18.2 yamt */ 209 1.2.18.2 yamt saved_pcictrl0 = pcictrl0; 210 1.2.18.2 yamt pcictrl0 |= JM_CONTROL0_SATA0_AHCI | JM_CONTROL0_SATA1_AHCI; 211 1.2.18.2 yamt pcictrl0 &= ~(JM_CONTROL0_SATA0_IDE | JM_CONTROL0_SATA1_IDE); 212 1.2.18.2 yamt pci_conf_write(pa->pa_pc, pa->pa_tag, 213 1.2.18.2 yamt PCI_JM_CONTROL0, pcictrl0); 214 1.2.18.2 yamt /* attach ahci controller if on the right function */ 215 1.2.18.2 yamt if ((pa->pa_function == 0 && 216 1.2.18.2 yamt (pcictrl0 & JM_CONTROL0_AHCI_F1) == 0) || 217 1.2.18.2 yamt (pa->pa_function == 1 && 218 1.2.18.2 yamt (pcictrl0 & JM_CONTROL0_AHCI_F1) != 0)) { 219 1.2.18.2 yamt jma.jma_pa = pa; 220 1.2.18.2 yamt /* map registers */ 221 1.2.18.2 yamt if (pci_mapreg_map(pa, AHCI_PCI_ABAR, 222 1.2.18.2 yamt PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 223 1.2.18.2 yamt &jma.jma_ahcit, &jma.jma_ahcih, NULL, &size) != 0) { 224 1.2.18.2 yamt aprint_error("%s: can't map ahci registers\n", 225 1.2.18.2 yamt JM_NAME(sc)); 226 1.2.18.2 yamt } else { 227 1.2.18.2 yamt sc->sc_ahci = config_found_ia( 228 1.2.18.4 yamt sc->sc_pciide.sc_wdcdev.sc_atac.atac_dev, 229 1.2.18.2 yamt "jmide_hl", &jma, jmahci_print); 230 1.2.18.2 yamt } 231 1.2.18.2 yamt /* 232 1.2.18.2 yamt * if we couldn't attach an ahci, try to fall back 233 1.2.18.2 yamt * to pciide. Note that this will not work if IDE 234 1.2.18.2 yamt * is on function 0 and AHCI on function 1. 235 1.2.18.2 yamt */ 236 1.2.18.2 yamt if (sc->sc_ahci == NULL) { 237 1.2.18.2 yamt pcictrl0 = saved_pcictrl0 & 238 1.2.18.2 yamt ~(JM_CONTROL0_SATA0_AHCI | 239 1.2.18.2 yamt JM_CONTROL0_SATA1_AHCI | 240 1.2.18.2 yamt JM_CONTROL0_AHCI_EN); 241 1.2.18.2 yamt pcictrl0 |= JM_CONTROL0_SATA1_IDE | 242 1.2.18.2 yamt JM_CONTROL0_SATA0_IDE; 243 1.2.18.2 yamt pci_conf_write(pa->pa_pc, pa->pa_tag, 244 1.2.18.2 yamt PCI_JM_CONTROL0, pcictrl0); 245 1.2.18.2 yamt } else 246 1.2.18.2 yamt ahci_used = 1; 247 1.2.18.2 yamt } 248 1.2.18.2 yamt } 249 1.2.18.2 yamt sc->sc_chan_swap = ((pcictrl0 & JM_CONTROL0_PCIIDE_CS) != 0); 250 1.2.18.2 yamt /* compute the type of internal primary channel */ 251 1.2.18.2 yamt if (pcictrl1 & JM_CONTROL1_PATA1_PRI) { 252 1.2.18.2 yamt if (sc->sc_npata > 1) 253 1.2.18.2 yamt sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_PATA; 254 1.2.18.2 yamt else 255 1.2.18.2 yamt sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_NONE; 256 1.2.18.2 yamt } else if (ahci_used == 0 && sc->sc_nsata > 0) 257 1.2.18.2 yamt sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_SATA; 258 1.2.18.2 yamt else 259 1.2.18.2 yamt sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_NONE; 260 1.2.18.2 yamt /* compute the type of internal secondary channel */ 261 1.2.18.2 yamt if (sc->sc_nsata > 1 && ahci_used == 0 && 262 1.2.18.2 yamt (pcictrl0 & JM_CONTROL0_PCIIDE0_MS) == 0) { 263 1.2.18.2 yamt sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_SATA; 264 1.2.18.2 yamt } else { 265 1.2.18.2 yamt /* only a drive if first PATA enabled */ 266 1.2.18.2 yamt if (sc->sc_npata > 0 && (pcictrl0 & JM_CONTROL0_PATA0_EN) 267 1.2.18.2 yamt && (pcictrl0 & 268 1.2.18.2 yamt (sc->sc_chan_swap ? JM_CONTROL0_PATA0_PRI: JM_CONTROL0_PATA0_SEC))) 269 1.2.18.2 yamt sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_PATA; 270 1.2.18.2 yamt else 271 1.2.18.2 yamt sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_NONE; 272 1.2.18.2 yamt } 273 1.2.18.2 yamt 274 1.2.18.2 yamt if (sc->sc_chan_type[0] == TYPE_NONE && 275 1.2.18.2 yamt sc->sc_chan_type[1] == TYPE_NONE) 276 1.2.18.2 yamt return; 277 1.2.18.2 yamt if (pa->pa_function == 0 && (pcictrl0 & JM_CONTROL0_PCIIDE_F1)) 278 1.2.18.2 yamt return; 279 1.2.18.2 yamt if (pa->pa_function == 1 && (pcictrl0 & JM_CONTROL0_PCIIDE_F1) == 0) 280 1.2.18.2 yamt return; 281 1.2.18.2 yamt pp = malloc(sizeof(struct pciide_product_desc), M_DEVBUF, M_NOWAIT); 282 1.2.18.2 yamt if (pp == NULL) { 283 1.2.18.2 yamt aprint_error("%s: can't malloc sc_pp\n", JM_NAME(sc)); 284 1.2.18.2 yamt return; 285 1.2.18.2 yamt } 286 1.2.18.2 yamt aprint_normal("%s: PCI IDE interface used", JM_NAME(sc)); 287 1.2.18.2 yamt pp->ide_product = 0; 288 1.2.18.2 yamt pp->ide_flags = 0; 289 1.2.18.2 yamt pp->ide_name = NULL; 290 1.2.18.2 yamt pp->chip_map = jmpata_chip_map; 291 1.2.18.2 yamt pciide_common_attach(&sc->sc_pciide, pa, pp); 292 1.2.18.2 yamt 293 1.2.18.2 yamt } 294 1.2.18.2 yamt 295 1.2.18.2 yamt static int 296 1.2.18.2 yamt jmide_intr(void *arg) 297 1.2.18.2 yamt { 298 1.2.18.2 yamt struct jmide_softc *sc = arg; 299 1.2.18.2 yamt int ret = 0; 300 1.2.18.2 yamt 301 1.2.18.2 yamt #ifdef NJMAHCI 302 1.2.18.2 yamt if (sc->sc_ahci) 303 1.2.18.2 yamt ret |= ahci_intr(sc->sc_ahci); 304 1.2.18.2 yamt #endif 305 1.2.18.2 yamt if (sc->sc_npata) 306 1.2.18.2 yamt ret |= pciide_pci_intr(&sc->sc_pciide); 307 1.2.18.2 yamt return ret; 308 1.2.18.2 yamt } 309 1.2.18.2 yamt 310 1.2.18.2 yamt static void 311 1.2.18.2 yamt jmpata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 312 1.2.18.2 yamt { 313 1.2.18.2 yamt struct jmide_softc *jmidesc = (struct jmide_softc *)sc; 314 1.2.18.2 yamt int channel; 315 1.2.18.2 yamt pcireg_t interface; 316 1.2.18.2 yamt bus_size_t cmdsize, ctlsize; 317 1.2.18.2 yamt struct pciide_channel *cp; 318 1.2.18.2 yamt 319 1.2.18.2 yamt if (pciide_chipen(sc, pa) == 0) 320 1.2.18.2 yamt return; 321 1.2.18.2 yamt aprint_verbose("%s: bus-master DMA support present", JM_NAME(jmidesc)); 322 1.2.18.2 yamt pciide_mapreg_dma(sc, pa); 323 1.2.18.2 yamt aprint_verbose("\n"); 324 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 325 1.2.18.2 yamt if (sc->sc_dma_ok) { 326 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 327 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 328 1.2.18.2 yamt } 329 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 330 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 331 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_set_modes = jmpata_setup_channel; 332 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 333 1.2.18.2 yamt sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 334 1.2.18.2 yamt wdc_allocate_regs(&sc->sc_wdcdev); 335 1.2.18.2 yamt /* 336 1.2.18.2 yamt * can't rely on the PCI_CLASS_REG content if the chip was in raid 337 1.2.18.2 yamt * mode. We have to fake interface 338 1.2.18.2 yamt */ 339 1.2.18.2 yamt interface = PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); 340 1.2.18.2 yamt for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 341 1.2.18.2 yamt channel++) { 342 1.2.18.2 yamt cp = &sc->pciide_channels[channel]; 343 1.2.18.2 yamt if (pciide_chansetup(sc, channel, interface) == 0) 344 1.2.18.2 yamt continue; 345 1.2.18.2 yamt aprint_normal("%s: %s channel is ", JM_NAME(jmidesc), 346 1.2.18.2 yamt PCIIDE_CHANNEL_NAME(channel)); 347 1.2.18.2 yamt switch(jmidesc->sc_chan_type[channel]) { 348 1.2.18.2 yamt case TYPE_PATA: 349 1.2.18.2 yamt aprint_normal("PATA"); 350 1.2.18.2 yamt break; 351 1.2.18.2 yamt case TYPE_SATA: 352 1.2.18.2 yamt aprint_normal("SATA"); 353 1.2.18.2 yamt break; 354 1.2.18.2 yamt case TYPE_NONE: 355 1.2.18.2 yamt aprint_normal("unused"); 356 1.2.18.2 yamt break; 357 1.2.18.2 yamt default: 358 1.2.18.2 yamt aprint_normal("impossible"); 359 1.2.18.2 yamt panic("jmide: wrong/uninitialised channel type"); 360 1.2.18.2 yamt } 361 1.2.18.2 yamt aprint_normal("\n"); 362 1.2.18.2 yamt if (jmidesc->sc_chan_type[channel] == TYPE_NONE) { 363 1.2.18.2 yamt cp->ata_channel.ch_flags |= ATACH_DISABLED; 364 1.2.18.2 yamt continue; 365 1.2.18.2 yamt } 366 1.2.18.2 yamt pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize, 367 1.2.18.2 yamt pciide_pci_intr); 368 1.2.18.2 yamt } 369 1.2.18.2 yamt } 370 1.2.18.2 yamt 371 1.2.18.2 yamt static void 372 1.2.18.2 yamt jmpata_setup_channel(struct ata_channel *chp) 373 1.2.18.2 yamt { 374 1.2.18.2 yamt struct ata_drive_datas *drvp; 375 1.2.18.2 yamt int drive, s; 376 1.2.18.2 yamt u_int32_t idedma_ctl; 377 1.2.18.2 yamt struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 378 1.2.18.2 yamt struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 379 1.2.18.2 yamt struct jmide_softc *jmidesc = (struct jmide_softc *)sc; 380 1.2.18.2 yamt int ide80p; 381 1.2.18.2 yamt 382 1.2.18.2 yamt /* setup DMA if needed */ 383 1.2.18.2 yamt pciide_channel_dma_setup(cp); 384 1.2.18.2 yamt 385 1.2.18.2 yamt idedma_ctl = 0; 386 1.2.18.2 yamt 387 1.2.18.2 yamt /* cable type detect */ 388 1.2.18.2 yamt ide80p = 1; 389 1.2.18.2 yamt if (chp->ch_channel == (jmidesc->sc_chan_swap ? 1 : 0)) { 390 1.2.18.2 yamt if (jmidesc->sc_chan_type[chp->ch_channel] == TYPE_PATA && 391 1.2.18.2 yamt (pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_JM_CONTROL1) & 392 1.2.18.2 yamt JM_CONTROL1_PATA1_40P)) 393 1.2.18.2 yamt ide80p = 0; 394 1.2.18.2 yamt } else { 395 1.2.18.2 yamt if (jmidesc->sc_chan_type[chp->ch_channel] == TYPE_PATA && 396 1.2.18.2 yamt (pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_JM_CONTROL0) & 397 1.2.18.2 yamt JM_CONTROL0_PATA0_40P)) 398 1.2.18.2 yamt ide80p = 0; 399 1.2.18.2 yamt } 400 1.2.18.2 yamt 401 1.2.18.2 yamt for (drive = 0; drive < 2; drive++) { 402 1.2.18.2 yamt drvp = &chp->ch_drive[drive]; 403 1.2.18.2 yamt /* If no drive, skip */ 404 1.2.18.2 yamt if ((drvp->drive_flags & DRIVE) == 0) 405 1.2.18.2 yamt continue; 406 1.2.18.2 yamt if (drvp->drive_flags & DRIVE_UDMA) { 407 1.2.18.2 yamt /* use Ultra/DMA */ 408 1.2.18.2 yamt s = splbio(); 409 1.2.18.2 yamt drvp->drive_flags &= ~DRIVE_DMA; 410 1.2.18.2 yamt if (drvp->UDMA_mode > 2 && ide80p == 0) 411 1.2.18.2 yamt drvp->UDMA_mode = 2; 412 1.2.18.2 yamt splx(s); 413 1.2.18.2 yamt idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 414 1.2.18.2 yamt } else if (drvp->drive_flags & DRIVE_DMA) { 415 1.2.18.2 yamt idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); 416 1.2.18.2 yamt } 417 1.2.18.2 yamt } 418 1.2.18.2 yamt /* nothing to do to setup modes, the controller snoop SET_FEATURE cmd */ 419 1.2.18.2 yamt if (idedma_ctl != 0) { 420 1.2.18.2 yamt /* Add software bits in status register */ 421 1.2.18.2 yamt bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 422 1.2.18.2 yamt 0, idedma_ctl); 423 1.2.18.2 yamt } 424 1.2.18.2 yamt } 425 1.2.18.2 yamt 426 1.2.18.2 yamt static int 427 1.2.18.2 yamt jmahci_print(void *aux, const char *pnp) 428 1.2.18.2 yamt { 429 1.2.18.2 yamt if (pnp) 430 1.2.18.2 yamt aprint_normal("ahcisata at %s", pnp); 431 1.2.18.2 yamt 432 1.2.18.2 yamt return (UNCONF); 433 1.2.18.2 yamt } 434 1.2.18.2 yamt 435 1.2.18.2 yamt 436 1.2.18.2 yamt #ifdef NJMAHCI 437 1.2.18.4 yamt static int jmahci_match(device_t, cfdata_t, void *); 438 1.2.18.4 yamt static void jmahci_attach(device_t, device_t, void *); 439 1.2.18.2 yamt 440 1.2.18.4 yamt CFATTACH_DECL_NEW(jmahci, sizeof(struct ahci_softc), 441 1.2.18.2 yamt jmahci_match, jmahci_attach, NULL, NULL); 442 1.2.18.2 yamt 443 1.2.18.2 yamt static int 444 1.2.18.4 yamt jmahci_match(device_t parent, cfdata_t match, void *aux) 445 1.2.18.2 yamt { 446 1.2.18.2 yamt return 1; 447 1.2.18.2 yamt } 448 1.2.18.2 yamt 449 1.2.18.2 yamt static void 450 1.2.18.4 yamt jmahci_attach(device_t parent, device_t self, void *aux) 451 1.2.18.2 yamt { 452 1.2.18.2 yamt struct jmahci_attach_args *jma = aux; 453 1.2.18.3 yamt struct pci_attach_args *pa = jma->jma_pa; 454 1.2.18.4 yamt struct ahci_softc *sc = device_private(self); 455 1.2.18.2 yamt 456 1.2.18.2 yamt aprint_naive(": AHCI disk controller\n"); 457 1.2.18.2 yamt aprint_normal("\n"); 458 1.2.18.2 yamt 459 1.2.18.4 yamt sc->sc_atac.atac_dev = self; 460 1.2.18.2 yamt sc->sc_ahcit = jma->jma_ahcit; 461 1.2.18.2 yamt sc->sc_ahcih = jma->jma_ahcih; 462 1.2.18.2 yamt sc->sc_dmat = jma->jma_pa->pa_dmat; 463 1.2.18.3 yamt 464 1.2.18.3 yamt if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) 465 1.2.18.3 yamt sc->sc_atac_capflags = ATAC_CAP_RAID; 466 1.2.18.3 yamt 467 1.2.18.2 yamt ahci_attach(sc); 468 1.2.18.2 yamt } 469 1.2.18.2 yamt #endif 470
Indexes created Thu Oct 16 14:10:15 GMT 2025