machfb.c revision 1.33
1 /* $NetBSD: machfb.c,v 1.33 2005/09/21 18:49:16 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Bang Jun-Young 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Some code is derived from ATI Rage Pro and Derivatives Programmer's Guide. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, 36 "$NetBSD: machfb.c,v 1.33 2005/09/21 18:49:16 macallan Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 #include <sys/callout.h> 44 45 #ifdef __sparc__ 46 #include <machine/promlib.h> 47 #endif 48 49 #ifdef __powerpc__ 50 #include <dev/ofw/openfirm.h> 51 #include <dev/ofw/ofw_pci.h> 52 #endif 53 54 #include <dev/ic/videomode.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcidevs.h> 59 #include <dev/pci/pciio.h> 60 #include <dev/pci/machfbreg.h> 61 62 #include <dev/wscons/wsdisplayvar.h> 63 #include <dev/wscons/wsconsio.h> 64 #include <dev/wsfont/wsfont.h> 65 #include <dev/rasops/rasops.h> 66 67 #define MACH64_REG_SIZE 1024 68 #define MACH64_REG_OFF 0x7ffc00 69 70 #define NBARS 3 /* number of Mach64 PCI BARs */ 71 72 struct vga_bar { 73 bus_addr_t vb_base; 74 pcireg_t vb_busaddr; 75 bus_size_t vb_size; 76 pcireg_t vb_type; 77 int vb_flags; 78 }; 79 80 struct mach64_softc { 81 struct device sc_dev; 82 pci_chipset_tag_t sc_pc; 83 pcitag_t sc_pcitag; 84 85 struct vga_bar sc_bars[NBARS]; 86 struct vga_bar sc_rom; 87 88 #define sc_aperbase sc_bars[0].vb_base 89 #define sc_apersize sc_bars[0].vb_size 90 #define sc_aperphys sc_bars[0].vb_busaddr 91 92 #define sc_iobase sc_bars[1].vb_base 93 #define sc_iosize sc_bars[1].vb_size 94 95 #define sc_regbase sc_bars[2].vb_base 96 #define sc_regsize sc_bars[2].vb_size 97 #define sc_regphys sc_bars[2].vb_busaddr 98 99 bus_space_tag_t sc_regt; 100 bus_space_tag_t sc_memt; 101 bus_space_handle_t sc_regh; 102 bus_space_handle_t sc_memh; 103 104 size_t memsize; 105 int memtype; 106 107 int sc_mode; 108 int sc_bg; 109 110 int has_dsp; 111 int bits_per_pixel; 112 int max_x; 113 int max_y; 114 int virt_x; 115 int virt_y; 116 int color_depth; 117 118 int mem_freq; 119 int ramdac_freq; 120 int ref_freq; 121 122 int ref_div; 123 int log2_vclk_post_div; 124 int vclk_post_div; 125 int vclk_fb_div; 126 int mclk_post_div; 127 int mclk_fb_div; 128 129 struct videomode *sc_my_mode; 130 struct mach64screen *wanted; 131 struct mach64screen *active; 132 void (*switchcb)(void *, int, int); 133 void *switchcbarg; 134 struct callout switch_callout; 135 LIST_HEAD(, mach64screen) screens; 136 const struct wsscreen_descr *currenttype; 137 u_char sc_cmap_red[256]; 138 u_char sc_cmap_green[256]; 139 u_char sc_cmap_blue[256]; 140 int sc_dacw; 141 }; 142 143 struct mach64screen { 144 struct rasops_info ri; 145 LIST_ENTRY(mach64screen) next; 146 struct mach64_softc *sc; 147 const struct wsscreen_descr *type; 148 int active; 149 u_int *chars; 150 long *attrs; 151 int dispoffset; 152 int mindispoffset; 153 int maxdispoffset; 154 155 int cursoron; 156 int cursorcol; 157 int cursorrow; 158 int cursordrawn; 159 }; 160 161 struct mach64_crtcregs { 162 u_int32_t h_total_disp; 163 u_int32_t h_sync_strt_wid; 164 u_int32_t v_total_disp; 165 u_int32_t v_sync_strt_wid; 166 u_int32_t gen_cntl; 167 u_int32_t clock_cntl; 168 u_int32_t color_depth; 169 u_int32_t dot_clock; 170 }; 171 172 struct { 173 u_int16_t chip_id; 174 u_int32_t ramdac_freq; 175 } static const mach64_info[] = { 176 { PCI_PRODUCT_ATI_MACH64_CT, 135000 }, 177 { PCI_PRODUCT_ATI_RAGE_PRO_AGP, 230000 }, 178 { PCI_PRODUCT_ATI_RAGE_PRO_AGP1X, 230000 }, 179 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_B, 230000 }, 180 { PCI_PRODUCT_ATI_RAGE_XL_AGP, 230000 }, 181 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_P, 230000 }, 182 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_L, 230000 }, 183 { PCI_PRODUCT_ATI_RAGE_XL_PCI, 230000 }, 184 { PCI_PRODUCT_ATI_RAGE_II, 135000 }, 185 { PCI_PRODUCT_ATI_RAGE_IIP, 200000 }, 186 { PCI_PRODUCT_ATI_RAGE_IIC_PCI, 230000 }, 187 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_B, 230000 }, 188 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_P, 230000 }, 189 { PCI_PRODUCT_ATI_RAGE_LT_PRO_AGP, 230000 }, 190 { PCI_PRODUCT_ATI_RAGE_MOB_M3_PCI, 230000 }, 191 { PCI_PRODUCT_ATI_RAGE_MOB_M3_AGP, 230000 }, 192 { PCI_PRODUCT_ATI_RAGE_LT, 230000 }, 193 { PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI, 230000 }, 194 { PCI_PRODUCT_ATI_RAGE_MOBILITY, 230000 }, 195 { PCI_PRODUCT_ATI_RAGE_LT_PRO, 230000 }, 196 { PCI_PRODUCT_ATI_MACH64_VT, 170000 }, 197 { PCI_PRODUCT_ATI_MACH64_VTB, 200000 }, 198 { PCI_PRODUCT_ATI_MACH64_VT4, 230000 } 199 }; 200 201 static int mach64_chip_id, mach64_chip_rev; 202 static struct videomode default_mode = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 203 static struct mach64screen mach64_console_screen; 204 205 static const char *mach64_memtype_names[] = { 206 "(N/A)", "DRAM", "EDO DRAM", "EDO DRAM", "SDRAM", "SGRAM", "WRAM", 207 "(unknown type)" 208 }; 209 210 static struct videomode mach64_modes[] = { 211 /* 640x400 @ 70 Hz, 31.5 kHz */ 212 { 25175, 640, 664, 760, 800, 400, 409, 411, 450, 0 }, 213 /* 640x480 @ 72 Hz, 36.5 kHz */ 214 { 25175, 640, 664, 760, 800, 480, 491, 493, 525, 0 }, 215 /* 800x600 @ 72 Hz, 48.0 kHz */ 216 { 50000, 800, 856, 976, 1040, 600, 637, 643, 666, 217 VID_PHSYNC | VID_PVSYNC }, 218 /* 1024x768 @ 70 Hz, 56.5 kHz */ 219 { 75000, 1024, 1048, 1184, 1328, 768, 771, 777, 806, 220 VID_NHSYNC | VID_NVSYNC }, 221 /* 1152x864 @ 70 Hz, 62.4 kHz */ 222 { 92000, 1152, 1208, 1368, 1474, 864, 865, 875, 895, 0 }, 223 /* 1280x1024 @ 70 Hz, 74.59 kHz */ 224 { 126500, 1280, 1312, 1472, 1696, 1024, 1032, 1040, 1068, 225 VID_NHSYNC | VID_NVSYNC } 226 }; 227 228 extern const u_char rasops_cmap[768]; 229 230 static int mach64_match(struct device *, struct cfdata *, void *); 231 static void mach64_attach(struct device *, struct device *, void *); 232 233 CFATTACH_DECL(machfb, sizeof(struct mach64_softc), mach64_match, mach64_attach, 234 NULL, NULL); 235 236 static void mach64_init(struct mach64_softc *); 237 static int mach64_get_memsize(struct mach64_softc *); 238 static int mach64_get_max_ramdac(struct mach64_softc *); 239 static void mach64_get_mode(struct mach64_softc *, struct videomode *); 240 static int mach64_calc_crtcregs(struct mach64_softc *, 241 struct mach64_crtcregs *, 242 struct videomode *); 243 static void mach64_set_crtcregs(struct mach64_softc *, 244 struct mach64_crtcregs *); 245 246 static int mach64_modeswitch(struct mach64_softc *, struct videomode *); 247 static void mach64_set_dsp(struct mach64_softc *); 248 static void mach64_set_pll(struct mach64_softc *, int); 249 static void mach64_reset_engine(struct mach64_softc *); 250 static void mach64_init_engine(struct mach64_softc *); 251 #if 0 252 static void mach64_adjust_frame(struct mach64_softc *, int, int); 253 #endif 254 static void mach64_init_lut(struct mach64_softc *); 255 static void mach64_switch_screen(struct mach64_softc *); 256 static void mach64_init_screen(struct mach64_softc *, struct mach64screen *, 257 const struct wsscreen_descr *, int, long *, 258 int); 259 static void mach64_restore_screen(struct mach64screen *, 260 const struct wsscreen_descr *, u_int *); 261 static int mach64_set_screentype(struct mach64_softc *, 262 const struct wsscreen_descr *); 263 static int mach64_is_console(struct pci_attach_args *); 264 265 static void mach64_cursor(void *, int, int, int); 266 #if 0 267 static int mach64_mapchar(void *, int, u_int *); 268 #endif 269 static void mach64_putchar(void *, int, int, u_int, long); 270 static void mach64_copycols(void *, int, int, int, int); 271 static void mach64_erasecols(void *, int, int, int, long); 272 static void mach64_copyrows(void *, int, int, int); 273 static void mach64_eraserows(void *, int, int, long); 274 static int mach64_allocattr(void *, int, int, int, long *); 275 static void mach64_clearscreen(struct mach64_softc *); 276 277 static int mach64_putcmap(struct mach64_softc *, struct wsdisplay_cmap *); 278 static int mach64_getcmap(struct mach64_softc *, struct wsdisplay_cmap *); 279 static int mach64_putpalreg(struct mach64_softc *, uint8_t, uint8_t, 280 uint8_t, uint8_t); 281 static void mach64_bitblt(struct mach64_softc *, int, int, int, int, int, 282 int, int, int) ; 283 static void mach64_rectfill(struct mach64_softc *, int, int, int, int, int); 284 static void mach64_setup_mono(struct mach64_softc *, int, int, int, int, 285 uint32_t, uint32_t); 286 static void mach64_feed_bytes(struct mach64_softc *, int, uint8_t *); 287 #if 0 288 static void mach64_showpal(struct mach64_softc *); 289 #endif 290 static int mach64_getwschar(void *, struct wsdisplay_char *); 291 static int mach64_putwschar(void *, struct wsdisplay_char *); 292 293 static void set_address(struct rasops_info *, bus_addr_t); 294 295 #if 0 296 static const struct wsdisplay_emulops mach64_emulops = { 297 mach64_cursor, 298 mach64_mapchar, 299 mach64_putchar, 300 mach64_copycols, 301 mach64_erasecols, 302 mach64_copyrows, 303 mach64_eraserows, 304 mach64_allocattr, 305 }; 306 #endif 307 308 static struct wsscreen_descr mach64_defaultscreen = { 309 "default", 310 80, 30, 311 NULL, 312 8, 16, 313 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 314 &default_mode 315 }, mach64_80x25_screen = { 316 "80x25", 80, 25, 317 NULL, 318 8, 16, 319 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 320 &mach64_modes[0] 321 }, mach64_80x30_screen = { 322 "80x30", 80, 30, 323 NULL, 324 8, 16, 325 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 326 &mach64_modes[1] 327 }, mach64_80x40_screen = { 328 "80x40", 80, 40, 329 NULL, 330 8, 10, 331 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 332 &mach64_modes[0] 333 }, mach64_80x50_screen = { 334 "80x50", 80, 50, 335 NULL, 336 8, 8, 337 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 338 &mach64_modes[0] 339 }, mach64_100x37_screen = { 340 "100x37", 100, 37, 341 NULL, 342 8, 16, 343 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 344 &mach64_modes[2] 345 }, mach64_128x48_screen = { 346 "128x48", 128, 48, 347 NULL, 348 8, 16, 349 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 350 &mach64_modes[3] 351 }, mach64_144x54_screen = { 352 "144x54", 144, 54, 353 NULL, 354 8, 16, 355 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 356 &mach64_modes[4] 357 }, mach64_160x64_screen = { 358 "160x54", 160, 64, 359 NULL, 360 8, 16, 361 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 362 &mach64_modes[5] 363 }; 364 365 static const struct wsscreen_descr *_mach64_scrlist[] = { 366 &mach64_defaultscreen, 367 &mach64_80x25_screen, 368 &mach64_80x30_screen, 369 &mach64_80x40_screen, 370 &mach64_80x50_screen, 371 &mach64_100x37_screen, 372 &mach64_128x48_screen, 373 &mach64_144x54_screen, 374 &mach64_160x64_screen 375 }; 376 377 static struct wsscreen_list mach64_screenlist = { 378 sizeof(_mach64_scrlist) / sizeof(struct wsscreen_descr *), 379 _mach64_scrlist 380 }; 381 382 static int mach64_ioctl(void *, u_long, caddr_t, int, struct proc *); 383 static paddr_t mach64_mmap(void *, off_t, int); 384 static int mach64_alloc_screen(void *, const struct wsscreen_descr *, 385 void **, int *, int *, long *); 386 static void mach64_free_screen(void *, void *); 387 static int mach64_show_screen(void *, void *, int, 388 void (*)(void *, int, int), void *); 389 #if 0 390 static int mach64_load_font(void *, void *, struct wsdisplay_font *); 391 #endif 392 393 static struct wsdisplay_accessops mach64_accessops = { 394 mach64_ioctl, 395 mach64_mmap, 396 mach64_alloc_screen, 397 mach64_free_screen, 398 mach64_show_screen, 399 NULL, /* load_font */ 400 NULL, /* polls */ 401 mach64_getwschar, /* getwschar */ 402 mach64_putwschar, /* putwschar */ 403 NULL, /* scroll */ 404 NULL, /* getborder */ 405 NULL /* setborder */ 406 }; 407 408 /* 409 * Inline functions for getting access to register aperture. 410 */ 411 412 static inline u_int32_t 413 regr(struct mach64_softc *sc, u_int32_t index) 414 { 415 return bus_space_read_4(sc->sc_regt, sc->sc_regh, index); 416 } 417 418 static inline u_int8_t 419 regrb(struct mach64_softc *sc, u_int32_t index) 420 { 421 return bus_space_read_1(sc->sc_regt, sc->sc_regh, index); 422 } 423 424 static inline void 425 regw(struct mach64_softc *sc, u_int32_t index, u_int32_t data) 426 { 427 bus_space_write_4(sc->sc_regt, sc->sc_regh, index, data); 428 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 4, 429 BUS_SPACE_BARRIER_WRITE); 430 } 431 432 static inline void 433 regwb(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 434 { 435 bus_space_write_1(sc->sc_regt, sc->sc_regh, index, data); 436 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 1, 437 BUS_SPACE_BARRIER_WRITE); 438 } 439 440 static inline void 441 regwb_pll(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 442 { 443 regwb(sc, CLOCK_CNTL + 1, (index << 2) | PLL_WR_EN); 444 regwb(sc, CLOCK_CNTL + 2, data); 445 regwb(sc, CLOCK_CNTL + 1, (index << 2) & ~PLL_WR_EN); 446 } 447 448 static inline void 449 wait_for_fifo(struct mach64_softc *sc, u_int8_t v) 450 { 451 while ((regr(sc, FIFO_STAT) & 0xffff) > (0x8000 >> v)) 452 continue; 453 } 454 455 static inline void 456 wait_for_idle(struct mach64_softc *sc) 457 { 458 wait_for_fifo(sc, 16); 459 while ((regr(sc, GUI_STAT) & 1) != 0) 460 continue; 461 } 462 463 static int 464 mach64_match(struct device *parent, struct cfdata *match, void *aux) 465 { 466 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 467 int i; 468 469 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 470 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 471 return 0; 472 473 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 474 if (PCI_PRODUCT(pa->pa_id) == mach64_info[i].chip_id) { 475 mach64_chip_id = PCI_PRODUCT(pa->pa_id); 476 mach64_chip_rev = PCI_REVISION(pa->pa_class); 477 return 100; 478 } 479 480 return 0; 481 } 482 483 static void 484 mach64_attach(struct device *parent, struct device *self, void *aux) 485 { 486 struct mach64_softc *sc = (void *)self; 487 struct pci_attach_args *pa = aux; 488 char devinfo[256]; 489 int bar, reg, id; 490 struct wsemuldisplaydev_attach_args aa; 491 long defattr; 492 int setmode, console; 493 pcireg_t screg; 494 495 sc->sc_pc = pa->pa_pc; 496 sc->sc_pcitag = pa->pa_tag; 497 sc->sc_dacw = -1; 498 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 499 500 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 501 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 502 503 /* enable memory and IO access */ 504 screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 505 screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 506 pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg); 507 508 for (bar = 0; bar < NBARS; bar++) { 509 reg = PCI_MAPREG_START + (bar * 4); 510 sc->sc_bars[bar].vb_type = pci_mapreg_type(sc->sc_pc, 511 sc->sc_pcitag, reg); 512 (void)pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, reg, 513 sc->sc_bars[bar].vb_type, &sc->sc_bars[bar].vb_base, 514 &sc->sc_bars[bar].vb_size, &sc->sc_bars[bar].vb_flags); 515 sc->sc_bars[bar].vb_busaddr = pci_conf_read(sc->sc_pc, 516 sc->sc_pcitag, reg)&0xfffffff0; 517 } 518 sc->sc_memt = pa->pa_memt; 519 520 mach64_init(sc); 521 522 printf("%s: %d MB aperture at 0x%08x, %d KB registers at 0x%08x\n", 523 sc->sc_dev.dv_xname, (u_int)(sc->sc_apersize / (1024 * 1024)), 524 (u_int)sc->sc_aperphys, (u_int)(sc->sc_regsize / 1024), 525 (u_int)sc->sc_regphys); 526 527 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_CT || 528 ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 529 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 530 (mach64_chip_rev & 0x07) == 0)) 531 sc->has_dsp = 0; 532 else 533 sc->has_dsp = 1; 534 535 sc->memsize = mach64_get_memsize(sc); 536 if (sc->memsize == 8192) 537 /* The last page is used as register aperture. */ 538 sc->memsize -= 4; 539 sc->memtype = regr(sc, CONFIG_STAT0) & 0x07; 540 541 /* XXX is there any way to calculate reference frequency from 542 known values? */ 543 if ((mach64_chip_id == PCI_PRODUCT_ATI_RAGE_XL_PCI) || 544 ((mach64_chip_id >= PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI) && 545 (mach64_chip_id <= PCI_PRODUCT_ATI_RAGE_LT_PRO))) { 546 printf("ref_freq=29.498MHz\n"); 547 sc->ref_freq = 29498; 548 } else 549 sc->ref_freq = 14318; 550 551 regwb(sc, CLOCK_CNTL + 1, PLL_REF_DIV << 2); 552 sc->ref_div = regrb(sc, CLOCK_CNTL + 2); 553 regwb(sc, CLOCK_CNTL + 1, MCLK_FB_DIV << 2); 554 sc->mclk_fb_div = regrb(sc, CLOCK_CNTL + 2); 555 sc->mem_freq = (2 * sc->ref_freq * sc->mclk_fb_div) / 556 (sc->ref_div * 2); 557 sc->mclk_post_div = (sc->mclk_fb_div * 2 * sc->ref_freq) / 558 (sc->mem_freq * sc->ref_div); 559 sc->ramdac_freq = mach64_get_max_ramdac(sc); 560 printf("%s: %ld KB %s %d.%d MHz, maximum RAMDAC clock %d MHz\n", 561 sc->sc_dev.dv_xname, (u_long)sc->memsize, 562 mach64_memtype_names[sc->memtype], 563 sc->mem_freq / 1000, sc->mem_freq % 1000, 564 sc->ramdac_freq / 1000); 565 566 id = regr(sc, CONFIG_CHIP_ID) & 0xffff; 567 if (id != mach64_chip_id) { 568 printf("%s: chip ID mismatch, 0x%x != 0x%x\n", 569 sc->sc_dev.dv_xname, id, mach64_chip_id); 570 return; 571 } 572 573 console = mach64_is_console(pa); 574 575 #if defined(__sparc__) || defined(__powerpc__) 576 if (console) { 577 mach64_get_mode(sc, &default_mode); 578 setmode = 0; 579 sc->sc_my_mode = &default_mode; 580 } else { 581 /* fill in default_mode if it's empty */ 582 if (default_mode.dot_clock == 0) { 583 memcpy(&default_mode, &mach64_modes[4], 584 sizeof(default_mode)); 585 } 586 sc->sc_my_mode = &mach64_modes[4]; 587 setmode = 1; 588 } 589 #else 590 if (default_mode.dot_clock == 0) { 591 memcpy(&default_mode, &mach64_modes[0], 592 sizeof(default_mode)); 593 } 594 sc->sc_my_mode = &mach64_modes[0]; 595 setmode = 1; 596 #endif 597 598 sc->bits_per_pixel = 8; 599 sc->virt_x = sc->sc_my_mode->hdisplay; 600 sc->virt_y = sc->sc_my_mode->vdisplay; 601 sc->max_x = sc->virt_x - 1; 602 sc->max_y = (sc->memsize * 1024) / 603 (sc->virt_x * (sc->bits_per_pixel / 8)) - 1; 604 605 sc->color_depth = CRTC_PIX_WIDTH_8BPP; 606 607 mach64_init_engine(sc); 608 #if 0 609 mach64_adjust_frame(0, 0); 610 if (sc->bits_per_pixel == 8) 611 mach64_init_lut(sc); 612 #endif 613 614 printf("%s: initial resolution %dx%d at %d bpp\n", sc->sc_dev.dv_xname, 615 sc->sc_my_mode->hdisplay, sc->sc_my_mode->vdisplay, 616 sc->bits_per_pixel); 617 618 if (console) { 619 mach64_console_screen.ri.ri_hw = &mach64_console_screen; 620 mach64_console_screen.ri.ri_depth = sc->bits_per_pixel; 621 mach64_console_screen.ri.ri_width = sc->sc_my_mode->hdisplay; 622 mach64_console_screen.ri.ri_height = sc->sc_my_mode->vdisplay; 623 mach64_console_screen.ri.ri_stride = mach64_console_screen.ri.ri_width; 624 625 mach64_console_screen.ri.ri_bits=(void *)(uintptr_t)sc->sc_aperbase; 626 627 mach64_console_screen.ri.ri_flg = RI_CENTER; 628 mach64_console_screen.active = 1; 629 sc->active = &mach64_console_screen; 630 631 /* XXX width/height are nonsense, we only want to pick a font */ 632 rasops_init(&mach64_console_screen.ri, 633 mach64_console_screen.ri.ri_height / 16, 634 mach64_console_screen.ri.ri_width / 8); 635 636 /* now get the real values */ 637 rasops_reconfig(&mach64_console_screen.ri, 638 mach64_console_screen.ri.ri_height / 639 mach64_console_screen.ri.ri_font->fontheight, 640 mach64_console_screen.ri.ri_width / 641 mach64_console_screen.ri.ri_font->fontwidth); 642 643 set_address(&mach64_console_screen.ri, sc->sc_aperbase); 644 645 /* enable acceleration */ 646 mach64_console_screen.ri.ri_ops.copyrows = mach64_copyrows; 647 mach64_console_screen.ri.ri_ops.eraserows = mach64_eraserows; 648 mach64_console_screen.ri.ri_ops.copycols = mach64_copycols; 649 mach64_console_screen.ri.ri_ops.erasecols = mach64_erasecols; 650 mach64_console_screen.ri.ri_ops.putchar = mach64_putchar; 651 mach64_console_screen.ri.ri_ops.cursor = mach64_cursor; 652 653 mach64_defaultscreen.nrows = mach64_console_screen.ri.ri_rows; 654 mach64_defaultscreen.ncols = mach64_console_screen.ri.ri_cols; 655 656 mach64_allocattr(&mach64_console_screen.ri, WS_DEFAULT_FG, 657 WS_DEFAULT_BG, 0, &defattr); 658 659 sc->sc_bg = WS_DEFAULT_BG; 660 661 /* really necessary? */ 662 mach64_defaultscreen.capabilities = mach64_console_screen.ri.ri_caps; 663 mach64_defaultscreen.textops = &mach64_console_screen.ri.ri_ops; 664 665 /* Initialize fonts */ 666 /* XXX shouldn't that happen /before/ we call rasops_init()? */ 667 wsfont_init(); 668 669 mach64_init_screen(sc, &mach64_console_screen, 670 &mach64_defaultscreen, 1, &defattr, setmode); 671 wsdisplay_cnattach(&mach64_defaultscreen, 672 &mach64_console_screen.ri, 0, 0, defattr); 673 } else { 674 /* 675 * since we're not the console we can postpone the rest 676 * until someone actually allocates a screen for us 677 */ 678 mach64_modeswitch(sc, sc->sc_my_mode); 679 680 } 681 682 mach64_init_lut(sc); 683 mach64_clearscreen(sc); 684 685 aa.console = console; 686 aa.scrdata = &mach64_screenlist; 687 aa.accessops = &mach64_accessops; 688 aa.accesscookie = sc; 689 690 config_found(self, &aa, wsemuldisplaydevprint); 691 } 692 693 static void 694 mach64_init_screen(struct mach64_softc *sc, struct mach64screen *scr, 695 const struct wsscreen_descr *type, int existing, long *attrp, int setmode) 696 { 697 struct rasops_info *ri=&scr->ri; 698 int cnt; 699 700 scr->sc = sc; 701 scr->type = type; 702 scr->mindispoffset = 0; 703 scr->maxdispoffset = sc->memsize * 1024; 704 scr->dispoffset = 0; 705 scr->cursorcol = 0; 706 scr->cursorrow = 0; 707 708 cnt = type->nrows * type->ncols; 709 scr->attrs = malloc(cnt * (sizeof(long) + sizeof(u_int)), 710 M_DEVBUF, M_WAITOK); 711 scr->chars = (u_int *)&scr->attrs[cnt]; 712 713 /* 714 * we allocate both chars and attributes in one chunk, attributes first 715 * because they have the (potentially) bigger alignment 716 */ 717 ri->ri_depth = sc->bits_per_pixel; 718 ri->ri_width = sc->sc_my_mode->hdisplay; 719 ri->ri_height = sc->sc_my_mode->vdisplay; 720 ri->ri_stride = ri->ri_width; 721 ri->ri_flg = RI_CENTER; 722 723 if (existing) { 724 scr->active = 1; 725 ri->ri_flg |= RI_CLEAR; 726 if (setmode && mach64_set_screentype(sc, type)) { 727 panic("%s: failed to switch video mode", 728 sc->sc_dev.dv_xname); 729 } 730 } else { 731 scr->active = 0; 732 } 733 734 LIST_INSERT_HEAD(&sc->screens, scr, next); 735 } 736 737 static void 738 mach64_init(struct mach64_softc *sc) 739 { 740 u_int32_t *p32, saved_value; 741 u_int8_t *p; 742 int need_swap; 743 744 if (bus_space_map(sc->sc_memt, sc->sc_aperbase, sc->sc_apersize, 745 BUS_SPACE_MAP_LINEAR, &sc->sc_memh)) { 746 panic("%s: failed to map aperture", sc->sc_dev.dv_xname); 747 } 748 sc->sc_aperbase = (vaddr_t)bus_space_vaddr(sc->sc_memt, sc->sc_memh); 749 750 sc->sc_regt = sc->sc_memt; 751 bus_space_subregion(sc->sc_regt, sc->sc_memh, MACH64_REG_OFF, 752 sc->sc_regsize, &sc->sc_regh); 753 sc->sc_regbase = sc->sc_aperbase + 0x7ffc00; 754 755 /* 756 * Test wether the aperture is byte swapped or not 757 */ 758 p32 = (u_int32_t*)(u_long)sc->sc_aperbase; 759 saved_value = *p32; 760 p = (u_int8_t*)(u_long)sc->sc_aperbase; 761 *p32 = 0x12345678; 762 if (p[0] == 0x12 && p[1] == 0x34 && p[2] == 0x56 && p[3] == 0x78) 763 need_swap = 0; 764 else 765 need_swap = 1; 766 if (need_swap) { 767 sc->sc_aperbase += 0x800000; 768 sc->sc_apersize -= 0x800000; 769 } 770 *p32 = saved_value; 771 772 LIST_INIT(&sc->screens); 773 sc->active = NULL; 774 sc->currenttype = &mach64_defaultscreen; 775 callout_init(&sc->switch_callout); 776 } 777 778 static int 779 mach64_get_memsize(struct mach64_softc *sc) 780 { 781 int tmp, memsize; 782 int mem_tab[] = { 783 512, 1024, 2048, 4096, 6144, 8192, 12288, 16384 784 }; 785 tmp = regr(sc, MEM_CNTL); 786 printf("memctl: %08x\n",tmp); 787 if (sc->has_dsp) { 788 tmp &= 0x0000000f; 789 if (tmp < 8) 790 memsize = (tmp + 1) * 512; 791 else if (tmp < 12) 792 memsize = (tmp - 3) * 1024; 793 else 794 memsize = (tmp - 7) * 2048; 795 } else { 796 memsize = mem_tab[tmp & 0x07]; 797 } 798 799 return memsize; 800 } 801 802 static int 803 mach64_get_max_ramdac(struct mach64_softc *sc) 804 { 805 int i; 806 807 if ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 808 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 809 (mach64_chip_rev & 0x07)) 810 return 170000; 811 812 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 813 if (mach64_chip_id == mach64_info[i].chip_id) 814 return mach64_info[i].ramdac_freq; 815 816 if (sc->bits_per_pixel == 8) 817 return 135000; 818 else 819 return 80000; 820 } 821 822 static void 823 mach64_get_mode(struct mach64_softc *sc, struct videomode *mode) 824 { 825 struct mach64_crtcregs crtc; 826 827 crtc.h_total_disp = regr(sc, CRTC_H_TOTAL_DISP); 828 crtc.h_sync_strt_wid = regr(sc, CRTC_H_SYNC_STRT_WID); 829 crtc.v_total_disp = regr(sc, CRTC_V_TOTAL_DISP); 830 crtc.v_sync_strt_wid = regr(sc, CRTC_V_SYNC_STRT_WID); 831 832 mode->htotal = ((crtc.h_total_disp & 0xffff) + 1) << 3; 833 mode->hdisplay = ((crtc.h_total_disp >> 16) + 1) << 3; 834 mode->hsync_start = ((crtc.h_sync_strt_wid & 0xffff) + 1) << 3; 835 mode->hsync_end = ((crtc.h_sync_strt_wid >> 16) << 3) + 836 mode->hsync_start; 837 mode->vtotal = (crtc.v_total_disp & 0xffff) + 1; 838 mode->vdisplay = (crtc.v_total_disp >> 16) + 1; 839 mode->vsync_start = (crtc.v_sync_strt_wid & 0xffff) + 1; 840 mode->vsync_end = (crtc.v_sync_strt_wid >> 16) + mode->vsync_start; 841 842 #ifdef DEBUG_MACHFB 843 printf("mach64_get_mode: %d %d %d %d %d %d %d %d\n", 844 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, 845 mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal); 846 #endif 847 } 848 849 static int 850 mach64_calc_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc, 851 struct videomode *mode) 852 { 853 854 if (mode->dot_clock > sc->ramdac_freq) 855 /* Clock too high. */ 856 return 1; 857 858 crtc->h_total_disp = (((mode->hdisplay >> 3) - 1) << 16) | 859 ((mode->htotal >> 3) - 1); 860 crtc->h_sync_strt_wid = 861 (((mode->hsync_end - mode->hsync_start) >> 3) << 16) | 862 ((mode->hsync_start >> 3) - 1); 863 864 crtc->v_total_disp = ((mode->vdisplay - 1) << 16) | 865 (mode->vtotal - 1); 866 crtc->v_sync_strt_wid = 867 ((mode->vsync_end - mode->vsync_start) << 16) | 868 (mode->vsync_start - 1); 869 870 if (mode->flags & VID_NVSYNC) 871 crtc->v_sync_strt_wid |= CRTC_VSYNC_NEG; 872 873 switch (sc->bits_per_pixel) { 874 case 8: 875 crtc->color_depth = CRTC_PIX_WIDTH_8BPP; 876 break; 877 case 16: 878 crtc->color_depth = CRTC_PIX_WIDTH_16BPP; 879 break; 880 case 32: 881 crtc->color_depth = CRTC_PIX_WIDTH_32BPP; 882 break; 883 } 884 885 crtc->gen_cntl = 0; 886 if (mode->flags & VID_INTERLACE) 887 crtc->gen_cntl |= CRTC_INTERLACE_EN; 888 if (mode->flags & VID_CSYNC) 889 crtc->gen_cntl |= CRTC_CSYNC_EN; 890 891 crtc->dot_clock = mode->dot_clock; 892 893 return 0; 894 } 895 896 static void 897 mach64_set_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc) 898 { 899 900 mach64_set_pll(sc, crtc->dot_clock); 901 902 if (sc->has_dsp) 903 mach64_set_dsp(sc); 904 905 regw(sc, CRTC_H_TOTAL_DISP, crtc->h_total_disp); 906 regw(sc, CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid); 907 regw(sc, CRTC_V_TOTAL_DISP, crtc->v_total_disp); 908 regw(sc, CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid); 909 910 regw(sc, CRTC_VLINE_CRNT_VLINE, 0); 911 912 regw(sc, CRTC_OFF_PITCH, (sc->virt_x >> 3) << 22); 913 914 regw(sc, CRTC_GEN_CNTL, crtc->gen_cntl | crtc->color_depth | 915 CRTC_EXT_DISP_EN | CRTC_EXT_EN); 916 } 917 918 static int 919 mach64_modeswitch(struct mach64_softc *sc, struct videomode *mode) 920 { 921 struct mach64_crtcregs crtc; 922 923 if (mach64_calc_crtcregs(sc, &crtc, mode)) 924 return 1; 925 926 mach64_set_crtcregs(sc, &crtc); 927 return 0; 928 } 929 930 static void 931 mach64_reset_engine(struct mach64_softc *sc) 932 { 933 934 /* Reset engine.*/ 935 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) & ~GUI_ENGINE_ENABLE); 936 937 /* Enable engine. */ 938 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) | GUI_ENGINE_ENABLE); 939 940 /* Ensure engine is not locked up by clearing any FIFO or 941 host errors. */ 942 regw(sc, BUS_CNTL, regr(sc, BUS_CNTL) | BUS_HOST_ERR_ACK | 943 BUS_FIFO_ERR_ACK); 944 } 945 946 static void 947 mach64_init_engine(struct mach64_softc *sc) 948 { 949 u_int32_t pitch_value; 950 951 pitch_value = sc->virt_x; 952 953 if (sc->bits_per_pixel == 24) 954 pitch_value *= 3; 955 956 mach64_reset_engine(sc); 957 958 wait_for_fifo(sc, 14); 959 960 regw(sc, CONTEXT_MASK, 0xffffffff); 961 962 regw(sc, DST_OFF_PITCH, (pitch_value / 8) << 22); 963 964 regw(sc, DST_Y_X, 0); 965 regw(sc, DST_HEIGHT, 0); 966 regw(sc, DST_BRES_ERR, 0); 967 regw(sc, DST_BRES_INC, 0); 968 regw(sc, DST_BRES_DEC, 0); 969 970 regw(sc, DST_CNTL, DST_LAST_PEL | DST_X_LEFT_TO_RIGHT | 971 DST_Y_TOP_TO_BOTTOM); 972 973 regw(sc, SRC_OFF_PITCH, (pitch_value / 8) << 22); 974 975 regw(sc, SRC_Y_X, 0); 976 regw(sc, SRC_HEIGHT1_WIDTH1, 1); 977 regw(sc, SRC_Y_X_START, 0); 978 regw(sc, SRC_HEIGHT2_WIDTH2, 1); 979 980 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 981 982 wait_for_fifo(sc, 13); 983 regw(sc, HOST_CNTL, 0); 984 985 regw(sc, PAT_REG0, 0); 986 regw(sc, PAT_REG1, 0); 987 regw(sc, PAT_CNTL, 0); 988 989 regw(sc, SC_LEFT, 0); 990 regw(sc, SC_TOP, 0); 991 regw(sc, SC_BOTTOM, sc->sc_my_mode->vdisplay - 1); 992 regw(sc, SC_RIGHT, pitch_value - 1); 993 994 regw(sc, DP_BKGD_CLR, 0); 995 regw(sc, DP_FRGD_CLR, 0xffffffff); 996 regw(sc, DP_WRITE_MASK, 0xffffffff); 997 regw(sc, DP_MIX, (MIX_SRC << 16) | MIX_DST); 998 999 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 1000 1001 wait_for_fifo(sc, 3); 1002 regw(sc, CLR_CMP_CLR, 0); 1003 regw(sc, CLR_CMP_MASK, 0xffffffff); 1004 regw(sc, CLR_CMP_CNTL, 0); 1005 1006 wait_for_fifo(sc, 2); 1007 switch (sc->bits_per_pixel) { 1008 case 8: 1009 regw(sc, DP_PIX_WIDTH, HOST_8BPP | SRC_8BPP | DST_8BPP); 1010 regw(sc, DP_CHAIN_MASK, DP_CHAIN_8BPP); 1011 /* We want 8 bit per channel */ 1012 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 1013 break; 1014 #if 0 1015 case 32: 1016 regw(sc, DP_PIX_WIDTH, HOST_32BPP | SRC_32BPP | DST_32BPP); 1017 regw(sc, DP_CHAIN_MASK, DP_CHAIN_32BPP); 1018 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 1019 break; 1020 #endif 1021 } 1022 1023 wait_for_fifo(sc, 5); 1024 regw(sc, CRTC_INT_CNTL, regr(sc, CRTC_INT_CNTL) & ~0x20); 1025 regw(sc, GUI_TRAJ_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 1026 1027 wait_for_idle(sc); 1028 } 1029 1030 #if 0 1031 static void 1032 mach64_adjust_frame(struct mach64_softc *sc, int x, int y) 1033 { 1034 int offset; 1035 1036 offset = ((x + y * sc->virt_x) * (sc->bits_per_pixel >> 3)) >> 3; 1037 1038 regw(sc, CRTC_OFF_PITCH, (regr(sc, CRTC_OFF_PITCH) & 0xfff00000) | 1039 offset); 1040 } 1041 #endif 1042 1043 static void 1044 mach64_set_dsp(struct mach64_softc *sc) 1045 { 1046 u_int32_t fifo_depth, page_size, dsp_precision, dsp_loop_latency; 1047 u_int32_t dsp_off, dsp_on, dsp_xclks_per_qw; 1048 u_int32_t xclks_per_qw, y; 1049 u_int32_t fifo_off, fifo_on; 1050 1051 printf("initializing the DSP\n"); 1052 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 1053 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II || 1054 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIP || 1055 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_PCI || 1056 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_B || 1057 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_P) { 1058 dsp_loop_latency = 0; 1059 fifo_depth = 24; 1060 } else { 1061 dsp_loop_latency = 2; 1062 fifo_depth = 32; 1063 } 1064 1065 dsp_precision = 0; 1066 xclks_per_qw = (sc->mclk_fb_div * sc->vclk_post_div * 64 << 11) / 1067 (sc->vclk_fb_div * sc->mclk_post_div * sc->bits_per_pixel); 1068 y = (xclks_per_qw * fifo_depth) >> 11; 1069 while (y) { 1070 y >>= 1; 1071 dsp_precision++; 1072 } 1073 dsp_precision -= 5; 1074 fifo_off = ((xclks_per_qw * (fifo_depth - 1)) >> 5) + (3 << 6); 1075 1076 switch (sc->memtype) { 1077 case DRAM: 1078 case EDO_DRAM: 1079 case PSEUDO_EDO: 1080 if (sc->memsize > 1024) { 1081 page_size = 9; 1082 dsp_loop_latency += 6; 1083 } else { 1084 page_size = 10; 1085 if (sc->memtype == DRAM) 1086 dsp_loop_latency += 8; 1087 else 1088 dsp_loop_latency += 7; 1089 } 1090 break; 1091 case SDRAM: 1092 case SGRAM: 1093 if (sc->memsize > 1024) { 1094 page_size = 8; 1095 dsp_loop_latency += 8; 1096 } else { 1097 page_size = 10; 1098 dsp_loop_latency += 9; 1099 } 1100 break; 1101 default: 1102 page_size = 10; 1103 dsp_loop_latency += 9; 1104 break; 1105 } 1106 1107 if (xclks_per_qw >= (page_size << 11)) 1108 fifo_on = ((2 * page_size + 1) << 6) + (xclks_per_qw >> 5); 1109 else 1110 fifo_on = (3 * page_size + 2) << 6; 1111 1112 dsp_xclks_per_qw = xclks_per_qw >> dsp_precision; 1113 dsp_on = fifo_on >> dsp_precision; 1114 dsp_off = fifo_off >> dsp_precision; 1115 1116 #ifdef DEBUG_MACHFB 1117 printf("dsp_xclks_per_qw = %d, dsp_on = %d, dsp_off = %d,\n" 1118 "dsp_precision = %d, dsp_loop_latency = %d,\n" 1119 "mclk_fb_div = %d, vclk_fb_div = %d,\n" 1120 "mclk_post_div = %d, vclk_post_div = %d\n", 1121 dsp_xclks_per_qw, dsp_on, dsp_off, dsp_precision, dsp_loop_latency, 1122 sc->mclk_fb_div, sc->vclk_fb_div, 1123 sc->mclk_post_div, sc->vclk_post_div); 1124 #endif 1125 1126 regw(sc, DSP_ON_OFF, ((dsp_on << 16) & DSP_ON) | (dsp_off & DSP_OFF)); 1127 regw(sc, DSP_CONFIG, ((dsp_precision << 20) & DSP_PRECISION) | 1128 ((dsp_loop_latency << 16) & DSP_LOOP_LATENCY) | 1129 (dsp_xclks_per_qw & DSP_XCLKS_PER_QW)); 1130 } 1131 1132 static void 1133 mach64_set_pll(struct mach64_softc *sc, int clock) 1134 { 1135 int q; 1136 1137 q = (clock * sc->ref_div * 100) / (2 * sc->ref_freq); 1138 #ifdef DEBUG_MACHFB 1139 printf("q = %d\n", q); 1140 #endif 1141 if (q > 25500) { 1142 printf("Warning: q > 25500\n"); 1143 q = 25500; 1144 sc->vclk_post_div = 1; 1145 sc->log2_vclk_post_div = 0; 1146 } else if (q > 12750) { 1147 sc->vclk_post_div = 1; 1148 sc->log2_vclk_post_div = 0; 1149 } else if (q > 6350) { 1150 sc->vclk_post_div = 2; 1151 sc->log2_vclk_post_div = 1; 1152 } else if (q > 3150) { 1153 sc->vclk_post_div = 4; 1154 sc->log2_vclk_post_div = 2; 1155 } else if (q >= 1600) { 1156 sc->vclk_post_div = 8; 1157 sc->log2_vclk_post_div = 3; 1158 } else { 1159 printf("Warning: q < 1600\n"); 1160 sc->vclk_post_div = 8; 1161 sc->log2_vclk_post_div = 3; 1162 } 1163 sc->vclk_fb_div = q * sc->vclk_post_div / 100; 1164 1165 regwb_pll(sc, MCLK_FB_DIV, sc->mclk_fb_div); 1166 regwb_pll(sc, VCLK_POST_DIV, sc->log2_vclk_post_div); 1167 regwb_pll(sc, VCLK0_FB_DIV, sc->vclk_fb_div); 1168 } 1169 1170 static void 1171 mach64_init_lut(struct mach64_softc *sc) 1172 { 1173 int i, idx; 1174 1175 idx = 0; 1176 for (i = 0; i < 256; i++) { 1177 mach64_putpalreg(sc, i, rasops_cmap[idx], rasops_cmap[idx + 1], 1178 rasops_cmap[idx + 2]); 1179 idx += 3; 1180 } 1181 } 1182 1183 static int 1184 mach64_putpalreg(struct mach64_softc *sc, uint8_t index, uint8_t r, uint8_t g, 1185 uint8_t b) 1186 { 1187 sc->sc_cmap_red[index] = r; 1188 sc->sc_cmap_green[index] = g; 1189 sc->sc_cmap_blue[index] = b; 1190 /* 1191 * writing the dac index takes a while, in theory we can poll some 1192 * register to see when it's ready - but we better avoid writing it 1193 * unnecessarily 1194 */ 1195 if (index != sc->sc_dacw) { 1196 regwb(sc, DAC_MASK, 0xff); 1197 regwb(sc, DAC_WINDEX, index); 1198 } 1199 sc->sc_dacw = index + 1; 1200 regwb(sc, DAC_DATA, r); 1201 regwb(sc, DAC_DATA, g); 1202 regwb(sc, DAC_DATA, b); 1203 return 0; 1204 } 1205 1206 static int 1207 mach64_putcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1208 { 1209 u_int index = cm->index; 1210 u_int count = cm->count; 1211 int i, error; 1212 u_char rbuf[256], gbuf[256], bbuf[256]; 1213 u_char *r, *g, *b; 1214 1215 printf("putcmap: %d %d\n",index, count); 1216 if (cm->index >= 256 || cm->count > 256 || 1217 (cm->index + cm->count) > 256) 1218 return EINVAL; 1219 error = copyin(cm->red, &rbuf[index], count); 1220 if (error) 1221 return error; 1222 error = copyin(cm->green, &gbuf[index], count); 1223 if (error) 1224 return error; 1225 error = copyin(cm->blue, &bbuf[index], count); 1226 if (error) 1227 return error; 1228 1229 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 1230 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 1231 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 1232 1233 r = &sc->sc_cmap_red[index]; 1234 g = &sc->sc_cmap_green[index]; 1235 b = &sc->sc_cmap_blue[index]; 1236 1237 for (i = 0; i < count; i++) { 1238 mach64_putpalreg(sc, index, *r, *g, *b); 1239 index++; 1240 r++, g++, b++; 1241 } 1242 return 0; 1243 } 1244 1245 static int 1246 mach64_getcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1247 { 1248 u_int index = cm->index; 1249 u_int count = cm->count; 1250 int error; 1251 1252 if (index >= 255 || count > 256 || index + count > 256) 1253 return EINVAL; 1254 1255 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 1256 if (error) 1257 return error; 1258 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 1259 if (error) 1260 return error; 1261 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 1262 if (error) 1263 return error; 1264 1265 return 0; 1266 } 1267 1268 static int 1269 mach64_set_screentype(struct mach64_softc *sc, const struct wsscreen_descr *des) 1270 { 1271 struct mach64_crtcregs regs; 1272 1273 if (mach64_calc_crtcregs(sc, ®s, 1274 (struct videomode *)des->modecookie)) 1275 return 1; 1276 1277 mach64_set_crtcregs(sc, ®s); 1278 return 0; 1279 } 1280 1281 static int 1282 mach64_is_console(struct pci_attach_args *pa) 1283 { 1284 #ifdef __sparc__ 1285 int node; 1286 1287 node = PCITAG_NODE(pa->pa_tag); 1288 if (node == -1) 1289 return 0; 1290 1291 return (node == prom_instance_to_package(prom_stdout())); 1292 #elif defined(__powerpc__) 1293 /* check if we're the /chosen console device */ 1294 int chosen, stdout, node, us; 1295 1296 us = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 1297 chosen = OF_finddevice("/chosen"); 1298 OF_getprop(chosen, "stdout", &stdout, 4); 1299 node = OF_instance_to_package(stdout); 1300 return (us == node); 1301 #else 1302 return 1; 1303 #endif 1304 } 1305 1306 /* 1307 * wsdisplay_emulops 1308 */ 1309 1310 static void 1311 mach64_cursor(void *cookie, int on, int row, int col) 1312 { 1313 struct rasops_info *ri = cookie; 1314 struct mach64screen *scr = ri->ri_hw; 1315 struct mach64_softc *sc = scr->sc; 1316 int x, y, wi,he; 1317 1318 wi = ri->ri_font->fontwidth; 1319 he = ri->ri_font->fontheight; 1320 1321 if (scr->active) { 1322 x = scr->cursorcol * wi + ri->ri_xorigin; 1323 y = scr->cursorrow * he + ri->ri_yorigin; 1324 if (scr->cursordrawn) { 1325 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1326 0xff); 1327 scr->cursordrawn=0; 1328 } 1329 scr->cursorrow = row; 1330 scr->cursorcol = col; 1331 if ((scr->cursoron = on) != 0) 1332 { 1333 x = scr->cursorcol * wi + ri->ri_xorigin; 1334 y = scr->cursorrow * he + ri->ri_yorigin; 1335 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1336 0xff); 1337 scr->cursordrawn = 1; 1338 } 1339 } else { 1340 scr->cursoron = on; 1341 scr->cursorrow = row; 1342 scr->cursorcol = col; 1343 scr->cursordrawn = 0; 1344 } 1345 } 1346 1347 #if 0 1348 static int 1349 mach64_mapchar(void *cookie, int uni, u_int *index) 1350 { 1351 return 0; 1352 } 1353 #endif 1354 1355 static void 1356 mach64_putchar(void *cookie, int row, int col, u_int c, long attr) 1357 { 1358 struct rasops_info *ri = cookie; 1359 struct mach64screen *scr = ri->ri_hw; 1360 struct mach64_softc *sc = scr->sc; 1361 int offset = ri->ri_cols * row + col; 1362 1363 scr->attrs[offset] = attr; 1364 scr->chars[offset] = c; 1365 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1366 int fg, bg, uc; 1367 uint8_t *data; 1368 int x, y, wi, he; 1369 wi = ri->ri_font->fontwidth; 1370 he = ri->ri_font->fontheight; 1371 1372 #ifdef notdef 1373 scr->putchar(cookie,row,col,c,attr); 1374 #endif 1375 if (!CHAR_IN_FONT(c, ri->ri_font)) 1376 return; 1377 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf]; 1378 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf]; 1379 x = ri->ri_xorigin + col * wi; 1380 y = ri->ri_yorigin + row * he; 1381 if (c == 0x20) { 1382 mach64_rectfill(sc, x, y, wi, he, bg); 1383 } else { 1384 uc = c-ri->ri_font->firstchar; 1385 data = (uint8_t *)ri->ri_font->data + uc * 1386 ri->ri_fontscale; 1387 1388 mach64_setup_mono(sc, x, y, wi, he, fg, bg); 1389 mach64_feed_bytes(sc, ri->ri_fontscale, data); 1390 } 1391 } 1392 } 1393 1394 1395 static void 1396 mach64_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1397 { 1398 struct rasops_info *ri=cookie; 1399 struct mach64screen *scr=ri->ri_hw; 1400 struct mach64_softc *sc=scr->sc; 1401 int32_t xs,xd,y,width,height; 1402 int from, to; 1403 1404 from = srccol + row * ri->ri_cols; 1405 to = dstcol + row * ri->ri_cols; 1406 1407 memmove(&scr->attrs[to], &scr->attrs[from], ncols * sizeof(long)); 1408 memmove(&scr->chars[to], &scr->chars[from], ncols * sizeof(u_int)); 1409 1410 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1411 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1412 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1413 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1414 width = ri->ri_font->fontwidth * ncols; 1415 height = ri->ri_font->fontheight; 1416 mach64_bitblt(sc, xs, y, xd, y, width, height, MIX_SRC, 0xff); 1417 } 1418 } 1419 1420 static void 1421 mach64_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1422 { 1423 struct rasops_info *ri=cookie; 1424 struct mach64screen *scr=ri->ri_hw; 1425 struct mach64_softc *sc=scr->sc; 1426 int32_t x, y, width, height, fg, bg, ul; 1427 int start, end, i; 1428 1429 start = startcol + row * ri->ri_cols; 1430 end = start + ncols; 1431 1432 for (i = start; i < end; i++) { 1433 scr->attrs[i] = fillattr; 1434 scr->chars[i] = 0x20; 1435 } 1436 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1437 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1438 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1439 width = ri->ri_font->fontwidth * ncols; 1440 height = ri->ri_font->fontheight; 1441 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1442 1443 mach64_rectfill(sc, x, y, width, height, bg); 1444 } 1445 } 1446 1447 static void 1448 mach64_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1449 { 1450 struct rasops_info *ri=cookie; 1451 struct mach64screen *scr=ri->ri_hw; 1452 struct mach64_softc *sc=scr->sc; 1453 int32_t x, ys, yd, width, height; 1454 int from, to, len; 1455 1456 from = ri->ri_cols * srcrow; 1457 to = ri->ri_cols * dstrow; 1458 len = ri->ri_cols * nrows; 1459 1460 memmove(&scr->attrs[to], &scr->attrs[from], len*sizeof(long)); 1461 memmove(&scr->chars[to], &scr->chars[from], len*sizeof(u_int)); 1462 1463 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1464 x = ri->ri_xorigin; 1465 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1466 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1467 width = ri->ri_emuwidth; 1468 height = ri->ri_font->fontheight*nrows; 1469 mach64_bitblt(sc, x, ys, x, yd, width, height, MIX_SRC, 0xff); 1470 } 1471 } 1472 1473 static void 1474 mach64_eraserows(void *cookie, int row, int nrows, long fillattr) 1475 { 1476 struct rasops_info *ri=cookie; 1477 struct mach64screen *scr=ri->ri_hw; 1478 struct mach64_softc *sc=scr->sc; 1479 int32_t x,y,width,height,fg,bg,ul; 1480 int start, end, i; 1481 1482 start = ri->ri_cols * row; 1483 end = ri->ri_cols * (row + nrows); 1484 1485 for (i=start;i<end;i++) { 1486 scr->attrs[i] = fillattr; 1487 scr->chars[i] = 0x20; 1488 } 1489 1490 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1491 x = ri->ri_xorigin; 1492 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1493 width = ri->ri_emuwidth; 1494 height = ri->ri_font->fontheight * nrows; 1495 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1496 1497 mach64_rectfill(sc, x, y, width, height, bg); 1498 } 1499 } 1500 1501 static void 1502 mach64_bitblt(struct mach64_softc *sc, int xs, int ys, int xd, int yd, int width, int height, int rop, int mask) 1503 { 1504 uint32_t dest_ctl = 0; 1505 1506 wait_for_idle(sc); 1507 regw(sc, DP_WRITE_MASK, mask); /* XXX only good for 8 bit */ 1508 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1509 regw(sc, DP_SRC, FRGD_SRC_BLIT); 1510 regw(sc, DP_MIX, (rop & 0xffff) << 16); 1511 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1512 if (yd < ys) { 1513 dest_ctl = DST_Y_TOP_TO_BOTTOM; 1514 } else { 1515 ys += height - 1; 1516 yd += height - 1; 1517 dest_ctl = DST_Y_BOTTOM_TO_TOP; 1518 } 1519 if (xd < xs) { 1520 dest_ctl |= DST_X_LEFT_TO_RIGHT; 1521 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1522 } else { 1523 dest_ctl |= DST_X_RIGHT_TO_LEFT; 1524 xs += width - 1; 1525 xd += width - 1; 1526 regw(sc, SRC_CNTL, SRC_LINE_X_RIGHT_TO_LEFT); 1527 } 1528 regw(sc, DST_CNTL, dest_ctl); 1529 1530 regw(sc, SRC_Y_X, (xs << 16) | ys); 1531 regw(sc, SRC_WIDTH1, width); 1532 regw(sc, DST_Y_X, (xd << 16) | yd); 1533 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1534 } 1535 1536 static void 1537 mach64_setup_mono(struct mach64_softc *sc, int xd, int yd, int width, 1538 int height, uint32_t fg, uint32_t bg) 1539 { 1540 wait_for_idle(sc); 1541 regw(sc, DP_WRITE_MASK, 0xff); /* XXX only good for 8 bit */ 1542 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_1BPP | HOST_1BPP); 1543 regw(sc, DP_SRC, MONO_SRC_HOST | BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR); 1544 regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC); 1545 regw(sc, CLR_CMP_CNTL ,0); /* no transparency */ 1546 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1547 regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT); 1548 regw(sc, HOST_CNTL, HOST_BYTE_ALIGN); 1549 regw(sc, DP_BKGD_CLR, bg); 1550 regw(sc, DP_FRGD_CLR, fg); 1551 regw(sc, SRC_Y_X, 0); 1552 regw(sc, SRC_WIDTH1, width); 1553 regw(sc, DST_Y_X, (xd << 16) | yd); 1554 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1555 /* now feed the data into the chip */ 1556 } 1557 1558 static void 1559 mach64_feed_bytes(struct mach64_softc *sc, int count, uint8_t *data) 1560 { 1561 int i; 1562 uint32_t latch = 0, bork; 1563 int shift = 0; 1564 int reg = 0; 1565 1566 for (i=0;i<count;i++) { 1567 bork = data[i]; 1568 latch |= (bork << shift); 1569 if (shift == 24) { 1570 regw(sc, HOST_DATA0 + reg, latch); 1571 latch = 0; 1572 shift = 0; 1573 reg = (reg + 4) & 0x3c; 1574 } else 1575 shift += 8; 1576 } 1577 if (shift != 0) /* 24 */ 1578 regw(sc, HOST_DATA0 + reg, latch); 1579 } 1580 1581 1582 static void 1583 mach64_rectfill(struct mach64_softc *sc, int x, int y, int width, int height, 1584 int colour) 1585 { 1586 wait_for_idle(sc); 1587 regw(sc, DP_WRITE_MASK, 0xff); 1588 regw(sc, DP_FRGD_CLR, colour); 1589 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1590 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 1591 regw(sc, DP_MIX, MIX_SRC << 16); 1592 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1593 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1594 regw(sc, DST_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 1595 1596 regw(sc, SRC_Y_X, (x << 16) | y); 1597 regw(sc, SRC_WIDTH1, width); 1598 regw(sc, DST_Y_X, (x << 16) | y); 1599 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1600 } 1601 1602 static void 1603 mach64_clearscreen(struct mach64_softc *sc) 1604 { 1605 mach64_rectfill(sc, 0, 0, sc->virt_x, sc->virt_y, sc->sc_bg); 1606 } 1607 1608 1609 #if 0 1610 static void 1611 mach64_showpal(struct mach64_softc *sc) 1612 { 1613 int i, x = 0; 1614 1615 for (i = 0; i < 16; i++) { 1616 mach64_rectfill(sc, x, 0, 64, 64, i); 1617 x += 64; 1618 } 1619 } 1620 #endif 1621 1622 static int 1623 mach64_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1624 { 1625 if ((fg == 0) && (bg == 0)) 1626 { 1627 fg = WS_DEFAULT_FG; 1628 bg = WS_DEFAULT_BG; 1629 } 1630 *attrp = (fg & 0xf) << 24 | (bg & 0xf) << 16 | (flags & 0xff) << 8; 1631 return 0; 1632 } 1633 1634 /* 1635 * wsdisplay_accessops 1636 */ 1637 1638 static int 1639 mach64_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 1640 { 1641 struct mach64_softc *sc = v; 1642 struct wsdisplay_fbinfo *wdf; 1643 struct mach64screen *ms=sc->active; 1644 1645 switch (cmd) { 1646 case WSDISPLAYIO_GTYPE: 1647 /* XXX is this the right type to return? */ 1648 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 1649 return 0; 1650 1651 case WSDISPLAYIO_GINFO: 1652 wdf = (void *)data; 1653 wdf->height = ms->ri.ri_height; 1654 wdf->width = ms->ri.ri_width; 1655 wdf->depth = ms->ri.ri_depth; 1656 wdf->cmsize = 256; 1657 return 0; 1658 1659 case WSDISPLAYIO_GETCMAP: 1660 return mach64_getcmap(sc, 1661 (struct wsdisplay_cmap *)data); 1662 1663 case WSDISPLAYIO_PUTCMAP: 1664 return mach64_putcmap(sc, 1665 (struct wsdisplay_cmap *)data); 1666 1667 /* PCI config read/write passthrough. */ 1668 case PCI_IOC_CFGREAD: 1669 case PCI_IOC_CFGWRITE: 1670 return (pci_devioctl(sc->sc_pc, sc->sc_pcitag, 1671 cmd, data, flag, p)); 1672 1673 case WSDISPLAYIO_SMODE: 1674 { 1675 int new_mode = *(int*)data; 1676 1677 if (new_mode != sc->sc_mode) 1678 { 1679 sc->sc_mode = new_mode; 1680 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1681 { 1682 /* 1683 * reset a few things the 1684 * Xserver might have screwed up 1685 */ 1686 mach64_restore_screen(ms, 1687 ms->type, ms->chars); 1688 mach64_cursor(ms, ms->cursoron, 1689 ms->cursorrow, 1690 ms->cursorcol); 1691 } 1692 } 1693 } 1694 return 0; 1695 1696 case WSDISPLAYIO_GETWSCHAR: 1697 return mach64_getwschar(sc, 1698 (struct wsdisplay_char *)data); 1699 1700 case WSDISPLAYIO_PUTWSCHAR: 1701 return mach64_putwschar(sc, 1702 (struct wsdisplay_char *)data); 1703 } 1704 return EPASSTHROUGH; 1705 } 1706 1707 static paddr_t 1708 mach64_mmap(void *v, off_t offset, int prot) 1709 { 1710 struct mach64_softc *sc = v; 1711 paddr_t pa; 1712 pcireg_t reg; 1713 1714 #ifndef __sparc64__ 1715 /* 1716 *'regular' framebuffer mmap()ing 1717 * disabled on sparc64 because some ATI firmware likes to map some PCI 1718 * resources to addresses that would collide with this ( like some Rage 1719 * IIc which uses 0x2000 for the 2nd register block ) 1720 * Other 64bit architectures might run into similar problems. 1721 */ 1722 if (offset<sc->sc_apersize) { 1723 pa = bus_space_mmap(sc->sc_memt, sc->sc_aperbase+offset, 0, 1724 prot, BUS_SPACE_MAP_LINEAR); 1725 return pa; 1726 } 1727 #endif 1728 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x18) & 0xffffff00); 1729 if (reg != sc->sc_regphys) { 1730 printf("%s: BAR 0x18 changed! (%x %x)\n", 1731 sc->sc_dev.dv_xname, (uint32_t)sc->sc_regphys, 1732 (uint32_t)reg); 1733 sc->sc_regphys = reg; 1734 } 1735 1736 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x10) & 0xffffff00); 1737 if (reg != sc->sc_aperphys) { 1738 printf("%s: BAR 0x10 changed! (%x %x)\n", 1739 sc->sc_dev.dv_xname, (uint32_t)sc->sc_aperphys, 1740 (uint32_t)reg); 1741 sc->sc_aperphys = reg; 1742 } 1743 1744 #if 0 1745 /* evil hack to allow mmap()ing other devices as well */ 1746 if ((offset > 0x80000000) && (offset <= 0xffffffff)) { 1747 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1748 BUS_SPACE_MAP_LINEAR); 1749 return pa; 1750 } 1751 #endif 1752 1753 if ((offset >= sc->sc_aperphys) && 1754 (offset < (sc->sc_aperphys + sc->sc_apersize))) { 1755 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1756 BUS_SPACE_MAP_LINEAR); 1757 return pa; 1758 } 1759 1760 if ((offset >= sc->sc_regphys) && 1761 (offset < (sc->sc_regphys + sc->sc_regsize))) { 1762 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1763 BUS_SPACE_MAP_LINEAR); 1764 return pa; 1765 } 1766 1767 return -1; 1768 } 1769 1770 static int 1771 mach64_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 1772 int *curxp, int *curyp, long *defattrp) 1773 { 1774 struct mach64_softc *sc = v; 1775 struct mach64screen *scr; 1776 struct rasops_info *ri; 1777 int cnt; 1778 1779 scr = malloc(sizeof(struct mach64screen), M_DEVBUF, M_WAITOK | M_ZERO); 1780 mach64_init_screen(sc, scr, type, 0, defattrp, sc->active == NULL); 1781 ri = &scr->ri; 1782 1783 ri->ri_hw = scr; 1784 #ifdef notdef 1785 ri->ri_bits = (void *)sc->sc_aperbase; 1786 #endif 1787 rasops_init(ri, sc->sc_my_mode->vdisplay / 8, 1788 sc->sc_my_mode->hdisplay / 8); 1789 1790 rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight, 1791 ri->ri_width / ri->ri_font->fontwidth); 1792 cnt = ri->ri_cols * ri->ri_rows; 1793 set_address(ri, sc->sc_aperbase); 1794 mach64_allocattr(ri, WS_DEFAULT_FG, WS_DEFAULT_BG, 0, defattrp); 1795 1796 scr->ri.ri_ops.copyrows = mach64_copyrows; 1797 scr->ri.ri_ops.eraserows = mach64_eraserows; 1798 scr->ri.ri_ops.copycols = mach64_copycols; 1799 scr->ri.ri_ops.erasecols = mach64_erasecols; 1800 scr->ri.ri_ops.putchar = mach64_putchar; 1801 scr->ri.ri_ops.cursor = mach64_cursor; 1802 1803 scr->attrs = malloc(cnt * (sizeof(long) + sizeof(u_int)), 1804 M_DEVBUF, M_WAITOK); 1805 scr->chars = (u_int *)&scr->attrs[cnt]; 1806 mach64_eraserows(ri, 0, ri->ri_rows, *defattrp); 1807 1808 if (sc->active == NULL) { 1809 scr->active = 1; 1810 sc->active = scr; 1811 sc->currenttype = type; 1812 } 1813 1814 *cookiep = scr; 1815 *curxp = scr->cursorcol; 1816 *curyp = scr->cursorrow; 1817 1818 return 0; 1819 } 1820 1821 static void 1822 mach64_free_screen(void *v, void *cookie) 1823 { 1824 struct mach64_softc *sc = v; 1825 struct mach64screen *scr = cookie; 1826 1827 LIST_REMOVE(scr, next); 1828 if (scr != &mach64_console_screen) { 1829 free(scr->attrs, M_DEVBUF); 1830 free(scr, M_DEVBUF); 1831 } else 1832 panic("mach64_free_screen: console"); 1833 1834 if (sc->active == scr) 1835 sc->active = 0; 1836 } 1837 1838 static int 1839 mach64_show_screen(void *v, void *cookie, int waitok, 1840 void (*cb)(void *, int, int), void *cbarg) 1841 { 1842 struct mach64_softc *sc = v; 1843 struct mach64screen *scr, *oldscr; 1844 1845 scr = cookie; 1846 oldscr = sc->active; 1847 if (scr == oldscr) 1848 return 0; 1849 1850 sc->wanted = scr; 1851 sc->switchcb = cb; 1852 sc->switchcbarg = cbarg; 1853 if (cb) { 1854 callout_reset(&sc->switch_callout, 0, 1855 (void(*)(void *))mach64_switch_screen, sc); 1856 return EAGAIN; 1857 } 1858 1859 mach64_switch_screen(sc); 1860 1861 return 0; 1862 } 1863 1864 static void 1865 mach64_switch_screen(struct mach64_softc *sc) 1866 { 1867 struct mach64screen *scr, *oldscr; 1868 const struct wsscreen_descr *type; 1869 1870 scr = sc->wanted; 1871 if (!scr) { 1872 printf("mach64_switch_screen: disappeared\n"); 1873 (*sc->switchcb)(sc->switchcbarg, EIO, 0); 1874 return; 1875 } 1876 type = scr->type; 1877 oldscr = sc->active; /* can be NULL! */ 1878 #ifdef DIAGNOSTIC 1879 if (oldscr) { 1880 if (!oldscr->active) 1881 panic("mach64_switch_screen: not active"); 1882 if (oldscr->type != sc->currenttype) 1883 panic("mach64_switch_screen: bad type %p != %p", 1884 oldscr->type, sc->currenttype); 1885 } 1886 #endif 1887 if (scr == oldscr) 1888 return; 1889 1890 #ifdef DIAGNOSTIC 1891 /* XXX: this one bites us at reboot */ 1892 #ifdef notdef 1893 if (scr->active) 1894 panic("mach64_switch_screen: active"); 1895 #endif 1896 #endif 1897 1898 if (oldscr) 1899 oldscr->active = 0; 1900 1901 if (sc->currenttype != type) { 1902 mach64_set_screentype(sc, type); 1903 sc->currenttype = type; 1904 } 1905 1906 scr->dispoffset = scr->mindispoffset; 1907 1908 if (!oldscr || (scr->dispoffset != oldscr->dispoffset)) { 1909 1910 } 1911 1912 /* Clear the entire screen. */ 1913 1914 scr->active = 1; 1915 mach64_restore_screen(scr, type, scr->chars); 1916 1917 sc->active = scr; 1918 1919 scr->ri.ri_ops.cursor(scr, scr->cursoron, scr->cursorrow, 1920 scr->cursorcol); 1921 1922 sc->wanted = 0; 1923 if (sc->switchcb) 1924 (*sc->switchcb)(sc->switchcbarg, 0, 0); 1925 } 1926 1927 static void 1928 mach64_restore_screen(struct mach64screen *scr, 1929 const struct wsscreen_descr *type, u_int *mem) 1930 { 1931 int i, j, offset = 0; 1932 u_int *charptr = scr->chars; 1933 long *attrptr = scr->attrs; 1934 1935 mach64_clearscreen(scr->sc); 1936 for (i = 0; i < scr->ri.ri_rows; i++) { 1937 for (j = 0; j < scr->ri.ri_cols; j++) { 1938 mach64_putchar(scr, i, j, charptr[offset], 1939 attrptr[offset]); 1940 offset++; 1941 } 1942 } 1943 scr->cursordrawn = 0; 1944 } 1945 1946 /* set ri->ri_bits according to fb, ri_xorigin and ri_yorigin */ 1947 static void 1948 set_address(struct rasops_info *ri, bus_addr_t fb) 1949 { 1950 #ifdef notdef 1951 printf(" %d %d %d\n", ri->ri_xorigin, ri->ri_yorigin, ri->ri_stride); 1952 #endif 1953 ri->ri_bits = (void *)((u_long)fb + ri->ri_stride * ri->ri_yorigin + 1954 ri->ri_xorigin); 1955 } 1956 1957 static int 1958 mach64_getwschar(void *cookie, struct wsdisplay_char *wsc) 1959 { 1960 struct mach64_softc *sc = cookie; 1961 struct mach64screen *scr = sc->active; 1962 int fg, bg, fl; 1963 1964 if (scr){ 1965 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1966 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1967 int pos = scr->ri.ri_cols * wsc->row + wsc->col; 1968 1969 wsc->letter = scr->chars[pos]; 1970 rasops_unpack_attr(scr->attrs[pos], &fg, &bg, &fl); 1971 wsc->foreground = fg; 1972 wsc->background = bg; 1973 wsc->flags = fl; 1974 return 0; 1975 } 1976 } 1977 return EINVAL; 1978 } 1979 1980 static int 1981 mach64_putwschar(void *cookie, struct wsdisplay_char *wsc) 1982 { 1983 struct mach64_softc *sc=cookie; 1984 struct mach64screen *scr=sc->active; 1985 long attr; 1986 1987 if (scr){ 1988 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1989 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1990 mach64_allocattr(&scr->ri, wsc->foreground, 1991 wsc->background, wsc->flags,&attr); 1992 mach64_putchar(&scr->ri, wsc->row, wsc->col, 1993 wsc->letter, attr); 1994 return 0; 1995 } 1996 } 1997 return EINVAL; 1998 } 1999 2000 #if 0 2001 static int 2002 mach64_load_font(void *v, void *cookie, struct wsdisplay_font *data) 2003 { 2004 2005 return 0; 2006 } 2007 #endif 2008
Indexes created Thu Oct 02 14:10:14 GMT 2025