machfb.c revision 1.34
1 /* $NetBSD: machfb.c,v 1.34 2005/10/01 19:01:01 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Bang Jun-Young 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Some code is derived from ATI Rage Pro and Derivatives Programmer's Guide. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, 36 "$NetBSD: machfb.c,v 1.34 2005/10/01 19:01:01 macallan Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 #include <sys/callout.h> 44 45 #ifdef __sparc__ 46 #include <machine/promlib.h> 47 #endif 48 49 #ifdef __powerpc__ 50 #include <dev/ofw/openfirm.h> 51 #include <dev/ofw/ofw_pci.h> 52 #endif 53 54 #include <dev/ic/videomode.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcidevs.h> 59 #include <dev/pci/pciio.h> 60 #include <dev/pci/machfbreg.h> 61 62 #include <dev/wscons/wsdisplayvar.h> 63 #include <dev/wscons/wsconsio.h> 64 #include <dev/wsfont/wsfont.h> 65 #include <dev/rasops/rasops.h> 66 67 #define MACH64_REG_SIZE 1024 68 #define MACH64_REG_OFF 0x7ffc00 69 70 #define NBARS 3 /* number of Mach64 PCI BARs */ 71 72 struct vga_bar { 73 bus_addr_t vb_base; 74 pcireg_t vb_busaddr; 75 bus_size_t vb_size; 76 pcireg_t vb_type; 77 int vb_flags; 78 }; 79 80 struct mach64_softc { 81 struct device sc_dev; 82 pci_chipset_tag_t sc_pc; 83 pcitag_t sc_pcitag; 84 85 struct vga_bar sc_bars[NBARS]; 86 struct vga_bar sc_rom; 87 88 #define sc_aperbase sc_bars[0].vb_base 89 #define sc_apersize sc_bars[0].vb_size 90 #define sc_aperphys sc_bars[0].vb_busaddr 91 92 #define sc_iobase sc_bars[1].vb_base 93 #define sc_iosize sc_bars[1].vb_size 94 95 #define sc_regbase sc_bars[2].vb_base 96 #define sc_regsize sc_bars[2].vb_size 97 #define sc_regphys sc_bars[2].vb_busaddr 98 99 bus_space_tag_t sc_regt; 100 bus_space_tag_t sc_memt; 101 bus_space_handle_t sc_regh; 102 bus_space_handle_t sc_memh; 103 104 size_t memsize; 105 int memtype; 106 107 int sc_mode; 108 int sc_bg; 109 110 int has_dsp; 111 int bits_per_pixel; 112 int max_x; 113 int max_y; 114 int virt_x; 115 int virt_y; 116 int color_depth; 117 118 int mem_freq; 119 int ramdac_freq; 120 int ref_freq; 121 122 int ref_div; 123 int log2_vclk_post_div; 124 int vclk_post_div; 125 int vclk_fb_div; 126 int mclk_post_div; 127 int mclk_fb_div; 128 129 struct videomode *sc_my_mode; 130 struct mach64screen *wanted; 131 struct mach64screen *active; 132 void (*switchcb)(void *, int, int); 133 void *switchcbarg; 134 struct callout switch_callout; 135 LIST_HEAD(, mach64screen) screens; 136 const struct wsscreen_descr *currenttype; 137 u_char sc_cmap_red[256]; 138 u_char sc_cmap_green[256]; 139 u_char sc_cmap_blue[256]; 140 int sc_dacw; 141 }; 142 143 struct mach64screen { 144 struct rasops_info ri; 145 LIST_ENTRY(mach64screen) next; 146 struct mach64_softc *sc; 147 const struct wsscreen_descr *type; 148 int active; 149 u_int *chars; 150 long *attrs; 151 int dispoffset; 152 int mindispoffset; 153 int maxdispoffset; 154 155 int cursoron; 156 int cursorcol; 157 int cursorrow; 158 int cursordrawn; 159 }; 160 161 struct mach64_crtcregs { 162 u_int32_t h_total_disp; 163 u_int32_t h_sync_strt_wid; 164 u_int32_t v_total_disp; 165 u_int32_t v_sync_strt_wid; 166 u_int32_t gen_cntl; 167 u_int32_t clock_cntl; 168 u_int32_t color_depth; 169 u_int32_t dot_clock; 170 }; 171 172 struct { 173 u_int16_t chip_id; 174 u_int32_t ramdac_freq; 175 } static const mach64_info[] = { 176 { PCI_PRODUCT_ATI_MACH64_CT, 135000 }, 177 { PCI_PRODUCT_ATI_RAGE_PRO_AGP, 230000 }, 178 { PCI_PRODUCT_ATI_RAGE_PRO_AGP1X, 230000 }, 179 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_B, 230000 }, 180 { PCI_PRODUCT_ATI_RAGE_XL_AGP, 230000 }, 181 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_P, 230000 }, 182 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_L, 230000 }, 183 { PCI_PRODUCT_ATI_RAGE_XL_PCI, 230000 }, 184 { PCI_PRODUCT_ATI_RAGE_II, 135000 }, 185 { PCI_PRODUCT_ATI_RAGE_IIP, 200000 }, 186 { PCI_PRODUCT_ATI_RAGE_IIC_PCI, 230000 }, 187 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_B, 230000 }, 188 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_P, 230000 }, 189 { PCI_PRODUCT_ATI_RAGE_LT_PRO_AGP, 230000 }, 190 { PCI_PRODUCT_ATI_RAGE_MOB_M3_PCI, 230000 }, 191 { PCI_PRODUCT_ATI_RAGE_MOB_M3_AGP, 230000 }, 192 { PCI_PRODUCT_ATI_RAGE_LT, 230000 }, 193 { PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI, 230000 }, 194 { PCI_PRODUCT_ATI_RAGE_MOBILITY, 230000 }, 195 { PCI_PRODUCT_ATI_RAGE_LT_PRO, 230000 }, 196 { PCI_PRODUCT_ATI_MACH64_VT, 170000 }, 197 { PCI_PRODUCT_ATI_MACH64_VTB, 200000 }, 198 { PCI_PRODUCT_ATI_MACH64_VT4, 230000 } 199 }; 200 201 static int mach64_chip_id, mach64_chip_rev; 202 static struct videomode default_mode = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 203 204 static const char *mach64_memtype_names[] = { 205 "(N/A)", "DRAM", "EDO DRAM", "EDO DRAM", "SDRAM", "SGRAM", "WRAM", 206 "(unknown type)" 207 }; 208 209 static struct videomode mach64_modes[] = { 210 /* 640x400 @ 70 Hz, 31.5 kHz */ 211 { 25175, 640, 664, 760, 800, 400, 409, 411, 450, 0 }, 212 /* 640x480 @ 72 Hz, 36.5 kHz */ 213 { 25175, 640, 664, 760, 800, 480, 491, 493, 525, 0 }, 214 /* 800x600 @ 72 Hz, 48.0 kHz */ 215 { 50000, 800, 856, 976, 1040, 600, 637, 643, 666, 216 VID_PHSYNC | VID_PVSYNC }, 217 /* 1024x768 @ 70 Hz, 56.5 kHz */ 218 { 75000, 1024, 1048, 1184, 1328, 768, 771, 777, 806, 219 VID_NHSYNC | VID_NVSYNC }, 220 /* 1152x864 @ 70 Hz, 62.4 kHz */ 221 { 92000, 1152, 1208, 1368, 1474, 864, 865, 875, 895, 0 }, 222 /* 1280x1024 @ 70 Hz, 74.59 kHz */ 223 { 126500, 1280, 1312, 1472, 1696, 1024, 1032, 1040, 1068, 224 VID_NHSYNC | VID_NVSYNC } 225 }; 226 227 extern const u_char rasops_cmap[768]; 228 229 static int mach64_match(struct device *, struct cfdata *, void *); 230 static void mach64_attach(struct device *, struct device *, void *); 231 232 CFATTACH_DECL(machfb, sizeof(struct mach64_softc), mach64_match, mach64_attach, 233 NULL, NULL); 234 235 static void mach64_init(struct mach64_softc *); 236 static int mach64_get_memsize(struct mach64_softc *); 237 static int mach64_get_max_ramdac(struct mach64_softc *); 238 static void mach64_get_mode(struct mach64_softc *, struct videomode *); 239 static int mach64_calc_crtcregs(struct mach64_softc *, 240 struct mach64_crtcregs *, 241 struct videomode *); 242 static void mach64_set_crtcregs(struct mach64_softc *, 243 struct mach64_crtcregs *); 244 245 static int mach64_modeswitch(struct mach64_softc *, struct videomode *); 246 static void mach64_set_dsp(struct mach64_softc *); 247 static void mach64_set_pll(struct mach64_softc *, int); 248 static void mach64_reset_engine(struct mach64_softc *); 249 static void mach64_init_engine(struct mach64_softc *); 250 #if 0 251 static void mach64_adjust_frame(struct mach64_softc *, int, int); 252 #endif 253 static void mach64_init_lut(struct mach64_softc *); 254 static void mach64_switch_screen(struct mach64_softc *); 255 static void mach64_init_screen(struct mach64_softc *, struct mach64screen *, 256 const struct wsscreen_descr *, int, long *, 257 int); 258 static void mach64_restore_screen(struct mach64screen *, 259 const struct wsscreen_descr *, u_int *); 260 static int mach64_set_screentype(struct mach64_softc *, 261 const struct wsscreen_descr *); 262 static int mach64_is_console(struct pci_attach_args *); 263 264 static void mach64_cursor(void *, int, int, int); 265 #if 0 266 static int mach64_mapchar(void *, int, u_int *); 267 #endif 268 static void mach64_putchar(void *, int, int, u_int, long); 269 static void mach64_copycols(void *, int, int, int, int); 270 static void mach64_erasecols(void *, int, int, int, long); 271 static void mach64_copyrows(void *, int, int, int); 272 static void mach64_eraserows(void *, int, int, long); 273 static int mach64_allocattr(void *, int, int, int, long *); 274 static void mach64_clearscreen(struct mach64_softc *); 275 276 static int mach64_putcmap(struct mach64_softc *, struct wsdisplay_cmap *); 277 static int mach64_getcmap(struct mach64_softc *, struct wsdisplay_cmap *); 278 static int mach64_putpalreg(struct mach64_softc *, uint8_t, uint8_t, 279 uint8_t, uint8_t); 280 static void mach64_bitblt(struct mach64_softc *, int, int, int, int, int, 281 int, int, int) ; 282 static void mach64_rectfill(struct mach64_softc *, int, int, int, int, int); 283 static void mach64_setup_mono(struct mach64_softc *, int, int, int, int, 284 uint32_t, uint32_t); 285 static void mach64_feed_bytes(struct mach64_softc *, int, uint8_t *); 286 #if 0 287 static void mach64_showpal(struct mach64_softc *); 288 #endif 289 static int mach64_getwschar(void *, struct wsdisplay_char *); 290 static int mach64_putwschar(void *, struct wsdisplay_char *); 291 292 static void set_address(struct rasops_info *, bus_addr_t); 293 static void machfb_blank(struct mach64_softc *, int); 294 295 #if 0 296 static const struct wsdisplay_emulops mach64_emulops = { 297 mach64_cursor, 298 mach64_mapchar, 299 mach64_putchar, 300 mach64_copycols, 301 mach64_erasecols, 302 mach64_copyrows, 303 mach64_eraserows, 304 mach64_allocattr, 305 }; 306 #endif 307 308 static struct wsscreen_descr mach64_defaultscreen = { 309 "default", 310 80, 30, 311 NULL, 312 8, 16, 313 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 314 &default_mode 315 }, mach64_80x25_screen = { 316 "80x25", 80, 25, 317 NULL, 318 8, 16, 319 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 320 &mach64_modes[0] 321 }, mach64_80x30_screen = { 322 "80x30", 80, 30, 323 NULL, 324 8, 16, 325 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 326 &mach64_modes[1] 327 }, mach64_80x40_screen = { 328 "80x40", 80, 40, 329 NULL, 330 8, 10, 331 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 332 &mach64_modes[0] 333 }, mach64_80x50_screen = { 334 "80x50", 80, 50, 335 NULL, 336 8, 8, 337 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 338 &mach64_modes[0] 339 }, mach64_100x37_screen = { 340 "100x37", 100, 37, 341 NULL, 342 8, 16, 343 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 344 &mach64_modes[2] 345 }, mach64_128x48_screen = { 346 "128x48", 128, 48, 347 NULL, 348 8, 16, 349 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 350 &mach64_modes[3] 351 }, mach64_144x54_screen = { 352 "144x54", 144, 54, 353 NULL, 354 8, 16, 355 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 356 &mach64_modes[4] 357 }, mach64_160x64_screen = { 358 "160x54", 160, 64, 359 NULL, 360 8, 16, 361 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 362 &mach64_modes[5] 363 }; 364 365 static const struct wsscreen_descr *_mach64_scrlist[] = { 366 &mach64_defaultscreen, 367 &mach64_80x25_screen, 368 &mach64_80x30_screen, 369 &mach64_80x40_screen, 370 &mach64_80x50_screen, 371 &mach64_100x37_screen, 372 &mach64_128x48_screen, 373 &mach64_144x54_screen, 374 &mach64_160x64_screen 375 }; 376 377 static struct wsscreen_list mach64_screenlist = { 378 sizeof(_mach64_scrlist) / sizeof(struct wsscreen_descr *), 379 _mach64_scrlist 380 }; 381 382 static int mach64_ioctl(void *, u_long, caddr_t, int, struct proc *); 383 static paddr_t mach64_mmap(void *, off_t, int); 384 static int mach64_alloc_screen(void *, const struct wsscreen_descr *, 385 void **, int *, int *, long *); 386 static void mach64_free_screen(void *, void *); 387 static int mach64_show_screen(void *, void *, int, 388 void (*)(void *, int, int), void *); 389 #if 0 390 static int mach64_load_font(void *, void *, struct wsdisplay_font *); 391 #endif 392 393 static struct wsdisplay_accessops mach64_accessops = { 394 mach64_ioctl, 395 mach64_mmap, 396 mach64_alloc_screen, 397 mach64_free_screen, 398 mach64_show_screen, 399 NULL, /* load_font */ 400 NULL, /* polls */ 401 mach64_getwschar, /* getwschar */ 402 mach64_putwschar, /* putwschar */ 403 NULL, /* scroll */ 404 NULL, /* getborder */ 405 NULL /* setborder */ 406 }; 407 408 /* 409 * Inline functions for getting access to register aperture. 410 */ 411 412 static inline u_int32_t 413 regr(struct mach64_softc *sc, u_int32_t index) 414 { 415 return bus_space_read_4(sc->sc_regt, sc->sc_regh, index); 416 } 417 418 static inline u_int8_t 419 regrb(struct mach64_softc *sc, u_int32_t index) 420 { 421 return bus_space_read_1(sc->sc_regt, sc->sc_regh, index); 422 } 423 424 static inline void 425 regw(struct mach64_softc *sc, u_int32_t index, u_int32_t data) 426 { 427 bus_space_write_4(sc->sc_regt, sc->sc_regh, index, data); 428 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 4, 429 BUS_SPACE_BARRIER_WRITE); 430 } 431 432 static inline void 433 regwb(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 434 { 435 bus_space_write_1(sc->sc_regt, sc->sc_regh, index, data); 436 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 1, 437 BUS_SPACE_BARRIER_WRITE); 438 } 439 440 static inline void 441 regwb_pll(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 442 { 443 regwb(sc, CLOCK_CNTL + 1, (index << 2) | PLL_WR_EN); 444 regwb(sc, CLOCK_CNTL + 2, data); 445 regwb(sc, CLOCK_CNTL + 1, (index << 2) & ~PLL_WR_EN); 446 } 447 448 static inline void 449 wait_for_fifo(struct mach64_softc *sc, u_int8_t v) 450 { 451 while ((regr(sc, FIFO_STAT) & 0xffff) > (0x8000 >> v)) 452 continue; 453 } 454 455 static inline void 456 wait_for_idle(struct mach64_softc *sc) 457 { 458 wait_for_fifo(sc, 16); 459 while ((regr(sc, GUI_STAT) & 1) != 0) 460 continue; 461 } 462 463 static int 464 mach64_match(struct device *parent, struct cfdata *match, void *aux) 465 { 466 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 467 int i; 468 469 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 470 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 471 return 0; 472 473 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 474 if (PCI_PRODUCT(pa->pa_id) == mach64_info[i].chip_id) { 475 mach64_chip_id = PCI_PRODUCT(pa->pa_id); 476 mach64_chip_rev = PCI_REVISION(pa->pa_class); 477 return 100; 478 } 479 480 return 0; 481 } 482 483 static void 484 mach64_attach(struct device *parent, struct device *self, void *aux) 485 { 486 struct mach64_softc *sc = (void *)self; 487 struct pci_attach_args *pa = aux; 488 struct mach64screen *console_screen; 489 void *cookie; 490 char devinfo[256]; 491 int bar, reg, id; 492 struct wsemuldisplaydev_attach_args aa; 493 long defattr; 494 int setmode, console, x, y; 495 pcireg_t screg; 496 497 sc->sc_pc = pa->pa_pc; 498 sc->sc_pcitag = pa->pa_tag; 499 sc->sc_dacw = -1; 500 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 501 502 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 503 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 504 505 /* enable memory and IO access */ 506 screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 507 screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 508 pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg); 509 510 for (bar = 0; bar < NBARS; bar++) { 511 reg = PCI_MAPREG_START + (bar * 4); 512 sc->sc_bars[bar].vb_type = pci_mapreg_type(sc->sc_pc, 513 sc->sc_pcitag, reg); 514 (void)pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, reg, 515 sc->sc_bars[bar].vb_type, &sc->sc_bars[bar].vb_base, 516 &sc->sc_bars[bar].vb_size, &sc->sc_bars[bar].vb_flags); 517 sc->sc_bars[bar].vb_busaddr = pci_conf_read(sc->sc_pc, 518 sc->sc_pcitag, reg)&0xfffffff0; 519 } 520 sc->sc_memt = pa->pa_memt; 521 522 mach64_init(sc); 523 524 printf("%s: %d MB aperture at 0x%08x, %d KB registers at 0x%08x\n", 525 sc->sc_dev.dv_xname, (u_int)(sc->sc_apersize / (1024 * 1024)), 526 (u_int)sc->sc_aperphys, (u_int)(sc->sc_regsize / 1024), 527 (u_int)sc->sc_regphys); 528 529 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_CT || 530 ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 531 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 532 (mach64_chip_rev & 0x07) == 0)) 533 sc->has_dsp = 0; 534 else 535 sc->has_dsp = 1; 536 537 sc->memsize = mach64_get_memsize(sc); 538 if (sc->memsize == 8192) 539 /* The last page is used as register aperture. */ 540 sc->memsize -= 4; 541 sc->memtype = regr(sc, CONFIG_STAT0) & 0x07; 542 543 /* XXX is there any way to calculate reference frequency from 544 known values? */ 545 if ((mach64_chip_id == PCI_PRODUCT_ATI_RAGE_XL_PCI) || 546 ((mach64_chip_id >= PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI) && 547 (mach64_chip_id <= PCI_PRODUCT_ATI_RAGE_LT_PRO))) { 548 printf("ref_freq=29.498MHz\n"); 549 sc->ref_freq = 29498; 550 } else 551 sc->ref_freq = 14318; 552 553 regwb(sc, CLOCK_CNTL + 1, PLL_REF_DIV << 2); 554 sc->ref_div = regrb(sc, CLOCK_CNTL + 2); 555 regwb(sc, CLOCK_CNTL + 1, MCLK_FB_DIV << 2); 556 sc->mclk_fb_div = regrb(sc, CLOCK_CNTL + 2); 557 sc->mem_freq = (2 * sc->ref_freq * sc->mclk_fb_div) / 558 (sc->ref_div * 2); 559 sc->mclk_post_div = (sc->mclk_fb_div * 2 * sc->ref_freq) / 560 (sc->mem_freq * sc->ref_div); 561 sc->ramdac_freq = mach64_get_max_ramdac(sc); 562 printf("%s: %ld KB %s %d.%d MHz, maximum RAMDAC clock %d MHz\n", 563 sc->sc_dev.dv_xname, (u_long)sc->memsize, 564 mach64_memtype_names[sc->memtype], 565 sc->mem_freq / 1000, sc->mem_freq % 1000, 566 sc->ramdac_freq / 1000); 567 568 id = regr(sc, CONFIG_CHIP_ID) & 0xffff; 569 if (id != mach64_chip_id) { 570 printf("%s: chip ID mismatch, 0x%x != 0x%x\n", 571 sc->sc_dev.dv_xname, id, mach64_chip_id); 572 return; 573 } 574 575 console = mach64_is_console(pa); 576 #ifdef DIAGNOSTIC 577 printf("gen_cntl: %08x\n", regr(sc, CRTC_GEN_CNTL)); 578 #endif 579 #if defined(__sparc__) || defined(__powerpc__) 580 if (console) { 581 mach64_get_mode(sc, &default_mode); 582 setmode = 0; 583 sc->sc_my_mode = &default_mode; 584 } else { 585 /* fill in default_mode if it's empty */ 586 if (default_mode.dot_clock == 0) { 587 memcpy(&default_mode, &mach64_modes[4], 588 sizeof(default_mode)); 589 } 590 sc->sc_my_mode = &default_mode; 591 setmode = 1; 592 } 593 #else 594 if (default_mode.dot_clock == 0) { 595 memcpy(&default_mode, &mach64_modes[0], 596 sizeof(default_mode)); 597 } 598 sc->sc_my_mode = &mach64_modes[0]; 599 setmode = 1; 600 #endif 601 602 sc->bits_per_pixel = 8; 603 sc->virt_x = sc->sc_my_mode->hdisplay; 604 sc->virt_y = sc->sc_my_mode->vdisplay; 605 sc->max_x = sc->virt_x - 1; 606 sc->max_y = (sc->memsize * 1024) / 607 (sc->virt_x * (sc->bits_per_pixel / 8)) - 1; 608 609 sc->color_depth = CRTC_PIX_WIDTH_8BPP; 610 611 mach64_init_engine(sc); 612 #if 0 613 mach64_adjust_frame(0, 0); 614 if (sc->bits_per_pixel == 8) 615 mach64_init_lut(sc); 616 #endif 617 618 printf("%s: initial resolution %dx%d at %d bpp\n", sc->sc_dev.dv_xname, 619 sc->sc_my_mode->hdisplay, sc->sc_my_mode->vdisplay, 620 sc->bits_per_pixel); 621 622 wsfont_init(); 623 624 if (console) { 625 sc->sc_bg = WS_DEFAULT_BG; 626 mach64_alloc_screen(sc, &mach64_defaultscreen, &cookie, &x, &y, &defattr); 627 console_screen = cookie; 628 mach64_defaultscreen.nrows = console_screen->ri.ri_rows; 629 mach64_defaultscreen.ncols = console_screen->ri.ri_cols; 630 mach64_defaultscreen.capabilities = console_screen->ri.ri_caps; 631 mach64_defaultscreen.textops = &console_screen->ri.ri_ops; 632 633 wsdisplay_cnattach(&mach64_defaultscreen, 634 &console_screen->ri, x, y, defattr); 635 } else { 636 /* 637 * since we're not the console we can postpone the rest 638 * until someone actually allocates a screen for us 639 */ 640 mach64_modeswitch(sc, sc->sc_my_mode); 641 } 642 643 mach64_init_lut(sc); 644 mach64_clearscreen(sc); 645 machfb_blank(sc, 0); /* unblank the screen */ 646 647 aa.console = console; 648 aa.scrdata = &mach64_screenlist; 649 aa.accessops = &mach64_accessops; 650 aa.accesscookie = sc; 651 652 config_found(self, &aa, wsemuldisplaydevprint); 653 } 654 655 static void 656 mach64_init_screen(struct mach64_softc *sc, struct mach64screen *scr, 657 const struct wsscreen_descr *type, int existing, long *attrp, int setmode) 658 { 659 struct rasops_info *ri=&scr->ri; 660 661 scr->sc = sc; 662 scr->type = type; 663 scr->mindispoffset = 0; 664 scr->maxdispoffset = sc->memsize * 1024; 665 scr->dispoffset = 0; 666 scr->cursorcol = 0; 667 scr->cursorrow = 0; 668 669 ri->ri_depth = sc->bits_per_pixel; 670 ri->ri_width = sc->sc_my_mode->hdisplay; 671 ri->ri_height = sc->sc_my_mode->vdisplay; 672 ri->ri_stride = ri->ri_width; 673 ri->ri_flg = RI_CENTER; 674 675 if (existing) { 676 scr->active = 1; 677 ri->ri_flg |= RI_CLEAR; 678 if (setmode && mach64_set_screentype(sc, type)) { 679 panic("%s: failed to switch video mode", 680 sc->sc_dev.dv_xname); 681 } 682 } else { 683 scr->active = 0; 684 } 685 686 LIST_INSERT_HEAD(&sc->screens, scr, next); 687 } 688 689 static void 690 mach64_init(struct mach64_softc *sc) 691 { 692 u_int32_t *p32, saved_value; 693 u_int8_t *p; 694 int need_swap; 695 696 if (bus_space_map(sc->sc_memt, sc->sc_aperbase, sc->sc_apersize, 697 BUS_SPACE_MAP_LINEAR, &sc->sc_memh)) { 698 panic("%s: failed to map aperture", sc->sc_dev.dv_xname); 699 } 700 sc->sc_aperbase = (vaddr_t)bus_space_vaddr(sc->sc_memt, sc->sc_memh); 701 702 sc->sc_regt = sc->sc_memt; 703 bus_space_subregion(sc->sc_regt, sc->sc_memh, MACH64_REG_OFF, 704 sc->sc_regsize, &sc->sc_regh); 705 sc->sc_regbase = sc->sc_aperbase + 0x7ffc00; 706 707 /* 708 * Test wether the aperture is byte swapped or not 709 */ 710 p32 = (u_int32_t*)(u_long)sc->sc_aperbase; 711 saved_value = *p32; 712 p = (u_int8_t*)(u_long)sc->sc_aperbase; 713 *p32 = 0x12345678; 714 if (p[0] == 0x12 && p[1] == 0x34 && p[2] == 0x56 && p[3] == 0x78) 715 need_swap = 0; 716 else 717 need_swap = 1; 718 if (need_swap) { 719 sc->sc_aperbase += 0x800000; 720 sc->sc_apersize -= 0x800000; 721 } 722 *p32 = saved_value; 723 724 LIST_INIT(&sc->screens); 725 sc->active = NULL; 726 sc->currenttype = &mach64_defaultscreen; 727 callout_init(&sc->switch_callout); 728 } 729 730 static int 731 mach64_get_memsize(struct mach64_softc *sc) 732 { 733 int tmp, memsize; 734 int mem_tab[] = { 735 512, 1024, 2048, 4096, 6144, 8192, 12288, 16384 736 }; 737 tmp = regr(sc, MEM_CNTL); 738 printf("memctl: %08x\n",tmp); 739 if (sc->has_dsp) { 740 tmp &= 0x0000000f; 741 if (tmp < 8) 742 memsize = (tmp + 1) * 512; 743 else if (tmp < 12) 744 memsize = (tmp - 3) * 1024; 745 else 746 memsize = (tmp - 7) * 2048; 747 } else { 748 memsize = mem_tab[tmp & 0x07]; 749 } 750 751 return memsize; 752 } 753 754 static int 755 mach64_get_max_ramdac(struct mach64_softc *sc) 756 { 757 int i; 758 759 if ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 760 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 761 (mach64_chip_rev & 0x07)) 762 return 170000; 763 764 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 765 if (mach64_chip_id == mach64_info[i].chip_id) 766 return mach64_info[i].ramdac_freq; 767 768 if (sc->bits_per_pixel == 8) 769 return 135000; 770 else 771 return 80000; 772 } 773 774 static void 775 mach64_get_mode(struct mach64_softc *sc, struct videomode *mode) 776 { 777 struct mach64_crtcregs crtc; 778 779 crtc.h_total_disp = regr(sc, CRTC_H_TOTAL_DISP); 780 crtc.h_sync_strt_wid = regr(sc, CRTC_H_SYNC_STRT_WID); 781 crtc.v_total_disp = regr(sc, CRTC_V_TOTAL_DISP); 782 crtc.v_sync_strt_wid = regr(sc, CRTC_V_SYNC_STRT_WID); 783 784 mode->htotal = ((crtc.h_total_disp & 0xffff) + 1) << 3; 785 mode->hdisplay = ((crtc.h_total_disp >> 16) + 1) << 3; 786 mode->hsync_start = ((crtc.h_sync_strt_wid & 0xffff) + 1) << 3; 787 mode->hsync_end = ((crtc.h_sync_strt_wid >> 16) << 3) + 788 mode->hsync_start; 789 mode->vtotal = (crtc.v_total_disp & 0xffff) + 1; 790 mode->vdisplay = (crtc.v_total_disp >> 16) + 1; 791 mode->vsync_start = (crtc.v_sync_strt_wid & 0xffff) + 1; 792 mode->vsync_end = (crtc.v_sync_strt_wid >> 16) + mode->vsync_start; 793 794 #ifdef DEBUG_MACHFB 795 printf("mach64_get_mode: %d %d %d %d %d %d %d %d\n", 796 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, 797 mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal); 798 #endif 799 } 800 801 static int 802 mach64_calc_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc, 803 struct videomode *mode) 804 { 805 806 if (mode->dot_clock > sc->ramdac_freq) 807 /* Clock too high. */ 808 return 1; 809 810 crtc->h_total_disp = (((mode->hdisplay >> 3) - 1) << 16) | 811 ((mode->htotal >> 3) - 1); 812 crtc->h_sync_strt_wid = 813 (((mode->hsync_end - mode->hsync_start) >> 3) << 16) | 814 ((mode->hsync_start >> 3) - 1); 815 816 crtc->v_total_disp = ((mode->vdisplay - 1) << 16) | 817 (mode->vtotal - 1); 818 crtc->v_sync_strt_wid = 819 ((mode->vsync_end - mode->vsync_start) << 16) | 820 (mode->vsync_start - 1); 821 822 if (mode->flags & VID_NVSYNC) 823 crtc->v_sync_strt_wid |= CRTC_VSYNC_NEG; 824 825 switch (sc->bits_per_pixel) { 826 case 8: 827 crtc->color_depth = CRTC_PIX_WIDTH_8BPP; 828 break; 829 case 16: 830 crtc->color_depth = CRTC_PIX_WIDTH_16BPP; 831 break; 832 case 32: 833 crtc->color_depth = CRTC_PIX_WIDTH_32BPP; 834 break; 835 } 836 837 crtc->gen_cntl = 0; 838 if (mode->flags & VID_INTERLACE) 839 crtc->gen_cntl |= CRTC_INTERLACE_EN; 840 if (mode->flags & VID_CSYNC) 841 crtc->gen_cntl |= CRTC_CSYNC_EN; 842 843 crtc->dot_clock = mode->dot_clock; 844 845 return 0; 846 } 847 848 static void 849 mach64_set_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc) 850 { 851 852 mach64_set_pll(sc, crtc->dot_clock); 853 854 if (sc->has_dsp) 855 mach64_set_dsp(sc); 856 857 regw(sc, CRTC_H_TOTAL_DISP, crtc->h_total_disp); 858 regw(sc, CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid); 859 regw(sc, CRTC_V_TOTAL_DISP, crtc->v_total_disp); 860 regw(sc, CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid); 861 862 regw(sc, CRTC_VLINE_CRNT_VLINE, 0); 863 864 regw(sc, CRTC_OFF_PITCH, (sc->virt_x >> 3) << 22); 865 866 regw(sc, CRTC_GEN_CNTL, crtc->gen_cntl | crtc->color_depth | 867 CRTC_EXT_DISP_EN | CRTC_EXT_EN); 868 } 869 870 static int 871 mach64_modeswitch(struct mach64_softc *sc, struct videomode *mode) 872 { 873 struct mach64_crtcregs crtc; 874 875 if (mach64_calc_crtcregs(sc, &crtc, mode)) 876 return 1; 877 878 mach64_set_crtcregs(sc, &crtc); 879 return 0; 880 } 881 882 static void 883 mach64_reset_engine(struct mach64_softc *sc) 884 { 885 886 /* Reset engine.*/ 887 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) & ~GUI_ENGINE_ENABLE); 888 889 /* Enable engine. */ 890 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) | GUI_ENGINE_ENABLE); 891 892 /* Ensure engine is not locked up by clearing any FIFO or 893 host errors. */ 894 regw(sc, BUS_CNTL, regr(sc, BUS_CNTL) | BUS_HOST_ERR_ACK | 895 BUS_FIFO_ERR_ACK); 896 } 897 898 static void 899 mach64_init_engine(struct mach64_softc *sc) 900 { 901 u_int32_t pitch_value; 902 903 pitch_value = sc->virt_x; 904 905 if (sc->bits_per_pixel == 24) 906 pitch_value *= 3; 907 908 mach64_reset_engine(sc); 909 910 wait_for_fifo(sc, 14); 911 912 regw(sc, CONTEXT_MASK, 0xffffffff); 913 914 regw(sc, DST_OFF_PITCH, (pitch_value / 8) << 22); 915 916 regw(sc, DST_Y_X, 0); 917 regw(sc, DST_HEIGHT, 0); 918 regw(sc, DST_BRES_ERR, 0); 919 regw(sc, DST_BRES_INC, 0); 920 regw(sc, DST_BRES_DEC, 0); 921 922 regw(sc, DST_CNTL, DST_LAST_PEL | DST_X_LEFT_TO_RIGHT | 923 DST_Y_TOP_TO_BOTTOM); 924 925 regw(sc, SRC_OFF_PITCH, (pitch_value / 8) << 22); 926 927 regw(sc, SRC_Y_X, 0); 928 regw(sc, SRC_HEIGHT1_WIDTH1, 1); 929 regw(sc, SRC_Y_X_START, 0); 930 regw(sc, SRC_HEIGHT2_WIDTH2, 1); 931 932 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 933 934 wait_for_fifo(sc, 13); 935 regw(sc, HOST_CNTL, 0); 936 937 regw(sc, PAT_REG0, 0); 938 regw(sc, PAT_REG1, 0); 939 regw(sc, PAT_CNTL, 0); 940 941 regw(sc, SC_LEFT, 0); 942 regw(sc, SC_TOP, 0); 943 regw(sc, SC_BOTTOM, sc->sc_my_mode->vdisplay - 1); 944 regw(sc, SC_RIGHT, pitch_value - 1); 945 946 regw(sc, DP_BKGD_CLR, 0); 947 regw(sc, DP_FRGD_CLR, 0xffffffff); 948 regw(sc, DP_WRITE_MASK, 0xffffffff); 949 regw(sc, DP_MIX, (MIX_SRC << 16) | MIX_DST); 950 951 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 952 953 wait_for_fifo(sc, 3); 954 regw(sc, CLR_CMP_CLR, 0); 955 regw(sc, CLR_CMP_MASK, 0xffffffff); 956 regw(sc, CLR_CMP_CNTL, 0); 957 958 wait_for_fifo(sc, 2); 959 switch (sc->bits_per_pixel) { 960 case 8: 961 regw(sc, DP_PIX_WIDTH, HOST_8BPP | SRC_8BPP | DST_8BPP); 962 regw(sc, DP_CHAIN_MASK, DP_CHAIN_8BPP); 963 /* We want 8 bit per channel */ 964 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 965 break; 966 #if 0 967 case 32: 968 regw(sc, DP_PIX_WIDTH, HOST_32BPP | SRC_32BPP | DST_32BPP); 969 regw(sc, DP_CHAIN_MASK, DP_CHAIN_32BPP); 970 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 971 break; 972 #endif 973 } 974 975 wait_for_fifo(sc, 5); 976 regw(sc, CRTC_INT_CNTL, regr(sc, CRTC_INT_CNTL) & ~0x20); 977 regw(sc, GUI_TRAJ_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 978 979 wait_for_idle(sc); 980 } 981 982 #if 0 983 static void 984 mach64_adjust_frame(struct mach64_softc *sc, int x, int y) 985 { 986 int offset; 987 988 offset = ((x + y * sc->virt_x) * (sc->bits_per_pixel >> 3)) >> 3; 989 990 regw(sc, CRTC_OFF_PITCH, (regr(sc, CRTC_OFF_PITCH) & 0xfff00000) | 991 offset); 992 } 993 #endif 994 995 static void 996 mach64_set_dsp(struct mach64_softc *sc) 997 { 998 u_int32_t fifo_depth, page_size, dsp_precision, dsp_loop_latency; 999 u_int32_t dsp_off, dsp_on, dsp_xclks_per_qw; 1000 u_int32_t xclks_per_qw, y; 1001 u_int32_t fifo_off, fifo_on; 1002 1003 printf("initializing the DSP\n"); 1004 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 1005 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II || 1006 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIP || 1007 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_PCI || 1008 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_B || 1009 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_P) { 1010 dsp_loop_latency = 0; 1011 fifo_depth = 24; 1012 } else { 1013 dsp_loop_latency = 2; 1014 fifo_depth = 32; 1015 } 1016 1017 dsp_precision = 0; 1018 xclks_per_qw = (sc->mclk_fb_div * sc->vclk_post_div * 64 << 11) / 1019 (sc->vclk_fb_div * sc->mclk_post_div * sc->bits_per_pixel); 1020 y = (xclks_per_qw * fifo_depth) >> 11; 1021 while (y) { 1022 y >>= 1; 1023 dsp_precision++; 1024 } 1025 dsp_precision -= 5; 1026 fifo_off = ((xclks_per_qw * (fifo_depth - 1)) >> 5) + (3 << 6); 1027 1028 switch (sc->memtype) { 1029 case DRAM: 1030 case EDO_DRAM: 1031 case PSEUDO_EDO: 1032 if (sc->memsize > 1024) { 1033 page_size = 9; 1034 dsp_loop_latency += 6; 1035 } else { 1036 page_size = 10; 1037 if (sc->memtype == DRAM) 1038 dsp_loop_latency += 8; 1039 else 1040 dsp_loop_latency += 7; 1041 } 1042 break; 1043 case SDRAM: 1044 case SGRAM: 1045 if (sc->memsize > 1024) { 1046 page_size = 8; 1047 dsp_loop_latency += 8; 1048 } else { 1049 page_size = 10; 1050 dsp_loop_latency += 9; 1051 } 1052 break; 1053 default: 1054 page_size = 10; 1055 dsp_loop_latency += 9; 1056 break; 1057 } 1058 1059 if (xclks_per_qw >= (page_size << 11)) 1060 fifo_on = ((2 * page_size + 1) << 6) + (xclks_per_qw >> 5); 1061 else 1062 fifo_on = (3 * page_size + 2) << 6; 1063 1064 dsp_xclks_per_qw = xclks_per_qw >> dsp_precision; 1065 dsp_on = fifo_on >> dsp_precision; 1066 dsp_off = fifo_off >> dsp_precision; 1067 1068 #ifdef DEBUG_MACHFB 1069 printf("dsp_xclks_per_qw = %d, dsp_on = %d, dsp_off = %d,\n" 1070 "dsp_precision = %d, dsp_loop_latency = %d,\n" 1071 "mclk_fb_div = %d, vclk_fb_div = %d,\n" 1072 "mclk_post_div = %d, vclk_post_div = %d\n", 1073 dsp_xclks_per_qw, dsp_on, dsp_off, dsp_precision, dsp_loop_latency, 1074 sc->mclk_fb_div, sc->vclk_fb_div, 1075 sc->mclk_post_div, sc->vclk_post_div); 1076 #endif 1077 1078 regw(sc, DSP_ON_OFF, ((dsp_on << 16) & DSP_ON) | (dsp_off & DSP_OFF)); 1079 regw(sc, DSP_CONFIG, ((dsp_precision << 20) & DSP_PRECISION) | 1080 ((dsp_loop_latency << 16) & DSP_LOOP_LATENCY) | 1081 (dsp_xclks_per_qw & DSP_XCLKS_PER_QW)); 1082 } 1083 1084 static void 1085 mach64_set_pll(struct mach64_softc *sc, int clock) 1086 { 1087 int q; 1088 1089 q = (clock * sc->ref_div * 100) / (2 * sc->ref_freq); 1090 #ifdef DEBUG_MACHFB 1091 printf("q = %d\n", q); 1092 #endif 1093 if (q > 25500) { 1094 printf("Warning: q > 25500\n"); 1095 q = 25500; 1096 sc->vclk_post_div = 1; 1097 sc->log2_vclk_post_div = 0; 1098 } else if (q > 12750) { 1099 sc->vclk_post_div = 1; 1100 sc->log2_vclk_post_div = 0; 1101 } else if (q > 6350) { 1102 sc->vclk_post_div = 2; 1103 sc->log2_vclk_post_div = 1; 1104 } else if (q > 3150) { 1105 sc->vclk_post_div = 4; 1106 sc->log2_vclk_post_div = 2; 1107 } else if (q >= 1600) { 1108 sc->vclk_post_div = 8; 1109 sc->log2_vclk_post_div = 3; 1110 } else { 1111 printf("Warning: q < 1600\n"); 1112 sc->vclk_post_div = 8; 1113 sc->log2_vclk_post_div = 3; 1114 } 1115 sc->vclk_fb_div = q * sc->vclk_post_div / 100; 1116 1117 regwb_pll(sc, MCLK_FB_DIV, sc->mclk_fb_div); 1118 regwb_pll(sc, VCLK_POST_DIV, sc->log2_vclk_post_div); 1119 regwb_pll(sc, VCLK0_FB_DIV, sc->vclk_fb_div); 1120 } 1121 1122 static void 1123 mach64_init_lut(struct mach64_softc *sc) 1124 { 1125 int i, idx; 1126 1127 idx = 0; 1128 for (i = 0; i < 256; i++) { 1129 mach64_putpalreg(sc, i, rasops_cmap[idx], rasops_cmap[idx + 1], 1130 rasops_cmap[idx + 2]); 1131 idx += 3; 1132 } 1133 } 1134 1135 static int 1136 mach64_putpalreg(struct mach64_softc *sc, uint8_t index, uint8_t r, uint8_t g, 1137 uint8_t b) 1138 { 1139 sc->sc_cmap_red[index] = r; 1140 sc->sc_cmap_green[index] = g; 1141 sc->sc_cmap_blue[index] = b; 1142 /* 1143 * writing the dac index takes a while, in theory we can poll some 1144 * register to see when it's ready - but we better avoid writing it 1145 * unnecessarily 1146 */ 1147 if (index != sc->sc_dacw) { 1148 regwb(sc, DAC_MASK, 0xff); 1149 regwb(sc, DAC_WINDEX, index); 1150 } 1151 sc->sc_dacw = index + 1; 1152 regwb(sc, DAC_DATA, r); 1153 regwb(sc, DAC_DATA, g); 1154 regwb(sc, DAC_DATA, b); 1155 return 0; 1156 } 1157 1158 static int 1159 mach64_putcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1160 { 1161 u_int index = cm->index; 1162 u_int count = cm->count; 1163 int i, error; 1164 u_char rbuf[256], gbuf[256], bbuf[256]; 1165 u_char *r, *g, *b; 1166 1167 if (cm->index >= 256 || cm->count > 256 || 1168 (cm->index + cm->count) > 256) 1169 return EINVAL; 1170 error = copyin(cm->red, &rbuf[index], count); 1171 if (error) 1172 return error; 1173 error = copyin(cm->green, &gbuf[index], count); 1174 if (error) 1175 return error; 1176 error = copyin(cm->blue, &bbuf[index], count); 1177 if (error) 1178 return error; 1179 1180 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 1181 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 1182 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 1183 1184 r = &sc->sc_cmap_red[index]; 1185 g = &sc->sc_cmap_green[index]; 1186 b = &sc->sc_cmap_blue[index]; 1187 1188 for (i = 0; i < count; i++) { 1189 mach64_putpalreg(sc, index, *r, *g, *b); 1190 index++; 1191 r++, g++, b++; 1192 } 1193 return 0; 1194 } 1195 1196 static int 1197 mach64_getcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1198 { 1199 u_int index = cm->index; 1200 u_int count = cm->count; 1201 int error; 1202 1203 if (index >= 255 || count > 256 || index + count > 256) 1204 return EINVAL; 1205 1206 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 1207 if (error) 1208 return error; 1209 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 1210 if (error) 1211 return error; 1212 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 1213 if (error) 1214 return error; 1215 1216 return 0; 1217 } 1218 1219 static int 1220 mach64_set_screentype(struct mach64_softc *sc, const struct wsscreen_descr *des) 1221 { 1222 struct mach64_crtcregs regs; 1223 1224 if (mach64_calc_crtcregs(sc, ®s, 1225 (struct videomode *)des->modecookie)) 1226 return 1; 1227 1228 mach64_set_crtcregs(sc, ®s); 1229 return 0; 1230 } 1231 1232 static int 1233 mach64_is_console(struct pci_attach_args *pa) 1234 { 1235 #ifdef __sparc__ 1236 int node; 1237 1238 node = PCITAG_NODE(pa->pa_tag); 1239 if (node == -1) 1240 return 0; 1241 1242 return (node == prom_instance_to_package(prom_stdout())); 1243 #elif defined(__powerpc__) 1244 /* check if we're the /chosen console device */ 1245 int chosen, stdout, node, us; 1246 1247 us = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 1248 chosen = OF_finddevice("/chosen"); 1249 OF_getprop(chosen, "stdout", &stdout, 4); 1250 node = OF_instance_to_package(stdout); 1251 return (us == node); 1252 #else 1253 return 1; 1254 #endif 1255 } 1256 1257 /* 1258 * wsdisplay_emulops 1259 */ 1260 1261 static void 1262 mach64_cursor(void *cookie, int on, int row, int col) 1263 { 1264 struct rasops_info *ri = cookie; 1265 struct mach64screen *scr = ri->ri_hw; 1266 struct mach64_softc *sc = scr->sc; 1267 int x, y, wi,he; 1268 1269 wi = ri->ri_font->fontwidth; 1270 he = ri->ri_font->fontheight; 1271 1272 if (scr->active) { 1273 x = scr->cursorcol * wi + ri->ri_xorigin; 1274 y = scr->cursorrow * he + ri->ri_yorigin; 1275 if (scr->cursordrawn) { 1276 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1277 0xff); 1278 scr->cursordrawn=0; 1279 } 1280 scr->cursorrow = row; 1281 scr->cursorcol = col; 1282 if ((scr->cursoron = on) != 0) 1283 { 1284 x = scr->cursorcol * wi + ri->ri_xorigin; 1285 y = scr->cursorrow * he + ri->ri_yorigin; 1286 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1287 0xff); 1288 scr->cursordrawn = 1; 1289 } 1290 } else { 1291 scr->cursoron = on; 1292 scr->cursorrow = row; 1293 scr->cursorcol = col; 1294 scr->cursordrawn = 0; 1295 } 1296 } 1297 1298 #if 0 1299 static int 1300 mach64_mapchar(void *cookie, int uni, u_int *index) 1301 { 1302 return 0; 1303 } 1304 #endif 1305 1306 static void 1307 mach64_putchar(void *cookie, int row, int col, u_int c, long attr) 1308 { 1309 struct rasops_info *ri = cookie; 1310 struct mach64screen *scr = ri->ri_hw; 1311 struct mach64_softc *sc = scr->sc; 1312 int offset = ri->ri_cols * row + col; 1313 1314 scr->attrs[offset] = attr; 1315 scr->chars[offset] = c; 1316 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1317 int fg, bg, uc; 1318 uint8_t *data; 1319 int x, y, wi, he; 1320 wi = ri->ri_font->fontwidth; 1321 he = ri->ri_font->fontheight; 1322 1323 #ifdef notdef 1324 scr->putchar(cookie,row,col,c,attr); 1325 #endif 1326 if (!CHAR_IN_FONT(c, ri->ri_font)) 1327 return; 1328 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf]; 1329 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf]; 1330 x = ri->ri_xorigin + col * wi; 1331 y = ri->ri_yorigin + row * he; 1332 if (c == 0x20) { 1333 mach64_rectfill(sc, x, y, wi, he, bg); 1334 } else { 1335 uc = c-ri->ri_font->firstchar; 1336 data = (uint8_t *)ri->ri_font->data + uc * 1337 ri->ri_fontscale; 1338 1339 mach64_setup_mono(sc, x, y, wi, he, fg, bg); 1340 mach64_feed_bytes(sc, ri->ri_fontscale, data); 1341 } 1342 } 1343 } 1344 1345 1346 static void 1347 mach64_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1348 { 1349 struct rasops_info *ri=cookie; 1350 struct mach64screen *scr=ri->ri_hw; 1351 struct mach64_softc *sc=scr->sc; 1352 int32_t xs,xd,y,width,height; 1353 int from, to; 1354 1355 from = srccol + row * ri->ri_cols; 1356 to = dstcol + row * ri->ri_cols; 1357 1358 memmove(&scr->attrs[to], &scr->attrs[from], ncols * sizeof(long)); 1359 memmove(&scr->chars[to], &scr->chars[from], ncols * sizeof(u_int)); 1360 1361 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1362 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1363 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1364 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1365 width = ri->ri_font->fontwidth * ncols; 1366 height = ri->ri_font->fontheight; 1367 mach64_bitblt(sc, xs, y, xd, y, width, height, MIX_SRC, 0xff); 1368 } 1369 } 1370 1371 static void 1372 mach64_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1373 { 1374 struct rasops_info *ri=cookie; 1375 struct mach64screen *scr=ri->ri_hw; 1376 struct mach64_softc *sc=scr->sc; 1377 int32_t x, y, width, height, fg, bg, ul; 1378 int start, end, i; 1379 1380 start = startcol + row * ri->ri_cols; 1381 end = start + ncols; 1382 1383 for (i = start; i < end; i++) { 1384 scr->attrs[i] = fillattr; 1385 scr->chars[i] = 0x20; 1386 } 1387 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1388 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1389 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1390 width = ri->ri_font->fontwidth * ncols; 1391 height = ri->ri_font->fontheight; 1392 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1393 1394 mach64_rectfill(sc, x, y, width, height, bg); 1395 } 1396 } 1397 1398 static void 1399 mach64_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1400 { 1401 struct rasops_info *ri=cookie; 1402 struct mach64screen *scr=ri->ri_hw; 1403 struct mach64_softc *sc=scr->sc; 1404 int32_t x, ys, yd, width, height; 1405 int from, to, len; 1406 1407 from = ri->ri_cols * srcrow; 1408 to = ri->ri_cols * dstrow; 1409 len = ri->ri_cols * nrows; 1410 1411 memmove(&scr->attrs[to], &scr->attrs[from], len*sizeof(long)); 1412 memmove(&scr->chars[to], &scr->chars[from], len*sizeof(u_int)); 1413 1414 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1415 x = ri->ri_xorigin; 1416 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1417 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1418 width = ri->ri_emuwidth; 1419 height = ri->ri_font->fontheight*nrows; 1420 mach64_bitblt(sc, x, ys, x, yd, width, height, MIX_SRC, 0xff); 1421 } 1422 } 1423 1424 static void 1425 mach64_eraserows(void *cookie, int row, int nrows, long fillattr) 1426 { 1427 struct rasops_info *ri=cookie; 1428 struct mach64screen *scr=ri->ri_hw; 1429 struct mach64_softc *sc=scr->sc; 1430 int32_t x, y, width, height, fg, bg, ul; 1431 int start, end, i; 1432 1433 start = ri->ri_cols * row; 1434 end = ri->ri_cols * (row + nrows); 1435 1436 for (i=start;i<end;i++) { 1437 scr->attrs[i] = fillattr; 1438 scr->chars[i] = 0x20; 1439 } 1440 1441 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1442 x = ri->ri_xorigin; 1443 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1444 width = ri->ri_emuwidth; 1445 height = ri->ri_font->fontheight * nrows; 1446 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1447 1448 mach64_rectfill(sc, x, y, width, height, bg); 1449 } 1450 } 1451 1452 static void 1453 mach64_bitblt(struct mach64_softc *sc, int xs, int ys, int xd, int yd, int width, int height, int rop, int mask) 1454 { 1455 uint32_t dest_ctl = 0; 1456 1457 wait_for_idle(sc); 1458 regw(sc, DP_WRITE_MASK, mask); /* XXX only good for 8 bit */ 1459 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1460 regw(sc, DP_SRC, FRGD_SRC_BLIT); 1461 regw(sc, DP_MIX, (rop & 0xffff) << 16); 1462 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1463 if (yd < ys) { 1464 dest_ctl = DST_Y_TOP_TO_BOTTOM; 1465 } else { 1466 ys += height - 1; 1467 yd += height - 1; 1468 dest_ctl = DST_Y_BOTTOM_TO_TOP; 1469 } 1470 if (xd < xs) { 1471 dest_ctl |= DST_X_LEFT_TO_RIGHT; 1472 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1473 } else { 1474 dest_ctl |= DST_X_RIGHT_TO_LEFT; 1475 xs += width - 1; 1476 xd += width - 1; 1477 regw(sc, SRC_CNTL, SRC_LINE_X_RIGHT_TO_LEFT); 1478 } 1479 regw(sc, DST_CNTL, dest_ctl); 1480 1481 regw(sc, SRC_Y_X, (xs << 16) | ys); 1482 regw(sc, SRC_WIDTH1, width); 1483 regw(sc, DST_Y_X, (xd << 16) | yd); 1484 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1485 } 1486 1487 static void 1488 mach64_setup_mono(struct mach64_softc *sc, int xd, int yd, int width, 1489 int height, uint32_t fg, uint32_t bg) 1490 { 1491 wait_for_idle(sc); 1492 regw(sc, DP_WRITE_MASK, 0xff); /* XXX only good for 8 bit */ 1493 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_1BPP | HOST_1BPP); 1494 regw(sc, DP_SRC, MONO_SRC_HOST | BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR); 1495 regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC); 1496 regw(sc, CLR_CMP_CNTL ,0); /* no transparency */ 1497 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1498 regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT); 1499 regw(sc, HOST_CNTL, HOST_BYTE_ALIGN); 1500 regw(sc, DP_BKGD_CLR, bg); 1501 regw(sc, DP_FRGD_CLR, fg); 1502 regw(sc, SRC_Y_X, 0); 1503 regw(sc, SRC_WIDTH1, width); 1504 regw(sc, DST_Y_X, (xd << 16) | yd); 1505 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1506 /* now feed the data into the chip */ 1507 } 1508 1509 static void 1510 mach64_feed_bytes(struct mach64_softc *sc, int count, uint8_t *data) 1511 { 1512 int i; 1513 uint32_t latch = 0, bork; 1514 int shift = 0; 1515 int reg = 0; 1516 1517 for (i=0;i<count;i++) { 1518 bork = data[i]; 1519 latch |= (bork << shift); 1520 if (shift == 24) { 1521 regw(sc, HOST_DATA0 + reg, latch); 1522 latch = 0; 1523 shift = 0; 1524 reg = (reg + 4) & 0x3c; 1525 } else 1526 shift += 8; 1527 } 1528 if (shift != 0) /* 24 */ 1529 regw(sc, HOST_DATA0 + reg, latch); 1530 } 1531 1532 1533 static void 1534 mach64_rectfill(struct mach64_softc *sc, int x, int y, int width, int height, 1535 int colour) 1536 { 1537 wait_for_idle(sc); 1538 regw(sc, DP_WRITE_MASK, 0xff); 1539 regw(sc, DP_FRGD_CLR, colour); 1540 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1541 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 1542 regw(sc, DP_MIX, MIX_SRC << 16); 1543 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1544 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1545 regw(sc, DST_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 1546 1547 regw(sc, SRC_Y_X, (x << 16) | y); 1548 regw(sc, SRC_WIDTH1, width); 1549 regw(sc, DST_Y_X, (x << 16) | y); 1550 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1551 } 1552 1553 static void 1554 mach64_clearscreen(struct mach64_softc *sc) 1555 { 1556 mach64_rectfill(sc, 0, 0, sc->virt_x, sc->virt_y, sc->sc_bg); 1557 } 1558 1559 1560 #if 0 1561 static void 1562 mach64_showpal(struct mach64_softc *sc) 1563 { 1564 int i, x = 0; 1565 1566 for (i = 0; i < 16; i++) { 1567 mach64_rectfill(sc, x, 0, 64, 64, i); 1568 x += 64; 1569 } 1570 } 1571 #endif 1572 1573 static int 1574 mach64_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1575 { 1576 if ((fg == 0) && (bg == 0)) 1577 { 1578 fg = WS_DEFAULT_FG; 1579 bg = WS_DEFAULT_BG; 1580 } 1581 *attrp = (fg & 0xf) << 24 | (bg & 0xf) << 16 | (flags & 0xff) << 8; 1582 return 0; 1583 } 1584 1585 /* 1586 * wsdisplay_accessops 1587 */ 1588 1589 static int 1590 mach64_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 1591 { 1592 struct mach64_softc *sc = v; 1593 struct wsdisplay_fbinfo *wdf; 1594 struct mach64screen *ms=sc->active; 1595 1596 switch (cmd) { 1597 case WSDISPLAYIO_GTYPE: 1598 /* XXX is this the right type to return? */ 1599 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 1600 return 0; 1601 1602 case WSDISPLAYIO_GINFO: 1603 wdf = (void *)data; 1604 wdf->height = ms->ri.ri_height; 1605 wdf->width = ms->ri.ri_width; 1606 wdf->depth = ms->ri.ri_depth; 1607 wdf->cmsize = 256; 1608 return 0; 1609 1610 case WSDISPLAYIO_GETCMAP: 1611 return mach64_getcmap(sc, 1612 (struct wsdisplay_cmap *)data); 1613 1614 case WSDISPLAYIO_PUTCMAP: 1615 return mach64_putcmap(sc, 1616 (struct wsdisplay_cmap *)data); 1617 1618 /* PCI config read/write passthrough. */ 1619 case PCI_IOC_CFGREAD: 1620 case PCI_IOC_CFGWRITE: 1621 return (pci_devioctl(sc->sc_pc, sc->sc_pcitag, 1622 cmd, data, flag, p)); 1623 1624 case WSDISPLAYIO_SMODE: 1625 { 1626 int new_mode = *(int*)data; 1627 1628 if (new_mode != sc->sc_mode) 1629 { 1630 sc->sc_mode = new_mode; 1631 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1632 { 1633 /* 1634 * reset a few things the 1635 * Xserver might have screwed up 1636 */ 1637 mach64_restore_screen(ms, 1638 ms->type, ms->chars); 1639 mach64_cursor(ms, ms->cursoron, 1640 ms->cursorrow, 1641 ms->cursorcol); 1642 } 1643 } 1644 } 1645 return 0; 1646 1647 case WSDISPLAYIO_GETWSCHAR: 1648 return mach64_getwschar(sc, 1649 (struct wsdisplay_char *)data); 1650 1651 case WSDISPLAYIO_PUTWSCHAR: 1652 return mach64_putwschar(sc, 1653 (struct wsdisplay_char *)data); 1654 } 1655 return EPASSTHROUGH; 1656 } 1657 1658 static paddr_t 1659 mach64_mmap(void *v, off_t offset, int prot) 1660 { 1661 struct mach64_softc *sc = v; 1662 paddr_t pa; 1663 pcireg_t reg; 1664 1665 #ifndef __sparc64__ 1666 /* 1667 *'regular' framebuffer mmap()ing 1668 * disabled on sparc64 because some ATI firmware likes to map some PCI 1669 * resources to addresses that would collide with this ( like some Rage 1670 * IIc which uses 0x2000 for the 2nd register block ) 1671 * Other 64bit architectures might run into similar problems. 1672 */ 1673 if (offset<sc->sc_apersize) { 1674 pa = bus_space_mmap(sc->sc_memt, sc->sc_aperbase+offset, 0, 1675 prot, BUS_SPACE_MAP_LINEAR); 1676 return pa; 1677 } 1678 #endif 1679 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x18) & 0xffffff00); 1680 if (reg != sc->sc_regphys) { 1681 printf("%s: BAR 0x18 changed! (%x %x)\n", 1682 sc->sc_dev.dv_xname, (uint32_t)sc->sc_regphys, 1683 (uint32_t)reg); 1684 sc->sc_regphys = reg; 1685 } 1686 1687 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x10) & 0xffffff00); 1688 if (reg != sc->sc_aperphys) { 1689 printf("%s: BAR 0x10 changed! (%x %x)\n", 1690 sc->sc_dev.dv_xname, (uint32_t)sc->sc_aperphys, 1691 (uint32_t)reg); 1692 sc->sc_aperphys = reg; 1693 } 1694 1695 #if 0 1696 /* evil hack to allow mmap()ing other devices as well */ 1697 if ((offset > 0x80000000) && (offset <= 0xffffffff)) { 1698 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1699 BUS_SPACE_MAP_LINEAR); 1700 return pa; 1701 } 1702 #endif 1703 1704 if ((offset >= sc->sc_aperphys) && 1705 (offset < (sc->sc_aperphys + sc->sc_apersize))) { 1706 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1707 BUS_SPACE_MAP_LINEAR); 1708 return pa; 1709 } 1710 1711 if ((offset >= sc->sc_regphys) && 1712 (offset < (sc->sc_regphys + sc->sc_regsize))) { 1713 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1714 BUS_SPACE_MAP_LINEAR); 1715 return pa; 1716 } 1717 1718 return -1; 1719 } 1720 1721 static int 1722 mach64_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 1723 int *curxp, int *curyp, long *defattrp) 1724 { 1725 struct mach64_softc *sc = v; 1726 struct mach64screen *scr; 1727 struct rasops_info *ri; 1728 int cnt; 1729 1730 scr = malloc(sizeof(struct mach64screen), M_DEVBUF, M_WAITOK | M_ZERO); 1731 mach64_init_screen(sc, scr, type, 0, defattrp, sc->active == NULL); 1732 ri = &scr->ri; 1733 1734 ri->ri_hw = scr; 1735 #ifdef notdef 1736 ri->ri_bits = (void *)sc->sc_aperbase; 1737 #endif 1738 rasops_init(ri, sc->sc_my_mode->vdisplay / 8, 1739 sc->sc_my_mode->hdisplay / 8); 1740 1741 rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight, 1742 ri->ri_width / ri->ri_font->fontwidth); 1743 cnt = ri->ri_cols * ri->ri_rows; 1744 1745 set_address(ri, sc->sc_aperbase); 1746 mach64_allocattr(ri, WS_DEFAULT_FG, WS_DEFAULT_BG, 0, defattrp); 1747 1748 scr->ri.ri_ops.copyrows = mach64_copyrows; 1749 scr->ri.ri_ops.eraserows = mach64_eraserows; 1750 scr->ri.ri_ops.copycols = mach64_copycols; 1751 scr->ri.ri_ops.erasecols = mach64_erasecols; 1752 scr->ri.ri_ops.putchar = mach64_putchar; 1753 scr->ri.ri_ops.cursor = mach64_cursor; 1754 1755 scr->attrs = malloc(cnt * (sizeof(long) + sizeof(u_int)), 1756 M_DEVBUF, M_WAITOK); 1757 scr->chars = (u_int *)&scr->attrs[cnt]; 1758 mach64_eraserows(ri, 0, ri->ri_rows, *defattrp); 1759 1760 if (sc->active == NULL) { 1761 scr->active = 1; 1762 sc->active = scr; 1763 sc->currenttype = type; 1764 } 1765 1766 *cookiep = scr; 1767 *curxp = scr->cursorcol; 1768 *curyp = scr->cursorrow; 1769 1770 return 0; 1771 } 1772 1773 static void 1774 mach64_free_screen(void *v, void *cookie) 1775 { 1776 struct mach64_softc *sc = v; 1777 struct mach64screen *scr = cookie; 1778 1779 LIST_REMOVE(scr, next); 1780 #if 0 1781 if (scr != &mach64_console_screen) { 1782 free(scr->attrs, M_DEVBUF); 1783 free(scr, M_DEVBUF); 1784 } else 1785 panic("mach64_free_screen: console"); 1786 #endif 1787 if (sc->active == scr) 1788 sc->active = 0; 1789 } 1790 1791 static int 1792 mach64_show_screen(void *v, void *cookie, int waitok, 1793 void (*cb)(void *, int, int), void *cbarg) 1794 { 1795 struct mach64_softc *sc = v; 1796 struct mach64screen *scr, *oldscr; 1797 1798 scr = cookie; 1799 oldscr = sc->active; 1800 if (scr == oldscr) 1801 return 0; 1802 1803 sc->wanted = scr; 1804 sc->switchcb = cb; 1805 sc->switchcbarg = cbarg; 1806 if (cb) { 1807 callout_reset(&sc->switch_callout, 0, 1808 (void(*)(void *))mach64_switch_screen, sc); 1809 return EAGAIN; 1810 } 1811 1812 mach64_switch_screen(sc); 1813 1814 return 0; 1815 } 1816 1817 static void 1818 mach64_switch_screen(struct mach64_softc *sc) 1819 { 1820 struct mach64screen *scr, *oldscr; 1821 const struct wsscreen_descr *type; 1822 1823 scr = sc->wanted; 1824 if (!scr) { 1825 printf("mach64_switch_screen: disappeared\n"); 1826 (*sc->switchcb)(sc->switchcbarg, EIO, 0); 1827 return; 1828 } 1829 type = scr->type; 1830 oldscr = sc->active; /* can be NULL! */ 1831 #ifdef DIAGNOSTIC 1832 if (oldscr) { 1833 if (!oldscr->active) 1834 panic("mach64_switch_screen: not active"); 1835 if (oldscr->type != sc->currenttype) 1836 panic("mach64_switch_screen: bad type %p != %p", 1837 oldscr->type, sc->currenttype); 1838 } 1839 #endif 1840 if (scr == oldscr) 1841 return; 1842 1843 #ifdef DIAGNOSTIC 1844 /* XXX: this one bites us at reboot */ 1845 #ifdef notdef 1846 if (scr->active) 1847 panic("mach64_switch_screen: active"); 1848 #endif 1849 #endif 1850 1851 if (oldscr) 1852 oldscr->active = 0; 1853 1854 if (sc->currenttype != type) { 1855 mach64_set_screentype(sc, type); 1856 sc->currenttype = type; 1857 } 1858 1859 scr->dispoffset = scr->mindispoffset; 1860 1861 if (!oldscr || (scr->dispoffset != oldscr->dispoffset)) { 1862 1863 } 1864 1865 /* Clear the entire screen. */ 1866 1867 scr->active = 1; 1868 mach64_restore_screen(scr, type, scr->chars); 1869 1870 sc->active = scr; 1871 1872 scr->ri.ri_ops.cursor(scr, scr->cursoron, scr->cursorrow, 1873 scr->cursorcol); 1874 1875 sc->wanted = 0; 1876 if (sc->switchcb) 1877 (*sc->switchcb)(sc->switchcbarg, 0, 0); 1878 } 1879 1880 static void 1881 mach64_restore_screen(struct mach64screen *scr, 1882 const struct wsscreen_descr *type, u_int *mem) 1883 { 1884 int i, j, offset = 0; 1885 u_int *charptr = scr->chars; 1886 long *attrptr = scr->attrs; 1887 1888 mach64_clearscreen(scr->sc); 1889 for (i = 0; i < scr->ri.ri_rows; i++) { 1890 for (j = 0; j < scr->ri.ri_cols; j++) { 1891 mach64_putchar(scr, i, j, charptr[offset], 1892 attrptr[offset]); 1893 offset++; 1894 } 1895 } 1896 scr->cursordrawn = 0; 1897 } 1898 1899 /* set ri->ri_bits according to fb, ri_xorigin and ri_yorigin */ 1900 static void 1901 set_address(struct rasops_info *ri, bus_addr_t fb) 1902 { 1903 #ifdef notdef 1904 printf(" %d %d %d\n", ri->ri_xorigin, ri->ri_yorigin, ri->ri_stride); 1905 #endif 1906 ri->ri_bits = (void *)((u_long)fb + ri->ri_stride * ri->ri_yorigin + 1907 ri->ri_xorigin); 1908 } 1909 1910 static int 1911 mach64_getwschar(void *cookie, struct wsdisplay_char *wsc) 1912 { 1913 struct mach64_softc *sc = cookie; 1914 struct mach64screen *scr = sc->active; 1915 int fg, bg, fl; 1916 1917 if (scr){ 1918 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1919 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1920 int pos = scr->ri.ri_cols * wsc->row + wsc->col; 1921 1922 wsc->letter = scr->chars[pos]; 1923 rasops_unpack_attr(scr->attrs[pos], &fg, &bg, &fl); 1924 wsc->foreground = fg; 1925 wsc->background = bg; 1926 wsc->flags = fl; 1927 return 0; 1928 } 1929 } 1930 return EINVAL; 1931 } 1932 1933 static int 1934 mach64_putwschar(void *cookie, struct wsdisplay_char *wsc) 1935 { 1936 struct mach64_softc *sc=cookie; 1937 struct mach64screen *scr=sc->active; 1938 long attr; 1939 1940 if (scr){ 1941 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1942 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1943 mach64_allocattr(&scr->ri, wsc->foreground, 1944 wsc->background, wsc->flags, &attr); 1945 mach64_putchar(&scr->ri, wsc->row, wsc->col, 1946 wsc->letter, attr); 1947 return 0; 1948 } 1949 } 1950 return EINVAL; 1951 } 1952 1953 #if 0 1954 static int 1955 mach64_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1956 { 1957 1958 return 0; 1959 } 1960 #endif 1961 1962 void 1963 machfb_blank(struct mach64_softc *sc, int blank) 1964 { 1965 uint32_t reg; 1966 1967 #define MACH64_BLANK (CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | CRTC_VSYNC_DIS) 1968 1969 switch (blank) 1970 { 1971 case 0: 1972 reg = regr(sc, CRTC_GEN_CNTL); 1973 regw(sc, CRTC_GEN_CNTL, reg & ~(MACH64_BLANK)); 1974 break; 1975 case 1: 1976 reg = regr(sc, CRTC_GEN_CNTL); 1977 regw(sc, CRTC_GEN_CNTL, reg | (MACH64_BLANK)); 1978 break; 1979 default: 1980 break; 1981 } 1982 } 1983
Indexes created Fri Oct 03 02:09:57 GMT 2025