machfb.c revision 1.35
1 /* $NetBSD: machfb.c,v 1.35 2005/10/03 11:22:06 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Bang Jun-Young 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Some code is derived from ATI Rage Pro and Derivatives Programmer's Guide. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, 36 "$NetBSD: machfb.c,v 1.35 2005/10/03 11:22:06 macallan Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 #include <sys/callout.h> 44 45 #ifdef __sparc__ 46 #include <machine/promlib.h> 47 #endif 48 49 #ifdef __powerpc__ 50 #include <dev/ofw/openfirm.h> 51 #include <dev/ofw/ofw_pci.h> 52 #endif 53 54 #include <dev/ic/videomode.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcidevs.h> 59 #include <dev/pci/pciio.h> 60 #include <dev/pci/machfbreg.h> 61 62 #include <dev/wscons/wsdisplayvar.h> 63 #include <dev/wscons/wsconsio.h> 64 #include <dev/wsfont/wsfont.h> 65 #include <dev/rasops/rasops.h> 66 67 #define MACH64_REG_SIZE 1024 68 #define MACH64_REG_OFF 0x7ffc00 69 70 #define NBARS 3 /* number of Mach64 PCI BARs */ 71 72 struct vga_bar { 73 bus_addr_t vb_base; 74 pcireg_t vb_busaddr; 75 bus_size_t vb_size; 76 pcireg_t vb_type; 77 int vb_flags; 78 }; 79 80 struct mach64_softc { 81 struct device sc_dev; 82 pci_chipset_tag_t sc_pc; 83 pcitag_t sc_pcitag; 84 85 struct vga_bar sc_bars[NBARS]; 86 struct vga_bar sc_rom; 87 88 #define sc_aperbase sc_bars[0].vb_base 89 #define sc_apersize sc_bars[0].vb_size 90 #define sc_aperphys sc_bars[0].vb_busaddr 91 92 #define sc_iobase sc_bars[1].vb_base 93 #define sc_iosize sc_bars[1].vb_size 94 95 #define sc_regbase sc_bars[2].vb_base 96 #define sc_regsize sc_bars[2].vb_size 97 #define sc_regphys sc_bars[2].vb_busaddr 98 99 bus_space_tag_t sc_regt; 100 bus_space_tag_t sc_memt; 101 bus_space_handle_t sc_regh; 102 bus_space_handle_t sc_memh; 103 104 size_t memsize; 105 int memtype; 106 107 int sc_mode; 108 int sc_bg; 109 110 int has_dsp; 111 int bits_per_pixel; 112 int max_x; 113 int max_y; 114 int virt_x; 115 int virt_y; 116 int color_depth; 117 118 int mem_freq; 119 int ramdac_freq; 120 int ref_freq; 121 122 int ref_div; 123 int log2_vclk_post_div; 124 int vclk_post_div; 125 int vclk_fb_div; 126 int mclk_post_div; 127 int mclk_fb_div; 128 129 struct videomode *sc_my_mode; 130 struct mach64screen *wanted; 131 struct mach64screen *active; 132 void (*switchcb)(void *, int, int); 133 void *switchcbarg; 134 struct callout switch_callout; 135 LIST_HEAD(, mach64screen) screens; 136 const struct wsscreen_descr *currenttype; 137 u_char sc_cmap_red[256]; 138 u_char sc_cmap_green[256]; 139 u_char sc_cmap_blue[256]; 140 int sc_dacw; 141 }; 142 143 struct mach64screen { 144 struct rasops_info ri; 145 LIST_ENTRY(mach64screen) next; 146 struct mach64_softc *sc; 147 const struct wsscreen_descr *type; 148 int active; 149 u_int *chars; 150 long *attrs; 151 int dispoffset; 152 int mindispoffset; 153 int maxdispoffset; 154 155 int cursoron; 156 int cursorcol; 157 int cursorrow; 158 int cursordrawn; 159 }; 160 161 struct mach64_crtcregs { 162 u_int32_t h_total_disp; 163 u_int32_t h_sync_strt_wid; 164 u_int32_t v_total_disp; 165 u_int32_t v_sync_strt_wid; 166 u_int32_t gen_cntl; 167 u_int32_t clock_cntl; 168 u_int32_t color_depth; 169 u_int32_t dot_clock; 170 }; 171 172 struct { 173 u_int16_t chip_id; 174 u_int32_t ramdac_freq; 175 } static const mach64_info[] = { 176 { PCI_PRODUCT_ATI_MACH64_CT, 135000 }, 177 { PCI_PRODUCT_ATI_RAGE_PRO_AGP, 230000 }, 178 { PCI_PRODUCT_ATI_RAGE_PRO_AGP1X, 230000 }, 179 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_B, 230000 }, 180 { PCI_PRODUCT_ATI_RAGE_XL_AGP, 230000 }, 181 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_P, 230000 }, 182 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_L, 230000 }, 183 { PCI_PRODUCT_ATI_RAGE_XL_PCI, 230000 }, 184 { PCI_PRODUCT_ATI_RAGE_II, 135000 }, 185 { PCI_PRODUCT_ATI_RAGE_IIP, 200000 }, 186 { PCI_PRODUCT_ATI_RAGE_IIC_PCI, 230000 }, 187 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_B, 230000 }, 188 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_P, 230000 }, 189 { PCI_PRODUCT_ATI_RAGE_LT_PRO_AGP, 230000 }, 190 { PCI_PRODUCT_ATI_RAGE_MOB_M3_PCI, 230000 }, 191 { PCI_PRODUCT_ATI_RAGE_MOB_M3_AGP, 230000 }, 192 { PCI_PRODUCT_ATI_RAGE_LT, 230000 }, 193 { PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI, 230000 }, 194 { PCI_PRODUCT_ATI_RAGE_MOBILITY, 230000 }, 195 { PCI_PRODUCT_ATI_RAGE_LT_PRO, 230000 }, 196 { PCI_PRODUCT_ATI_MACH64_VT, 170000 }, 197 { PCI_PRODUCT_ATI_MACH64_VTB, 200000 }, 198 { PCI_PRODUCT_ATI_MACH64_VT4, 230000 } 199 }; 200 201 static int mach64_chip_id, mach64_chip_rev; 202 static struct videomode default_mode = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 203 204 static const char *mach64_memtype_names[] = { 205 "(N/A)", "DRAM", "EDO DRAM", "EDO DRAM", "SDRAM", "SGRAM", "WRAM", 206 "(unknown type)" 207 }; 208 209 static struct videomode mach64_modes[] = { 210 /* 640x400 @ 70 Hz, 31.5 kHz */ 211 { 25175, 640, 664, 760, 800, 400, 409, 411, 450, 0 }, 212 /* 640x480 @ 72 Hz, 36.5 kHz */ 213 { 25175, 640, 664, 760, 800, 480, 491, 493, 525, 0 }, 214 /* 800x600 @ 72 Hz, 48.0 kHz */ 215 { 50000, 800, 856, 976, 1040, 600, 637, 643, 666, 216 VID_PHSYNC | VID_PVSYNC }, 217 /* 1024x768 @ 70 Hz, 56.5 kHz */ 218 { 75000, 1024, 1048, 1184, 1328, 768, 771, 777, 806, 219 VID_NHSYNC | VID_NVSYNC }, 220 /* 1152x864 @ 70 Hz, 62.4 kHz */ 221 { 92000, 1152, 1208, 1368, 1474, 864, 865, 875, 895, 0 }, 222 /* 1280x1024 @ 70 Hz, 74.59 kHz */ 223 { 126500, 1280, 1312, 1472, 1696, 1024, 1032, 1040, 1068, 224 VID_NHSYNC | VID_NVSYNC } 225 }; 226 227 extern const u_char rasops_cmap[768]; 228 229 static int mach64_match(struct device *, struct cfdata *, void *); 230 static void mach64_attach(struct device *, struct device *, void *); 231 232 CFATTACH_DECL(machfb, sizeof(struct mach64_softc), mach64_match, mach64_attach, 233 NULL, NULL); 234 235 static void mach64_init(struct mach64_softc *); 236 static int mach64_get_memsize(struct mach64_softc *); 237 static int mach64_get_max_ramdac(struct mach64_softc *); 238 239 #if defined(__sparc__) || defined(__powerpc) 240 static void mach64_get_mode(struct mach64_softc *, struct videomode *); 241 #endif 242 243 static int mach64_calc_crtcregs(struct mach64_softc *, 244 struct mach64_crtcregs *, 245 struct videomode *); 246 static void mach64_set_crtcregs(struct mach64_softc *, 247 struct mach64_crtcregs *); 248 249 static int mach64_modeswitch(struct mach64_softc *, struct videomode *); 250 static void mach64_set_dsp(struct mach64_softc *); 251 static void mach64_set_pll(struct mach64_softc *, int); 252 static void mach64_reset_engine(struct mach64_softc *); 253 static void mach64_init_engine(struct mach64_softc *); 254 #if 0 255 static void mach64_adjust_frame(struct mach64_softc *, int, int); 256 #endif 257 static void mach64_init_lut(struct mach64_softc *); 258 static void mach64_switch_screen(struct mach64_softc *); 259 static void mach64_init_screen(struct mach64_softc *, struct mach64screen *, 260 const struct wsscreen_descr *, int, long *, 261 int); 262 static void mach64_restore_screen(struct mach64screen *, 263 const struct wsscreen_descr *, u_int *); 264 static int mach64_set_screentype(struct mach64_softc *, 265 const struct wsscreen_descr *); 266 static int mach64_is_console(struct pci_attach_args *); 267 268 static void mach64_cursor(void *, int, int, int); 269 #if 0 270 static int mach64_mapchar(void *, int, u_int *); 271 #endif 272 static void mach64_putchar(void *, int, int, u_int, long); 273 static void mach64_copycols(void *, int, int, int, int); 274 static void mach64_erasecols(void *, int, int, int, long); 275 static void mach64_copyrows(void *, int, int, int); 276 static void mach64_eraserows(void *, int, int, long); 277 static int mach64_allocattr(void *, int, int, int, long *); 278 static void mach64_clearscreen(struct mach64_softc *); 279 280 static int mach64_putcmap(struct mach64_softc *, struct wsdisplay_cmap *); 281 static int mach64_getcmap(struct mach64_softc *, struct wsdisplay_cmap *); 282 static int mach64_putpalreg(struct mach64_softc *, uint8_t, uint8_t, 283 uint8_t, uint8_t); 284 static void mach64_bitblt(struct mach64_softc *, int, int, int, int, int, 285 int, int, int) ; 286 static void mach64_rectfill(struct mach64_softc *, int, int, int, int, int); 287 static void mach64_setup_mono(struct mach64_softc *, int, int, int, int, 288 uint32_t, uint32_t); 289 static void mach64_feed_bytes(struct mach64_softc *, int, uint8_t *); 290 #if 0 291 static void mach64_showpal(struct mach64_softc *); 292 #endif 293 static int mach64_getwschar(void *, struct wsdisplay_char *); 294 static int mach64_putwschar(void *, struct wsdisplay_char *); 295 296 static void set_address(struct rasops_info *, bus_addr_t); 297 static void machfb_blank(struct mach64_softc *, int); 298 299 #if 0 300 static const struct wsdisplay_emulops mach64_emulops = { 301 mach64_cursor, 302 mach64_mapchar, 303 mach64_putchar, 304 mach64_copycols, 305 mach64_erasecols, 306 mach64_copyrows, 307 mach64_eraserows, 308 mach64_allocattr, 309 }; 310 #endif 311 312 static struct wsscreen_descr mach64_defaultscreen = { 313 "default", 314 80, 30, 315 NULL, 316 8, 16, 317 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 318 &default_mode 319 }, mach64_80x25_screen = { 320 "80x25", 80, 25, 321 NULL, 322 8, 16, 323 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 324 &mach64_modes[0] 325 }, mach64_80x30_screen = { 326 "80x30", 80, 30, 327 NULL, 328 8, 16, 329 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 330 &mach64_modes[1] 331 }, mach64_80x40_screen = { 332 "80x40", 80, 40, 333 NULL, 334 8, 10, 335 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 336 &mach64_modes[0] 337 }, mach64_80x50_screen = { 338 "80x50", 80, 50, 339 NULL, 340 8, 8, 341 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 342 &mach64_modes[0] 343 }, mach64_100x37_screen = { 344 "100x37", 100, 37, 345 NULL, 346 8, 16, 347 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 348 &mach64_modes[2] 349 }, mach64_128x48_screen = { 350 "128x48", 128, 48, 351 NULL, 352 8, 16, 353 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 354 &mach64_modes[3] 355 }, mach64_144x54_screen = { 356 "144x54", 144, 54, 357 NULL, 358 8, 16, 359 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 360 &mach64_modes[4] 361 }, mach64_160x64_screen = { 362 "160x54", 160, 64, 363 NULL, 364 8, 16, 365 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 366 &mach64_modes[5] 367 }; 368 369 static const struct wsscreen_descr *_mach64_scrlist[] = { 370 &mach64_defaultscreen, 371 &mach64_80x25_screen, 372 &mach64_80x30_screen, 373 &mach64_80x40_screen, 374 &mach64_80x50_screen, 375 &mach64_100x37_screen, 376 &mach64_128x48_screen, 377 &mach64_144x54_screen, 378 &mach64_160x64_screen 379 }; 380 381 static struct wsscreen_list mach64_screenlist = { 382 sizeof(_mach64_scrlist) / sizeof(struct wsscreen_descr *), 383 _mach64_scrlist 384 }; 385 386 static int mach64_ioctl(void *, u_long, caddr_t, int, struct proc *); 387 static paddr_t mach64_mmap(void *, off_t, int); 388 static int mach64_alloc_screen(void *, const struct wsscreen_descr *, 389 void **, int *, int *, long *); 390 static void mach64_free_screen(void *, void *); 391 static int mach64_show_screen(void *, void *, int, 392 void (*)(void *, int, int), void *); 393 #if 0 394 static int mach64_load_font(void *, void *, struct wsdisplay_font *); 395 #endif 396 397 static struct wsdisplay_accessops mach64_accessops = { 398 mach64_ioctl, 399 mach64_mmap, 400 mach64_alloc_screen, 401 mach64_free_screen, 402 mach64_show_screen, 403 NULL, /* load_font */ 404 NULL, /* polls */ 405 mach64_getwschar, /* getwschar */ 406 mach64_putwschar, /* putwschar */ 407 NULL, /* scroll */ 408 NULL, /* getborder */ 409 NULL /* setborder */ 410 }; 411 412 /* 413 * Inline functions for getting access to register aperture. 414 */ 415 416 static inline u_int32_t 417 regr(struct mach64_softc *sc, u_int32_t index) 418 { 419 return bus_space_read_4(sc->sc_regt, sc->sc_regh, index); 420 } 421 422 static inline u_int8_t 423 regrb(struct mach64_softc *sc, u_int32_t index) 424 { 425 return bus_space_read_1(sc->sc_regt, sc->sc_regh, index); 426 } 427 428 static inline void 429 regw(struct mach64_softc *sc, u_int32_t index, u_int32_t data) 430 { 431 bus_space_write_4(sc->sc_regt, sc->sc_regh, index, data); 432 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 4, 433 BUS_SPACE_BARRIER_WRITE); 434 } 435 436 static inline void 437 regwb(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 438 { 439 bus_space_write_1(sc->sc_regt, sc->sc_regh, index, data); 440 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 1, 441 BUS_SPACE_BARRIER_WRITE); 442 } 443 444 static inline void 445 regwb_pll(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 446 { 447 regwb(sc, CLOCK_CNTL + 1, (index << 2) | PLL_WR_EN); 448 regwb(sc, CLOCK_CNTL + 2, data); 449 regwb(sc, CLOCK_CNTL + 1, (index << 2) & ~PLL_WR_EN); 450 } 451 452 static inline void 453 wait_for_fifo(struct mach64_softc *sc, u_int8_t v) 454 { 455 while ((regr(sc, FIFO_STAT) & 0xffff) > (0x8000 >> v)) 456 continue; 457 } 458 459 static inline void 460 wait_for_idle(struct mach64_softc *sc) 461 { 462 wait_for_fifo(sc, 16); 463 while ((regr(sc, GUI_STAT) & 1) != 0) 464 continue; 465 } 466 467 static int 468 mach64_match(struct device *parent, struct cfdata *match, void *aux) 469 { 470 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 471 int i; 472 473 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 474 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 475 return 0; 476 477 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 478 if (PCI_PRODUCT(pa->pa_id) == mach64_info[i].chip_id) { 479 mach64_chip_id = PCI_PRODUCT(pa->pa_id); 480 mach64_chip_rev = PCI_REVISION(pa->pa_class); 481 return 100; 482 } 483 484 return 0; 485 } 486 487 static void 488 mach64_attach(struct device *parent, struct device *self, void *aux) 489 { 490 struct mach64_softc *sc = (void *)self; 491 struct pci_attach_args *pa = aux; 492 struct mach64screen *console_screen; 493 void *cookie; 494 char devinfo[256]; 495 int bar, reg, id; 496 struct wsemuldisplaydev_attach_args aa; 497 long defattr; 498 int setmode, console, x, y; 499 pcireg_t screg; 500 501 sc->sc_pc = pa->pa_pc; 502 sc->sc_pcitag = pa->pa_tag; 503 sc->sc_dacw = -1; 504 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 505 506 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 507 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 508 509 /* enable memory and IO access */ 510 screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 511 screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 512 pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg); 513 514 for (bar = 0; bar < NBARS; bar++) { 515 reg = PCI_MAPREG_START + (bar * 4); 516 sc->sc_bars[bar].vb_type = pci_mapreg_type(sc->sc_pc, 517 sc->sc_pcitag, reg); 518 (void)pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, reg, 519 sc->sc_bars[bar].vb_type, &sc->sc_bars[bar].vb_base, 520 &sc->sc_bars[bar].vb_size, &sc->sc_bars[bar].vb_flags); 521 sc->sc_bars[bar].vb_busaddr = pci_conf_read(sc->sc_pc, 522 sc->sc_pcitag, reg)&0xfffffff0; 523 } 524 sc->sc_memt = pa->pa_memt; 525 526 mach64_init(sc); 527 528 printf("%s: %d MB aperture at 0x%08x, %d KB registers at 0x%08x\n", 529 sc->sc_dev.dv_xname, (u_int)(sc->sc_apersize / (1024 * 1024)), 530 (u_int)sc->sc_aperphys, (u_int)(sc->sc_regsize / 1024), 531 (u_int)sc->sc_regphys); 532 533 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_CT || 534 ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 535 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 536 (mach64_chip_rev & 0x07) == 0)) 537 sc->has_dsp = 0; 538 else 539 sc->has_dsp = 1; 540 541 sc->memsize = mach64_get_memsize(sc); 542 if (sc->memsize == 8192) 543 /* The last page is used as register aperture. */ 544 sc->memsize -= 4; 545 sc->memtype = regr(sc, CONFIG_STAT0) & 0x07; 546 547 /* XXX is there any way to calculate reference frequency from 548 known values? */ 549 if ((mach64_chip_id == PCI_PRODUCT_ATI_RAGE_XL_PCI) || 550 ((mach64_chip_id >= PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI) && 551 (mach64_chip_id <= PCI_PRODUCT_ATI_RAGE_LT_PRO))) { 552 printf("ref_freq=29.498MHz\n"); 553 sc->ref_freq = 29498; 554 } else 555 sc->ref_freq = 14318; 556 557 regwb(sc, CLOCK_CNTL + 1, PLL_REF_DIV << 2); 558 sc->ref_div = regrb(sc, CLOCK_CNTL + 2); 559 regwb(sc, CLOCK_CNTL + 1, MCLK_FB_DIV << 2); 560 sc->mclk_fb_div = regrb(sc, CLOCK_CNTL + 2); 561 sc->mem_freq = (2 * sc->ref_freq * sc->mclk_fb_div) / 562 (sc->ref_div * 2); 563 sc->mclk_post_div = (sc->mclk_fb_div * 2 * sc->ref_freq) / 564 (sc->mem_freq * sc->ref_div); 565 sc->ramdac_freq = mach64_get_max_ramdac(sc); 566 printf("%s: %ld KB %s %d.%d MHz, maximum RAMDAC clock %d MHz\n", 567 sc->sc_dev.dv_xname, (u_long)sc->memsize, 568 mach64_memtype_names[sc->memtype], 569 sc->mem_freq / 1000, sc->mem_freq % 1000, 570 sc->ramdac_freq / 1000); 571 572 id = regr(sc, CONFIG_CHIP_ID) & 0xffff; 573 if (id != mach64_chip_id) { 574 printf("%s: chip ID mismatch, 0x%x != 0x%x\n", 575 sc->sc_dev.dv_xname, id, mach64_chip_id); 576 return; 577 } 578 579 console = mach64_is_console(pa); 580 #ifdef DIAGNOSTIC 581 printf("gen_cntl: %08x\n", regr(sc, CRTC_GEN_CNTL)); 582 #endif 583 #if defined(__sparc__) || defined(__powerpc__) 584 if (console) { 585 mach64_get_mode(sc, &default_mode); 586 setmode = 0; 587 sc->sc_my_mode = &default_mode; 588 } else { 589 /* fill in default_mode if it's empty */ 590 if (default_mode.dot_clock == 0) { 591 memcpy(&default_mode, &mach64_modes[4], 592 sizeof(default_mode)); 593 } 594 sc->sc_my_mode = &default_mode; 595 setmode = 1; 596 } 597 #else 598 if (default_mode.dot_clock == 0) { 599 memcpy(&default_mode, &mach64_modes[0], 600 sizeof(default_mode)); 601 } 602 sc->sc_my_mode = &mach64_modes[0]; 603 setmode = 1; 604 #endif 605 606 sc->bits_per_pixel = 8; 607 sc->virt_x = sc->sc_my_mode->hdisplay; 608 sc->virt_y = sc->sc_my_mode->vdisplay; 609 sc->max_x = sc->virt_x - 1; 610 sc->max_y = (sc->memsize * 1024) / 611 (sc->virt_x * (sc->bits_per_pixel / 8)) - 1; 612 613 sc->color_depth = CRTC_PIX_WIDTH_8BPP; 614 615 mach64_init_engine(sc); 616 #if 0 617 mach64_adjust_frame(0, 0); 618 if (sc->bits_per_pixel == 8) 619 mach64_init_lut(sc); 620 #endif 621 622 printf("%s: initial resolution %dx%d at %d bpp\n", sc->sc_dev.dv_xname, 623 sc->sc_my_mode->hdisplay, sc->sc_my_mode->vdisplay, 624 sc->bits_per_pixel); 625 626 wsfont_init(); 627 628 if (console) { 629 sc->sc_bg = WS_DEFAULT_BG; 630 mach64_alloc_screen(sc, &mach64_defaultscreen, &cookie, &x, &y, &defattr); 631 console_screen = cookie; 632 mach64_defaultscreen.nrows = console_screen->ri.ri_rows; 633 mach64_defaultscreen.ncols = console_screen->ri.ri_cols; 634 mach64_defaultscreen.capabilities = console_screen->ri.ri_caps; 635 mach64_defaultscreen.textops = &console_screen->ri.ri_ops; 636 637 wsdisplay_cnattach(&mach64_defaultscreen, 638 &console_screen->ri, x, y, defattr); 639 } else { 640 /* 641 * since we're not the console we can postpone the rest 642 * until someone actually allocates a screen for us 643 */ 644 mach64_modeswitch(sc, sc->sc_my_mode); 645 } 646 647 mach64_init_lut(sc); 648 mach64_clearscreen(sc); 649 machfb_blank(sc, 0); /* unblank the screen */ 650 651 aa.console = console; 652 aa.scrdata = &mach64_screenlist; 653 aa.accessops = &mach64_accessops; 654 aa.accesscookie = sc; 655 656 config_found(self, &aa, wsemuldisplaydevprint); 657 } 658 659 static void 660 mach64_init_screen(struct mach64_softc *sc, struct mach64screen *scr, 661 const struct wsscreen_descr *type, int existing, long *attrp, int setmode) 662 { 663 struct rasops_info *ri=&scr->ri; 664 665 scr->sc = sc; 666 scr->type = type; 667 scr->mindispoffset = 0; 668 scr->maxdispoffset = sc->memsize * 1024; 669 scr->dispoffset = 0; 670 scr->cursorcol = 0; 671 scr->cursorrow = 0; 672 673 ri->ri_depth = sc->bits_per_pixel; 674 ri->ri_width = sc->sc_my_mode->hdisplay; 675 ri->ri_height = sc->sc_my_mode->vdisplay; 676 ri->ri_stride = ri->ri_width; 677 ri->ri_flg = RI_CENTER; 678 679 if (existing) { 680 scr->active = 1; 681 ri->ri_flg |= RI_CLEAR; 682 if (setmode && mach64_set_screentype(sc, type)) { 683 panic("%s: failed to switch video mode", 684 sc->sc_dev.dv_xname); 685 } 686 } else { 687 scr->active = 0; 688 } 689 690 LIST_INSERT_HEAD(&sc->screens, scr, next); 691 } 692 693 static void 694 mach64_init(struct mach64_softc *sc) 695 { 696 u_int32_t *p32, saved_value; 697 u_int8_t *p; 698 int need_swap; 699 700 if (bus_space_map(sc->sc_memt, sc->sc_aperbase, sc->sc_apersize, 701 BUS_SPACE_MAP_LINEAR, &sc->sc_memh)) { 702 panic("%s: failed to map aperture", sc->sc_dev.dv_xname); 703 } 704 sc->sc_aperbase = (vaddr_t)bus_space_vaddr(sc->sc_memt, sc->sc_memh); 705 706 sc->sc_regt = sc->sc_memt; 707 bus_space_subregion(sc->sc_regt, sc->sc_memh, MACH64_REG_OFF, 708 sc->sc_regsize, &sc->sc_regh); 709 sc->sc_regbase = sc->sc_aperbase + 0x7ffc00; 710 711 /* 712 * Test wether the aperture is byte swapped or not 713 */ 714 p32 = (u_int32_t*)(u_long)sc->sc_aperbase; 715 saved_value = *p32; 716 p = (u_int8_t*)(u_long)sc->sc_aperbase; 717 *p32 = 0x12345678; 718 if (p[0] == 0x12 && p[1] == 0x34 && p[2] == 0x56 && p[3] == 0x78) 719 need_swap = 0; 720 else 721 need_swap = 1; 722 if (need_swap) { 723 sc->sc_aperbase += 0x800000; 724 sc->sc_apersize -= 0x800000; 725 } 726 *p32 = saved_value; 727 728 LIST_INIT(&sc->screens); 729 sc->active = NULL; 730 sc->currenttype = &mach64_defaultscreen; 731 callout_init(&sc->switch_callout); 732 } 733 734 static int 735 mach64_get_memsize(struct mach64_softc *sc) 736 { 737 int tmp, memsize; 738 int mem_tab[] = { 739 512, 1024, 2048, 4096, 6144, 8192, 12288, 16384 740 }; 741 tmp = regr(sc, MEM_CNTL); 742 printf("memctl: %08x\n",tmp); 743 if (sc->has_dsp) { 744 tmp &= 0x0000000f; 745 if (tmp < 8) 746 memsize = (tmp + 1) * 512; 747 else if (tmp < 12) 748 memsize = (tmp - 3) * 1024; 749 else 750 memsize = (tmp - 7) * 2048; 751 } else { 752 memsize = mem_tab[tmp & 0x07]; 753 } 754 755 return memsize; 756 } 757 758 static int 759 mach64_get_max_ramdac(struct mach64_softc *sc) 760 { 761 int i; 762 763 if ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 764 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 765 (mach64_chip_rev & 0x07)) 766 return 170000; 767 768 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 769 if (mach64_chip_id == mach64_info[i].chip_id) 770 return mach64_info[i].ramdac_freq; 771 772 if (sc->bits_per_pixel == 8) 773 return 135000; 774 else 775 return 80000; 776 } 777 778 #if defined(__sparc__) || defined(__powerpc) 779 static void 780 mach64_get_mode(struct mach64_softc *sc, struct videomode *mode) 781 { 782 struct mach64_crtcregs crtc; 783 784 crtc.h_total_disp = regr(sc, CRTC_H_TOTAL_DISP); 785 crtc.h_sync_strt_wid = regr(sc, CRTC_H_SYNC_STRT_WID); 786 crtc.v_total_disp = regr(sc, CRTC_V_TOTAL_DISP); 787 crtc.v_sync_strt_wid = regr(sc, CRTC_V_SYNC_STRT_WID); 788 789 mode->htotal = ((crtc.h_total_disp & 0xffff) + 1) << 3; 790 mode->hdisplay = ((crtc.h_total_disp >> 16) + 1) << 3; 791 mode->hsync_start = ((crtc.h_sync_strt_wid & 0xffff) + 1) << 3; 792 mode->hsync_end = ((crtc.h_sync_strt_wid >> 16) << 3) + 793 mode->hsync_start; 794 mode->vtotal = (crtc.v_total_disp & 0xffff) + 1; 795 mode->vdisplay = (crtc.v_total_disp >> 16) + 1; 796 mode->vsync_start = (crtc.v_sync_strt_wid & 0xffff) + 1; 797 mode->vsync_end = (crtc.v_sync_strt_wid >> 16) + mode->vsync_start; 798 799 #ifdef DEBUG_MACHFB 800 printf("mach64_get_mode: %d %d %d %d %d %d %d %d\n", 801 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, 802 mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal); 803 #endif 804 } 805 #endif 806 807 static int 808 mach64_calc_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc, 809 struct videomode *mode) 810 { 811 812 if (mode->dot_clock > sc->ramdac_freq) 813 /* Clock too high. */ 814 return 1; 815 816 crtc->h_total_disp = (((mode->hdisplay >> 3) - 1) << 16) | 817 ((mode->htotal >> 3) - 1); 818 crtc->h_sync_strt_wid = 819 (((mode->hsync_end - mode->hsync_start) >> 3) << 16) | 820 ((mode->hsync_start >> 3) - 1); 821 822 crtc->v_total_disp = ((mode->vdisplay - 1) << 16) | 823 (mode->vtotal - 1); 824 crtc->v_sync_strt_wid = 825 ((mode->vsync_end - mode->vsync_start) << 16) | 826 (mode->vsync_start - 1); 827 828 if (mode->flags & VID_NVSYNC) 829 crtc->v_sync_strt_wid |= CRTC_VSYNC_NEG; 830 831 switch (sc->bits_per_pixel) { 832 case 8: 833 crtc->color_depth = CRTC_PIX_WIDTH_8BPP; 834 break; 835 case 16: 836 crtc->color_depth = CRTC_PIX_WIDTH_16BPP; 837 break; 838 case 32: 839 crtc->color_depth = CRTC_PIX_WIDTH_32BPP; 840 break; 841 } 842 843 crtc->gen_cntl = 0; 844 if (mode->flags & VID_INTERLACE) 845 crtc->gen_cntl |= CRTC_INTERLACE_EN; 846 if (mode->flags & VID_CSYNC) 847 crtc->gen_cntl |= CRTC_CSYNC_EN; 848 849 crtc->dot_clock = mode->dot_clock; 850 851 return 0; 852 } 853 854 static void 855 mach64_set_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc) 856 { 857 858 mach64_set_pll(sc, crtc->dot_clock); 859 860 if (sc->has_dsp) 861 mach64_set_dsp(sc); 862 863 regw(sc, CRTC_H_TOTAL_DISP, crtc->h_total_disp); 864 regw(sc, CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid); 865 regw(sc, CRTC_V_TOTAL_DISP, crtc->v_total_disp); 866 regw(sc, CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid); 867 868 regw(sc, CRTC_VLINE_CRNT_VLINE, 0); 869 870 regw(sc, CRTC_OFF_PITCH, (sc->virt_x >> 3) << 22); 871 872 regw(sc, CRTC_GEN_CNTL, crtc->gen_cntl | crtc->color_depth | 873 CRTC_EXT_DISP_EN | CRTC_EXT_EN); 874 } 875 876 static int 877 mach64_modeswitch(struct mach64_softc *sc, struct videomode *mode) 878 { 879 struct mach64_crtcregs crtc; 880 881 if (mach64_calc_crtcregs(sc, &crtc, mode)) 882 return 1; 883 884 mach64_set_crtcregs(sc, &crtc); 885 return 0; 886 } 887 888 static void 889 mach64_reset_engine(struct mach64_softc *sc) 890 { 891 892 /* Reset engine.*/ 893 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) & ~GUI_ENGINE_ENABLE); 894 895 /* Enable engine. */ 896 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) | GUI_ENGINE_ENABLE); 897 898 /* Ensure engine is not locked up by clearing any FIFO or 899 host errors. */ 900 regw(sc, BUS_CNTL, regr(sc, BUS_CNTL) | BUS_HOST_ERR_ACK | 901 BUS_FIFO_ERR_ACK); 902 } 903 904 static void 905 mach64_init_engine(struct mach64_softc *sc) 906 { 907 u_int32_t pitch_value; 908 909 pitch_value = sc->virt_x; 910 911 if (sc->bits_per_pixel == 24) 912 pitch_value *= 3; 913 914 mach64_reset_engine(sc); 915 916 wait_for_fifo(sc, 14); 917 918 regw(sc, CONTEXT_MASK, 0xffffffff); 919 920 regw(sc, DST_OFF_PITCH, (pitch_value / 8) << 22); 921 922 regw(sc, DST_Y_X, 0); 923 regw(sc, DST_HEIGHT, 0); 924 regw(sc, DST_BRES_ERR, 0); 925 regw(sc, DST_BRES_INC, 0); 926 regw(sc, DST_BRES_DEC, 0); 927 928 regw(sc, DST_CNTL, DST_LAST_PEL | DST_X_LEFT_TO_RIGHT | 929 DST_Y_TOP_TO_BOTTOM); 930 931 regw(sc, SRC_OFF_PITCH, (pitch_value / 8) << 22); 932 933 regw(sc, SRC_Y_X, 0); 934 regw(sc, SRC_HEIGHT1_WIDTH1, 1); 935 regw(sc, SRC_Y_X_START, 0); 936 regw(sc, SRC_HEIGHT2_WIDTH2, 1); 937 938 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 939 940 wait_for_fifo(sc, 13); 941 regw(sc, HOST_CNTL, 0); 942 943 regw(sc, PAT_REG0, 0); 944 regw(sc, PAT_REG1, 0); 945 regw(sc, PAT_CNTL, 0); 946 947 regw(sc, SC_LEFT, 0); 948 regw(sc, SC_TOP, 0); 949 regw(sc, SC_BOTTOM, sc->sc_my_mode->vdisplay - 1); 950 regw(sc, SC_RIGHT, pitch_value - 1); 951 952 regw(sc, DP_BKGD_CLR, 0); 953 regw(sc, DP_FRGD_CLR, 0xffffffff); 954 regw(sc, DP_WRITE_MASK, 0xffffffff); 955 regw(sc, DP_MIX, (MIX_SRC << 16) | MIX_DST); 956 957 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 958 959 wait_for_fifo(sc, 3); 960 regw(sc, CLR_CMP_CLR, 0); 961 regw(sc, CLR_CMP_MASK, 0xffffffff); 962 regw(sc, CLR_CMP_CNTL, 0); 963 964 wait_for_fifo(sc, 2); 965 switch (sc->bits_per_pixel) { 966 case 8: 967 regw(sc, DP_PIX_WIDTH, HOST_8BPP | SRC_8BPP | DST_8BPP); 968 regw(sc, DP_CHAIN_MASK, DP_CHAIN_8BPP); 969 /* We want 8 bit per channel */ 970 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 971 break; 972 #if 0 973 case 32: 974 regw(sc, DP_PIX_WIDTH, HOST_32BPP | SRC_32BPP | DST_32BPP); 975 regw(sc, DP_CHAIN_MASK, DP_CHAIN_32BPP); 976 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 977 break; 978 #endif 979 } 980 981 wait_for_fifo(sc, 5); 982 regw(sc, CRTC_INT_CNTL, regr(sc, CRTC_INT_CNTL) & ~0x20); 983 regw(sc, GUI_TRAJ_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 984 985 wait_for_idle(sc); 986 } 987 988 #if 0 989 static void 990 mach64_adjust_frame(struct mach64_softc *sc, int x, int y) 991 { 992 int offset; 993 994 offset = ((x + y * sc->virt_x) * (sc->bits_per_pixel >> 3)) >> 3; 995 996 regw(sc, CRTC_OFF_PITCH, (regr(sc, CRTC_OFF_PITCH) & 0xfff00000) | 997 offset); 998 } 999 #endif 1000 1001 static void 1002 mach64_set_dsp(struct mach64_softc *sc) 1003 { 1004 u_int32_t fifo_depth, page_size, dsp_precision, dsp_loop_latency; 1005 u_int32_t dsp_off, dsp_on, dsp_xclks_per_qw; 1006 u_int32_t xclks_per_qw, y; 1007 u_int32_t fifo_off, fifo_on; 1008 1009 printf("initializing the DSP\n"); 1010 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 1011 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II || 1012 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIP || 1013 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_PCI || 1014 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_B || 1015 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_P) { 1016 dsp_loop_latency = 0; 1017 fifo_depth = 24; 1018 } else { 1019 dsp_loop_latency = 2; 1020 fifo_depth = 32; 1021 } 1022 1023 dsp_precision = 0; 1024 xclks_per_qw = (sc->mclk_fb_div * sc->vclk_post_div * 64 << 11) / 1025 (sc->vclk_fb_div * sc->mclk_post_div * sc->bits_per_pixel); 1026 y = (xclks_per_qw * fifo_depth) >> 11; 1027 while (y) { 1028 y >>= 1; 1029 dsp_precision++; 1030 } 1031 dsp_precision -= 5; 1032 fifo_off = ((xclks_per_qw * (fifo_depth - 1)) >> 5) + (3 << 6); 1033 1034 switch (sc->memtype) { 1035 case DRAM: 1036 case EDO_DRAM: 1037 case PSEUDO_EDO: 1038 if (sc->memsize > 1024) { 1039 page_size = 9; 1040 dsp_loop_latency += 6; 1041 } else { 1042 page_size = 10; 1043 if (sc->memtype == DRAM) 1044 dsp_loop_latency += 8; 1045 else 1046 dsp_loop_latency += 7; 1047 } 1048 break; 1049 case SDRAM: 1050 case SGRAM: 1051 if (sc->memsize > 1024) { 1052 page_size = 8; 1053 dsp_loop_latency += 8; 1054 } else { 1055 page_size = 10; 1056 dsp_loop_latency += 9; 1057 } 1058 break; 1059 default: 1060 page_size = 10; 1061 dsp_loop_latency += 9; 1062 break; 1063 } 1064 1065 if (xclks_per_qw >= (page_size << 11)) 1066 fifo_on = ((2 * page_size + 1) << 6) + (xclks_per_qw >> 5); 1067 else 1068 fifo_on = (3 * page_size + 2) << 6; 1069 1070 dsp_xclks_per_qw = xclks_per_qw >> dsp_precision; 1071 dsp_on = fifo_on >> dsp_precision; 1072 dsp_off = fifo_off >> dsp_precision; 1073 1074 #ifdef DEBUG_MACHFB 1075 printf("dsp_xclks_per_qw = %d, dsp_on = %d, dsp_off = %d,\n" 1076 "dsp_precision = %d, dsp_loop_latency = %d,\n" 1077 "mclk_fb_div = %d, vclk_fb_div = %d,\n" 1078 "mclk_post_div = %d, vclk_post_div = %d\n", 1079 dsp_xclks_per_qw, dsp_on, dsp_off, dsp_precision, dsp_loop_latency, 1080 sc->mclk_fb_div, sc->vclk_fb_div, 1081 sc->mclk_post_div, sc->vclk_post_div); 1082 #endif 1083 1084 regw(sc, DSP_ON_OFF, ((dsp_on << 16) & DSP_ON) | (dsp_off & DSP_OFF)); 1085 regw(sc, DSP_CONFIG, ((dsp_precision << 20) & DSP_PRECISION) | 1086 ((dsp_loop_latency << 16) & DSP_LOOP_LATENCY) | 1087 (dsp_xclks_per_qw & DSP_XCLKS_PER_QW)); 1088 } 1089 1090 static void 1091 mach64_set_pll(struct mach64_softc *sc, int clock) 1092 { 1093 int q; 1094 1095 q = (clock * sc->ref_div * 100) / (2 * sc->ref_freq); 1096 #ifdef DEBUG_MACHFB 1097 printf("q = %d\n", q); 1098 #endif 1099 if (q > 25500) { 1100 printf("Warning: q > 25500\n"); 1101 q = 25500; 1102 sc->vclk_post_div = 1; 1103 sc->log2_vclk_post_div = 0; 1104 } else if (q > 12750) { 1105 sc->vclk_post_div = 1; 1106 sc->log2_vclk_post_div = 0; 1107 } else if (q > 6350) { 1108 sc->vclk_post_div = 2; 1109 sc->log2_vclk_post_div = 1; 1110 } else if (q > 3150) { 1111 sc->vclk_post_div = 4; 1112 sc->log2_vclk_post_div = 2; 1113 } else if (q >= 1600) { 1114 sc->vclk_post_div = 8; 1115 sc->log2_vclk_post_div = 3; 1116 } else { 1117 printf("Warning: q < 1600\n"); 1118 sc->vclk_post_div = 8; 1119 sc->log2_vclk_post_div = 3; 1120 } 1121 sc->vclk_fb_div = q * sc->vclk_post_div / 100; 1122 1123 regwb_pll(sc, MCLK_FB_DIV, sc->mclk_fb_div); 1124 regwb_pll(sc, VCLK_POST_DIV, sc->log2_vclk_post_div); 1125 regwb_pll(sc, VCLK0_FB_DIV, sc->vclk_fb_div); 1126 } 1127 1128 static void 1129 mach64_init_lut(struct mach64_softc *sc) 1130 { 1131 int i, idx; 1132 1133 idx = 0; 1134 for (i = 0; i < 256; i++) { 1135 mach64_putpalreg(sc, i, rasops_cmap[idx], rasops_cmap[idx + 1], 1136 rasops_cmap[idx + 2]); 1137 idx += 3; 1138 } 1139 } 1140 1141 static int 1142 mach64_putpalreg(struct mach64_softc *sc, uint8_t index, uint8_t r, uint8_t g, 1143 uint8_t b) 1144 { 1145 sc->sc_cmap_red[index] = r; 1146 sc->sc_cmap_green[index] = g; 1147 sc->sc_cmap_blue[index] = b; 1148 /* 1149 * writing the dac index takes a while, in theory we can poll some 1150 * register to see when it's ready - but we better avoid writing it 1151 * unnecessarily 1152 */ 1153 if (index != sc->sc_dacw) { 1154 regwb(sc, DAC_MASK, 0xff); 1155 regwb(sc, DAC_WINDEX, index); 1156 } 1157 sc->sc_dacw = index + 1; 1158 regwb(sc, DAC_DATA, r); 1159 regwb(sc, DAC_DATA, g); 1160 regwb(sc, DAC_DATA, b); 1161 return 0; 1162 } 1163 1164 static int 1165 mach64_putcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1166 { 1167 u_int index = cm->index; 1168 u_int count = cm->count; 1169 int i, error; 1170 u_char rbuf[256], gbuf[256], bbuf[256]; 1171 u_char *r, *g, *b; 1172 1173 if (cm->index >= 256 || cm->count > 256 || 1174 (cm->index + cm->count) > 256) 1175 return EINVAL; 1176 error = copyin(cm->red, &rbuf[index], count); 1177 if (error) 1178 return error; 1179 error = copyin(cm->green, &gbuf[index], count); 1180 if (error) 1181 return error; 1182 error = copyin(cm->blue, &bbuf[index], count); 1183 if (error) 1184 return error; 1185 1186 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 1187 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 1188 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 1189 1190 r = &sc->sc_cmap_red[index]; 1191 g = &sc->sc_cmap_green[index]; 1192 b = &sc->sc_cmap_blue[index]; 1193 1194 for (i = 0; i < count; i++) { 1195 mach64_putpalreg(sc, index, *r, *g, *b); 1196 index++; 1197 r++, g++, b++; 1198 } 1199 return 0; 1200 } 1201 1202 static int 1203 mach64_getcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1204 { 1205 u_int index = cm->index; 1206 u_int count = cm->count; 1207 int error; 1208 1209 if (index >= 255 || count > 256 || index + count > 256) 1210 return EINVAL; 1211 1212 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 1213 if (error) 1214 return error; 1215 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 1216 if (error) 1217 return error; 1218 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 1219 if (error) 1220 return error; 1221 1222 return 0; 1223 } 1224 1225 static int 1226 mach64_set_screentype(struct mach64_softc *sc, const struct wsscreen_descr *des) 1227 { 1228 struct mach64_crtcregs regs; 1229 1230 if (mach64_calc_crtcregs(sc, ®s, 1231 (struct videomode *)des->modecookie)) 1232 return 1; 1233 1234 mach64_set_crtcregs(sc, ®s); 1235 return 0; 1236 } 1237 1238 static int 1239 mach64_is_console(struct pci_attach_args *pa) 1240 { 1241 #ifdef __sparc__ 1242 int node; 1243 1244 node = PCITAG_NODE(pa->pa_tag); 1245 if (node == -1) 1246 return 0; 1247 1248 return (node == prom_instance_to_package(prom_stdout())); 1249 #elif defined(__powerpc__) 1250 /* check if we're the /chosen console device */ 1251 int chosen, stdout, node, us; 1252 1253 us = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 1254 chosen = OF_finddevice("/chosen"); 1255 OF_getprop(chosen, "stdout", &stdout, 4); 1256 node = OF_instance_to_package(stdout); 1257 return (us == node); 1258 #else 1259 return 1; 1260 #endif 1261 } 1262 1263 /* 1264 * wsdisplay_emulops 1265 */ 1266 1267 static void 1268 mach64_cursor(void *cookie, int on, int row, int col) 1269 { 1270 struct rasops_info *ri = cookie; 1271 struct mach64screen *scr = ri->ri_hw; 1272 struct mach64_softc *sc = scr->sc; 1273 int x, y, wi,he; 1274 1275 wi = ri->ri_font->fontwidth; 1276 he = ri->ri_font->fontheight; 1277 1278 if (scr->active) { 1279 x = scr->cursorcol * wi + ri->ri_xorigin; 1280 y = scr->cursorrow * he + ri->ri_yorigin; 1281 if (scr->cursordrawn) { 1282 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1283 0xff); 1284 scr->cursordrawn=0; 1285 } 1286 scr->cursorrow = row; 1287 scr->cursorcol = col; 1288 if ((scr->cursoron = on) != 0) 1289 { 1290 x = scr->cursorcol * wi + ri->ri_xorigin; 1291 y = scr->cursorrow * he + ri->ri_yorigin; 1292 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1293 0xff); 1294 scr->cursordrawn = 1; 1295 } 1296 } else { 1297 scr->cursoron = on; 1298 scr->cursorrow = row; 1299 scr->cursorcol = col; 1300 scr->cursordrawn = 0; 1301 } 1302 } 1303 1304 #if 0 1305 static int 1306 mach64_mapchar(void *cookie, int uni, u_int *index) 1307 { 1308 return 0; 1309 } 1310 #endif 1311 1312 static void 1313 mach64_putchar(void *cookie, int row, int col, u_int c, long attr) 1314 { 1315 struct rasops_info *ri = cookie; 1316 struct mach64screen *scr = ri->ri_hw; 1317 struct mach64_softc *sc = scr->sc; 1318 int offset = ri->ri_cols * row + col; 1319 1320 scr->attrs[offset] = attr; 1321 scr->chars[offset] = c; 1322 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1323 int fg, bg, uc; 1324 uint8_t *data; 1325 int x, y, wi, he; 1326 wi = ri->ri_font->fontwidth; 1327 he = ri->ri_font->fontheight; 1328 1329 #ifdef notdef 1330 scr->putchar(cookie,row,col,c,attr); 1331 #endif 1332 if (!CHAR_IN_FONT(c, ri->ri_font)) 1333 return; 1334 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf]; 1335 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf]; 1336 x = ri->ri_xorigin + col * wi; 1337 y = ri->ri_yorigin + row * he; 1338 if (c == 0x20) { 1339 mach64_rectfill(sc, x, y, wi, he, bg); 1340 } else { 1341 uc = c-ri->ri_font->firstchar; 1342 data = (uint8_t *)ri->ri_font->data + uc * 1343 ri->ri_fontscale; 1344 1345 mach64_setup_mono(sc, x, y, wi, he, fg, bg); 1346 mach64_feed_bytes(sc, ri->ri_fontscale, data); 1347 } 1348 } 1349 } 1350 1351 1352 static void 1353 mach64_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1354 { 1355 struct rasops_info *ri=cookie; 1356 struct mach64screen *scr=ri->ri_hw; 1357 struct mach64_softc *sc=scr->sc; 1358 int32_t xs,xd,y,width,height; 1359 int from, to; 1360 1361 from = srccol + row * ri->ri_cols; 1362 to = dstcol + row * ri->ri_cols; 1363 1364 memmove(&scr->attrs[to], &scr->attrs[from], ncols * sizeof(long)); 1365 memmove(&scr->chars[to], &scr->chars[from], ncols * sizeof(u_int)); 1366 1367 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1368 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1369 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1370 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1371 width = ri->ri_font->fontwidth * ncols; 1372 height = ri->ri_font->fontheight; 1373 mach64_bitblt(sc, xs, y, xd, y, width, height, MIX_SRC, 0xff); 1374 } 1375 } 1376 1377 static void 1378 mach64_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1379 { 1380 struct rasops_info *ri=cookie; 1381 struct mach64screen *scr=ri->ri_hw; 1382 struct mach64_softc *sc=scr->sc; 1383 int32_t x, y, width, height, fg, bg, ul; 1384 int start, end, i; 1385 1386 start = startcol + row * ri->ri_cols; 1387 end = start + ncols; 1388 1389 for (i = start; i < end; i++) { 1390 scr->attrs[i] = fillattr; 1391 scr->chars[i] = 0x20; 1392 } 1393 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1394 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1395 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1396 width = ri->ri_font->fontwidth * ncols; 1397 height = ri->ri_font->fontheight; 1398 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1399 1400 mach64_rectfill(sc, x, y, width, height, bg); 1401 } 1402 } 1403 1404 static void 1405 mach64_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1406 { 1407 struct rasops_info *ri=cookie; 1408 struct mach64screen *scr=ri->ri_hw; 1409 struct mach64_softc *sc=scr->sc; 1410 int32_t x, ys, yd, width, height; 1411 int from, to, len; 1412 1413 from = ri->ri_cols * srcrow; 1414 to = ri->ri_cols * dstrow; 1415 len = ri->ri_cols * nrows; 1416 1417 memmove(&scr->attrs[to], &scr->attrs[from], len*sizeof(long)); 1418 memmove(&scr->chars[to], &scr->chars[from], len*sizeof(u_int)); 1419 1420 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1421 x = ri->ri_xorigin; 1422 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1423 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1424 width = ri->ri_emuwidth; 1425 height = ri->ri_font->fontheight*nrows; 1426 mach64_bitblt(sc, x, ys, x, yd, width, height, MIX_SRC, 0xff); 1427 } 1428 } 1429 1430 static void 1431 mach64_eraserows(void *cookie, int row, int nrows, long fillattr) 1432 { 1433 struct rasops_info *ri=cookie; 1434 struct mach64screen *scr=ri->ri_hw; 1435 struct mach64_softc *sc=scr->sc; 1436 int32_t x, y, width, height, fg, bg, ul; 1437 int start, end, i; 1438 1439 start = ri->ri_cols * row; 1440 end = ri->ri_cols * (row + nrows); 1441 1442 for (i=start;i<end;i++) { 1443 scr->attrs[i] = fillattr; 1444 scr->chars[i] = 0x20; 1445 } 1446 1447 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1448 x = ri->ri_xorigin; 1449 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1450 width = ri->ri_emuwidth; 1451 height = ri->ri_font->fontheight * nrows; 1452 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1453 1454 mach64_rectfill(sc, x, y, width, height, bg); 1455 } 1456 } 1457 1458 static void 1459 mach64_bitblt(struct mach64_softc *sc, int xs, int ys, int xd, int yd, int width, int height, int rop, int mask) 1460 { 1461 uint32_t dest_ctl = 0; 1462 1463 wait_for_idle(sc); 1464 regw(sc, DP_WRITE_MASK, mask); /* XXX only good for 8 bit */ 1465 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1466 regw(sc, DP_SRC, FRGD_SRC_BLIT); 1467 regw(sc, DP_MIX, (rop & 0xffff) << 16); 1468 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1469 if (yd < ys) { 1470 dest_ctl = DST_Y_TOP_TO_BOTTOM; 1471 } else { 1472 ys += height - 1; 1473 yd += height - 1; 1474 dest_ctl = DST_Y_BOTTOM_TO_TOP; 1475 } 1476 if (xd < xs) { 1477 dest_ctl |= DST_X_LEFT_TO_RIGHT; 1478 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1479 } else { 1480 dest_ctl |= DST_X_RIGHT_TO_LEFT; 1481 xs += width - 1; 1482 xd += width - 1; 1483 regw(sc, SRC_CNTL, SRC_LINE_X_RIGHT_TO_LEFT); 1484 } 1485 regw(sc, DST_CNTL, dest_ctl); 1486 1487 regw(sc, SRC_Y_X, (xs << 16) | ys); 1488 regw(sc, SRC_WIDTH1, width); 1489 regw(sc, DST_Y_X, (xd << 16) | yd); 1490 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1491 } 1492 1493 static void 1494 mach64_setup_mono(struct mach64_softc *sc, int xd, int yd, int width, 1495 int height, uint32_t fg, uint32_t bg) 1496 { 1497 wait_for_idle(sc); 1498 regw(sc, DP_WRITE_MASK, 0xff); /* XXX only good for 8 bit */ 1499 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_1BPP | HOST_1BPP); 1500 regw(sc, DP_SRC, MONO_SRC_HOST | BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR); 1501 regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC); 1502 regw(sc, CLR_CMP_CNTL ,0); /* no transparency */ 1503 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1504 regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT); 1505 regw(sc, HOST_CNTL, HOST_BYTE_ALIGN); 1506 regw(sc, DP_BKGD_CLR, bg); 1507 regw(sc, DP_FRGD_CLR, fg); 1508 regw(sc, SRC_Y_X, 0); 1509 regw(sc, SRC_WIDTH1, width); 1510 regw(sc, DST_Y_X, (xd << 16) | yd); 1511 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1512 /* now feed the data into the chip */ 1513 } 1514 1515 static void 1516 mach64_feed_bytes(struct mach64_softc *sc, int count, uint8_t *data) 1517 { 1518 int i; 1519 uint32_t latch = 0, bork; 1520 int shift = 0; 1521 int reg = 0; 1522 1523 for (i=0;i<count;i++) { 1524 bork = data[i]; 1525 latch |= (bork << shift); 1526 if (shift == 24) { 1527 regw(sc, HOST_DATA0 + reg, latch); 1528 latch = 0; 1529 shift = 0; 1530 reg = (reg + 4) & 0x3c; 1531 } else 1532 shift += 8; 1533 } 1534 if (shift != 0) /* 24 */ 1535 regw(sc, HOST_DATA0 + reg, latch); 1536 } 1537 1538 1539 static void 1540 mach64_rectfill(struct mach64_softc *sc, int x, int y, int width, int height, 1541 int colour) 1542 { 1543 wait_for_idle(sc); 1544 regw(sc, DP_WRITE_MASK, 0xff); 1545 regw(sc, DP_FRGD_CLR, colour); 1546 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1547 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 1548 regw(sc, DP_MIX, MIX_SRC << 16); 1549 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1550 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1551 regw(sc, DST_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 1552 1553 regw(sc, SRC_Y_X, (x << 16) | y); 1554 regw(sc, SRC_WIDTH1, width); 1555 regw(sc, DST_Y_X, (x << 16) | y); 1556 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1557 } 1558 1559 static void 1560 mach64_clearscreen(struct mach64_softc *sc) 1561 { 1562 mach64_rectfill(sc, 0, 0, sc->virt_x, sc->virt_y, sc->sc_bg); 1563 } 1564 1565 1566 #if 0 1567 static void 1568 mach64_showpal(struct mach64_softc *sc) 1569 { 1570 int i, x = 0; 1571 1572 for (i = 0; i < 16; i++) { 1573 mach64_rectfill(sc, x, 0, 64, 64, i); 1574 x += 64; 1575 } 1576 } 1577 #endif 1578 1579 static int 1580 mach64_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1581 { 1582 if ((fg == 0) && (bg == 0)) 1583 { 1584 fg = WS_DEFAULT_FG; 1585 bg = WS_DEFAULT_BG; 1586 } 1587 *attrp = (fg & 0xf) << 24 | (bg & 0xf) << 16 | (flags & 0xff) << 8; 1588 return 0; 1589 } 1590 1591 /* 1592 * wsdisplay_accessops 1593 */ 1594 1595 static int 1596 mach64_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p) 1597 { 1598 struct mach64_softc *sc = v; 1599 struct wsdisplay_fbinfo *wdf; 1600 struct mach64screen *ms=sc->active; 1601 1602 switch (cmd) { 1603 case WSDISPLAYIO_GTYPE: 1604 /* XXX is this the right type to return? */ 1605 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 1606 return 0; 1607 1608 case WSDISPLAYIO_GINFO: 1609 wdf = (void *)data; 1610 wdf->height = ms->ri.ri_height; 1611 wdf->width = ms->ri.ri_width; 1612 wdf->depth = ms->ri.ri_depth; 1613 wdf->cmsize = 256; 1614 return 0; 1615 1616 case WSDISPLAYIO_GETCMAP: 1617 return mach64_getcmap(sc, 1618 (struct wsdisplay_cmap *)data); 1619 1620 case WSDISPLAYIO_PUTCMAP: 1621 return mach64_putcmap(sc, 1622 (struct wsdisplay_cmap *)data); 1623 1624 /* PCI config read/write passthrough. */ 1625 case PCI_IOC_CFGREAD: 1626 case PCI_IOC_CFGWRITE: 1627 return (pci_devioctl(sc->sc_pc, sc->sc_pcitag, 1628 cmd, data, flag, p)); 1629 1630 case WSDISPLAYIO_SMODE: 1631 { 1632 int new_mode = *(int*)data; 1633 1634 if (new_mode != sc->sc_mode) 1635 { 1636 sc->sc_mode = new_mode; 1637 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1638 { 1639 /* 1640 * reset a few things the 1641 * Xserver might have screwed up 1642 */ 1643 mach64_restore_screen(ms, 1644 ms->type, ms->chars); 1645 mach64_cursor(ms, ms->cursoron, 1646 ms->cursorrow, 1647 ms->cursorcol); 1648 } 1649 } 1650 } 1651 return 0; 1652 1653 case WSDISPLAYIO_GETWSCHAR: 1654 return mach64_getwschar(sc, 1655 (struct wsdisplay_char *)data); 1656 1657 case WSDISPLAYIO_PUTWSCHAR: 1658 return mach64_putwschar(sc, 1659 (struct wsdisplay_char *)data); 1660 } 1661 return EPASSTHROUGH; 1662 } 1663 1664 static paddr_t 1665 mach64_mmap(void *v, off_t offset, int prot) 1666 { 1667 struct mach64_softc *sc = v; 1668 paddr_t pa; 1669 pcireg_t reg; 1670 1671 #ifndef __sparc64__ 1672 /* 1673 *'regular' framebuffer mmap()ing 1674 * disabled on sparc64 because some ATI firmware likes to map some PCI 1675 * resources to addresses that would collide with this ( like some Rage 1676 * IIc which uses 0x2000 for the 2nd register block ) 1677 * Other 64bit architectures might run into similar problems. 1678 */ 1679 if (offset<sc->sc_apersize) { 1680 pa = bus_space_mmap(sc->sc_memt, sc->sc_aperbase+offset, 0, 1681 prot, BUS_SPACE_MAP_LINEAR); 1682 return pa; 1683 } 1684 #endif 1685 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x18) & 0xffffff00); 1686 if (reg != sc->sc_regphys) { 1687 printf("%s: BAR 0x18 changed! (%x %x)\n", 1688 sc->sc_dev.dv_xname, (uint32_t)sc->sc_regphys, 1689 (uint32_t)reg); 1690 sc->sc_regphys = reg; 1691 } 1692 1693 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x10) & 0xffffff00); 1694 if (reg != sc->sc_aperphys) { 1695 printf("%s: BAR 0x10 changed! (%x %x)\n", 1696 sc->sc_dev.dv_xname, (uint32_t)sc->sc_aperphys, 1697 (uint32_t)reg); 1698 sc->sc_aperphys = reg; 1699 } 1700 1701 #if 0 1702 /* evil hack to allow mmap()ing other devices as well */ 1703 if ((offset > 0x80000000) && (offset <= 0xffffffff)) { 1704 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1705 BUS_SPACE_MAP_LINEAR); 1706 return pa; 1707 } 1708 #endif 1709 1710 if ((offset >= sc->sc_aperphys) && 1711 (offset < (sc->sc_aperphys + sc->sc_apersize))) { 1712 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1713 BUS_SPACE_MAP_LINEAR); 1714 return pa; 1715 } 1716 1717 if ((offset >= sc->sc_regphys) && 1718 (offset < (sc->sc_regphys + sc->sc_regsize))) { 1719 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1720 BUS_SPACE_MAP_LINEAR); 1721 return pa; 1722 } 1723 1724 return -1; 1725 } 1726 1727 static int 1728 mach64_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 1729 int *curxp, int *curyp, long *defattrp) 1730 { 1731 struct mach64_softc *sc = v; 1732 struct mach64screen *scr; 1733 struct rasops_info *ri; 1734 int cnt; 1735 1736 scr = malloc(sizeof(struct mach64screen), M_DEVBUF, M_WAITOK | M_ZERO); 1737 mach64_init_screen(sc, scr, type, 0, defattrp, sc->active == NULL); 1738 ri = &scr->ri; 1739 1740 ri->ri_hw = scr; 1741 #ifdef notdef 1742 ri->ri_bits = (void *)sc->sc_aperbase; 1743 #endif 1744 rasops_init(ri, sc->sc_my_mode->vdisplay / 8, 1745 sc->sc_my_mode->hdisplay / 8); 1746 1747 rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight, 1748 ri->ri_width / ri->ri_font->fontwidth); 1749 cnt = ri->ri_cols * ri->ri_rows; 1750 1751 set_address(ri, sc->sc_aperbase); 1752 mach64_allocattr(ri, WS_DEFAULT_FG, WS_DEFAULT_BG, 0, defattrp); 1753 1754 scr->ri.ri_ops.copyrows = mach64_copyrows; 1755 scr->ri.ri_ops.eraserows = mach64_eraserows; 1756 scr->ri.ri_ops.copycols = mach64_copycols; 1757 scr->ri.ri_ops.erasecols = mach64_erasecols; 1758 scr->ri.ri_ops.putchar = mach64_putchar; 1759 scr->ri.ri_ops.cursor = mach64_cursor; 1760 1761 scr->attrs = malloc(cnt * (sizeof(long) + sizeof(u_int)), 1762 M_DEVBUF, M_WAITOK); 1763 scr->chars = (u_int *)&scr->attrs[cnt]; 1764 mach64_eraserows(ri, 0, ri->ri_rows, *defattrp); 1765 1766 if (sc->active == NULL) { 1767 scr->active = 1; 1768 sc->active = scr; 1769 sc->currenttype = type; 1770 } 1771 1772 *cookiep = scr; 1773 *curxp = scr->cursorcol; 1774 *curyp = scr->cursorrow; 1775 1776 return 0; 1777 } 1778 1779 static void 1780 mach64_free_screen(void *v, void *cookie) 1781 { 1782 struct mach64_softc *sc = v; 1783 struct mach64screen *scr = cookie; 1784 1785 LIST_REMOVE(scr, next); 1786 #if 0 1787 if (scr != &mach64_console_screen) { 1788 free(scr->attrs, M_DEVBUF); 1789 free(scr, M_DEVBUF); 1790 } else 1791 panic("mach64_free_screen: console"); 1792 #endif 1793 if (sc->active == scr) 1794 sc->active = 0; 1795 } 1796 1797 static int 1798 mach64_show_screen(void *v, void *cookie, int waitok, 1799 void (*cb)(void *, int, int), void *cbarg) 1800 { 1801 struct mach64_softc *sc = v; 1802 struct mach64screen *scr, *oldscr; 1803 1804 scr = cookie; 1805 oldscr = sc->active; 1806 if (scr == oldscr) 1807 return 0; 1808 1809 sc->wanted = scr; 1810 sc->switchcb = cb; 1811 sc->switchcbarg = cbarg; 1812 if (cb) { 1813 callout_reset(&sc->switch_callout, 0, 1814 (void(*)(void *))mach64_switch_screen, sc); 1815 return EAGAIN; 1816 } 1817 1818 mach64_switch_screen(sc); 1819 1820 return 0; 1821 } 1822 1823 static void 1824 mach64_switch_screen(struct mach64_softc *sc) 1825 { 1826 struct mach64screen *scr, *oldscr; 1827 const struct wsscreen_descr *type; 1828 1829 scr = sc->wanted; 1830 if (!scr) { 1831 printf("mach64_switch_screen: disappeared\n"); 1832 (*sc->switchcb)(sc->switchcbarg, EIO, 0); 1833 return; 1834 } 1835 type = scr->type; 1836 oldscr = sc->active; /* can be NULL! */ 1837 #ifdef DIAGNOSTIC 1838 if (oldscr) { 1839 if (!oldscr->active) 1840 panic("mach64_switch_screen: not active"); 1841 if (oldscr->type != sc->currenttype) 1842 panic("mach64_switch_screen: bad type %p != %p", 1843 oldscr->type, sc->currenttype); 1844 } 1845 #endif 1846 if (scr == oldscr) 1847 return; 1848 1849 #ifdef DIAGNOSTIC 1850 /* XXX: this one bites us at reboot */ 1851 #ifdef notdef 1852 if (scr->active) 1853 panic("mach64_switch_screen: active"); 1854 #endif 1855 #endif 1856 1857 if (oldscr) 1858 oldscr->active = 0; 1859 1860 if (sc->currenttype != type) { 1861 mach64_set_screentype(sc, type); 1862 sc->currenttype = type; 1863 } 1864 1865 scr->dispoffset = scr->mindispoffset; 1866 1867 if (!oldscr || (scr->dispoffset != oldscr->dispoffset)) { 1868 1869 } 1870 1871 /* Clear the entire screen. */ 1872 1873 scr->active = 1; 1874 mach64_restore_screen(scr, type, scr->chars); 1875 1876 sc->active = scr; 1877 1878 scr->ri.ri_ops.cursor(scr, scr->cursoron, scr->cursorrow, 1879 scr->cursorcol); 1880 1881 sc->wanted = 0; 1882 if (sc->switchcb) 1883 (*sc->switchcb)(sc->switchcbarg, 0, 0); 1884 } 1885 1886 static void 1887 mach64_restore_screen(struct mach64screen *scr, 1888 const struct wsscreen_descr *type, u_int *mem) 1889 { 1890 int i, j, offset = 0; 1891 u_int *charptr = scr->chars; 1892 long *attrptr = scr->attrs; 1893 1894 mach64_clearscreen(scr->sc); 1895 for (i = 0; i < scr->ri.ri_rows; i++) { 1896 for (j = 0; j < scr->ri.ri_cols; j++) { 1897 mach64_putchar(scr, i, j, charptr[offset], 1898 attrptr[offset]); 1899 offset++; 1900 } 1901 } 1902 scr->cursordrawn = 0; 1903 } 1904 1905 /* set ri->ri_bits according to fb, ri_xorigin and ri_yorigin */ 1906 static void 1907 set_address(struct rasops_info *ri, bus_addr_t fb) 1908 { 1909 #ifdef notdef 1910 printf(" %d %d %d\n", ri->ri_xorigin, ri->ri_yorigin, ri->ri_stride); 1911 #endif 1912 ri->ri_bits = (void *)((u_long)fb + ri->ri_stride * ri->ri_yorigin + 1913 ri->ri_xorigin); 1914 } 1915 1916 static int 1917 mach64_getwschar(void *cookie, struct wsdisplay_char *wsc) 1918 { 1919 struct mach64_softc *sc = cookie; 1920 struct mach64screen *scr = sc->active; 1921 int fg, bg, fl; 1922 1923 if (scr){ 1924 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1925 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1926 int pos = scr->ri.ri_cols * wsc->row + wsc->col; 1927 1928 wsc->letter = scr->chars[pos]; 1929 rasops_unpack_attr(scr->attrs[pos], &fg, &bg, &fl); 1930 wsc->foreground = fg; 1931 wsc->background = bg; 1932 wsc->flags = fl; 1933 return 0; 1934 } 1935 } 1936 return EINVAL; 1937 } 1938 1939 static int 1940 mach64_putwschar(void *cookie, struct wsdisplay_char *wsc) 1941 { 1942 struct mach64_softc *sc=cookie; 1943 struct mach64screen *scr=sc->active; 1944 long attr; 1945 1946 if (scr){ 1947 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1948 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1949 mach64_allocattr(&scr->ri, wsc->foreground, 1950 wsc->background, wsc->flags, &attr); 1951 mach64_putchar(&scr->ri, wsc->row, wsc->col, 1952 wsc->letter, attr); 1953 return 0; 1954 } 1955 } 1956 return EINVAL; 1957 } 1958 1959 #if 0 1960 static int 1961 mach64_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1962 { 1963 1964 return 0; 1965 } 1966 #endif 1967 1968 void 1969 machfb_blank(struct mach64_softc *sc, int blank) 1970 { 1971 uint32_t reg; 1972 1973 #define MACH64_BLANK (CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | CRTC_VSYNC_DIS) 1974 1975 switch (blank) 1976 { 1977 case 0: 1978 reg = regr(sc, CRTC_GEN_CNTL); 1979 regw(sc, CRTC_GEN_CNTL, reg & ~(MACH64_BLANK)); 1980 break; 1981 case 1: 1982 reg = regr(sc, CRTC_GEN_CNTL); 1983 regw(sc, CRTC_GEN_CNTL, reg | (MACH64_BLANK)); 1984 break; 1985 default: 1986 break; 1987 } 1988 } 1989
Indexes created Thu Oct 02 14:10:14 GMT 2025