machfb.c revision 1.39
1 /* $NetBSD: machfb.c,v 1.39 2006/04/05 15:23:06 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Bang Jun-Young 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Some code is derived from ATI Rage Pro and Derivatives Programmer's Guide. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, 36 "$NetBSD: machfb.c,v 1.39 2006/04/05 15:23:06 drochner Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 #include <sys/callout.h> 44 45 #ifdef __sparc__ 46 #include <machine/promlib.h> 47 #endif 48 49 #ifdef __powerpc__ 50 #include <dev/ofw/openfirm.h> 51 #include <dev/ofw/ofw_pci.h> 52 #endif 53 54 #include <dev/ic/videomode.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcidevs.h> 59 #include <dev/pci/pciio.h> 60 #include <dev/pci/machfbreg.h> 61 62 #include <dev/wscons/wsdisplayvar.h> 63 #include <dev/wscons/wsconsio.h> 64 #include <dev/wsfont/wsfont.h> 65 #include <dev/rasops/rasops.h> 66 67 #define MACH64_REG_SIZE 1024 68 #define MACH64_REG_OFF 0x7ffc00 69 70 #define NBARS 3 /* number of Mach64 PCI BARs */ 71 72 struct vga_bar { 73 bus_addr_t vb_base; 74 pcireg_t vb_busaddr; 75 bus_size_t vb_size; 76 pcireg_t vb_type; 77 int vb_flags; 78 }; 79 80 struct mach64_softc { 81 struct device sc_dev; 82 pci_chipset_tag_t sc_pc; 83 pcitag_t sc_pcitag; 84 85 struct vga_bar sc_bars[NBARS]; 86 struct vga_bar sc_rom; 87 88 #define sc_aperbase sc_bars[0].vb_base 89 #define sc_apersize sc_bars[0].vb_size 90 #define sc_aperphys sc_bars[0].vb_busaddr 91 92 #define sc_iobase sc_bars[1].vb_base 93 #define sc_iosize sc_bars[1].vb_size 94 95 #define sc_regbase sc_bars[2].vb_base 96 #define sc_regsize sc_bars[2].vb_size 97 #define sc_regphys sc_bars[2].vb_busaddr 98 99 bus_space_tag_t sc_regt; 100 bus_space_tag_t sc_memt; 101 bus_space_handle_t sc_regh; 102 bus_space_handle_t sc_memh; 103 104 size_t memsize; 105 int memtype; 106 107 int sc_mode; 108 int sc_bg; 109 110 int has_dsp; 111 int bits_per_pixel; 112 int max_x; 113 int max_y; 114 int virt_x; 115 int virt_y; 116 int color_depth; 117 118 int mem_freq; 119 int ramdac_freq; 120 int ref_freq; 121 122 int ref_div; 123 int log2_vclk_post_div; 124 int vclk_post_div; 125 int vclk_fb_div; 126 int mclk_post_div; 127 int mclk_fb_div; 128 129 struct videomode *sc_my_mode; 130 struct mach64screen *wanted; 131 struct mach64screen *active; 132 void (*switchcb)(void *, int, int); 133 void *switchcbarg; 134 struct callout switch_callout; 135 LIST_HEAD(, mach64screen) screens; 136 const struct wsscreen_descr *currenttype; 137 u_char sc_cmap_red[256]; 138 u_char sc_cmap_green[256]; 139 u_char sc_cmap_blue[256]; 140 int sc_dacw; 141 }; 142 143 struct mach64screen { 144 struct rasops_info ri; 145 LIST_ENTRY(mach64screen) next; 146 struct mach64_softc *sc; 147 const struct wsscreen_descr *type; 148 int active; 149 u_int *chars; 150 long *attrs; 151 int dispoffset; 152 int mindispoffset; 153 int maxdispoffset; 154 155 int cursoron; 156 int cursorcol; 157 int cursorrow; 158 int cursordrawn; 159 }; 160 161 struct mach64_crtcregs { 162 u_int32_t h_total_disp; 163 u_int32_t h_sync_strt_wid; 164 u_int32_t v_total_disp; 165 u_int32_t v_sync_strt_wid; 166 u_int32_t gen_cntl; 167 u_int32_t clock_cntl; 168 u_int32_t color_depth; 169 u_int32_t dot_clock; 170 }; 171 172 struct { 173 u_int16_t chip_id; 174 u_int32_t ramdac_freq; 175 } static const mach64_info[] = { 176 { PCI_PRODUCT_ATI_MACH64_CT, 135000 }, 177 { PCI_PRODUCT_ATI_RAGE_PRO_AGP, 230000 }, 178 { PCI_PRODUCT_ATI_RAGE_PRO_AGP1X, 230000 }, 179 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_B, 230000 }, 180 { PCI_PRODUCT_ATI_RAGE_XL_AGP, 230000 }, 181 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_P, 230000 }, 182 { PCI_PRODUCT_ATI_RAGE_PRO_PCI_L, 230000 }, 183 { PCI_PRODUCT_ATI_RAGE_XL_PCI, 230000 }, 184 { PCI_PRODUCT_ATI_RAGE_II, 135000 }, 185 { PCI_PRODUCT_ATI_RAGE_IIP, 200000 }, 186 { PCI_PRODUCT_ATI_RAGE_IIC_PCI, 230000 }, 187 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_B, 230000 }, 188 { PCI_PRODUCT_ATI_RAGE_IIC_AGP_P, 230000 }, 189 { PCI_PRODUCT_ATI_RAGE_LT_PRO_AGP, 230000 }, 190 { PCI_PRODUCT_ATI_RAGE_MOB_M3_PCI, 230000 }, 191 { PCI_PRODUCT_ATI_RAGE_MOB_M3_AGP, 230000 }, 192 { PCI_PRODUCT_ATI_RAGE_LT, 230000 }, 193 { PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI, 230000 }, 194 { PCI_PRODUCT_ATI_RAGE_MOBILITY, 230000 }, 195 { PCI_PRODUCT_ATI_RAGE_LT_PRO, 230000 }, 196 { PCI_PRODUCT_ATI_MACH64_VT, 170000 }, 197 { PCI_PRODUCT_ATI_MACH64_VTB, 200000 }, 198 { PCI_PRODUCT_ATI_MACH64_VT4, 230000 } 199 }; 200 201 static int mach64_chip_id, mach64_chip_rev; 202 static struct videomode default_mode = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 203 204 static const char *mach64_memtype_names[] = { 205 "(N/A)", "DRAM", "EDO DRAM", "EDO DRAM", "SDRAM", "SGRAM", "WRAM", 206 "(unknown type)" 207 }; 208 209 static struct videomode mach64_modes[] = { 210 /* 640x400 @ 70 Hz, 31.5 kHz */ 211 { 25175, 640, 664, 760, 800, 400, 409, 411, 450, 0 }, 212 /* 640x480 @ 72 Hz, 36.5 kHz */ 213 { 25175, 640, 664, 760, 800, 480, 491, 493, 525, 0 }, 214 /* 800x600 @ 72 Hz, 48.0 kHz */ 215 { 50000, 800, 856, 976, 1040, 600, 637, 643, 666, 216 VID_PHSYNC | VID_PVSYNC }, 217 /* 1024x768 @ 70 Hz, 56.5 kHz */ 218 { 75000, 1024, 1048, 1184, 1328, 768, 771, 777, 806, 219 VID_NHSYNC | VID_NVSYNC }, 220 /* 1152x864 @ 70 Hz, 62.4 kHz */ 221 { 92000, 1152, 1208, 1368, 1474, 864, 865, 875, 895, 0 }, 222 /* 1280x1024 @ 70 Hz, 74.59 kHz */ 223 { 126500, 1280, 1312, 1472, 1696, 1024, 1032, 1040, 1068, 224 VID_NHSYNC | VID_NVSYNC } 225 }; 226 227 extern const u_char rasops_cmap[768]; 228 229 static int mach64_match(struct device *, struct cfdata *, void *); 230 static void mach64_attach(struct device *, struct device *, void *); 231 232 CFATTACH_DECL(machfb, sizeof(struct mach64_softc), mach64_match, mach64_attach, 233 NULL, NULL); 234 235 static void mach64_init(struct mach64_softc *); 236 static int mach64_get_memsize(struct mach64_softc *); 237 static int mach64_get_max_ramdac(struct mach64_softc *); 238 239 #if defined(__sparc__) || defined(__powerpc) 240 static void mach64_get_mode(struct mach64_softc *, struct videomode *); 241 #endif 242 243 static int mach64_calc_crtcregs(struct mach64_softc *, 244 struct mach64_crtcregs *, 245 struct videomode *); 246 static void mach64_set_crtcregs(struct mach64_softc *, 247 struct mach64_crtcregs *); 248 249 static int mach64_modeswitch(struct mach64_softc *, struct videomode *); 250 static void mach64_set_dsp(struct mach64_softc *); 251 static void mach64_set_pll(struct mach64_softc *, int); 252 static void mach64_reset_engine(struct mach64_softc *); 253 static void mach64_init_engine(struct mach64_softc *); 254 #if 0 255 static void mach64_adjust_frame(struct mach64_softc *, int, int); 256 #endif 257 static void mach64_init_lut(struct mach64_softc *); 258 static void mach64_switch_screen(struct mach64_softc *); 259 static void mach64_init_screen(struct mach64_softc *, struct mach64screen *, 260 const struct wsscreen_descr *, int, long *, 261 int); 262 static void mach64_restore_screen(struct mach64screen *, 263 const struct wsscreen_descr *, u_int *); 264 static int mach64_set_screentype(struct mach64_softc *, 265 const struct wsscreen_descr *); 266 static int mach64_is_console(struct pci_attach_args *); 267 268 static void mach64_cursor(void *, int, int, int); 269 #if 0 270 static int mach64_mapchar(void *, int, u_int *); 271 #endif 272 static void mach64_putchar(void *, int, int, u_int, long); 273 static void mach64_copycols(void *, int, int, int, int); 274 static void mach64_erasecols(void *, int, int, int, long); 275 static void mach64_copyrows(void *, int, int, int); 276 static void mach64_eraserows(void *, int, int, long); 277 static int mach64_allocattr(void *, int, int, int, long *); 278 static void mach64_clearscreen(struct mach64_softc *); 279 280 static int mach64_putcmap(struct mach64_softc *, struct wsdisplay_cmap *); 281 static int mach64_getcmap(struct mach64_softc *, struct wsdisplay_cmap *); 282 static int mach64_putpalreg(struct mach64_softc *, uint8_t, uint8_t, 283 uint8_t, uint8_t); 284 static void mach64_bitblt(struct mach64_softc *, int, int, int, int, int, 285 int, int, int) ; 286 static void mach64_rectfill(struct mach64_softc *, int, int, int, int, int); 287 static void mach64_setup_mono(struct mach64_softc *, int, int, int, int, 288 uint32_t, uint32_t); 289 static void mach64_feed_bytes(struct mach64_softc *, int, uint8_t *); 290 #if 0 291 static void mach64_showpal(struct mach64_softc *); 292 #endif 293 static int mach64_getwschar(void *, struct wsdisplay_char *); 294 static int mach64_putwschar(void *, struct wsdisplay_char *); 295 296 static void set_address(struct rasops_info *, bus_addr_t); 297 static void machfb_blank(struct mach64_softc *, int); 298 299 #if 0 300 static const struct wsdisplay_emulops mach64_emulops = { 301 mach64_cursor, 302 mach64_mapchar, 303 mach64_putchar, 304 mach64_copycols, 305 mach64_erasecols, 306 mach64_copyrows, 307 mach64_eraserows, 308 mach64_allocattr, 309 }; 310 #endif 311 312 static struct wsscreen_descr mach64_defaultscreen = { 313 "default", 314 80, 30, 315 NULL, 316 8, 16, 317 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 318 &default_mode 319 }, mach64_80x25_screen = { 320 "80x25", 80, 25, 321 NULL, 322 8, 16, 323 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 324 &mach64_modes[0] 325 }, mach64_80x30_screen = { 326 "80x30", 80, 30, 327 NULL, 328 8, 16, 329 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 330 &mach64_modes[1] 331 }, mach64_80x40_screen = { 332 "80x40", 80, 40, 333 NULL, 334 8, 10, 335 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 336 &mach64_modes[0] 337 }, mach64_80x50_screen = { 338 "80x50", 80, 50, 339 NULL, 340 8, 8, 341 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 342 &mach64_modes[0] 343 }, mach64_100x37_screen = { 344 "100x37", 100, 37, 345 NULL, 346 8, 16, 347 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 348 &mach64_modes[2] 349 }, mach64_128x48_screen = { 350 "128x48", 128, 48, 351 NULL, 352 8, 16, 353 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 354 &mach64_modes[3] 355 }, mach64_144x54_screen = { 356 "144x54", 144, 54, 357 NULL, 358 8, 16, 359 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 360 &mach64_modes[4] 361 }, mach64_160x64_screen = { 362 "160x54", 160, 64, 363 NULL, 364 8, 16, 365 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 366 &mach64_modes[5] 367 }; 368 369 static const struct wsscreen_descr *_mach64_scrlist[] = { 370 &mach64_defaultscreen, 371 &mach64_80x25_screen, 372 &mach64_80x30_screen, 373 &mach64_80x40_screen, 374 &mach64_80x50_screen, 375 &mach64_100x37_screen, 376 &mach64_128x48_screen, 377 &mach64_144x54_screen, 378 &mach64_160x64_screen 379 }; 380 381 static struct wsscreen_list mach64_screenlist = { 382 sizeof(_mach64_scrlist) / sizeof(struct wsscreen_descr *), 383 _mach64_scrlist 384 }; 385 386 static int mach64_ioctl(void *, u_long, caddr_t, int, struct lwp *); 387 static paddr_t mach64_mmap(void *, off_t, int); 388 static int mach64_alloc_screen(void *, const struct wsscreen_descr *, 389 void **, int *, int *, long *); 390 static void mach64_free_screen(void *, void *); 391 static int mach64_show_screen(void *, void *, int, 392 void (*)(void *, int, int), void *); 393 #if 0 394 static int mach64_load_font(void *, void *, struct wsdisplay_font *); 395 #endif 396 397 static struct wsdisplay_accessops mach64_accessops = { 398 mach64_ioctl, 399 mach64_mmap, 400 mach64_alloc_screen, 401 mach64_free_screen, 402 mach64_show_screen, 403 NULL, /* load_font */ 404 NULL, /* polls */ 405 mach64_getwschar, /* getwschar */ 406 mach64_putwschar, /* putwschar */ 407 NULL, /* scroll */ 408 }; 409 410 /* 411 * Inline functions for getting access to register aperture. 412 */ 413 414 static inline u_int32_t 415 regr(struct mach64_softc *sc, u_int32_t index) 416 { 417 return bus_space_read_4(sc->sc_regt, sc->sc_regh, index); 418 } 419 420 static inline u_int8_t 421 regrb(struct mach64_softc *sc, u_int32_t index) 422 { 423 return bus_space_read_1(sc->sc_regt, sc->sc_regh, index); 424 } 425 426 static inline void 427 regw(struct mach64_softc *sc, u_int32_t index, u_int32_t data) 428 { 429 bus_space_write_4(sc->sc_regt, sc->sc_regh, index, data); 430 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 4, 431 BUS_SPACE_BARRIER_WRITE); 432 } 433 434 static inline void 435 regwb(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 436 { 437 bus_space_write_1(sc->sc_regt, sc->sc_regh, index, data); 438 bus_space_barrier(sc->sc_regt, sc->sc_regh, index, 1, 439 BUS_SPACE_BARRIER_WRITE); 440 } 441 442 static inline void 443 regwb_pll(struct mach64_softc *sc, u_int32_t index, u_int8_t data) 444 { 445 regwb(sc, CLOCK_CNTL + 1, (index << 2) | PLL_WR_EN); 446 regwb(sc, CLOCK_CNTL + 2, data); 447 regwb(sc, CLOCK_CNTL + 1, (index << 2) & ~PLL_WR_EN); 448 } 449 450 static inline void 451 wait_for_fifo(struct mach64_softc *sc, u_int8_t v) 452 { 453 while ((regr(sc, FIFO_STAT) & 0xffff) > (0x8000 >> v)) 454 continue; 455 } 456 457 static inline void 458 wait_for_idle(struct mach64_softc *sc) 459 { 460 wait_for_fifo(sc, 16); 461 while ((regr(sc, GUI_STAT) & 1) != 0) 462 continue; 463 } 464 465 static int 466 mach64_match(struct device *parent, struct cfdata *match, void *aux) 467 { 468 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 469 int i; 470 471 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY || 472 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA) 473 return 0; 474 475 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 476 if (PCI_PRODUCT(pa->pa_id) == mach64_info[i].chip_id) { 477 mach64_chip_id = PCI_PRODUCT(pa->pa_id); 478 mach64_chip_rev = PCI_REVISION(pa->pa_class); 479 return 100; 480 } 481 482 return 0; 483 } 484 485 static void 486 mach64_attach(struct device *parent, struct device *self, void *aux) 487 { 488 struct mach64_softc *sc = (void *)self; 489 struct pci_attach_args *pa = aux; 490 struct mach64screen *console_screen; 491 void *cookie; 492 char devinfo[256]; 493 int bar, reg, id; 494 struct wsemuldisplaydev_attach_args aa; 495 long defattr; 496 int setmode, console, x, y; 497 pcireg_t screg; 498 499 sc->sc_pc = pa->pa_pc; 500 sc->sc_pcitag = pa->pa_tag; 501 sc->sc_dacw = -1; 502 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 503 504 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 505 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 506 507 /* enable memory and IO access */ 508 screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 509 screg |= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 510 pci_conf_write(sc->sc_pc, sc->sc_pcitag,PCI_COMMAND_STATUS_REG,screg); 511 512 for (bar = 0; bar < NBARS; bar++) { 513 reg = PCI_MAPREG_START + (bar * 4); 514 sc->sc_bars[bar].vb_type = pci_mapreg_type(sc->sc_pc, 515 sc->sc_pcitag, reg); 516 (void)pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, reg, 517 sc->sc_bars[bar].vb_type, &sc->sc_bars[bar].vb_base, 518 &sc->sc_bars[bar].vb_size, &sc->sc_bars[bar].vb_flags); 519 sc->sc_bars[bar].vb_busaddr = pci_conf_read(sc->sc_pc, 520 sc->sc_pcitag, reg)&0xfffffff0; 521 } 522 sc->sc_memt = pa->pa_memt; 523 524 mach64_init(sc); 525 526 printf("%s: %d MB aperture at 0x%08x, %d KB registers at 0x%08x\n", 527 sc->sc_dev.dv_xname, (u_int)(sc->sc_apersize / (1024 * 1024)), 528 (u_int)sc->sc_aperphys, (u_int)(sc->sc_regsize / 1024), 529 (u_int)sc->sc_regphys); 530 531 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_CT || 532 ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 533 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 534 (mach64_chip_rev & 0x07) == 0)) 535 sc->has_dsp = 0; 536 else 537 sc->has_dsp = 1; 538 539 sc->memsize = mach64_get_memsize(sc); 540 if (sc->memsize == 8192) 541 /* The last page is used as register aperture. */ 542 sc->memsize -= 4; 543 sc->memtype = regr(sc, CONFIG_STAT0) & 0x07; 544 545 /* XXX is there any way to calculate reference frequency from 546 known values? */ 547 if ((mach64_chip_id == PCI_PRODUCT_ATI_RAGE_XL_PCI) || 548 ((mach64_chip_id >= PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI) && 549 (mach64_chip_id <= PCI_PRODUCT_ATI_RAGE_LT_PRO))) { 550 printf("%s: ref_freq=29.498MHz\n", sc->sc_dev.dv_xname); 551 sc->ref_freq = 29498; 552 } else 553 sc->ref_freq = 14318; 554 555 regwb(sc, CLOCK_CNTL + 1, PLL_REF_DIV << 2); 556 sc->ref_div = regrb(sc, CLOCK_CNTL + 2); 557 regwb(sc, CLOCK_CNTL + 1, MCLK_FB_DIV << 2); 558 sc->mclk_fb_div = regrb(sc, CLOCK_CNTL + 2); 559 sc->mem_freq = (2 * sc->ref_freq * sc->mclk_fb_div) / 560 (sc->ref_div * 2); 561 sc->mclk_post_div = (sc->mclk_fb_div * 2 * sc->ref_freq) / 562 (sc->mem_freq * sc->ref_div); 563 sc->ramdac_freq = mach64_get_max_ramdac(sc); 564 printf("%s: %ld KB %s %d.%d MHz, maximum RAMDAC clock %d MHz\n", 565 sc->sc_dev.dv_xname, (u_long)sc->memsize, 566 mach64_memtype_names[sc->memtype], 567 sc->mem_freq / 1000, sc->mem_freq % 1000, 568 sc->ramdac_freq / 1000); 569 570 id = regr(sc, CONFIG_CHIP_ID) & 0xffff; 571 if (id != mach64_chip_id) { 572 printf("%s: chip ID mismatch, 0x%x != 0x%x\n", 573 sc->sc_dev.dv_xname, id, mach64_chip_id); 574 return; 575 } 576 577 console = mach64_is_console(pa); 578 #ifdef DIAGNOSTIC 579 printf("gen_cntl: %08x\n", regr(sc, CRTC_GEN_CNTL)); 580 #endif 581 #if defined(__sparc__) || defined(__powerpc__) 582 if (console) { 583 mach64_get_mode(sc, &default_mode); 584 setmode = 0; 585 sc->sc_my_mode = &default_mode; 586 } else { 587 /* fill in default_mode if it's empty */ 588 if (default_mode.dot_clock == 0) { 589 memcpy(&default_mode, &mach64_modes[4], 590 sizeof(default_mode)); 591 } 592 sc->sc_my_mode = &default_mode; 593 setmode = 1; 594 } 595 #else 596 if (default_mode.dot_clock == 0) { 597 memcpy(&default_mode, &mach64_modes[0], 598 sizeof(default_mode)); 599 } 600 sc->sc_my_mode = &mach64_modes[0]; 601 setmode = 1; 602 #endif 603 604 sc->bits_per_pixel = 8; 605 sc->virt_x = sc->sc_my_mode->hdisplay; 606 sc->virt_y = sc->sc_my_mode->vdisplay; 607 sc->max_x = sc->virt_x - 1; 608 sc->max_y = (sc->memsize * 1024) / 609 (sc->virt_x * (sc->bits_per_pixel / 8)) - 1; 610 611 sc->color_depth = CRTC_PIX_WIDTH_8BPP; 612 613 mach64_init_engine(sc); 614 #if 0 615 mach64_adjust_frame(0, 0); 616 if (sc->bits_per_pixel == 8) 617 mach64_init_lut(sc); 618 #endif 619 620 printf("%s: initial resolution %dx%d at %d bpp\n", sc->sc_dev.dv_xname, 621 sc->sc_my_mode->hdisplay, sc->sc_my_mode->vdisplay, 622 sc->bits_per_pixel); 623 624 wsfont_init(); 625 626 if (console) { 627 sc->sc_bg = WS_DEFAULT_BG; 628 mach64_alloc_screen(sc, &mach64_defaultscreen, &cookie, &x, &y, &defattr); 629 console_screen = cookie; 630 mach64_defaultscreen.nrows = console_screen->ri.ri_rows; 631 mach64_defaultscreen.ncols = console_screen->ri.ri_cols; 632 mach64_defaultscreen.capabilities = console_screen->ri.ri_caps; 633 mach64_defaultscreen.textops = &console_screen->ri.ri_ops; 634 635 wsdisplay_cnattach(&mach64_defaultscreen, 636 &console_screen->ri, x, y, defattr); 637 } else { 638 /* 639 * since we're not the console we can postpone the rest 640 * until someone actually allocates a screen for us 641 */ 642 mach64_modeswitch(sc, sc->sc_my_mode); 643 } 644 645 mach64_init_lut(sc); 646 mach64_clearscreen(sc); 647 machfb_blank(sc, 0); /* unblank the screen */ 648 649 aa.console = console; 650 aa.scrdata = &mach64_screenlist; 651 aa.accessops = &mach64_accessops; 652 aa.accesscookie = sc; 653 654 config_found(self, &aa, wsemuldisplaydevprint); 655 } 656 657 static void 658 mach64_init_screen(struct mach64_softc *sc, struct mach64screen *scr, 659 const struct wsscreen_descr *type, int existing, long *attrp, int setmode) 660 { 661 struct rasops_info *ri=&scr->ri; 662 663 scr->sc = sc; 664 scr->type = type; 665 scr->mindispoffset = 0; 666 scr->maxdispoffset = sc->memsize * 1024; 667 scr->dispoffset = 0; 668 scr->cursorcol = 0; 669 scr->cursorrow = 0; 670 671 ri->ri_depth = sc->bits_per_pixel; 672 ri->ri_width = sc->sc_my_mode->hdisplay; 673 ri->ri_height = sc->sc_my_mode->vdisplay; 674 ri->ri_stride = ri->ri_width; 675 ri->ri_flg = RI_CENTER; 676 677 if (existing) { 678 scr->active = 1; 679 ri->ri_flg |= RI_CLEAR; 680 if (setmode && mach64_set_screentype(sc, type)) { 681 panic("%s: failed to switch video mode", 682 sc->sc_dev.dv_xname); 683 } 684 } else { 685 scr->active = 0; 686 } 687 688 LIST_INSERT_HEAD(&sc->screens, scr, next); 689 } 690 691 static void 692 mach64_init(struct mach64_softc *sc) 693 { 694 u_int32_t *p32, saved_value; 695 u_int8_t *p; 696 int need_swap; 697 698 if (bus_space_map(sc->sc_memt, sc->sc_aperbase, sc->sc_apersize, 699 BUS_SPACE_MAP_LINEAR, &sc->sc_memh)) { 700 panic("%s: failed to map aperture", sc->sc_dev.dv_xname); 701 } 702 sc->sc_aperbase = (vaddr_t)bus_space_vaddr(sc->sc_memt, sc->sc_memh); 703 704 sc->sc_regt = sc->sc_memt; 705 bus_space_subregion(sc->sc_regt, sc->sc_memh, MACH64_REG_OFF, 706 sc->sc_regsize, &sc->sc_regh); 707 sc->sc_regbase = sc->sc_aperbase + 0x7ffc00; 708 709 /* 710 * Test wether the aperture is byte swapped or not 711 */ 712 p32 = (u_int32_t*)(u_long)sc->sc_aperbase; 713 saved_value = *p32; 714 p = (u_int8_t*)(u_long)sc->sc_aperbase; 715 *p32 = 0x12345678; 716 if (p[0] == 0x12 && p[1] == 0x34 && p[2] == 0x56 && p[3] == 0x78) 717 need_swap = 0; 718 else 719 need_swap = 1; 720 if (need_swap) { 721 sc->sc_aperbase += 0x800000; 722 sc->sc_apersize -= 0x800000; 723 } 724 *p32 = saved_value; 725 726 LIST_INIT(&sc->screens); 727 sc->active = NULL; 728 sc->currenttype = &mach64_defaultscreen; 729 callout_init(&sc->switch_callout); 730 } 731 732 static int 733 mach64_get_memsize(struct mach64_softc *sc) 734 { 735 int tmp, memsize; 736 int mem_tab[] = { 737 512, 1024, 2048, 4096, 6144, 8192, 12288, 16384 738 }; 739 tmp = regr(sc, MEM_CNTL); 740 printf("%s: memctl %08x\n", sc->sc_dev.dv_xname, tmp); 741 if (sc->has_dsp) { 742 tmp &= 0x0000000f; 743 if (tmp < 8) 744 memsize = (tmp + 1) * 512; 745 else if (tmp < 12) 746 memsize = (tmp - 3) * 1024; 747 else 748 memsize = (tmp - 7) * 2048; 749 } else { 750 memsize = mem_tab[tmp & 0x07]; 751 } 752 753 return memsize; 754 } 755 756 static int 757 mach64_get_max_ramdac(struct mach64_softc *sc) 758 { 759 int i; 760 761 if ((mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 762 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II) && 763 (mach64_chip_rev & 0x07)) 764 return 170000; 765 766 for (i = 0; i < sizeof(mach64_info) / sizeof(mach64_info[0]); i++) 767 if (mach64_chip_id == mach64_info[i].chip_id) 768 return mach64_info[i].ramdac_freq; 769 770 if (sc->bits_per_pixel == 8) 771 return 135000; 772 else 773 return 80000; 774 } 775 776 #if defined(__sparc__) || defined(__powerpc) 777 static void 778 mach64_get_mode(struct mach64_softc *sc, struct videomode *mode) 779 { 780 struct mach64_crtcregs crtc; 781 782 crtc.h_total_disp = regr(sc, CRTC_H_TOTAL_DISP); 783 crtc.h_sync_strt_wid = regr(sc, CRTC_H_SYNC_STRT_WID); 784 crtc.v_total_disp = regr(sc, CRTC_V_TOTAL_DISP); 785 crtc.v_sync_strt_wid = regr(sc, CRTC_V_SYNC_STRT_WID); 786 787 mode->htotal = ((crtc.h_total_disp & 0xffff) + 1) << 3; 788 mode->hdisplay = ((crtc.h_total_disp >> 16) + 1) << 3; 789 mode->hsync_start = ((crtc.h_sync_strt_wid & 0xffff) + 1) << 3; 790 mode->hsync_end = ((crtc.h_sync_strt_wid >> 16) << 3) + 791 mode->hsync_start; 792 mode->vtotal = (crtc.v_total_disp & 0xffff) + 1; 793 mode->vdisplay = (crtc.v_total_disp >> 16) + 1; 794 mode->vsync_start = (crtc.v_sync_strt_wid & 0xffff) + 1; 795 mode->vsync_end = (crtc.v_sync_strt_wid >> 16) + mode->vsync_start; 796 797 #ifdef DEBUG_MACHFB 798 printf("mach64_get_mode: %d %d %d %d %d %d %d %d\n", 799 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, 800 mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal); 801 #endif 802 } 803 #endif 804 805 static int 806 mach64_calc_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc, 807 struct videomode *mode) 808 { 809 810 if (mode->dot_clock > sc->ramdac_freq) 811 /* Clock too high. */ 812 return 1; 813 814 crtc->h_total_disp = (((mode->hdisplay >> 3) - 1) << 16) | 815 ((mode->htotal >> 3) - 1); 816 crtc->h_sync_strt_wid = 817 (((mode->hsync_end - mode->hsync_start) >> 3) << 16) | 818 ((mode->hsync_start >> 3) - 1); 819 820 crtc->v_total_disp = ((mode->vdisplay - 1) << 16) | 821 (mode->vtotal - 1); 822 crtc->v_sync_strt_wid = 823 ((mode->vsync_end - mode->vsync_start) << 16) | 824 (mode->vsync_start - 1); 825 826 if (mode->flags & VID_NVSYNC) 827 crtc->v_sync_strt_wid |= CRTC_VSYNC_NEG; 828 829 switch (sc->bits_per_pixel) { 830 case 8: 831 crtc->color_depth = CRTC_PIX_WIDTH_8BPP; 832 break; 833 case 16: 834 crtc->color_depth = CRTC_PIX_WIDTH_16BPP; 835 break; 836 case 32: 837 crtc->color_depth = CRTC_PIX_WIDTH_32BPP; 838 break; 839 } 840 841 crtc->gen_cntl = 0; 842 if (mode->flags & VID_INTERLACE) 843 crtc->gen_cntl |= CRTC_INTERLACE_EN; 844 if (mode->flags & VID_CSYNC) 845 crtc->gen_cntl |= CRTC_CSYNC_EN; 846 847 crtc->dot_clock = mode->dot_clock; 848 849 return 0; 850 } 851 852 static void 853 mach64_set_crtcregs(struct mach64_softc *sc, struct mach64_crtcregs *crtc) 854 { 855 856 mach64_set_pll(sc, crtc->dot_clock); 857 858 if (sc->has_dsp) 859 mach64_set_dsp(sc); 860 861 regw(sc, CRTC_H_TOTAL_DISP, crtc->h_total_disp); 862 regw(sc, CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid); 863 regw(sc, CRTC_V_TOTAL_DISP, crtc->v_total_disp); 864 regw(sc, CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid); 865 866 regw(sc, CRTC_VLINE_CRNT_VLINE, 0); 867 868 regw(sc, CRTC_OFF_PITCH, (sc->virt_x >> 3) << 22); 869 870 regw(sc, CRTC_GEN_CNTL, crtc->gen_cntl | crtc->color_depth | 871 CRTC_EXT_DISP_EN | CRTC_EXT_EN); 872 } 873 874 static int 875 mach64_modeswitch(struct mach64_softc *sc, struct videomode *mode) 876 { 877 struct mach64_crtcregs crtc; 878 879 if (mach64_calc_crtcregs(sc, &crtc, mode)) 880 return 1; 881 882 mach64_set_crtcregs(sc, &crtc); 883 return 0; 884 } 885 886 static void 887 mach64_reset_engine(struct mach64_softc *sc) 888 { 889 890 /* Reset engine.*/ 891 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) & ~GUI_ENGINE_ENABLE); 892 893 /* Enable engine. */ 894 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) | GUI_ENGINE_ENABLE); 895 896 /* Ensure engine is not locked up by clearing any FIFO or 897 host errors. */ 898 regw(sc, BUS_CNTL, regr(sc, BUS_CNTL) | BUS_HOST_ERR_ACK | 899 BUS_FIFO_ERR_ACK); 900 } 901 902 static void 903 mach64_init_engine(struct mach64_softc *sc) 904 { 905 u_int32_t pitch_value; 906 907 pitch_value = sc->virt_x; 908 909 if (sc->bits_per_pixel == 24) 910 pitch_value *= 3; 911 912 mach64_reset_engine(sc); 913 914 wait_for_fifo(sc, 14); 915 916 regw(sc, CONTEXT_MASK, 0xffffffff); 917 918 regw(sc, DST_OFF_PITCH, (pitch_value / 8) << 22); 919 920 regw(sc, DST_Y_X, 0); 921 regw(sc, DST_HEIGHT, 0); 922 regw(sc, DST_BRES_ERR, 0); 923 regw(sc, DST_BRES_INC, 0); 924 regw(sc, DST_BRES_DEC, 0); 925 926 regw(sc, DST_CNTL, DST_LAST_PEL | DST_X_LEFT_TO_RIGHT | 927 DST_Y_TOP_TO_BOTTOM); 928 929 regw(sc, SRC_OFF_PITCH, (pitch_value / 8) << 22); 930 931 regw(sc, SRC_Y_X, 0); 932 regw(sc, SRC_HEIGHT1_WIDTH1, 1); 933 regw(sc, SRC_Y_X_START, 0); 934 regw(sc, SRC_HEIGHT2_WIDTH2, 1); 935 936 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 937 938 wait_for_fifo(sc, 13); 939 regw(sc, HOST_CNTL, 0); 940 941 regw(sc, PAT_REG0, 0); 942 regw(sc, PAT_REG1, 0); 943 regw(sc, PAT_CNTL, 0); 944 945 regw(sc, SC_LEFT, 0); 946 regw(sc, SC_TOP, 0); 947 regw(sc, SC_BOTTOM, sc->sc_my_mode->vdisplay - 1); 948 regw(sc, SC_RIGHT, pitch_value - 1); 949 950 regw(sc, DP_BKGD_CLR, 0); 951 regw(sc, DP_FRGD_CLR, 0xffffffff); 952 regw(sc, DP_WRITE_MASK, 0xffffffff); 953 regw(sc, DP_MIX, (MIX_SRC << 16) | MIX_DST); 954 955 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 956 957 wait_for_fifo(sc, 3); 958 regw(sc, CLR_CMP_CLR, 0); 959 regw(sc, CLR_CMP_MASK, 0xffffffff); 960 regw(sc, CLR_CMP_CNTL, 0); 961 962 wait_for_fifo(sc, 2); 963 switch (sc->bits_per_pixel) { 964 case 8: 965 regw(sc, DP_PIX_WIDTH, HOST_8BPP | SRC_8BPP | DST_8BPP); 966 regw(sc, DP_CHAIN_MASK, DP_CHAIN_8BPP); 967 /* We want 8 bit per channel */ 968 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 969 break; 970 #if 0 971 case 32: 972 regw(sc, DP_PIX_WIDTH, HOST_32BPP | SRC_32BPP | DST_32BPP); 973 regw(sc, DP_CHAIN_MASK, DP_CHAIN_32BPP); 974 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN); 975 break; 976 #endif 977 } 978 979 wait_for_fifo(sc, 5); 980 regw(sc, CRTC_INT_CNTL, regr(sc, CRTC_INT_CNTL) & ~0x20); 981 regw(sc, GUI_TRAJ_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 982 983 wait_for_idle(sc); 984 } 985 986 #if 0 987 static void 988 mach64_adjust_frame(struct mach64_softc *sc, int x, int y) 989 { 990 int offset; 991 992 offset = ((x + y * sc->virt_x) * (sc->bits_per_pixel >> 3)) >> 3; 993 994 regw(sc, CRTC_OFF_PITCH, (regr(sc, CRTC_OFF_PITCH) & 0xfff00000) | 995 offset); 996 } 997 #endif 998 999 static void 1000 mach64_set_dsp(struct mach64_softc *sc) 1001 { 1002 u_int32_t fifo_depth, page_size, dsp_precision, dsp_loop_latency; 1003 u_int32_t dsp_off, dsp_on, dsp_xclks_per_qw; 1004 u_int32_t xclks_per_qw, y; 1005 u_int32_t fifo_off, fifo_on; 1006 1007 printf("%s: initializing the DSP\n", sc->sc_dev.dv_xname); 1008 if (mach64_chip_id == PCI_PRODUCT_ATI_MACH64_VT || 1009 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_II || 1010 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIP || 1011 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_PCI || 1012 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_B || 1013 mach64_chip_id == PCI_PRODUCT_ATI_RAGE_IIC_AGP_P) { 1014 dsp_loop_latency = 0; 1015 fifo_depth = 24; 1016 } else { 1017 dsp_loop_latency = 2; 1018 fifo_depth = 32; 1019 } 1020 1021 dsp_precision = 0; 1022 xclks_per_qw = (sc->mclk_fb_div * sc->vclk_post_div * 64 << 11) / 1023 (sc->vclk_fb_div * sc->mclk_post_div * sc->bits_per_pixel); 1024 y = (xclks_per_qw * fifo_depth) >> 11; 1025 while (y) { 1026 y >>= 1; 1027 dsp_precision++; 1028 } 1029 dsp_precision -= 5; 1030 fifo_off = ((xclks_per_qw * (fifo_depth - 1)) >> 5) + (3 << 6); 1031 1032 switch (sc->memtype) { 1033 case DRAM: 1034 case EDO_DRAM: 1035 case PSEUDO_EDO: 1036 if (sc->memsize > 1024) { 1037 page_size = 9; 1038 dsp_loop_latency += 6; 1039 } else { 1040 page_size = 10; 1041 if (sc->memtype == DRAM) 1042 dsp_loop_latency += 8; 1043 else 1044 dsp_loop_latency += 7; 1045 } 1046 break; 1047 case SDRAM: 1048 case SGRAM: 1049 if (sc->memsize > 1024) { 1050 page_size = 8; 1051 dsp_loop_latency += 8; 1052 } else { 1053 page_size = 10; 1054 dsp_loop_latency += 9; 1055 } 1056 break; 1057 default: 1058 page_size = 10; 1059 dsp_loop_latency += 9; 1060 break; 1061 } 1062 1063 if (xclks_per_qw >= (page_size << 11)) 1064 fifo_on = ((2 * page_size + 1) << 6) + (xclks_per_qw >> 5); 1065 else 1066 fifo_on = (3 * page_size + 2) << 6; 1067 1068 dsp_xclks_per_qw = xclks_per_qw >> dsp_precision; 1069 dsp_on = fifo_on >> dsp_precision; 1070 dsp_off = fifo_off >> dsp_precision; 1071 1072 #ifdef DEBUG_MACHFB 1073 printf("dsp_xclks_per_qw = %d, dsp_on = %d, dsp_off = %d,\n" 1074 "dsp_precision = %d, dsp_loop_latency = %d,\n" 1075 "mclk_fb_div = %d, vclk_fb_div = %d,\n" 1076 "mclk_post_div = %d, vclk_post_div = %d\n", 1077 dsp_xclks_per_qw, dsp_on, dsp_off, dsp_precision, dsp_loop_latency, 1078 sc->mclk_fb_div, sc->vclk_fb_div, 1079 sc->mclk_post_div, sc->vclk_post_div); 1080 #endif 1081 1082 regw(sc, DSP_ON_OFF, ((dsp_on << 16) & DSP_ON) | (dsp_off & DSP_OFF)); 1083 regw(sc, DSP_CONFIG, ((dsp_precision << 20) & DSP_PRECISION) | 1084 ((dsp_loop_latency << 16) & DSP_LOOP_LATENCY) | 1085 (dsp_xclks_per_qw & DSP_XCLKS_PER_QW)); 1086 } 1087 1088 static void 1089 mach64_set_pll(struct mach64_softc *sc, int clock) 1090 { 1091 int q; 1092 1093 q = (clock * sc->ref_div * 100) / (2 * sc->ref_freq); 1094 #ifdef DEBUG_MACHFB 1095 printf("q = %d\n", q); 1096 #endif 1097 if (q > 25500) { 1098 printf("Warning: q > 25500\n"); 1099 q = 25500; 1100 sc->vclk_post_div = 1; 1101 sc->log2_vclk_post_div = 0; 1102 } else if (q > 12750) { 1103 sc->vclk_post_div = 1; 1104 sc->log2_vclk_post_div = 0; 1105 } else if (q > 6350) { 1106 sc->vclk_post_div = 2; 1107 sc->log2_vclk_post_div = 1; 1108 } else if (q > 3150) { 1109 sc->vclk_post_div = 4; 1110 sc->log2_vclk_post_div = 2; 1111 } else if (q >= 1600) { 1112 sc->vclk_post_div = 8; 1113 sc->log2_vclk_post_div = 3; 1114 } else { 1115 printf("Warning: q < 1600\n"); 1116 sc->vclk_post_div = 8; 1117 sc->log2_vclk_post_div = 3; 1118 } 1119 sc->vclk_fb_div = q * sc->vclk_post_div / 100; 1120 1121 regwb_pll(sc, MCLK_FB_DIV, sc->mclk_fb_div); 1122 regwb_pll(sc, VCLK_POST_DIV, sc->log2_vclk_post_div); 1123 regwb_pll(sc, VCLK0_FB_DIV, sc->vclk_fb_div); 1124 } 1125 1126 static void 1127 mach64_init_lut(struct mach64_softc *sc) 1128 { 1129 int i, idx; 1130 1131 idx = 0; 1132 for (i = 0; i < 256; i++) { 1133 mach64_putpalreg(sc, i, rasops_cmap[idx], rasops_cmap[idx + 1], 1134 rasops_cmap[idx + 2]); 1135 idx += 3; 1136 } 1137 } 1138 1139 static int 1140 mach64_putpalreg(struct mach64_softc *sc, uint8_t index, uint8_t r, uint8_t g, 1141 uint8_t b) 1142 { 1143 sc->sc_cmap_red[index] = r; 1144 sc->sc_cmap_green[index] = g; 1145 sc->sc_cmap_blue[index] = b; 1146 /* 1147 * writing the dac index takes a while, in theory we can poll some 1148 * register to see when it's ready - but we better avoid writing it 1149 * unnecessarily 1150 */ 1151 if (index != sc->sc_dacw) { 1152 regwb(sc, DAC_MASK, 0xff); 1153 regwb(sc, DAC_WINDEX, index); 1154 } 1155 sc->sc_dacw = index + 1; 1156 regwb(sc, DAC_DATA, r); 1157 regwb(sc, DAC_DATA, g); 1158 regwb(sc, DAC_DATA, b); 1159 return 0; 1160 } 1161 1162 static int 1163 mach64_putcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1164 { 1165 u_int index = cm->index; 1166 u_int count = cm->count; 1167 int i, error; 1168 u_char rbuf[256], gbuf[256], bbuf[256]; 1169 u_char *r, *g, *b; 1170 1171 if (cm->index >= 256 || cm->count > 256 || 1172 (cm->index + cm->count) > 256) 1173 return EINVAL; 1174 error = copyin(cm->red, &rbuf[index], count); 1175 if (error) 1176 return error; 1177 error = copyin(cm->green, &gbuf[index], count); 1178 if (error) 1179 return error; 1180 error = copyin(cm->blue, &bbuf[index], count); 1181 if (error) 1182 return error; 1183 1184 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 1185 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 1186 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 1187 1188 r = &sc->sc_cmap_red[index]; 1189 g = &sc->sc_cmap_green[index]; 1190 b = &sc->sc_cmap_blue[index]; 1191 1192 for (i = 0; i < count; i++) { 1193 mach64_putpalreg(sc, index, *r, *g, *b); 1194 index++; 1195 r++, g++, b++; 1196 } 1197 return 0; 1198 } 1199 1200 static int 1201 mach64_getcmap(struct mach64_softc *sc, struct wsdisplay_cmap *cm) 1202 { 1203 u_int index = cm->index; 1204 u_int count = cm->count; 1205 int error; 1206 1207 if (index >= 255 || count > 256 || index + count > 256) 1208 return EINVAL; 1209 1210 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 1211 if (error) 1212 return error; 1213 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 1214 if (error) 1215 return error; 1216 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 1217 if (error) 1218 return error; 1219 1220 return 0; 1221 } 1222 1223 static int 1224 mach64_set_screentype(struct mach64_softc *sc, const struct wsscreen_descr *des) 1225 { 1226 struct mach64_crtcregs regs; 1227 1228 if (mach64_calc_crtcregs(sc, ®s, 1229 (struct videomode *)des->modecookie)) 1230 return 1; 1231 1232 mach64_set_crtcregs(sc, ®s); 1233 return 0; 1234 } 1235 1236 static int 1237 mach64_is_console(struct pci_attach_args *pa) 1238 { 1239 #ifdef __sparc__ 1240 int node; 1241 1242 node = PCITAG_NODE(pa->pa_tag); 1243 if (node == -1) 1244 return 0; 1245 1246 return (node == prom_instance_to_package(prom_stdout())); 1247 #elif defined(__powerpc__) 1248 /* check if we're the /chosen console device */ 1249 int chosen, stdout, node, us; 1250 1251 us = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 1252 chosen = OF_finddevice("/chosen"); 1253 OF_getprop(chosen, "stdout", &stdout, 4); 1254 node = OF_instance_to_package(stdout); 1255 return (us == node); 1256 #else 1257 return 1; 1258 #endif 1259 } 1260 1261 /* 1262 * wsdisplay_emulops 1263 */ 1264 1265 static void 1266 mach64_cursor(void *cookie, int on, int row, int col) 1267 { 1268 struct rasops_info *ri = cookie; 1269 struct mach64screen *scr = ri->ri_hw; 1270 struct mach64_softc *sc = scr->sc; 1271 int x, y, wi,he; 1272 1273 wi = ri->ri_font->fontwidth; 1274 he = ri->ri_font->fontheight; 1275 1276 if (scr->active) { 1277 x = scr->cursorcol * wi + ri->ri_xorigin; 1278 y = scr->cursorrow * he + ri->ri_yorigin; 1279 if (scr->cursordrawn) { 1280 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1281 0xff); 1282 scr->cursordrawn=0; 1283 } 1284 scr->cursorrow = row; 1285 scr->cursorcol = col; 1286 if ((scr->cursoron = on) != 0) 1287 { 1288 x = scr->cursorcol * wi + ri->ri_xorigin; 1289 y = scr->cursorrow * he + ri->ri_yorigin; 1290 mach64_bitblt(sc, x, y, x, y, wi, he, MIX_NOT_SRC, 1291 0xff); 1292 scr->cursordrawn = 1; 1293 } 1294 } else { 1295 scr->cursoron = on; 1296 scr->cursorrow = row; 1297 scr->cursorcol = col; 1298 scr->cursordrawn = 0; 1299 } 1300 } 1301 1302 #if 0 1303 static int 1304 mach64_mapchar(void *cookie, int uni, u_int *index) 1305 { 1306 return 0; 1307 } 1308 #endif 1309 1310 static void 1311 mach64_putchar(void *cookie, int row, int col, u_int c, long attr) 1312 { 1313 struct rasops_info *ri = cookie; 1314 struct mach64screen *scr = ri->ri_hw; 1315 struct mach64_softc *sc = scr->sc; 1316 int offset = ri->ri_cols * row + col; 1317 1318 scr->attrs[offset] = attr; 1319 scr->chars[offset] = c; 1320 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1321 int fg, bg, uc; 1322 uint8_t *data; 1323 int x, y, wi, he; 1324 wi = ri->ri_font->fontwidth; 1325 he = ri->ri_font->fontheight; 1326 1327 #ifdef notdef 1328 scr->putchar(cookie,row,col,c,attr); 1329 #endif 1330 if (!CHAR_IN_FONT(c, ri->ri_font)) 1331 return; 1332 bg = (u_char)ri->ri_devcmap[(attr >> 16) & 0xf]; 1333 fg = (u_char)ri->ri_devcmap[(attr >> 24) & 0xf]; 1334 x = ri->ri_xorigin + col * wi; 1335 y = ri->ri_yorigin + row * he; 1336 if (c == 0x20) { 1337 mach64_rectfill(sc, x, y, wi, he, bg); 1338 } else { 1339 uc = c-ri->ri_font->firstchar; 1340 data = (uint8_t *)ri->ri_font->data + uc * 1341 ri->ri_fontscale; 1342 1343 mach64_setup_mono(sc, x, y, wi, he, fg, bg); 1344 mach64_feed_bytes(sc, ri->ri_fontscale, data); 1345 } 1346 } 1347 } 1348 1349 1350 static void 1351 mach64_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1352 { 1353 struct rasops_info *ri=cookie; 1354 struct mach64screen *scr=ri->ri_hw; 1355 struct mach64_softc *sc=scr->sc; 1356 int32_t xs,xd,y,width,height; 1357 int from, to; 1358 1359 from = srccol + row * ri->ri_cols; 1360 to = dstcol + row * ri->ri_cols; 1361 1362 memmove(&scr->attrs[to], &scr->attrs[from], ncols * sizeof(long)); 1363 memmove(&scr->chars[to], &scr->chars[from], ncols * sizeof(u_int)); 1364 1365 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1366 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1367 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1368 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1369 width = ri->ri_font->fontwidth * ncols; 1370 height = ri->ri_font->fontheight; 1371 mach64_bitblt(sc, xs, y, xd, y, width, height, MIX_SRC, 0xff); 1372 } 1373 } 1374 1375 static void 1376 mach64_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1377 { 1378 struct rasops_info *ri=cookie; 1379 struct mach64screen *scr=ri->ri_hw; 1380 struct mach64_softc *sc=scr->sc; 1381 int32_t x, y, width, height, fg, bg, ul; 1382 int start, end, i; 1383 1384 start = startcol + row * ri->ri_cols; 1385 end = start + ncols; 1386 1387 for (i = start; i < end; i++) { 1388 scr->attrs[i] = fillattr; 1389 scr->chars[i] = 0x20; 1390 } 1391 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1392 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1393 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1394 width = ri->ri_font->fontwidth * ncols; 1395 height = ri->ri_font->fontheight; 1396 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1397 1398 mach64_rectfill(sc, x, y, width, height, bg); 1399 } 1400 } 1401 1402 static void 1403 mach64_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1404 { 1405 struct rasops_info *ri=cookie; 1406 struct mach64screen *scr=ri->ri_hw; 1407 struct mach64_softc *sc=scr->sc; 1408 int32_t x, ys, yd, width, height; 1409 int from, to, len; 1410 1411 from = ri->ri_cols * srcrow; 1412 to = ri->ri_cols * dstrow; 1413 len = ri->ri_cols * nrows; 1414 1415 memmove(&scr->attrs[to], &scr->attrs[from], len*sizeof(long)); 1416 memmove(&scr->chars[to], &scr->chars[from], len*sizeof(u_int)); 1417 1418 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1419 x = ri->ri_xorigin; 1420 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1421 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1422 width = ri->ri_emuwidth; 1423 height = ri->ri_font->fontheight*nrows; 1424 mach64_bitblt(sc, x, ys, x, yd, width, height, MIX_SRC, 0xff); 1425 } 1426 } 1427 1428 static void 1429 mach64_eraserows(void *cookie, int row, int nrows, long fillattr) 1430 { 1431 struct rasops_info *ri=cookie; 1432 struct mach64screen *scr=ri->ri_hw; 1433 struct mach64_softc *sc=scr->sc; 1434 int32_t x, y, width, height, fg, bg, ul; 1435 int start, end, i; 1436 1437 start = ri->ri_cols * row; 1438 end = ri->ri_cols * (row + nrows); 1439 1440 for (i=start;i<end;i++) { 1441 scr->attrs[i] = fillattr; 1442 scr->chars[i] = 0x20; 1443 } 1444 1445 if ((scr->active) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1446 x = ri->ri_xorigin; 1447 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1448 width = ri->ri_emuwidth; 1449 height = ri->ri_font->fontheight * nrows; 1450 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1451 1452 mach64_rectfill(sc, x, y, width, height, bg); 1453 } 1454 } 1455 1456 static void 1457 mach64_bitblt(struct mach64_softc *sc, int xs, int ys, int xd, int yd, int width, int height, int rop, int mask) 1458 { 1459 uint32_t dest_ctl = 0; 1460 1461 wait_for_idle(sc); 1462 regw(sc, DP_WRITE_MASK, mask); /* XXX only good for 8 bit */ 1463 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1464 regw(sc, DP_SRC, FRGD_SRC_BLIT); 1465 regw(sc, DP_MIX, (rop & 0xffff) << 16); 1466 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1467 if (yd < ys) { 1468 dest_ctl = DST_Y_TOP_TO_BOTTOM; 1469 } else { 1470 ys += height - 1; 1471 yd += height - 1; 1472 dest_ctl = DST_Y_BOTTOM_TO_TOP; 1473 } 1474 if (xd < xs) { 1475 dest_ctl |= DST_X_LEFT_TO_RIGHT; 1476 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1477 } else { 1478 dest_ctl |= DST_X_RIGHT_TO_LEFT; 1479 xs += width - 1; 1480 xd += width - 1; 1481 regw(sc, SRC_CNTL, SRC_LINE_X_RIGHT_TO_LEFT); 1482 } 1483 regw(sc, DST_CNTL, dest_ctl); 1484 1485 regw(sc, SRC_Y_X, (xs << 16) | ys); 1486 regw(sc, SRC_WIDTH1, width); 1487 regw(sc, DST_Y_X, (xd << 16) | yd); 1488 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1489 } 1490 1491 static void 1492 mach64_setup_mono(struct mach64_softc *sc, int xd, int yd, int width, 1493 int height, uint32_t fg, uint32_t bg) 1494 { 1495 wait_for_idle(sc); 1496 regw(sc, DP_WRITE_MASK, 0xff); /* XXX only good for 8 bit */ 1497 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_1BPP | HOST_1BPP); 1498 regw(sc, DP_SRC, MONO_SRC_HOST | BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR); 1499 regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC); 1500 regw(sc, CLR_CMP_CNTL ,0); /* no transparency */ 1501 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1502 regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT); 1503 regw(sc, HOST_CNTL, HOST_BYTE_ALIGN); 1504 regw(sc, DP_BKGD_CLR, bg); 1505 regw(sc, DP_FRGD_CLR, fg); 1506 regw(sc, SRC_Y_X, 0); 1507 regw(sc, SRC_WIDTH1, width); 1508 regw(sc, DST_Y_X, (xd << 16) | yd); 1509 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1510 /* now feed the data into the chip */ 1511 } 1512 1513 static void 1514 mach64_feed_bytes(struct mach64_softc *sc, int count, uint8_t *data) 1515 { 1516 int i; 1517 uint32_t latch = 0, bork; 1518 int shift = 0; 1519 int reg = 0; 1520 1521 for (i=0;i<count;i++) { 1522 bork = data[i]; 1523 latch |= (bork << shift); 1524 if (shift == 24) { 1525 regw(sc, HOST_DATA0 + reg, latch); 1526 latch = 0; 1527 shift = 0; 1528 reg = (reg + 4) & 0x3c; 1529 } else 1530 shift += 8; 1531 } 1532 if (shift != 0) /* 24 */ 1533 regw(sc, HOST_DATA0 + reg, latch); 1534 } 1535 1536 1537 static void 1538 mach64_rectfill(struct mach64_softc *sc, int x, int y, int width, int height, 1539 int colour) 1540 { 1541 wait_for_idle(sc); 1542 regw(sc, DP_WRITE_MASK, 0xff); 1543 regw(sc, DP_FRGD_CLR, colour); 1544 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP); 1545 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR); 1546 regw(sc, DP_MIX, MIX_SRC << 16); 1547 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */ 1548 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT); 1549 regw(sc, DST_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); 1550 1551 regw(sc, SRC_Y_X, (x << 16) | y); 1552 regw(sc, SRC_WIDTH1, width); 1553 regw(sc, DST_Y_X, (x << 16) | y); 1554 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height); 1555 } 1556 1557 static void 1558 mach64_clearscreen(struct mach64_softc *sc) 1559 { 1560 mach64_rectfill(sc, 0, 0, sc->virt_x, sc->virt_y, sc->sc_bg); 1561 } 1562 1563 1564 #if 0 1565 static void 1566 mach64_showpal(struct mach64_softc *sc) 1567 { 1568 int i, x = 0; 1569 1570 for (i = 0; i < 16; i++) { 1571 mach64_rectfill(sc, x, 0, 64, 64, i); 1572 x += 64; 1573 } 1574 } 1575 #endif 1576 1577 static int 1578 mach64_allocattr(void *cookie, int fg, int bg, int flags, long *attrp) 1579 { 1580 if ((fg == 0) && (bg == 0)) 1581 { 1582 fg = WS_DEFAULT_FG; 1583 bg = WS_DEFAULT_BG; 1584 } 1585 *attrp = (fg & 0xf) << 24 | (bg & 0xf) << 16 | (flags & 0xff) << 8; 1586 return 0; 1587 } 1588 1589 /* 1590 * wsdisplay_accessops 1591 */ 1592 1593 static int 1594 mach64_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct lwp *l) 1595 { 1596 struct mach64_softc *sc = v; 1597 struct wsdisplay_fbinfo *wdf; 1598 struct mach64screen *ms=sc->active; 1599 1600 switch (cmd) { 1601 case WSDISPLAYIO_GTYPE: 1602 /* XXX is this the right type to return? */ 1603 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 1604 return 0; 1605 1606 case WSDISPLAYIO_GINFO: 1607 wdf = (void *)data; 1608 wdf->height = ms->ri.ri_height; 1609 wdf->width = ms->ri.ri_width; 1610 wdf->depth = ms->ri.ri_depth; 1611 wdf->cmsize = 256; 1612 return 0; 1613 1614 case WSDISPLAYIO_GETCMAP: 1615 return mach64_getcmap(sc, 1616 (struct wsdisplay_cmap *)data); 1617 1618 case WSDISPLAYIO_PUTCMAP: 1619 return mach64_putcmap(sc, 1620 (struct wsdisplay_cmap *)data); 1621 1622 /* PCI config read/write passthrough. */ 1623 case PCI_IOC_CFGREAD: 1624 case PCI_IOC_CFGWRITE: 1625 return (pci_devioctl(sc->sc_pc, sc->sc_pcitag, 1626 cmd, data, flag, l)); 1627 1628 case WSDISPLAYIO_SMODE: 1629 { 1630 int new_mode = *(int*)data; 1631 1632 if (new_mode != sc->sc_mode) 1633 { 1634 sc->sc_mode = new_mode; 1635 if (new_mode == WSDISPLAYIO_MODE_EMUL) 1636 { 1637 /* 1638 * reset a few things the 1639 * Xserver might have screwed up 1640 */ 1641 mach64_restore_screen(ms, 1642 ms->type, ms->chars); 1643 mach64_cursor(ms, ms->cursoron, 1644 ms->cursorrow, 1645 ms->cursorcol); 1646 } 1647 } 1648 } 1649 return 0; 1650 1651 case WSDISPLAYIO_GETWSCHAR: 1652 return mach64_getwschar(sc, 1653 (struct wsdisplay_char *)data); 1654 1655 case WSDISPLAYIO_PUTWSCHAR: 1656 return mach64_putwschar(sc, 1657 (struct wsdisplay_char *)data); 1658 } 1659 return EPASSTHROUGH; 1660 } 1661 1662 static paddr_t 1663 mach64_mmap(void *v, off_t offset, int prot) 1664 { 1665 struct mach64_softc *sc = v; 1666 paddr_t pa; 1667 pcireg_t reg; 1668 1669 #ifndef __sparc64__ 1670 /* 1671 *'regular' framebuffer mmap()ing 1672 * disabled on sparc64 because some ATI firmware likes to map some PCI 1673 * resources to addresses that would collide with this ( like some Rage 1674 * IIc which uses 0x2000 for the 2nd register block ) 1675 * Other 64bit architectures might run into similar problems. 1676 */ 1677 if (offset<sc->sc_apersize) { 1678 pa = bus_space_mmap(sc->sc_memt, sc->sc_aperbase+offset, 0, 1679 prot, BUS_SPACE_MAP_LINEAR); 1680 return pa; 1681 } 1682 #endif 1683 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x18) & 0xffffff00); 1684 if (reg != sc->sc_regphys) { 1685 printf("%s: BAR 0x18 changed! (%x %x)\n", 1686 sc->sc_dev.dv_xname, (uint32_t)sc->sc_regphys, 1687 (uint32_t)reg); 1688 sc->sc_regphys = reg; 1689 } 1690 1691 reg = (pci_conf_read(sc->sc_pc, sc->sc_pcitag, 0x10) & 0xffffff00); 1692 if (reg != sc->sc_aperphys) { 1693 printf("%s: BAR 0x10 changed! (%x %x)\n", 1694 sc->sc_dev.dv_xname, (uint32_t)sc->sc_aperphys, 1695 (uint32_t)reg); 1696 sc->sc_aperphys = reg; 1697 } 1698 1699 #if 0 1700 /* evil hack to allow mmap()ing other devices as well */ 1701 if ((offset > 0x80000000) && (offset <= 0xffffffff)) { 1702 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1703 BUS_SPACE_MAP_LINEAR); 1704 return pa; 1705 } 1706 #endif 1707 1708 if ((offset >= sc->sc_aperphys) && 1709 (offset < (sc->sc_aperphys + sc->sc_apersize))) { 1710 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1711 BUS_SPACE_MAP_LINEAR); 1712 return pa; 1713 } 1714 1715 if ((offset >= sc->sc_regphys) && 1716 (offset < (sc->sc_regphys + sc->sc_regsize))) { 1717 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 1718 BUS_SPACE_MAP_LINEAR); 1719 return pa; 1720 } 1721 1722 return -1; 1723 } 1724 1725 static int 1726 mach64_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 1727 int *curxp, int *curyp, long *defattrp) 1728 { 1729 struct mach64_softc *sc = v; 1730 struct mach64screen *scr; 1731 struct rasops_info *ri; 1732 int cnt; 1733 1734 scr = malloc(sizeof(struct mach64screen), M_DEVBUF, M_WAITOK | M_ZERO); 1735 mach64_init_screen(sc, scr, type, 0, defattrp, sc->active == NULL); 1736 ri = &scr->ri; 1737 1738 ri->ri_hw = scr; 1739 #ifdef notdef 1740 ri->ri_bits = (void *)sc->sc_aperbase; 1741 #endif 1742 rasops_init(ri, sc->sc_my_mode->vdisplay / 8, 1743 sc->sc_my_mode->hdisplay / 8); 1744 1745 rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight, 1746 ri->ri_width / ri->ri_font->fontwidth); 1747 cnt = ri->ri_cols * ri->ri_rows; 1748 1749 set_address(ri, sc->sc_aperbase); 1750 mach64_allocattr(ri, WS_DEFAULT_FG, WS_DEFAULT_BG, 0, defattrp); 1751 1752 scr->ri.ri_ops.copyrows = mach64_copyrows; 1753 scr->ri.ri_ops.eraserows = mach64_eraserows; 1754 scr->ri.ri_ops.copycols = mach64_copycols; 1755 scr->ri.ri_ops.erasecols = mach64_erasecols; 1756 scr->ri.ri_ops.putchar = mach64_putchar; 1757 scr->ri.ri_ops.cursor = mach64_cursor; 1758 1759 scr->attrs = malloc(cnt * (sizeof(long) + sizeof(u_int)), 1760 M_DEVBUF, M_WAITOK); 1761 scr->chars = (u_int *)&scr->attrs[cnt]; 1762 mach64_eraserows(ri, 0, ri->ri_rows, *defattrp); 1763 1764 if (sc->active == NULL) { 1765 scr->active = 1; 1766 sc->active = scr; 1767 sc->currenttype = type; 1768 } 1769 1770 *cookiep = scr; 1771 *curxp = scr->cursorcol; 1772 *curyp = scr->cursorrow; 1773 1774 return 0; 1775 } 1776 1777 static void 1778 mach64_free_screen(void *v, void *cookie) 1779 { 1780 struct mach64_softc *sc = v; 1781 struct mach64screen *scr = cookie; 1782 1783 LIST_REMOVE(scr, next); 1784 #if 0 1785 if (scr != &mach64_console_screen) { 1786 free(scr->attrs, M_DEVBUF); 1787 free(scr, M_DEVBUF); 1788 } else 1789 panic("mach64_free_screen: console"); 1790 #endif 1791 if (sc->active == scr) 1792 sc->active = 0; 1793 } 1794 1795 static int 1796 mach64_show_screen(void *v, void *cookie, int waitok, 1797 void (*cb)(void *, int, int), void *cbarg) 1798 { 1799 struct mach64_softc *sc = v; 1800 struct mach64screen *scr, *oldscr; 1801 1802 scr = cookie; 1803 oldscr = sc->active; 1804 if (scr == oldscr) 1805 return 0; 1806 1807 sc->wanted = scr; 1808 sc->switchcb = cb; 1809 sc->switchcbarg = cbarg; 1810 if (cb) { 1811 callout_reset(&sc->switch_callout, 0, 1812 (void(*)(void *))mach64_switch_screen, sc); 1813 return EAGAIN; 1814 } 1815 1816 mach64_switch_screen(sc); 1817 1818 return 0; 1819 } 1820 1821 static void 1822 mach64_switch_screen(struct mach64_softc *sc) 1823 { 1824 struct mach64screen *scr, *oldscr; 1825 const struct wsscreen_descr *type; 1826 1827 scr = sc->wanted; 1828 if (!scr) { 1829 printf("mach64_switch_screen: disappeared\n"); 1830 (*sc->switchcb)(sc->switchcbarg, EIO, 0); 1831 return; 1832 } 1833 type = scr->type; 1834 oldscr = sc->active; /* can be NULL! */ 1835 #ifdef DIAGNOSTIC 1836 if (oldscr) { 1837 if (!oldscr->active) 1838 panic("mach64_switch_screen: not active"); 1839 if (oldscr->type != sc->currenttype) 1840 panic("mach64_switch_screen: bad type %p != %p", 1841 oldscr->type, sc->currenttype); 1842 } 1843 #endif 1844 if (scr == oldscr) 1845 return; 1846 1847 #ifdef DIAGNOSTIC 1848 /* XXX: this one bites us at reboot */ 1849 #ifdef notdef 1850 if (scr->active) 1851 panic("mach64_switch_screen: active"); 1852 #endif 1853 #endif 1854 1855 if (oldscr) 1856 oldscr->active = 0; 1857 1858 if (sc->currenttype != type) { 1859 mach64_set_screentype(sc, type); 1860 sc->currenttype = type; 1861 } 1862 1863 scr->dispoffset = scr->mindispoffset; 1864 1865 if (!oldscr || (scr->dispoffset != oldscr->dispoffset)) { 1866 1867 } 1868 1869 /* Clear the entire screen. */ 1870 1871 scr->active = 1; 1872 mach64_restore_screen(scr, type, scr->chars); 1873 1874 sc->active = scr; 1875 1876 scr->ri.ri_ops.cursor(scr, scr->cursoron, scr->cursorrow, 1877 scr->cursorcol); 1878 1879 sc->wanted = 0; 1880 if (sc->switchcb) 1881 (*sc->switchcb)(sc->switchcbarg, 0, 0); 1882 } 1883 1884 static void 1885 mach64_restore_screen(struct mach64screen *scr, 1886 const struct wsscreen_descr *type, u_int *mem) 1887 { 1888 int i, j, offset = 0; 1889 u_int *charptr = scr->chars; 1890 long *attrptr = scr->attrs; 1891 1892 mach64_clearscreen(scr->sc); 1893 for (i = 0; i < scr->ri.ri_rows; i++) { 1894 for (j = 0; j < scr->ri.ri_cols; j++) { 1895 mach64_putchar(scr, i, j, charptr[offset], 1896 attrptr[offset]); 1897 offset++; 1898 } 1899 } 1900 scr->cursordrawn = 0; 1901 } 1902 1903 /* set ri->ri_bits according to fb, ri_xorigin and ri_yorigin */ 1904 static void 1905 set_address(struct rasops_info *ri, bus_addr_t fb) 1906 { 1907 #ifdef notdef 1908 printf(" %d %d %d\n", ri->ri_xorigin, ri->ri_yorigin, ri->ri_stride); 1909 #endif 1910 ri->ri_bits = (void *)((u_long)fb + ri->ri_stride * ri->ri_yorigin + 1911 ri->ri_xorigin); 1912 } 1913 1914 static int 1915 mach64_getwschar(void *cookie, struct wsdisplay_char *wsc) 1916 { 1917 struct mach64_softc *sc = cookie; 1918 struct mach64screen *scr = sc->active; 1919 int fg, bg, fl; 1920 1921 if (scr){ 1922 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1923 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1924 int pos = scr->ri.ri_cols * wsc->row + wsc->col; 1925 1926 wsc->letter = scr->chars[pos]; 1927 rasops_unpack_attr(scr->attrs[pos], &fg, &bg, &fl); 1928 wsc->foreground = fg; 1929 wsc->background = bg; 1930 wsc->flags = fl; 1931 return 0; 1932 } 1933 } 1934 return EINVAL; 1935 } 1936 1937 static int 1938 mach64_putwschar(void *cookie, struct wsdisplay_char *wsc) 1939 { 1940 struct mach64_softc *sc=cookie; 1941 struct mach64screen *scr=sc->active; 1942 long attr; 1943 1944 if (scr){ 1945 if ((wsc->col >= 0) && (wsc->col < scr->ri.ri_cols) && 1946 (wsc->row >= 0) && (wsc->row < scr->ri.ri_rows)) { 1947 mach64_allocattr(&scr->ri, wsc->foreground, 1948 wsc->background, wsc->flags, &attr); 1949 mach64_putchar(&scr->ri, wsc->row, wsc->col, 1950 wsc->letter, attr); 1951 return 0; 1952 } 1953 } 1954 return EINVAL; 1955 } 1956 1957 #if 0 1958 static int 1959 mach64_load_font(void *v, void *cookie, struct wsdisplay_font *data) 1960 { 1961 1962 return 0; 1963 } 1964 #endif 1965 1966 void 1967 machfb_blank(struct mach64_softc *sc, int blank) 1968 { 1969 uint32_t reg; 1970 1971 #define MACH64_BLANK (CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | CRTC_VSYNC_DIS) 1972 1973 switch (blank) 1974 { 1975 case 0: 1976 reg = regr(sc, CRTC_GEN_CNTL); 1977 regw(sc, CRTC_GEN_CNTL, reg & ~(MACH64_BLANK)); 1978 break; 1979 case 1: 1980 reg = regr(sc, CRTC_GEN_CNTL); 1981 regw(sc, CRTC_GEN_CNTL, reg | (MACH64_BLANK)); 1982 break; 1983 default: 1984 break; 1985 } 1986 } 1987
Indexes created Fri Oct 03 02:09:57 GMT 2025