mfii.c revision 1.4.4.3 1 1.4.4.3 martin /* $NetBSD: mfii.c,v 1.4.4.3 2022/09/29 18:26:42 martin Exp $ */
2 1.1 bouyer /* $OpenBSD: mfii.c,v 1.58 2018/08/14 05:22:21 jmatthew Exp $ */
3 1.1 bouyer
4 1.1 bouyer /*
5 1.2 bouyer * Copyright (c) 2018 Manuel Bouyer <Manuel.Bouyer (at) lip6.fr>
6 1.1 bouyer * Copyright (c) 2012 David Gwynne <dlg (at) openbsd.org>
7 1.1 bouyer *
8 1.1 bouyer * Permission to use, copy, modify, and distribute this software for any
9 1.1 bouyer * purpose with or without fee is hereby granted, provided that the above
10 1.1 bouyer * copyright notice and this permission notice appear in all copies.
11 1.1 bouyer *
12 1.1 bouyer * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 1.1 bouyer * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 1.1 bouyer * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 1.1 bouyer * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 1.1 bouyer * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 1.1 bouyer * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 1.1 bouyer * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 1.1 bouyer */
20 1.1 bouyer
21 1.1 bouyer #include <sys/cdefs.h>
22 1.4.4.3 martin __KERNEL_RCSID(0, "$NetBSD: mfii.c,v 1.4.4.3 2022/09/29 18:26:42 martin Exp $");
23 1.1 bouyer
24 1.1 bouyer #include "bio.h"
25 1.1 bouyer
26 1.1 bouyer #include <sys/atomic.h>
27 1.1 bouyer #include <sys/param.h>
28 1.1 bouyer #include <sys/systm.h>
29 1.1 bouyer #include <sys/buf.h>
30 1.1 bouyer #include <sys/ioctl.h>
31 1.1 bouyer #include <sys/device.h>
32 1.1 bouyer #include <sys/kernel.h>
33 1.1 bouyer #include <sys/proc.h>
34 1.1 bouyer #include <sys/cpu.h>
35 1.1 bouyer #include <sys/conf.h>
36 1.1 bouyer #include <sys/kauth.h>
37 1.1 bouyer #include <sys/workqueue.h>
38 1.1 bouyer #include <sys/malloc.h>
39 1.1 bouyer
40 1.1 bouyer #include <uvm/uvm_param.h>
41 1.1 bouyer
42 1.1 bouyer #include <dev/pci/pcidevs.h>
43 1.1 bouyer #include <dev/pci/pcivar.h>
44 1.1 bouyer
45 1.1 bouyer #include <sys/bus.h>
46 1.1 bouyer
47 1.1 bouyer #include <dev/sysmon/sysmonvar.h>
48 1.1 bouyer #include <sys/envsys.h>
49 1.1 bouyer
50 1.1 bouyer #include <dev/scsipi/scsipi_all.h>
51 1.1 bouyer #include <dev/scsipi/scsi_all.h>
52 1.1 bouyer #include <dev/scsipi/scsi_spc.h>
53 1.1 bouyer #include <dev/scsipi/scsipi_disk.h>
54 1.1 bouyer #include <dev/scsipi/scsi_disk.h>
55 1.1 bouyer #include <dev/scsipi/scsiconf.h>
56 1.1 bouyer
57 1.1 bouyer #if NBIO > 0
58 1.1 bouyer #include <dev/biovar.h>
59 1.1 bouyer #endif /* NBIO > 0 */
60 1.1 bouyer
61 1.1 bouyer #include <dev/ic/mfireg.h>
62 1.1 bouyer #include <dev/pci/mpiireg.h>
63 1.1 bouyer
64 1.1 bouyer #define MFII_BAR 0x14
65 1.1 bouyer #define MFII_BAR_35 0x10
66 1.1 bouyer #define MFII_PCI_MEMSIZE 0x2000 /* 8k */
67 1.1 bouyer
68 1.1 bouyer #define MFII_OSTS_INTR_VALID 0x00000009
69 1.1 bouyer #define MFII_RPI 0x6c /* reply post host index */
70 1.1 bouyer #define MFII_OSP2 0xb4 /* outbound scratch pad 2 */
71 1.1 bouyer #define MFII_OSP3 0xb8 /* outbound scratch pad 3 */
72 1.1 bouyer
73 1.1 bouyer #define MFII_REQ_TYPE_SCSI MPII_REQ_DESCR_SCSI_IO
74 1.1 bouyer #define MFII_REQ_TYPE_LDIO (0x7 << 1)
75 1.1 bouyer #define MFII_REQ_TYPE_MFA (0x1 << 1)
76 1.1 bouyer #define MFII_REQ_TYPE_NO_LOCK (0x2 << 1)
77 1.1 bouyer #define MFII_REQ_TYPE_HI_PRI (0x6 << 1)
78 1.1 bouyer
79 1.1 bouyer #define MFII_REQ_MFA(_a) htole64((_a) | MFII_REQ_TYPE_MFA)
80 1.1 bouyer
81 1.1 bouyer #define MFII_FUNCTION_PASSTHRU_IO (0xf0)
82 1.1 bouyer #define MFII_FUNCTION_LDIO_REQUEST (0xf1)
83 1.1 bouyer
84 1.1 bouyer #define MFII_MAX_CHAIN_UNIT 0x00400000
85 1.1 bouyer #define MFII_MAX_CHAIN_MASK 0x000003E0
86 1.1 bouyer #define MFII_MAX_CHAIN_SHIFT 5
87 1.1 bouyer
88 1.1 bouyer #define MFII_256K_IO 128
89 1.1 bouyer #define MFII_1MB_IO (MFII_256K_IO * 4)
90 1.1 bouyer
91 1.1 bouyer #define MFII_CHAIN_FRAME_MIN 1024
92 1.1 bouyer
93 1.1 bouyer struct mfii_request_descr {
94 1.1 bouyer u_int8_t flags;
95 1.1 bouyer u_int8_t msix_index;
96 1.1 bouyer u_int16_t smid;
97 1.1 bouyer
98 1.1 bouyer u_int16_t lmid;
99 1.1 bouyer u_int16_t dev_handle;
100 1.1 bouyer } __packed;
101 1.1 bouyer
102 1.1 bouyer #define MFII_RAID_CTX_IO_TYPE_SYSPD (0x1 << 4)
103 1.1 bouyer #define MFII_RAID_CTX_TYPE_CUDA (0x2 << 4)
104 1.1 bouyer
105 1.1 bouyer struct mfii_raid_context {
106 1.1 bouyer u_int8_t type_nseg;
107 1.1 bouyer u_int8_t _reserved1;
108 1.1 bouyer u_int16_t timeout_value;
109 1.1 bouyer
110 1.1 bouyer u_int16_t reg_lock_flags;
111 1.1 bouyer #define MFII_RAID_CTX_RL_FLAGS_SEQNO_EN (0x08)
112 1.1 bouyer #define MFII_RAID_CTX_RL_FLAGS_CPU0 (0x00)
113 1.1 bouyer #define MFII_RAID_CTX_RL_FLAGS_CPU1 (0x10)
114 1.1 bouyer #define MFII_RAID_CTX_RL_FLAGS_CUDA (0x80)
115 1.1 bouyer
116 1.1 bouyer #define MFII_RAID_CTX_ROUTING_FLAGS_SQN (1 << 4)
117 1.1 bouyer #define MFII_RAID_CTX_ROUTING_FLAGS_CPU0 0
118 1.1 bouyer u_int16_t virtual_disk_target_id;
119 1.1 bouyer
120 1.1 bouyer u_int64_t reg_lock_row_lba;
121 1.1 bouyer
122 1.1 bouyer u_int32_t reg_lock_length;
123 1.1 bouyer
124 1.1 bouyer u_int16_t next_lm_id;
125 1.1 bouyer u_int8_t ex_status;
126 1.1 bouyer u_int8_t status;
127 1.1 bouyer
128 1.1 bouyer u_int8_t raid_flags;
129 1.1 bouyer u_int8_t num_sge;
130 1.1 bouyer u_int16_t config_seq_num;
131 1.1 bouyer
132 1.1 bouyer u_int8_t span_arm;
133 1.1 bouyer u_int8_t _reserved3[3];
134 1.1 bouyer } __packed;
135 1.1 bouyer
136 1.1 bouyer struct mfii_sge {
137 1.1 bouyer u_int64_t sg_addr;
138 1.1 bouyer u_int32_t sg_len;
139 1.1 bouyer u_int16_t _reserved;
140 1.1 bouyer u_int8_t sg_next_chain_offset;
141 1.1 bouyer u_int8_t sg_flags;
142 1.1 bouyer } __packed;
143 1.1 bouyer
144 1.1 bouyer #define MFII_SGE_ADDR_MASK (0x03)
145 1.1 bouyer #define MFII_SGE_ADDR_SYSTEM (0x00)
146 1.1 bouyer #define MFII_SGE_ADDR_IOCDDR (0x01)
147 1.1 bouyer #define MFII_SGE_ADDR_IOCPLB (0x02)
148 1.1 bouyer #define MFII_SGE_ADDR_IOCPLBNTA (0x03)
149 1.1 bouyer #define MFII_SGE_END_OF_LIST (0x40)
150 1.1 bouyer #define MFII_SGE_CHAIN_ELEMENT (0x80)
151 1.1 bouyer
152 1.1 bouyer #define MFII_REQUEST_SIZE 256
153 1.1 bouyer
154 1.1 bouyer #define MR_DCMD_LD_MAP_GET_INFO 0x0300e101
155 1.1 bouyer
156 1.1 bouyer #define MFII_MAX_ROW 32
157 1.1 bouyer #define MFII_MAX_ARRAY 128
158 1.1 bouyer
159 1.1 bouyer struct mfii_array_map {
160 1.1 bouyer uint16_t mam_pd[MFII_MAX_ROW];
161 1.1 bouyer } __packed;
162 1.1 bouyer
163 1.1 bouyer struct mfii_dev_handle {
164 1.1 bouyer uint16_t mdh_cur_handle;
165 1.1 bouyer uint8_t mdh_valid;
166 1.1 bouyer uint8_t mdh_reserved;
167 1.1 bouyer uint16_t mdh_handle[2];
168 1.1 bouyer } __packed;
169 1.1 bouyer
170 1.1 bouyer struct mfii_ld_map {
171 1.1 bouyer uint32_t mlm_total_size;
172 1.1 bouyer uint32_t mlm_reserved1[5];
173 1.1 bouyer uint32_t mlm_num_lds;
174 1.1 bouyer uint32_t mlm_reserved2;
175 1.1 bouyer uint8_t mlm_tgtid_to_ld[2 * MFI_MAX_LD];
176 1.1 bouyer uint8_t mlm_pd_timeout;
177 1.1 bouyer uint8_t mlm_reserved3[7];
178 1.1 bouyer struct mfii_array_map mlm_am[MFII_MAX_ARRAY];
179 1.1 bouyer struct mfii_dev_handle mlm_dev_handle[MFI_MAX_PD];
180 1.1 bouyer } __packed;
181 1.1 bouyer
182 1.1 bouyer struct mfii_task_mgmt {
183 1.1 bouyer union {
184 1.1 bouyer uint8_t request[128];
185 1.1 bouyer struct mpii_msg_scsi_task_request
186 1.1 bouyer mpii_request;
187 1.1 bouyer } __packed __aligned(8);
188 1.1 bouyer
189 1.1 bouyer union {
190 1.1 bouyer uint8_t reply[128];
191 1.1 bouyer uint32_t flags;
192 1.1 bouyer #define MFII_TASK_MGMT_FLAGS_LD (1 << 0)
193 1.1 bouyer #define MFII_TASK_MGMT_FLAGS_PD (1 << 1)
194 1.1 bouyer struct mpii_msg_scsi_task_reply
195 1.1 bouyer mpii_reply;
196 1.1 bouyer } __packed __aligned(8);
197 1.1 bouyer } __packed __aligned(8);
198 1.1 bouyer
199 1.1 bouyer /* We currently don't know the full details of the following struct */
200 1.1 bouyer struct mfii_foreign_scan_cfg {
201 1.4.4.1 bouyer char data[24];
202 1.4.4.1 bouyer } __packed;
203 1.1 bouyer
204 1.1 bouyer struct mfii_foreign_scan_info {
205 1.1 bouyer uint32_t count; /* Number of foreign configs found */
206 1.1 bouyer struct mfii_foreign_scan_cfg cfgs[8];
207 1.1 bouyer } __packed;
208 1.1 bouyer
209 1.1 bouyer struct mfii_dmamem {
210 1.1 bouyer bus_dmamap_t mdm_map;
211 1.1 bouyer bus_dma_segment_t mdm_seg;
212 1.1 bouyer size_t mdm_size;
213 1.1 bouyer void * mdm_kva;
214 1.1 bouyer };
215 1.1 bouyer #define MFII_DMA_MAP(_mdm) ((_mdm)->mdm_map)
216 1.1 bouyer #define MFII_DMA_LEN(_mdm) ((_mdm)->mdm_size)
217 1.1 bouyer #define MFII_DMA_DVA(_mdm) ((u_int64_t)(_mdm)->mdm_map->dm_segs[0].ds_addr)
218 1.1 bouyer #define MFII_DMA_KVA(_mdm) ((void *)(_mdm)->mdm_kva)
219 1.1 bouyer
220 1.1 bouyer struct mfii_softc;
221 1.1 bouyer
222 1.1 bouyer typedef enum mfii_direction {
223 1.1 bouyer MFII_DATA_NONE = 0,
224 1.1 bouyer MFII_DATA_IN,
225 1.1 bouyer MFII_DATA_OUT
226 1.1 bouyer } mfii_direction_t;
227 1.1 bouyer
228 1.1 bouyer struct mfii_ccb {
229 1.1 bouyer struct mfii_softc *ccb_sc;
230 1.1 bouyer void *ccb_request;
231 1.1 bouyer u_int64_t ccb_request_dva;
232 1.1 bouyer bus_addr_t ccb_request_offset;
233 1.1 bouyer
234 1.1 bouyer void *ccb_mfi;
235 1.1 bouyer u_int64_t ccb_mfi_dva;
236 1.1 bouyer bus_addr_t ccb_mfi_offset;
237 1.1 bouyer
238 1.1 bouyer struct mfi_sense *ccb_sense;
239 1.1 bouyer u_int64_t ccb_sense_dva;
240 1.1 bouyer bus_addr_t ccb_sense_offset;
241 1.1 bouyer
242 1.1 bouyer struct mfii_sge *ccb_sgl;
243 1.1 bouyer u_int64_t ccb_sgl_dva;
244 1.1 bouyer bus_addr_t ccb_sgl_offset;
245 1.1 bouyer u_int ccb_sgl_len;
246 1.1 bouyer
247 1.1 bouyer struct mfii_request_descr ccb_req;
248 1.1 bouyer
249 1.1 bouyer bus_dmamap_t ccb_dmamap64;
250 1.1 bouyer bus_dmamap_t ccb_dmamap32;
251 1.1 bouyer bool ccb_dma64;
252 1.1 bouyer
253 1.1 bouyer /* data for sgl */
254 1.1 bouyer void *ccb_data;
255 1.1 bouyer size_t ccb_len;
256 1.1 bouyer
257 1.1 bouyer mfii_direction_t ccb_direction;
258 1.1 bouyer
259 1.1 bouyer void *ccb_cookie;
260 1.1 bouyer kmutex_t ccb_mtx;
261 1.1 bouyer kcondvar_t ccb_cv;
262 1.1 bouyer void (*ccb_done)(struct mfii_softc *,
263 1.1 bouyer struct mfii_ccb *);
264 1.1 bouyer
265 1.1 bouyer u_int32_t ccb_flags;
266 1.1 bouyer #define MFI_CCB_F_ERR (1<<0)
267 1.1 bouyer u_int ccb_smid;
268 1.1 bouyer SIMPLEQ_ENTRY(mfii_ccb) ccb_link;
269 1.1 bouyer };
270 1.1 bouyer SIMPLEQ_HEAD(mfii_ccb_list, mfii_ccb);
271 1.1 bouyer
272 1.1 bouyer struct mfii_iop {
273 1.1 bouyer int bar;
274 1.1 bouyer int num_sge_loc;
275 1.1 bouyer #define MFII_IOP_NUM_SGE_LOC_ORIG 0
276 1.1 bouyer #define MFII_IOP_NUM_SGE_LOC_35 1
277 1.1 bouyer u_int16_t ldio_ctx_reg_lock_flags;
278 1.1 bouyer u_int8_t ldio_req_type;
279 1.1 bouyer u_int8_t ldio_ctx_type_nseg;
280 1.1 bouyer u_int8_t sge_flag_chain;
281 1.1 bouyer u_int8_t sge_flag_eol;
282 1.1 bouyer };
283 1.1 bouyer
284 1.1 bouyer struct mfii_softc {
285 1.1 bouyer device_t sc_dev;
286 1.1 bouyer struct scsipi_channel sc_chan;
287 1.1 bouyer struct scsipi_adapter sc_adapt;
288 1.1 bouyer
289 1.1 bouyer const struct mfii_iop *sc_iop;
290 1.1 bouyer
291 1.1 bouyer pci_chipset_tag_t sc_pc;
292 1.1 bouyer pcitag_t sc_tag;
293 1.1 bouyer
294 1.1 bouyer bus_space_tag_t sc_iot;
295 1.1 bouyer bus_space_handle_t sc_ioh;
296 1.1 bouyer bus_size_t sc_ios;
297 1.1 bouyer bus_dma_tag_t sc_dmat;
298 1.1 bouyer bus_dma_tag_t sc_dmat64;
299 1.1 bouyer bool sc_64bit_dma;
300 1.1 bouyer
301 1.1 bouyer void *sc_ih;
302 1.1 bouyer
303 1.1 bouyer kmutex_t sc_ccb_mtx;
304 1.1 bouyer kmutex_t sc_post_mtx;
305 1.1 bouyer
306 1.1 bouyer u_int sc_max_fw_cmds;
307 1.1 bouyer u_int sc_max_cmds;
308 1.1 bouyer u_int sc_max_sgl;
309 1.1 bouyer
310 1.1 bouyer u_int sc_reply_postq_depth;
311 1.1 bouyer u_int sc_reply_postq_index;
312 1.1 bouyer kmutex_t sc_reply_postq_mtx;
313 1.1 bouyer struct mfii_dmamem *sc_reply_postq;
314 1.1 bouyer
315 1.1 bouyer struct mfii_dmamem *sc_requests;
316 1.1 bouyer struct mfii_dmamem *sc_mfi;
317 1.1 bouyer struct mfii_dmamem *sc_sense;
318 1.1 bouyer struct mfii_dmamem *sc_sgl;
319 1.1 bouyer
320 1.1 bouyer struct mfii_ccb *sc_ccb;
321 1.1 bouyer struct mfii_ccb_list sc_ccb_freeq;
322 1.1 bouyer
323 1.1 bouyer struct mfii_ccb *sc_aen_ccb;
324 1.1 bouyer struct workqueue *sc_aen_wq;
325 1.1 bouyer struct work sc_aen_work;
326 1.1 bouyer
327 1.1 bouyer kmutex_t sc_abort_mtx;
328 1.1 bouyer struct mfii_ccb_list sc_abort_list;
329 1.1 bouyer struct workqueue *sc_abort_wq;
330 1.1 bouyer struct work sc_abort_work;
331 1.1 bouyer
332 1.1 bouyer /* save some useful information for logical drives that is missing
333 1.1 bouyer * in sc_ld_list
334 1.1 bouyer */
335 1.1 bouyer struct {
336 1.1 bouyer bool ld_present;
337 1.1 bouyer char ld_dev[16]; /* device name sd? */
338 1.1 bouyer } sc_ld[MFI_MAX_LD];
339 1.1 bouyer int sc_target_lds[MFI_MAX_LD];
340 1.1 bouyer
341 1.1 bouyer /* bio */
342 1.4.4.1 bouyer struct mfi_conf *sc_cfg;
343 1.4.4.1 bouyer struct mfi_ctrl_info sc_info;
344 1.1 bouyer struct mfi_ld_list sc_ld_list;
345 1.1 bouyer struct mfi_ld_details *sc_ld_details; /* array to all logical disks */
346 1.1 bouyer int sc_no_pd; /* used physical disks */
347 1.1 bouyer int sc_ld_sz; /* sizeof sc_ld_details */
348 1.1 bouyer
349 1.1 bouyer /* mgmt lock */
350 1.1 bouyer kmutex_t sc_lock;
351 1.1 bouyer bool sc_running;
352 1.1 bouyer
353 1.1 bouyer /* sensors */
354 1.1 bouyer struct sysmon_envsys *sc_sme;
355 1.1 bouyer envsys_data_t *sc_sensors;
356 1.1 bouyer bool sc_bbuok;
357 1.1 bouyer
358 1.1 bouyer device_t sc_child;
359 1.1 bouyer };
360 1.1 bouyer
361 1.1 bouyer // #define MFII_DEBUG
362 1.1 bouyer #ifdef MFII_DEBUG
363 1.1 bouyer #define DPRINTF(x...) do { if (mfii_debug) printf(x); } while(0)
364 1.1 bouyer #define DNPRINTF(n,x...) do { if (mfii_debug & n) printf(x); } while(0)
365 1.1 bouyer #define MFII_D_CMD 0x0001
366 1.1 bouyer #define MFII_D_INTR 0x0002
367 1.1 bouyer #define MFII_D_MISC 0x0004
368 1.1 bouyer #define MFII_D_DMA 0x0008
369 1.1 bouyer #define MFII_D_IOCTL 0x0010
370 1.1 bouyer #define MFII_D_RW 0x0020
371 1.1 bouyer #define MFII_D_MEM 0x0040
372 1.1 bouyer #define MFII_D_CCB 0x0080
373 1.1 bouyer uint32_t mfii_debug = 0
374 1.1 bouyer /* | MFII_D_CMD */
375 1.1 bouyer /* | MFII_D_INTR */
376 1.4.4.1 bouyer | MFII_D_MISC
377 1.1 bouyer /* | MFII_D_DMA */
378 1.1 bouyer /* | MFII_D_IOCTL */
379 1.1 bouyer /* | MFII_D_RW */
380 1.1 bouyer /* | MFII_D_MEM */
381 1.1 bouyer /* | MFII_D_CCB */
382 1.1 bouyer ;
383 1.1 bouyer #else
384 1.1 bouyer #define DPRINTF(x...)
385 1.1 bouyer #define DNPRINTF(n,x...)
386 1.1 bouyer #endif
387 1.1 bouyer
388 1.4.4.1 bouyer static int mfii_match(device_t, cfdata_t, void *);
389 1.4.4.1 bouyer static void mfii_attach(device_t, device_t, void *);
390 1.4.4.1 bouyer static int mfii_detach(device_t, int);
391 1.4.4.1 bouyer static int mfii_rescan(device_t, const char *, const int *);
392 1.4.4.1 bouyer static void mfii_childdetached(device_t, device_t);
393 1.1 bouyer static bool mfii_suspend(device_t, const pmf_qual_t *);
394 1.1 bouyer static bool mfii_resume(device_t, const pmf_qual_t *);
395 1.1 bouyer static bool mfii_shutdown(device_t, int);
396 1.1 bouyer
397 1.1 bouyer
398 1.1 bouyer CFATTACH_DECL3_NEW(mfii, sizeof(struct mfii_softc),
399 1.1 bouyer mfii_match, mfii_attach, mfii_detach, NULL, mfii_rescan,
400 1.1 bouyer mfii_childdetached, DVF_DETACH_SHUTDOWN);
401 1.1 bouyer
402 1.4.4.1 bouyer static void mfii_scsipi_request(struct scsipi_channel *,
403 1.1 bouyer scsipi_adapter_req_t, void *);
404 1.4.4.1 bouyer static void mfii_scsi_cmd_done(struct mfii_softc *, struct mfii_ccb *);
405 1.1 bouyer
406 1.1 bouyer #define DEVNAME(_sc) (device_xname((_sc)->sc_dev))
407 1.1 bouyer
408 1.1 bouyer static u_int32_t mfii_read(struct mfii_softc *, bus_size_t);
409 1.1 bouyer static void mfii_write(struct mfii_softc *, bus_size_t, u_int32_t);
410 1.1 bouyer
411 1.4.4.1 bouyer static struct mfii_dmamem * mfii_dmamem_alloc(struct mfii_softc *, size_t);
412 1.4.4.1 bouyer static void mfii_dmamem_free(struct mfii_softc *,
413 1.1 bouyer struct mfii_dmamem *);
414 1.1 bouyer
415 1.4.4.1 bouyer static struct mfii_ccb * mfii_get_ccb(struct mfii_softc *);
416 1.4.4.1 bouyer static void mfii_put_ccb(struct mfii_softc *, struct mfii_ccb *);
417 1.4.4.1 bouyer static int mfii_init_ccb(struct mfii_softc *);
418 1.4.4.1 bouyer static void mfii_scrub_ccb(struct mfii_ccb *);
419 1.4.4.1 bouyer
420 1.4.4.1 bouyer static int mfii_transition_firmware(struct mfii_softc *);
421 1.4.4.1 bouyer static int mfii_initialise_firmware(struct mfii_softc *);
422 1.4.4.1 bouyer static int mfii_get_info(struct mfii_softc *);
423 1.4.4.1 bouyer
424 1.4.4.1 bouyer static void mfii_start(struct mfii_softc *, struct mfii_ccb *);
425 1.4.4.1 bouyer static void mfii_done(struct mfii_softc *, struct mfii_ccb *);
426 1.4.4.1 bouyer static int mfii_poll(struct mfii_softc *, struct mfii_ccb *);
427 1.4.4.1 bouyer static void mfii_poll_done(struct mfii_softc *, struct mfii_ccb *);
428 1.4.4.1 bouyer static int mfii_exec(struct mfii_softc *, struct mfii_ccb *);
429 1.4.4.1 bouyer static void mfii_exec_done(struct mfii_softc *, struct mfii_ccb *);
430 1.4.4.1 bouyer static int mfii_my_intr(struct mfii_softc *);
431 1.4.4.1 bouyer static int mfii_intr(void *);
432 1.4.4.1 bouyer static void mfii_postq(struct mfii_softc *);
433 1.1 bouyer
434 1.4.4.1 bouyer static int mfii_load_ccb(struct mfii_softc *, struct mfii_ccb *,
435 1.1 bouyer void *, int);
436 1.4.4.1 bouyer static int mfii_load_mfa(struct mfii_softc *, struct mfii_ccb *,
437 1.1 bouyer void *, int);
438 1.1 bouyer
439 1.4.4.1 bouyer static int mfii_mfa_poll(struct mfii_softc *, struct mfii_ccb *);
440 1.1 bouyer
441 1.4.4.1 bouyer static int mfii_mgmt(struct mfii_softc *, uint32_t,
442 1.1 bouyer const union mfi_mbox *, void *, size_t,
443 1.1 bouyer mfii_direction_t, bool);
444 1.4.4.1 bouyer static int mfii_do_mgmt(struct mfii_softc *, struct mfii_ccb *,
445 1.1 bouyer uint32_t, const union mfi_mbox *, void *, size_t,
446 1.1 bouyer mfii_direction_t, bool);
447 1.4.4.1 bouyer static void mfii_empty_done(struct mfii_softc *, struct mfii_ccb *);
448 1.1 bouyer
449 1.4.4.1 bouyer static int mfii_scsi_cmd_io(struct mfii_softc *,
450 1.1 bouyer struct mfii_ccb *, struct scsipi_xfer *);
451 1.4.4.1 bouyer static int mfii_scsi_cmd_cdb(struct mfii_softc *,
452 1.1 bouyer struct mfii_ccb *, struct scsipi_xfer *);
453 1.4.4.1 bouyer static void mfii_scsi_cmd_tmo(void *);
454 1.1 bouyer
455 1.4.4.1 bouyer static void mfii_abort_task(struct work *, void *);
456 1.4.4.1 bouyer static void mfii_abort(struct mfii_softc *, struct mfii_ccb *,
457 1.1 bouyer uint16_t, uint16_t, uint8_t, uint32_t);
458 1.4.4.1 bouyer static void mfii_scsi_cmd_abort_done(struct mfii_softc *,
459 1.1 bouyer struct mfii_ccb *);
460 1.1 bouyer
461 1.4.4.1 bouyer static int mfii_aen_register(struct mfii_softc *);
462 1.4.4.1 bouyer static void mfii_aen_start(struct mfii_softc *, struct mfii_ccb *,
463 1.1 bouyer struct mfii_dmamem *, uint32_t);
464 1.4.4.1 bouyer static void mfii_aen_done(struct mfii_softc *, struct mfii_ccb *);
465 1.4.4.1 bouyer static void mfii_aen(struct work *, void *);
466 1.4.4.1 bouyer static void mfii_aen_unregister(struct mfii_softc *);
467 1.1 bouyer
468 1.4.4.1 bouyer static void mfii_aen_pd_insert(struct mfii_softc *,
469 1.1 bouyer const struct mfi_evtarg_pd_address *);
470 1.4.4.1 bouyer static void mfii_aen_pd_remove(struct mfii_softc *,
471 1.1 bouyer const struct mfi_evtarg_pd_address *);
472 1.4.4.1 bouyer static void mfii_aen_pd_state_change(struct mfii_softc *,
473 1.1 bouyer const struct mfi_evtarg_pd_state *);
474 1.4.4.1 bouyer static void mfii_aen_ld_update(struct mfii_softc *);
475 1.1 bouyer
476 1.1 bouyer #if NBIO > 0
477 1.4.4.1 bouyer static int mfii_ioctl(device_t, u_long, void *);
478 1.4.4.1 bouyer static int mfii_ioctl_inq(struct mfii_softc *, struct bioc_inq *);
479 1.4.4.1 bouyer static int mfii_ioctl_vol(struct mfii_softc *, struct bioc_vol *);
480 1.4.4.1 bouyer static int mfii_ioctl_disk(struct mfii_softc *, struct bioc_disk *);
481 1.4.4.1 bouyer static int mfii_ioctl_alarm(struct mfii_softc *, struct bioc_alarm *);
482 1.4.4.1 bouyer static int mfii_ioctl_blink(struct mfii_softc *sc, struct bioc_blink *);
483 1.4.4.1 bouyer static int mfii_ioctl_setstate(struct mfii_softc *,
484 1.1 bouyer struct bioc_setstate *);
485 1.4.4.1 bouyer static int mfii_bio_hs(struct mfii_softc *, int, int, void *);
486 1.4.4.1 bouyer static int mfii_bio_getitall(struct mfii_softc *);
487 1.1 bouyer #endif /* NBIO > 0 */
488 1.1 bouyer
489 1.1 bouyer #if 0
490 1.1 bouyer static const char *mfi_bbu_indicators[] = {
491 1.1 bouyer "pack missing",
492 1.1 bouyer "voltage low",
493 1.1 bouyer "temp high",
494 1.1 bouyer "charge active",
495 1.1 bouyer "discharge active",
496 1.1 bouyer "learn cycle req'd",
497 1.1 bouyer "learn cycle active",
498 1.1 bouyer "learn cycle failed",
499 1.1 bouyer "learn cycle timeout",
500 1.1 bouyer "I2C errors",
501 1.1 bouyer "replace pack",
502 1.1 bouyer "low capacity",
503 1.1 bouyer "periodic learn req'd"
504 1.1 bouyer };
505 1.1 bouyer #endif
506 1.1 bouyer
507 1.4.4.1 bouyer static void mfii_init_ld_sensor(struct mfii_softc *, envsys_data_t *, int);
508 1.4.4.1 bouyer static void mfii_refresh_ld_sensor(struct mfii_softc *, envsys_data_t *);
509 1.1 bouyer static void mfii_attach_sensor(struct mfii_softc *, envsys_data_t *);
510 1.4.4.1 bouyer static int mfii_create_sensors(struct mfii_softc *);
511 1.1 bouyer static int mfii_destroy_sensors(struct mfii_softc *);
512 1.4.4.1 bouyer static void mfii_refresh_sensor(struct sysmon_envsys *, envsys_data_t *);
513 1.4.4.1 bouyer static void mfii_bbu(struct mfii_softc *, envsys_data_t *);
514 1.1 bouyer
515 1.1 bouyer /*
516 1.1 bouyer * mfii boards support asynchronous (and non-polled) completion of
517 1.1 bouyer * dcmds by proxying them through a passthru mpii command that points
518 1.1 bouyer * at a dcmd frame. since the passthru command is submitted like
519 1.1 bouyer * the scsi commands using an SMID in the request descriptor,
520 1.1 bouyer * ccb_request memory * must contain the passthru command because
521 1.1 bouyer * that is what the SMID refers to. this means ccb_request cannot
522 1.1 bouyer * contain the dcmd. rather than allocating separate dma memory to
523 1.1 bouyer * hold the dcmd, we reuse the sense memory buffer for it.
524 1.1 bouyer */
525 1.1 bouyer
526 1.4.4.1 bouyer static void mfii_dcmd_start(struct mfii_softc *, struct mfii_ccb *);
527 1.1 bouyer
528 1.1 bouyer static inline void
529 1.1 bouyer mfii_dcmd_scrub(struct mfii_ccb *ccb)
530 1.1 bouyer {
531 1.1 bouyer memset(ccb->ccb_sense, 0, sizeof(*ccb->ccb_sense));
532 1.1 bouyer }
533 1.1 bouyer
534 1.1 bouyer static inline struct mfi_dcmd_frame *
535 1.1 bouyer mfii_dcmd_frame(struct mfii_ccb *ccb)
536 1.1 bouyer {
537 1.1 bouyer CTASSERT(sizeof(struct mfi_dcmd_frame) <= sizeof(*ccb->ccb_sense));
538 1.1 bouyer return ((struct mfi_dcmd_frame *)ccb->ccb_sense);
539 1.1 bouyer }
540 1.1 bouyer
541 1.1 bouyer static inline void
542 1.1 bouyer mfii_dcmd_sync(struct mfii_softc *sc, struct mfii_ccb *ccb, int flags)
543 1.1 bouyer {
544 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_sense),
545 1.1 bouyer ccb->ccb_sense_offset, sizeof(*ccb->ccb_sense), flags);
546 1.1 bouyer }
547 1.1 bouyer
548 1.1 bouyer #define mfii_fw_state(_sc) mfii_read((_sc), MFI_OSP)
549 1.1 bouyer
550 1.4.4.1 bouyer static const struct mfii_iop mfii_iop_thunderbolt = {
551 1.1 bouyer MFII_BAR,
552 1.1 bouyer MFII_IOP_NUM_SGE_LOC_ORIG,
553 1.1 bouyer 0,
554 1.1 bouyer MFII_REQ_TYPE_LDIO,
555 1.1 bouyer 0,
556 1.1 bouyer MFII_SGE_CHAIN_ELEMENT | MFII_SGE_ADDR_IOCPLBNTA,
557 1.1 bouyer 0
558 1.1 bouyer };
559 1.1 bouyer
560 1.1 bouyer /*
561 1.1 bouyer * a lot of these values depend on us not implementing fastpath yet.
562 1.1 bouyer */
563 1.4.4.1 bouyer static const struct mfii_iop mfii_iop_25 = {
564 1.1 bouyer MFII_BAR,
565 1.1 bouyer MFII_IOP_NUM_SGE_LOC_ORIG,
566 1.1 bouyer MFII_RAID_CTX_RL_FLAGS_CPU0, /* | MFII_RAID_CTX_RL_FLAGS_SEQNO_EN */
567 1.1 bouyer MFII_REQ_TYPE_NO_LOCK,
568 1.1 bouyer MFII_RAID_CTX_TYPE_CUDA | 0x1,
569 1.1 bouyer MFII_SGE_CHAIN_ELEMENT,
570 1.1 bouyer MFII_SGE_END_OF_LIST
571 1.1 bouyer };
572 1.1 bouyer
573 1.4.4.1 bouyer static const struct mfii_iop mfii_iop_35 = {
574 1.1 bouyer MFII_BAR_35,
575 1.1 bouyer MFII_IOP_NUM_SGE_LOC_35,
576 1.1 bouyer MFII_RAID_CTX_ROUTING_FLAGS_CPU0, /* | MFII_RAID_CTX_ROUTING_FLAGS_SQN */
577 1.1 bouyer MFII_REQ_TYPE_NO_LOCK,
578 1.1 bouyer MFII_RAID_CTX_TYPE_CUDA | 0x1,
579 1.1 bouyer MFII_SGE_CHAIN_ELEMENT,
580 1.1 bouyer MFII_SGE_END_OF_LIST
581 1.1 bouyer };
582 1.1 bouyer
583 1.1 bouyer struct mfii_device {
584 1.1 bouyer pcireg_t mpd_vendor;
585 1.1 bouyer pcireg_t mpd_product;
586 1.1 bouyer const struct mfii_iop *mpd_iop;
587 1.1 bouyer };
588 1.1 bouyer
589 1.4.4.1 bouyer static const struct mfii_device mfii_devices[] = {
590 1.4.4.2 martin /* Fusion */
591 1.1 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_2208,
592 1.1 bouyer &mfii_iop_thunderbolt },
593 1.4.4.2 martin /* Fury */
594 1.1 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3008,
595 1.1 bouyer &mfii_iop_25 },
596 1.4.4.2 martin /* Invader */
597 1.1 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3108,
598 1.1 bouyer &mfii_iop_25 },
599 1.4.4.2 martin /* Intruder */
600 1.4.4.2 martin { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3316,
601 1.4.4.2 martin &mfii_iop_25 },
602 1.4.4.2 martin { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3324,
603 1.4.4.2 martin &mfii_iop_25 },
604 1.4.4.2 martin /* Cutlass */
605 1.4.4.2 martin { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_32XX_1,
606 1.4.4.2 martin &mfii_iop_25 },
607 1.4.4.2 martin { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_32XX_2,
608 1.4.4.2 martin &mfii_iop_25 },
609 1.4.4.2 martin /* Crusader */
610 1.1 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3404,
611 1.1 bouyer &mfii_iop_35 },
612 1.4.4.2 martin { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3416,
613 1.4.4.2 martin &mfii_iop_35 },
614 1.4.4.2 martin /* Ventura */
615 1.1 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3504,
616 1.1 bouyer &mfii_iop_35 },
617 1.4.4.2 martin { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3516,
618 1.4.4.2 martin &mfii_iop_35 },
619 1.4.4.2 martin /* Tomcat */
620 1.1 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3408,
621 1.1 bouyer &mfii_iop_35 },
622 1.4.4.2 martin /* Harpoon */
623 1.1 bouyer { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3508,
624 1.1 bouyer &mfii_iop_35 }
625 1.1 bouyer };
626 1.1 bouyer
627 1.4.4.1 bouyer static const struct mfii_iop *mfii_find_iop(struct pci_attach_args *);
628 1.1 bouyer
629 1.4.4.1 bouyer static const struct mfii_iop *
630 1.1 bouyer mfii_find_iop(struct pci_attach_args *pa)
631 1.1 bouyer {
632 1.1 bouyer const struct mfii_device *mpd;
633 1.1 bouyer int i;
634 1.1 bouyer
635 1.1 bouyer for (i = 0; i < __arraycount(mfii_devices); i++) {
636 1.1 bouyer mpd = &mfii_devices[i];
637 1.1 bouyer
638 1.1 bouyer if (mpd->mpd_vendor == PCI_VENDOR(pa->pa_id) &&
639 1.1 bouyer mpd->mpd_product == PCI_PRODUCT(pa->pa_id))
640 1.1 bouyer return (mpd->mpd_iop);
641 1.1 bouyer }
642 1.1 bouyer
643 1.1 bouyer return (NULL);
644 1.1 bouyer }
645 1.1 bouyer
646 1.4.4.1 bouyer static int
647 1.1 bouyer mfii_match(device_t parent, cfdata_t match, void *aux)
648 1.1 bouyer {
649 1.1 bouyer return ((mfii_find_iop(aux) != NULL) ? 2 : 0);
650 1.1 bouyer }
651 1.1 bouyer
652 1.4.4.1 bouyer static void
653 1.1 bouyer mfii_attach(device_t parent, device_t self, void *aux)
654 1.1 bouyer {
655 1.1 bouyer struct mfii_softc *sc = device_private(self);
656 1.1 bouyer struct pci_attach_args *pa = aux;
657 1.1 bouyer pcireg_t memtype;
658 1.4.4.3 martin pci_intr_handle_t *ihp;
659 1.1 bouyer char intrbuf[PCI_INTRSTR_LEN];
660 1.1 bouyer const char *intrstr;
661 1.1 bouyer u_int32_t status, scpad2, scpad3;
662 1.1 bouyer int chain_frame_sz, nsge_in_io, nsge_in_chain, i;
663 1.1 bouyer struct scsipi_adapter *adapt = &sc->sc_adapt;
664 1.1 bouyer struct scsipi_channel *chan = &sc->sc_chan;
665 1.1 bouyer
666 1.1 bouyer /* init sc */
667 1.1 bouyer sc->sc_dev = self;
668 1.1 bouyer sc->sc_iop = mfii_find_iop(aux);
669 1.1 bouyer sc->sc_dmat = pa->pa_dmat;
670 1.1 bouyer if (pci_dma64_available(pa)) {
671 1.1 bouyer sc->sc_dmat64 = pa->pa_dmat64;
672 1.1 bouyer sc->sc_64bit_dma = 1;
673 1.1 bouyer } else {
674 1.1 bouyer sc->sc_dmat64 = pa->pa_dmat;
675 1.1 bouyer sc->sc_64bit_dma = 0;
676 1.1 bouyer }
677 1.1 bouyer SIMPLEQ_INIT(&sc->sc_ccb_freeq);
678 1.1 bouyer mutex_init(&sc->sc_ccb_mtx, MUTEX_DEFAULT, IPL_BIO);
679 1.1 bouyer mutex_init(&sc->sc_post_mtx, MUTEX_DEFAULT, IPL_BIO);
680 1.1 bouyer mutex_init(&sc->sc_reply_postq_mtx, MUTEX_DEFAULT, IPL_BIO);
681 1.1 bouyer
682 1.1 bouyer mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
683 1.1 bouyer
684 1.1 bouyer sc->sc_aen_ccb = NULL;
685 1.1 bouyer snprintf(intrbuf, sizeof(intrbuf) - 1, "%saen", device_xname(self));
686 1.1 bouyer workqueue_create(&sc->sc_aen_wq, intrbuf, mfii_aen, sc,
687 1.1 bouyer PRI_BIO, IPL_BIO, WQ_MPSAFE);
688 1.1 bouyer
689 1.1 bouyer snprintf(intrbuf, sizeof(intrbuf) - 1, "%sabrt", device_xname(self));
690 1.1 bouyer workqueue_create(&sc->sc_abort_wq, intrbuf, mfii_abort_task,
691 1.1 bouyer sc, PRI_BIO, IPL_BIO, WQ_MPSAFE);
692 1.1 bouyer
693 1.1 bouyer mutex_init(&sc->sc_abort_mtx, MUTEX_DEFAULT, IPL_BIO);
694 1.1 bouyer SIMPLEQ_INIT(&sc->sc_abort_list);
695 1.1 bouyer
696 1.1 bouyer /* wire up the bus shizz */
697 1.1 bouyer memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, sc->sc_iop->bar);
698 1.1 bouyer memtype |= PCI_MAPREG_MEM_TYPE_32BIT;
699 1.1 bouyer if (pci_mapreg_map(pa, sc->sc_iop->bar, memtype, 0,
700 1.1 bouyer &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_ios)) {
701 1.1 bouyer aprint_error(": unable to map registers\n");
702 1.1 bouyer return;
703 1.1 bouyer }
704 1.1 bouyer
705 1.1 bouyer /* disable interrupts */
706 1.1 bouyer mfii_write(sc, MFI_OMSK, 0xffffffff);
707 1.1 bouyer
708 1.4.4.3 martin if (pci_intr_alloc(pa, &ihp, NULL, 0)) {
709 1.1 bouyer aprint_error(": unable to map interrupt\n");
710 1.1 bouyer goto pci_unmap;
711 1.1 bouyer }
712 1.4.4.3 martin intrstr = pci_intr_string(pa->pa_pc, ihp[0], intrbuf, sizeof(intrbuf));
713 1.4.4.3 martin pci_intr_setattr(pa->pa_pc, &ihp[0], PCI_INTR_MPSAFE, true);
714 1.1 bouyer
715 1.1 bouyer /* lets get started */
716 1.1 bouyer if (mfii_transition_firmware(sc))
717 1.1 bouyer goto pci_unmap;
718 1.1 bouyer sc->sc_running = true;
719 1.1 bouyer
720 1.1 bouyer /* determine max_cmds (refer to the Linux megaraid_sas driver) */
721 1.1 bouyer scpad3 = mfii_read(sc, MFII_OSP3);
722 1.1 bouyer status = mfii_fw_state(sc);
723 1.1 bouyer sc->sc_max_fw_cmds = scpad3 & MFI_STATE_MAXCMD_MASK;
724 1.1 bouyer if (sc->sc_max_fw_cmds == 0)
725 1.1 bouyer sc->sc_max_fw_cmds = status & MFI_STATE_MAXCMD_MASK;
726 1.1 bouyer /*
727 1.1 bouyer * reduce max_cmds by 1 to ensure that the reply queue depth does not
728 1.1 bouyer * exceed FW supplied max_fw_cmds.
729 1.1 bouyer */
730 1.1 bouyer sc->sc_max_cmds = uimin(sc->sc_max_fw_cmds, 1024) - 1;
731 1.1 bouyer
732 1.1 bouyer /* determine max_sgl (refer to the Linux megaraid_sas driver) */
733 1.1 bouyer scpad2 = mfii_read(sc, MFII_OSP2);
734 1.1 bouyer chain_frame_sz =
735 1.1 bouyer ((scpad2 & MFII_MAX_CHAIN_MASK) >> MFII_MAX_CHAIN_SHIFT) *
736 1.1 bouyer ((scpad2 & MFII_MAX_CHAIN_UNIT) ? MFII_1MB_IO : MFII_256K_IO);
737 1.1 bouyer if (chain_frame_sz < MFII_CHAIN_FRAME_MIN)
738 1.1 bouyer chain_frame_sz = MFII_CHAIN_FRAME_MIN;
739 1.1 bouyer
740 1.1 bouyer nsge_in_io = (MFII_REQUEST_SIZE -
741 1.1 bouyer sizeof(struct mpii_msg_scsi_io) -
742 1.1 bouyer sizeof(struct mfii_raid_context)) / sizeof(struct mfii_sge);
743 1.1 bouyer nsge_in_chain = chain_frame_sz / sizeof(struct mfii_sge);
744 1.1 bouyer
745 1.1 bouyer /* round down to nearest power of two */
746 1.1 bouyer sc->sc_max_sgl = 1;
747 1.1 bouyer while ((sc->sc_max_sgl << 1) <= (nsge_in_io + nsge_in_chain))
748 1.1 bouyer sc->sc_max_sgl <<= 1;
749 1.1 bouyer
750 1.1 bouyer DNPRINTF(MFII_D_MISC, "%s: OSP 0x%08x, OSP2 0x%08x, OSP3 0x%08x\n",
751 1.1 bouyer DEVNAME(sc), status, scpad2, scpad3);
752 1.1 bouyer DNPRINTF(MFII_D_MISC, "%s: max_fw_cmds %d, max_cmds %d\n",
753 1.1 bouyer DEVNAME(sc), sc->sc_max_fw_cmds, sc->sc_max_cmds);
754 1.1 bouyer DNPRINTF(MFII_D_MISC, "%s: nsge_in_io %d, nsge_in_chain %d, "
755 1.1 bouyer "max_sgl %d\n", DEVNAME(sc), nsge_in_io, nsge_in_chain,
756 1.1 bouyer sc->sc_max_sgl);
757 1.1 bouyer
758 1.1 bouyer /* sense memory */
759 1.1 bouyer CTASSERT(sizeof(struct mfi_sense) == MFI_SENSE_SIZE);
760 1.1 bouyer sc->sc_sense = mfii_dmamem_alloc(sc, sc->sc_max_cmds * MFI_SENSE_SIZE);
761 1.1 bouyer if (sc->sc_sense == NULL) {
762 1.1 bouyer aprint_error(": unable to allocate sense memory\n");
763 1.1 bouyer goto pci_unmap;
764 1.1 bouyer }
765 1.1 bouyer
766 1.1 bouyer /* reply post queue */
767 1.1 bouyer sc->sc_reply_postq_depth = roundup(sc->sc_max_fw_cmds, 16);
768 1.1 bouyer
769 1.1 bouyer sc->sc_reply_postq = mfii_dmamem_alloc(sc,
770 1.1 bouyer sc->sc_reply_postq_depth * sizeof(struct mpii_reply_descr));
771 1.1 bouyer if (sc->sc_reply_postq == NULL)
772 1.1 bouyer goto free_sense;
773 1.1 bouyer
774 1.1 bouyer memset(MFII_DMA_KVA(sc->sc_reply_postq), 0xff,
775 1.1 bouyer MFII_DMA_LEN(sc->sc_reply_postq));
776 1.1 bouyer
777 1.1 bouyer /* MPII request frame array */
778 1.1 bouyer sc->sc_requests = mfii_dmamem_alloc(sc,
779 1.1 bouyer MFII_REQUEST_SIZE * (sc->sc_max_cmds + 1));
780 1.1 bouyer if (sc->sc_requests == NULL)
781 1.1 bouyer goto free_reply_postq;
782 1.1 bouyer
783 1.1 bouyer /* MFI command frame array */
784 1.1 bouyer sc->sc_mfi = mfii_dmamem_alloc(sc, sc->sc_max_cmds * MFI_FRAME_SIZE);
785 1.1 bouyer if (sc->sc_mfi == NULL)
786 1.1 bouyer goto free_requests;
787 1.1 bouyer
788 1.1 bouyer /* MPII SGL array */
789 1.1 bouyer sc->sc_sgl = mfii_dmamem_alloc(sc, sc->sc_max_cmds *
790 1.1 bouyer sizeof(struct mfii_sge) * sc->sc_max_sgl);
791 1.1 bouyer if (sc->sc_sgl == NULL)
792 1.1 bouyer goto free_mfi;
793 1.1 bouyer
794 1.1 bouyer if (mfii_init_ccb(sc) != 0) {
795 1.1 bouyer aprint_error(": could not init ccb list\n");
796 1.1 bouyer goto free_sgl;
797 1.1 bouyer }
798 1.1 bouyer
799 1.1 bouyer /* kickstart firmware with all addresses and pointers */
800 1.1 bouyer if (mfii_initialise_firmware(sc) != 0) {
801 1.1 bouyer aprint_error(": could not initialize firmware\n");
802 1.1 bouyer goto free_sgl;
803 1.1 bouyer }
804 1.1 bouyer
805 1.1 bouyer mutex_enter(&sc->sc_lock);
806 1.1 bouyer if (mfii_get_info(sc) != 0) {
807 1.1 bouyer mutex_exit(&sc->sc_lock);
808 1.1 bouyer aprint_error(": could not retrieve controller information\n");
809 1.1 bouyer goto free_sgl;
810 1.1 bouyer }
811 1.1 bouyer mutex_exit(&sc->sc_lock);
812 1.1 bouyer
813 1.1 bouyer aprint_normal(": \"%s\", firmware %s",
814 1.1 bouyer sc->sc_info.mci_product_name, sc->sc_info.mci_package_version);
815 1.1 bouyer if (le16toh(sc->sc_info.mci_memory_size) > 0) {
816 1.1 bouyer aprint_normal(", %uMB cache",
817 1.1 bouyer le16toh(sc->sc_info.mci_memory_size));
818 1.1 bouyer }
819 1.1 bouyer aprint_normal("\n");
820 1.1 bouyer aprint_naive("\n");
821 1.1 bouyer
822 1.4.4.3 martin sc->sc_ih = pci_intr_establish_xname(sc->sc_pc, ihp[0], IPL_BIO,
823 1.1 bouyer mfii_intr, sc, DEVNAME(sc));
824 1.1 bouyer if (sc->sc_ih == NULL) {
825 1.1 bouyer aprint_error_dev(self, "can't establish interrupt");
826 1.1 bouyer if (intrstr)
827 1.1 bouyer aprint_error(" at %s", intrstr);
828 1.1 bouyer aprint_error("\n");
829 1.1 bouyer goto free_sgl;
830 1.1 bouyer }
831 1.1 bouyer aprint_normal_dev(self, "interrupting at %s\n", intrstr);
832 1.1 bouyer
833 1.1 bouyer for (i = 0; i < sc->sc_info.mci_lds_present; i++)
834 1.1 bouyer sc->sc_ld[i].ld_present = 1;
835 1.1 bouyer
836 1.1 bouyer memset(adapt, 0, sizeof(*adapt));
837 1.1 bouyer adapt->adapt_dev = sc->sc_dev;
838 1.1 bouyer adapt->adapt_nchannels = 1;
839 1.1 bouyer /* keep a few commands for management */
840 1.1 bouyer if (sc->sc_max_cmds > 4)
841 1.1 bouyer adapt->adapt_openings = sc->sc_max_cmds - 4;
842 1.1 bouyer else
843 1.1 bouyer adapt->adapt_openings = sc->sc_max_cmds;
844 1.1 bouyer adapt->adapt_max_periph = adapt->adapt_openings;
845 1.1 bouyer adapt->adapt_request = mfii_scsipi_request;
846 1.1 bouyer adapt->adapt_minphys = minphys;
847 1.1 bouyer adapt->adapt_flags = SCSIPI_ADAPT_MPSAFE;
848 1.1 bouyer
849 1.1 bouyer memset(chan, 0, sizeof(*chan));
850 1.1 bouyer chan->chan_adapter = adapt;
851 1.1 bouyer chan->chan_bustype = &scsi_sas_bustype;
852 1.1 bouyer chan->chan_channel = 0;
853 1.1 bouyer chan->chan_flags = 0;
854 1.1 bouyer chan->chan_nluns = 8;
855 1.1 bouyer chan->chan_ntargets = sc->sc_info.mci_max_lds;
856 1.1 bouyer chan->chan_id = sc->sc_info.mci_max_lds;
857 1.1 bouyer
858 1.1 bouyer mfii_rescan(sc->sc_dev, "scsi", NULL);
859 1.1 bouyer
860 1.1 bouyer if (mfii_aen_register(sc) != 0) {
861 1.1 bouyer /* error printed by mfii_aen_register */
862 1.1 bouyer goto intr_disestablish;
863 1.1 bouyer }
864 1.1 bouyer
865 1.1 bouyer mutex_enter(&sc->sc_lock);
866 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, NULL, &sc->sc_ld_list,
867 1.1 bouyer sizeof(sc->sc_ld_list), MFII_DATA_IN, true) != 0) {
868 1.1 bouyer mutex_exit(&sc->sc_lock);
869 1.1 bouyer aprint_error_dev(self,
870 1.1 bouyer "getting list of logical disks failed\n");
871 1.1 bouyer goto intr_disestablish;
872 1.1 bouyer }
873 1.1 bouyer mutex_exit(&sc->sc_lock);
874 1.1 bouyer memset(sc->sc_target_lds, -1, sizeof(sc->sc_target_lds));
875 1.1 bouyer for (i = 0; i < sc->sc_ld_list.mll_no_ld; i++) {
876 1.1 bouyer int target = sc->sc_ld_list.mll_list[i].mll_ld.mld_target;
877 1.1 bouyer sc->sc_target_lds[target] = i;
878 1.1 bouyer }
879 1.1 bouyer
880 1.1 bouyer /* enable interrupts */
881 1.1 bouyer mfii_write(sc, MFI_OSTS, 0xffffffff);
882 1.1 bouyer mfii_write(sc, MFI_OMSK, ~MFII_OSTS_INTR_VALID);
883 1.1 bouyer
884 1.1 bouyer #if NBIO > 0
885 1.1 bouyer if (bio_register(sc->sc_dev, mfii_ioctl) != 0)
886 1.1 bouyer panic("%s: controller registration failed", DEVNAME(sc));
887 1.1 bouyer #endif /* NBIO > 0 */
888 1.1 bouyer
889 1.1 bouyer if (mfii_create_sensors(sc) != 0)
890 1.1 bouyer aprint_error_dev(self, "unable to create sensors\n");
891 1.1 bouyer
892 1.1 bouyer if (!pmf_device_register1(sc->sc_dev, mfii_suspend, mfii_resume,
893 1.1 bouyer mfii_shutdown))
894 1.1 bouyer aprint_error_dev(self, "couldn't establish power handler\n");
895 1.1 bouyer return;
896 1.1 bouyer intr_disestablish:
897 1.1 bouyer pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
898 1.1 bouyer free_sgl:
899 1.1 bouyer mfii_dmamem_free(sc, sc->sc_sgl);
900 1.1 bouyer free_mfi:
901 1.1 bouyer mfii_dmamem_free(sc, sc->sc_mfi);
902 1.1 bouyer free_requests:
903 1.1 bouyer mfii_dmamem_free(sc, sc->sc_requests);
904 1.1 bouyer free_reply_postq:
905 1.1 bouyer mfii_dmamem_free(sc, sc->sc_reply_postq);
906 1.1 bouyer free_sense:
907 1.1 bouyer mfii_dmamem_free(sc, sc->sc_sense);
908 1.1 bouyer pci_unmap:
909 1.1 bouyer bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
910 1.1 bouyer }
911 1.1 bouyer
912 1.1 bouyer #if 0
913 1.1 bouyer struct srp_gc mfii_dev_handles_gc =
914 1.1 bouyer SRP_GC_INITIALIZER(mfii_dev_handles_dtor, NULL);
915 1.1 bouyer
916 1.1 bouyer static inline uint16_t
917 1.1 bouyer mfii_dev_handle(struct mfii_softc *sc, uint16_t target)
918 1.1 bouyer {
919 1.1 bouyer struct srp_ref sr;
920 1.1 bouyer uint16_t *map, handle;
921 1.1 bouyer
922 1.1 bouyer map = srp_enter(&sr, &sc->sc_pd->pd_dev_handles);
923 1.1 bouyer handle = map[target];
924 1.1 bouyer srp_leave(&sr);
925 1.1 bouyer
926 1.1 bouyer return (handle);
927 1.1 bouyer }
928 1.1 bouyer
929 1.4.4.1 bouyer static int
930 1.1 bouyer mfii_dev_handles_update(struct mfii_softc *sc)
931 1.1 bouyer {
932 1.1 bouyer struct mfii_ld_map *lm;
933 1.1 bouyer uint16_t *dev_handles = NULL;
934 1.1 bouyer int i;
935 1.1 bouyer int rv = 0;
936 1.1 bouyer
937 1.1 bouyer lm = malloc(sizeof(*lm), M_TEMP, M_WAITOK|M_ZERO);
938 1.1 bouyer
939 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_LD_MAP_GET_INFO, NULL, lm, sizeof(*lm),
940 1.1 bouyer MFII_DATA_IN, false);
941 1.1 bouyer
942 1.1 bouyer if (rv != 0) {
943 1.1 bouyer rv = EIO;
944 1.1 bouyer goto free_lm;
945 1.1 bouyer }
946 1.1 bouyer
947 1.1 bouyer dev_handles = mallocarray(MFI_MAX_PD, sizeof(*dev_handles),
948 1.1 bouyer M_DEVBUF, M_WAITOK);
949 1.1 bouyer
950 1.1 bouyer for (i = 0; i < MFI_MAX_PD; i++)
951 1.1 bouyer dev_handles[i] = lm->mlm_dev_handle[i].mdh_cur_handle;
952 1.1 bouyer
953 1.1 bouyer /* commit the updated info */
954 1.1 bouyer sc->sc_pd->pd_timeout = lm->mlm_pd_timeout;
955 1.1 bouyer srp_update_locked(&mfii_dev_handles_gc,
956 1.1 bouyer &sc->sc_pd->pd_dev_handles, dev_handles);
957 1.1 bouyer
958 1.1 bouyer free_lm:
959 1.1 bouyer free(lm, M_TEMP, sizeof(*lm));
960 1.1 bouyer
961 1.1 bouyer return (rv);
962 1.1 bouyer }
963 1.1 bouyer
964 1.4.4.1 bouyer static void
965 1.1 bouyer mfii_dev_handles_dtor(void *null, void *v)
966 1.1 bouyer {
967 1.1 bouyer uint16_t *dev_handles = v;
968 1.1 bouyer
969 1.1 bouyer free(dev_handles, M_DEVBUF, sizeof(*dev_handles) * MFI_MAX_PD);
970 1.1 bouyer }
971 1.1 bouyer #endif /* 0 */
972 1.1 bouyer
973 1.4.4.1 bouyer static int
974 1.1 bouyer mfii_detach(device_t self, int flags)
975 1.1 bouyer {
976 1.1 bouyer struct mfii_softc *sc = device_private(self);
977 1.1 bouyer int error;
978 1.1 bouyer
979 1.1 bouyer if (sc->sc_ih == NULL)
980 1.1 bouyer return (0);
981 1.1 bouyer
982 1.1 bouyer if ((error = config_detach_children(sc->sc_dev, flags)) != 0)
983 1.1 bouyer return error;
984 1.1 bouyer
985 1.1 bouyer mfii_destroy_sensors(sc);
986 1.1 bouyer #if NBIO > 0
987 1.1 bouyer bio_unregister(sc->sc_dev);
988 1.1 bouyer #endif
989 1.1 bouyer mfii_shutdown(sc->sc_dev, 0);
990 1.1 bouyer mfii_write(sc, MFI_OMSK, 0xffffffff);
991 1.1 bouyer
992 1.1 bouyer mfii_aen_unregister(sc);
993 1.1 bouyer pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
994 1.1 bouyer mfii_dmamem_free(sc, sc->sc_sgl);
995 1.1 bouyer mfii_dmamem_free(sc, sc->sc_mfi);
996 1.1 bouyer mfii_dmamem_free(sc, sc->sc_requests);
997 1.1 bouyer mfii_dmamem_free(sc, sc->sc_reply_postq);
998 1.1 bouyer mfii_dmamem_free(sc, sc->sc_sense);
999 1.1 bouyer bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
1000 1.1 bouyer
1001 1.1 bouyer return (0);
1002 1.1 bouyer }
1003 1.1 bouyer
1004 1.4.4.1 bouyer static int
1005 1.1 bouyer mfii_rescan(device_t self, const char *ifattr, const int *locators)
1006 1.1 bouyer {
1007 1.1 bouyer struct mfii_softc *sc = device_private(self);
1008 1.1 bouyer if (sc->sc_child != NULL)
1009 1.1 bouyer return 0;
1010 1.1 bouyer
1011 1.4.4.2 martin sc->sc_child = config_found_sm_loc(self, ifattr, locators,
1012 1.4.4.2 martin &sc->sc_chan, scsiprint, NULL);
1013 1.1 bouyer return 0;
1014 1.1 bouyer }
1015 1.1 bouyer
1016 1.4.4.1 bouyer static void
1017 1.1 bouyer mfii_childdetached(device_t self, device_t child)
1018 1.1 bouyer {
1019 1.1 bouyer struct mfii_softc *sc = device_private(self);
1020 1.1 bouyer
1021 1.1 bouyer KASSERT(self == sc->sc_dev);
1022 1.1 bouyer KASSERT(child == sc->sc_child);
1023 1.1 bouyer
1024 1.1 bouyer if (child == sc->sc_child)
1025 1.1 bouyer sc->sc_child = NULL;
1026 1.1 bouyer }
1027 1.1 bouyer
1028 1.4.4.1 bouyer static bool
1029 1.1 bouyer mfii_suspend(device_t dev, const pmf_qual_t *q)
1030 1.1 bouyer {
1031 1.1 bouyer /* XXX to be implemented */
1032 1.1 bouyer return false;
1033 1.1 bouyer }
1034 1.1 bouyer
1035 1.1 bouyer static bool
1036 1.1 bouyer mfii_resume(device_t dev, const pmf_qual_t *q)
1037 1.4.4.1 bouyer {
1038 1.1 bouyer /* XXX to be implemented */
1039 1.1 bouyer return false;
1040 1.1 bouyer }
1041 1.4.4.1 bouyer
1042 1.1 bouyer static bool
1043 1.1 bouyer mfii_shutdown(device_t dev, int how)
1044 1.1 bouyer {
1045 1.1 bouyer struct mfii_softc *sc = device_private(dev);
1046 1.1 bouyer struct mfii_ccb *ccb;
1047 1.1 bouyer union mfi_mbox mbox;
1048 1.4.4.1 bouyer bool rv = true;
1049 1.1 bouyer
1050 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
1051 1.1 bouyer
1052 1.1 bouyer mutex_enter(&sc->sc_lock);
1053 1.4.4.1 bouyer DNPRINTF(MFII_D_MISC, "%s: mfii_shutdown\n", DEVNAME(sc));
1054 1.1 bouyer ccb = mfii_get_ccb(sc);
1055 1.1 bouyer if (ccb == NULL)
1056 1.1 bouyer return false;
1057 1.1 bouyer mutex_enter(&sc->sc_ccb_mtx);
1058 1.1 bouyer if (sc->sc_running) {
1059 1.1 bouyer sc->sc_running = 0; /* prevent new commands */
1060 1.1 bouyer mutex_exit(&sc->sc_ccb_mtx);
1061 1.1 bouyer #if 0 /* XXX why does this hang ? */
1062 1.1 bouyer mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
1063 1.1 bouyer mfii_scrub_ccb(ccb);
1064 1.1 bouyer if (mfii_do_mgmt(sc, ccb, MR_DCMD_CTRL_CACHE_FLUSH, &mbox,
1065 1.1 bouyer NULL, 0, MFII_DATA_NONE, true)) {
1066 1.4.4.2 martin aprint_error_dev(dev,
1067 1.4.4.2 martin "shutdown: cache flush failed\n");
1068 1.1 bouyer rv = false;
1069 1.1 bouyer goto fail;
1070 1.1 bouyer }
1071 1.1 bouyer printf("ok1\n");
1072 1.1 bouyer #endif
1073 1.1 bouyer mbox.b[0] = 0;
1074 1.1 bouyer mfii_scrub_ccb(ccb);
1075 1.1 bouyer if (mfii_do_mgmt(sc, ccb, MR_DCMD_CTRL_SHUTDOWN, &mbox,
1076 1.1 bouyer NULL, 0, MFII_DATA_NONE, true)) {
1077 1.1 bouyer aprint_error_dev(dev, "shutdown: "
1078 1.1 bouyer "firmware shutdown failed\n");
1079 1.4.4.1 bouyer rv = false;
1080 1.1 bouyer goto fail;
1081 1.1 bouyer }
1082 1.1 bouyer } else {
1083 1.1 bouyer mutex_exit(&sc->sc_ccb_mtx);
1084 1.1 bouyer }
1085 1.1 bouyer fail:
1086 1.1 bouyer mfii_put_ccb(sc, ccb);
1087 1.1 bouyer mutex_exit(&sc->sc_lock);
1088 1.1 bouyer return rv;
1089 1.1 bouyer }
1090 1.1 bouyer
1091 1.1 bouyer static u_int32_t
1092 1.1 bouyer mfii_read(struct mfii_softc *sc, bus_size_t r)
1093 1.1 bouyer {
1094 1.1 bouyer bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1095 1.1 bouyer BUS_SPACE_BARRIER_READ);
1096 1.1 bouyer return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
1097 1.1 bouyer }
1098 1.1 bouyer
1099 1.1 bouyer static void
1100 1.1 bouyer mfii_write(struct mfii_softc *sc, bus_size_t r, u_int32_t v)
1101 1.1 bouyer {
1102 1.1 bouyer bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
1103 1.1 bouyer bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
1104 1.1 bouyer BUS_SPACE_BARRIER_WRITE);
1105 1.1 bouyer }
1106 1.1 bouyer
1107 1.4.4.1 bouyer static struct mfii_dmamem *
1108 1.1 bouyer mfii_dmamem_alloc(struct mfii_softc *sc, size_t size)
1109 1.1 bouyer {
1110 1.1 bouyer struct mfii_dmamem *m;
1111 1.1 bouyer int nsegs;
1112 1.1 bouyer
1113 1.1 bouyer m = malloc(sizeof(*m), M_DEVBUF, M_NOWAIT | M_ZERO);
1114 1.1 bouyer if (m == NULL)
1115 1.1 bouyer return (NULL);
1116 1.1 bouyer
1117 1.1 bouyer m->mdm_size = size;
1118 1.1 bouyer
1119 1.1 bouyer if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
1120 1.1 bouyer BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &m->mdm_map) != 0)
1121 1.1 bouyer goto mdmfree;
1122 1.1 bouyer
1123 1.1 bouyer if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &m->mdm_seg, 1,
1124 1.1 bouyer &nsegs, BUS_DMA_NOWAIT) != 0)
1125 1.1 bouyer goto destroy;
1126 1.1 bouyer
1127 1.1 bouyer if (bus_dmamem_map(sc->sc_dmat, &m->mdm_seg, nsegs, size, &m->mdm_kva,
1128 1.1 bouyer BUS_DMA_NOWAIT) != 0)
1129 1.1 bouyer goto free;
1130 1.1 bouyer
1131 1.1 bouyer if (bus_dmamap_load(sc->sc_dmat, m->mdm_map, m->mdm_kva, size, NULL,
1132 1.1 bouyer BUS_DMA_NOWAIT) != 0)
1133 1.1 bouyer goto unmap;
1134 1.1 bouyer
1135 1.1 bouyer memset(m->mdm_kva, 0, size);
1136 1.1 bouyer return (m);
1137 1.1 bouyer
1138 1.1 bouyer unmap:
1139 1.1 bouyer bus_dmamem_unmap(sc->sc_dmat, m->mdm_kva, m->mdm_size);
1140 1.1 bouyer free:
1141 1.1 bouyer bus_dmamem_free(sc->sc_dmat, &m->mdm_seg, 1);
1142 1.1 bouyer destroy:
1143 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, m->mdm_map);
1144 1.1 bouyer mdmfree:
1145 1.1 bouyer free(m, M_DEVBUF);
1146 1.1 bouyer
1147 1.1 bouyer return (NULL);
1148 1.1 bouyer }
1149 1.1 bouyer
1150 1.4.4.1 bouyer static void
1151 1.1 bouyer mfii_dmamem_free(struct mfii_softc *sc, struct mfii_dmamem *m)
1152 1.1 bouyer {
1153 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, m->mdm_map);
1154 1.1 bouyer bus_dmamem_unmap(sc->sc_dmat, m->mdm_kva, m->mdm_size);
1155 1.1 bouyer bus_dmamem_free(sc->sc_dmat, &m->mdm_seg, 1);
1156 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, m->mdm_map);
1157 1.1 bouyer free(m, M_DEVBUF);
1158 1.1 bouyer }
1159 1.1 bouyer
1160 1.4.4.1 bouyer static void
1161 1.1 bouyer mfii_dcmd_start(struct mfii_softc *sc, struct mfii_ccb *ccb)
1162 1.1 bouyer {
1163 1.1 bouyer struct mpii_msg_scsi_io *io = ccb->ccb_request;
1164 1.1 bouyer struct mfii_raid_context *ctx = (struct mfii_raid_context *)(io + 1);
1165 1.1 bouyer struct mfii_sge *sge = (struct mfii_sge *)(ctx + 1);
1166 1.1 bouyer
1167 1.1 bouyer io->function = MFII_FUNCTION_PASSTHRU_IO;
1168 1.1 bouyer io->sgl_offset0 = (uint32_t *)sge - (uint32_t *)io;
1169 1.1 bouyer io->chain_offset = io->sgl_offset0 / 4;
1170 1.1 bouyer
1171 1.1 bouyer sge->sg_addr = htole64(ccb->ccb_sense_dva);
1172 1.1 bouyer sge->sg_len = htole32(sizeof(*ccb->ccb_sense));
1173 1.1 bouyer sge->sg_flags = MFII_SGE_CHAIN_ELEMENT | MFII_SGE_ADDR_IOCPLBNTA;
1174 1.1 bouyer
1175 1.1 bouyer ccb->ccb_req.flags = MFII_REQ_TYPE_SCSI;
1176 1.1 bouyer ccb->ccb_req.smid = le16toh(ccb->ccb_smid);
1177 1.1 bouyer
1178 1.1 bouyer mfii_start(sc, ccb);
1179 1.1 bouyer }
1180 1.1 bouyer
1181 1.4.4.1 bouyer static int
1182 1.1 bouyer mfii_aen_register(struct mfii_softc *sc)
1183 1.1 bouyer {
1184 1.1 bouyer struct mfi_evt_log_info mel;
1185 1.1 bouyer struct mfii_ccb *ccb;
1186 1.1 bouyer struct mfii_dmamem *mdm;
1187 1.1 bouyer int rv;
1188 1.1 bouyer
1189 1.1 bouyer ccb = mfii_get_ccb(sc);
1190 1.1 bouyer if (ccb == NULL) {
1191 1.1 bouyer printf("%s: unable to allocate ccb for aen\n", DEVNAME(sc));
1192 1.1 bouyer return (ENOMEM);
1193 1.1 bouyer }
1194 1.1 bouyer
1195 1.1 bouyer memset(&mel, 0, sizeof(mel));
1196 1.1 bouyer mfii_scrub_ccb(ccb);
1197 1.1 bouyer
1198 1.1 bouyer rv = mfii_do_mgmt(sc, ccb, MR_DCMD_CTRL_EVENT_GET_INFO, NULL,
1199 1.1 bouyer &mel, sizeof(mel), MFII_DATA_IN, true);
1200 1.1 bouyer if (rv != 0) {
1201 1.1 bouyer mfii_put_ccb(sc, ccb);
1202 1.1 bouyer aprint_error_dev(sc->sc_dev, "unable to get event info\n");
1203 1.1 bouyer return (EIO);
1204 1.1 bouyer }
1205 1.1 bouyer
1206 1.1 bouyer mdm = mfii_dmamem_alloc(sc, sizeof(struct mfi_evt_detail));
1207 1.1 bouyer if (mdm == NULL) {
1208 1.1 bouyer mfii_put_ccb(sc, ccb);
1209 1.4.4.2 martin aprint_error_dev(sc->sc_dev,
1210 1.4.4.2 martin "unable to allocate event data\n");
1211 1.1 bouyer return (ENOMEM);
1212 1.1 bouyer }
1213 1.1 bouyer
1214 1.1 bouyer /* replay all the events from boot */
1215 1.1 bouyer mfii_aen_start(sc, ccb, mdm, le32toh(mel.mel_boot_seq_num));
1216 1.1 bouyer
1217 1.1 bouyer return (0);
1218 1.1 bouyer }
1219 1.1 bouyer
1220 1.4.4.1 bouyer static void
1221 1.1 bouyer mfii_aen_start(struct mfii_softc *sc, struct mfii_ccb *ccb,
1222 1.1 bouyer struct mfii_dmamem *mdm, uint32_t seq)
1223 1.1 bouyer {
1224 1.1 bouyer struct mfi_dcmd_frame *dcmd = mfii_dcmd_frame(ccb);
1225 1.1 bouyer struct mfi_frame_header *hdr = &dcmd->mdf_header;
1226 1.1 bouyer union mfi_sgl *sgl = &dcmd->mdf_sgl;
1227 1.1 bouyer union mfi_evt_class_locale mec;
1228 1.1 bouyer
1229 1.1 bouyer mfii_scrub_ccb(ccb);
1230 1.1 bouyer mfii_dcmd_scrub(ccb);
1231 1.1 bouyer memset(MFII_DMA_KVA(mdm), 0, MFII_DMA_LEN(mdm));
1232 1.1 bouyer
1233 1.1 bouyer ccb->ccb_cookie = mdm;
1234 1.1 bouyer ccb->ccb_done = mfii_aen_done;
1235 1.1 bouyer sc->sc_aen_ccb = ccb;
1236 1.1 bouyer
1237 1.1 bouyer mec.mec_members.class = MFI_EVT_CLASS_DEBUG;
1238 1.1 bouyer mec.mec_members.reserved = 0;
1239 1.1 bouyer mec.mec_members.locale = htole16(MFI_EVT_LOCALE_ALL);
1240 1.1 bouyer
1241 1.1 bouyer hdr->mfh_cmd = MFI_CMD_DCMD;
1242 1.1 bouyer hdr->mfh_sg_count = 1;
1243 1.1 bouyer hdr->mfh_flags = htole16(MFI_FRAME_DIR_READ | MFI_FRAME_SGL64);
1244 1.1 bouyer hdr->mfh_data_len = htole32(MFII_DMA_LEN(mdm));
1245 1.1 bouyer dcmd->mdf_opcode = htole32(MR_DCMD_CTRL_EVENT_WAIT);
1246 1.1 bouyer dcmd->mdf_mbox.w[0] = htole32(seq);
1247 1.1 bouyer dcmd->mdf_mbox.w[1] = htole32(mec.mec_word);
1248 1.1 bouyer sgl->sg64[0].addr = htole64(MFII_DMA_DVA(mdm));
1249 1.1 bouyer sgl->sg64[0].len = htole32(MFII_DMA_LEN(mdm));
1250 1.1 bouyer
1251 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(mdm),
1252 1.1 bouyer 0, MFII_DMA_LEN(mdm), BUS_DMASYNC_PREREAD);
1253 1.1 bouyer
1254 1.1 bouyer mfii_dcmd_sync(sc, ccb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1255 1.1 bouyer mfii_dcmd_start(sc, ccb);
1256 1.1 bouyer }
1257 1.1 bouyer
1258 1.4.4.1 bouyer static void
1259 1.1 bouyer mfii_aen_done(struct mfii_softc *sc, struct mfii_ccb *ccb)
1260 1.1 bouyer {
1261 1.1 bouyer KASSERT(sc->sc_aen_ccb == ccb);
1262 1.1 bouyer
1263 1.1 bouyer /*
1264 1.1 bouyer * defer to a thread with KERNEL_LOCK so we can run autoconf
1265 1.1 bouyer * We shouldn't have more than one AEN command pending at a time,
1266 1.1 bouyer * so no need to lock
1267 1.1 bouyer */
1268 1.1 bouyer if (sc->sc_running)
1269 1.1 bouyer workqueue_enqueue(sc->sc_aen_wq, &sc->sc_aen_work, NULL);
1270 1.1 bouyer }
1271 1.1 bouyer
1272 1.4.4.1 bouyer static void
1273 1.1 bouyer mfii_aen(struct work *wk, void *arg)
1274 1.1 bouyer {
1275 1.1 bouyer struct mfii_softc *sc = arg;
1276 1.1 bouyer struct mfii_ccb *ccb = sc->sc_aen_ccb;
1277 1.1 bouyer struct mfii_dmamem *mdm = ccb->ccb_cookie;
1278 1.1 bouyer const struct mfi_evt_detail *med = MFII_DMA_KVA(mdm);
1279 1.1 bouyer
1280 1.1 bouyer mfii_dcmd_sync(sc, ccb,
1281 1.1 bouyer BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1282 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(mdm),
1283 1.1 bouyer 0, MFII_DMA_LEN(mdm), BUS_DMASYNC_POSTREAD);
1284 1.1 bouyer
1285 1.1 bouyer DNPRINTF(MFII_D_MISC, "%s: %u %08x %02x %s\n", DEVNAME(sc),
1286 1.1 bouyer le32toh(med->med_seq_num), le32toh(med->med_code),
1287 1.1 bouyer med->med_arg_type, med->med_description);
1288 1.1 bouyer
1289 1.1 bouyer switch (le32toh(med->med_code)) {
1290 1.1 bouyer case MR_EVT_PD_INSERTED_EXT:
1291 1.1 bouyer if (med->med_arg_type != MR_EVT_ARGS_PD_ADDRESS)
1292 1.1 bouyer break;
1293 1.4.4.1 bouyer
1294 1.1 bouyer mfii_aen_pd_insert(sc, &med->args.pd_address);
1295 1.1 bouyer break;
1296 1.4.4.1 bouyer case MR_EVT_PD_REMOVED_EXT:
1297 1.1 bouyer if (med->med_arg_type != MR_EVT_ARGS_PD_ADDRESS)
1298 1.1 bouyer break;
1299 1.4.4.1 bouyer
1300 1.1 bouyer mfii_aen_pd_remove(sc, &med->args.pd_address);
1301 1.1 bouyer break;
1302 1.1 bouyer
1303 1.1 bouyer case MR_EVT_PD_STATE_CHANGE:
1304 1.1 bouyer if (med->med_arg_type != MR_EVT_ARGS_PD_STATE)
1305 1.1 bouyer break;
1306 1.1 bouyer
1307 1.1 bouyer mfii_aen_pd_state_change(sc, &med->args.pd_state);
1308 1.1 bouyer break;
1309 1.1 bouyer
1310 1.1 bouyer case MR_EVT_LD_CREATED:
1311 1.1 bouyer case MR_EVT_LD_DELETED:
1312 1.1 bouyer mfii_aen_ld_update(sc);
1313 1.1 bouyer break;
1314 1.1 bouyer
1315 1.1 bouyer default:
1316 1.1 bouyer break;
1317 1.1 bouyer }
1318 1.1 bouyer
1319 1.1 bouyer mfii_aen_start(sc, ccb, mdm, le32toh(med->med_seq_num) + 1);
1320 1.1 bouyer }
1321 1.1 bouyer
1322 1.4.4.1 bouyer static void
1323 1.1 bouyer mfii_aen_pd_insert(struct mfii_softc *sc,
1324 1.1 bouyer const struct mfi_evtarg_pd_address *pd)
1325 1.1 bouyer {
1326 1.1 bouyer printf("%s: physical disk inserted id %d enclosure %d\n", DEVNAME(sc),
1327 1.1 bouyer le16toh(pd->device_id), le16toh(pd->encl_id));
1328 1.1 bouyer }
1329 1.1 bouyer
1330 1.4.4.1 bouyer static void
1331 1.1 bouyer mfii_aen_pd_remove(struct mfii_softc *sc,
1332 1.1 bouyer const struct mfi_evtarg_pd_address *pd)
1333 1.1 bouyer {
1334 1.1 bouyer printf("%s: physical disk removed id %d enclosure %d\n", DEVNAME(sc),
1335 1.1 bouyer le16toh(pd->device_id), le16toh(pd->encl_id));
1336 1.1 bouyer }
1337 1.1 bouyer
1338 1.4.4.1 bouyer static void
1339 1.1 bouyer mfii_aen_pd_state_change(struct mfii_softc *sc,
1340 1.1 bouyer const struct mfi_evtarg_pd_state *state)
1341 1.1 bouyer {
1342 1.1 bouyer return;
1343 1.1 bouyer }
1344 1.1 bouyer
1345 1.4.4.1 bouyer static void
1346 1.1 bouyer mfii_aen_ld_update(struct mfii_softc *sc)
1347 1.1 bouyer {
1348 1.1 bouyer int i, target, old, nld;
1349 1.1 bouyer int newlds[MFI_MAX_LD];
1350 1.1 bouyer
1351 1.1 bouyer mutex_enter(&sc->sc_lock);
1352 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, NULL, &sc->sc_ld_list,
1353 1.1 bouyer sizeof(sc->sc_ld_list), MFII_DATA_IN, false) != 0) {
1354 1.1 bouyer mutex_exit(&sc->sc_lock);
1355 1.4.4.2 martin DNPRINTF(MFII_D_MISC,
1356 1.4.4.2 martin "%s: getting list of logical disks failed\n", DEVNAME(sc));
1357 1.1 bouyer return;
1358 1.1 bouyer }
1359 1.1 bouyer mutex_exit(&sc->sc_lock);
1360 1.1 bouyer
1361 1.1 bouyer memset(newlds, -1, sizeof(newlds));
1362 1.1 bouyer
1363 1.1 bouyer for (i = 0; i < sc->sc_ld_list.mll_no_ld; i++) {
1364 1.1 bouyer target = sc->sc_ld_list.mll_list[i].mll_ld.mld_target;
1365 1.1 bouyer DNPRINTF(MFII_D_MISC, "%s: target %d: state %d\n",
1366 1.1 bouyer DEVNAME(sc), target, sc->sc_ld_list.mll_list[i].mll_state);
1367 1.1 bouyer newlds[target] = i;
1368 1.1 bouyer }
1369 1.1 bouyer
1370 1.1 bouyer for (i = 0; i < MFI_MAX_LD; i++) {
1371 1.1 bouyer old = sc->sc_target_lds[i];
1372 1.1 bouyer nld = newlds[i];
1373 1.4.4.1 bouyer
1374 1.1 bouyer if (old == -1 && nld != -1) {
1375 1.1 bouyer printf("%s: logical drive %d added (target %d)\n",
1376 1.1 bouyer DEVNAME(sc), i, nld);
1377 1.1 bouyer
1378 1.1 bouyer // XXX scsi_probe_target(sc->sc_scsibus, i);
1379 1.1 bouyer
1380 1.1 bouyer mfii_init_ld_sensor(sc, &sc->sc_sensors[i], i);
1381 1.1 bouyer mfii_attach_sensor(sc, &sc->sc_sensors[i]);
1382 1.1 bouyer } else if (nld == -1 && old != -1) {
1383 1.1 bouyer printf("%s: logical drive %d removed (target %d)\n",
1384 1.1 bouyer DEVNAME(sc), i, old);
1385 1.1 bouyer
1386 1.1 bouyer scsipi_target_detach(&sc->sc_chan, i, 0, DETACH_FORCE);
1387 1.1 bouyer sysmon_envsys_sensor_detach(sc->sc_sme,
1388 1.1 bouyer &sc->sc_sensors[i]);
1389 1.1 bouyer }
1390 1.1 bouyer }
1391 1.1 bouyer
1392 1.1 bouyer memcpy(sc->sc_target_lds, newlds, sizeof(sc->sc_target_lds));
1393 1.1 bouyer }
1394 1.1 bouyer
1395 1.4.4.1 bouyer static void
1396 1.1 bouyer mfii_aen_unregister(struct mfii_softc *sc)
1397 1.1 bouyer {
1398 1.1 bouyer /* XXX */
1399 1.1 bouyer }
1400 1.1 bouyer
1401 1.4.4.1 bouyer static int
1402 1.1 bouyer mfii_transition_firmware(struct mfii_softc *sc)
1403 1.1 bouyer {
1404 1.1 bouyer int32_t fw_state, cur_state;
1405 1.1 bouyer int max_wait, i;
1406 1.1 bouyer
1407 1.1 bouyer fw_state = mfii_fw_state(sc) & MFI_STATE_MASK;
1408 1.1 bouyer
1409 1.1 bouyer while (fw_state != MFI_STATE_READY) {
1410 1.1 bouyer cur_state = fw_state;
1411 1.1 bouyer switch (fw_state) {
1412 1.1 bouyer case MFI_STATE_FAULT:
1413 1.1 bouyer printf("%s: firmware fault\n", DEVNAME(sc));
1414 1.1 bouyer return (1);
1415 1.1 bouyer case MFI_STATE_WAIT_HANDSHAKE:
1416 1.1 bouyer mfii_write(sc, MFI_SKINNY_IDB,
1417 1.1 bouyer MFI_INIT_CLEAR_HANDSHAKE);
1418 1.1 bouyer max_wait = 2;
1419 1.1 bouyer break;
1420 1.1 bouyer case MFI_STATE_OPERATIONAL:
1421 1.1 bouyer mfii_write(sc, MFI_SKINNY_IDB, MFI_INIT_READY);
1422 1.1 bouyer max_wait = 10;
1423 1.1 bouyer break;
1424 1.1 bouyer case MFI_STATE_UNDEFINED:
1425 1.1 bouyer case MFI_STATE_BB_INIT:
1426 1.1 bouyer max_wait = 2;
1427 1.1 bouyer break;
1428 1.1 bouyer case MFI_STATE_FW_INIT:
1429 1.1 bouyer case MFI_STATE_DEVICE_SCAN:
1430 1.1 bouyer case MFI_STATE_FLUSH_CACHE:
1431 1.1 bouyer max_wait = 20;
1432 1.1 bouyer break;
1433 1.1 bouyer default:
1434 1.1 bouyer printf("%s: unknown firmware state %d\n",
1435 1.1 bouyer DEVNAME(sc), fw_state);
1436 1.1 bouyer return (1);
1437 1.1 bouyer }
1438 1.1 bouyer for (i = 0; i < (max_wait * 10); i++) {
1439 1.1 bouyer fw_state = mfii_fw_state(sc) & MFI_STATE_MASK;
1440 1.1 bouyer if (fw_state == cur_state)
1441 1.1 bouyer DELAY(100000);
1442 1.1 bouyer else
1443 1.1 bouyer break;
1444 1.1 bouyer }
1445 1.1 bouyer if (fw_state == cur_state) {
1446 1.1 bouyer printf("%s: firmware stuck in state %#x\n",
1447 1.1 bouyer DEVNAME(sc), fw_state);
1448 1.1 bouyer return (1);
1449 1.1 bouyer }
1450 1.1 bouyer }
1451 1.1 bouyer
1452 1.1 bouyer return (0);
1453 1.1 bouyer }
1454 1.1 bouyer
1455 1.4.4.1 bouyer static int
1456 1.1 bouyer mfii_get_info(struct mfii_softc *sc)
1457 1.1 bouyer {
1458 1.1 bouyer int i, rv;
1459 1.1 bouyer
1460 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_CTRL_GET_INFO, NULL, &sc->sc_info,
1461 1.1 bouyer sizeof(sc->sc_info), MFII_DATA_IN, true);
1462 1.1 bouyer
1463 1.1 bouyer if (rv != 0)
1464 1.1 bouyer return (rv);
1465 1.1 bouyer
1466 1.1 bouyer for (i = 0; i < sc->sc_info.mci_image_component_count; i++) {
1467 1.1 bouyer DPRINTF("%s: active FW %s Version %s date %s time %s\n",
1468 1.1 bouyer DEVNAME(sc),
1469 1.1 bouyer sc->sc_info.mci_image_component[i].mic_name,
1470 1.1 bouyer sc->sc_info.mci_image_component[i].mic_version,
1471 1.1 bouyer sc->sc_info.mci_image_component[i].mic_build_date,
1472 1.1 bouyer sc->sc_info.mci_image_component[i].mic_build_time);
1473 1.1 bouyer }
1474 1.1 bouyer
1475 1.1 bouyer for (i = 0; i < sc->sc_info.mci_pending_image_component_count; i++) {
1476 1.1 bouyer DPRINTF("%s: pending FW %s Version %s date %s time %s\n",
1477 1.1 bouyer DEVNAME(sc),
1478 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_name,
1479 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_version,
1480 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_build_date,
1481 1.1 bouyer sc->sc_info.mci_pending_image_component[i].mic_build_time);
1482 1.1 bouyer }
1483 1.1 bouyer
1484 1.1 bouyer DPRINTF("%s: max_arms %d max_spans %d max_arrs %d max_lds %d name %s\n",
1485 1.1 bouyer DEVNAME(sc),
1486 1.1 bouyer sc->sc_info.mci_max_arms,
1487 1.1 bouyer sc->sc_info.mci_max_spans,
1488 1.1 bouyer sc->sc_info.mci_max_arrays,
1489 1.1 bouyer sc->sc_info.mci_max_lds,
1490 1.1 bouyer sc->sc_info.mci_product_name);
1491 1.1 bouyer
1492 1.1 bouyer DPRINTF("%s: serial %s present %#x fw time %d max_cmds %d max_sg %d\n",
1493 1.1 bouyer DEVNAME(sc),
1494 1.1 bouyer sc->sc_info.mci_serial_number,
1495 1.1 bouyer sc->sc_info.mci_hw_present,
1496 1.1 bouyer sc->sc_info.mci_current_fw_time,
1497 1.1 bouyer sc->sc_info.mci_max_cmds,
1498 1.1 bouyer sc->sc_info.mci_max_sg_elements);
1499 1.1 bouyer
1500 1.1 bouyer DPRINTF("%s: max_rq %d lds_pres %d lds_deg %d lds_off %d pd_pres %d\n",
1501 1.1 bouyer DEVNAME(sc),
1502 1.1 bouyer sc->sc_info.mci_max_request_size,
1503 1.1 bouyer sc->sc_info.mci_lds_present,
1504 1.1 bouyer sc->sc_info.mci_lds_degraded,
1505 1.1 bouyer sc->sc_info.mci_lds_offline,
1506 1.1 bouyer sc->sc_info.mci_pd_present);
1507 1.1 bouyer
1508 1.1 bouyer DPRINTF("%s: pd_dsk_prs %d pd_dsk_pred_fail %d pd_dsk_fail %d\n",
1509 1.1 bouyer DEVNAME(sc),
1510 1.1 bouyer sc->sc_info.mci_pd_disks_present,
1511 1.1 bouyer sc->sc_info.mci_pd_disks_pred_failure,
1512 1.1 bouyer sc->sc_info.mci_pd_disks_failed);
1513 1.1 bouyer
1514 1.1 bouyer DPRINTF("%s: nvram %d mem %d flash %d\n",
1515 1.1 bouyer DEVNAME(sc),
1516 1.1 bouyer sc->sc_info.mci_nvram_size,
1517 1.1 bouyer sc->sc_info.mci_memory_size,
1518 1.1 bouyer sc->sc_info.mci_flash_size);
1519 1.1 bouyer
1520 1.1 bouyer DPRINTF("%s: ram_cor %d ram_uncor %d clus_all %d clus_act %d\n",
1521 1.1 bouyer DEVNAME(sc),
1522 1.1 bouyer sc->sc_info.mci_ram_correctable_errors,
1523 1.1 bouyer sc->sc_info.mci_ram_uncorrectable_errors,
1524 1.1 bouyer sc->sc_info.mci_cluster_allowed,
1525 1.1 bouyer sc->sc_info.mci_cluster_active);
1526 1.1 bouyer
1527 1.1 bouyer DPRINTF("%s: max_strps_io %d raid_lvl %#x adapt_ops %#x ld_ops %#x\n",
1528 1.1 bouyer DEVNAME(sc),
1529 1.1 bouyer sc->sc_info.mci_max_strips_per_io,
1530 1.1 bouyer sc->sc_info.mci_raid_levels,
1531 1.1 bouyer sc->sc_info.mci_adapter_ops,
1532 1.1 bouyer sc->sc_info.mci_ld_ops);
1533 1.1 bouyer
1534 1.1 bouyer DPRINTF("%s: strp_sz_min %d strp_sz_max %d pd_ops %#x pd_mix %#x\n",
1535 1.1 bouyer DEVNAME(sc),
1536 1.1 bouyer sc->sc_info.mci_stripe_sz_ops.min,
1537 1.1 bouyer sc->sc_info.mci_stripe_sz_ops.max,
1538 1.1 bouyer sc->sc_info.mci_pd_ops,
1539 1.1 bouyer sc->sc_info.mci_pd_mix_support);
1540 1.1 bouyer
1541 1.1 bouyer DPRINTF("%s: ecc_bucket %d pckg_prop %s\n",
1542 1.1 bouyer DEVNAME(sc),
1543 1.1 bouyer sc->sc_info.mci_ecc_bucket_count,
1544 1.1 bouyer sc->sc_info.mci_package_version);
1545 1.1 bouyer
1546 1.1 bouyer DPRINTF("%s: sq_nm %d prd_fail_poll %d intr_thrtl %d intr_thrtl_to %d\n",
1547 1.1 bouyer DEVNAME(sc),
1548 1.1 bouyer sc->sc_info.mci_properties.mcp_seq_num,
1549 1.1 bouyer sc->sc_info.mci_properties.mcp_pred_fail_poll_interval,
1550 1.1 bouyer sc->sc_info.mci_properties.mcp_intr_throttle_cnt,
1551 1.1 bouyer sc->sc_info.mci_properties.mcp_intr_throttle_timeout);
1552 1.1 bouyer
1553 1.1 bouyer DPRINTF("%s: rbld_rate %d patr_rd_rate %d bgi_rate %d cc_rate %d\n",
1554 1.1 bouyer DEVNAME(sc),
1555 1.1 bouyer sc->sc_info.mci_properties.mcp_rebuild_rate,
1556 1.1 bouyer sc->sc_info.mci_properties.mcp_patrol_read_rate,
1557 1.1 bouyer sc->sc_info.mci_properties.mcp_bgi_rate,
1558 1.1 bouyer sc->sc_info.mci_properties.mcp_cc_rate);
1559 1.1 bouyer
1560 1.1 bouyer DPRINTF("%s: rc_rate %d ch_flsh %d spin_cnt %d spin_dly %d clus_en %d\n",
1561 1.1 bouyer DEVNAME(sc),
1562 1.1 bouyer sc->sc_info.mci_properties.mcp_recon_rate,
1563 1.1 bouyer sc->sc_info.mci_properties.mcp_cache_flush_interval,
1564 1.1 bouyer sc->sc_info.mci_properties.mcp_spinup_drv_cnt,
1565 1.1 bouyer sc->sc_info.mci_properties.mcp_spinup_delay,
1566 1.1 bouyer sc->sc_info.mci_properties.mcp_cluster_enable);
1567 1.1 bouyer
1568 1.1 bouyer DPRINTF("%s: coerc %d alarm %d dis_auto_rbld %d dis_bat_wrn %d ecc %d\n",
1569 1.1 bouyer DEVNAME(sc),
1570 1.1 bouyer sc->sc_info.mci_properties.mcp_coercion_mode,
1571 1.1 bouyer sc->sc_info.mci_properties.mcp_alarm_enable,
1572 1.1 bouyer sc->sc_info.mci_properties.mcp_disable_auto_rebuild,
1573 1.1 bouyer sc->sc_info.mci_properties.mcp_disable_battery_warn,
1574 1.1 bouyer sc->sc_info.mci_properties.mcp_ecc_bucket_size);
1575 1.1 bouyer
1576 1.1 bouyer DPRINTF("%s: ecc_leak %d rest_hs %d exp_encl_dev %d\n",
1577 1.1 bouyer DEVNAME(sc),
1578 1.1 bouyer sc->sc_info.mci_properties.mcp_ecc_bucket_leak_rate,
1579 1.1 bouyer sc->sc_info.mci_properties.mcp_restore_hotspare_on_insertion,
1580 1.1 bouyer sc->sc_info.mci_properties.mcp_expose_encl_devices);
1581 1.1 bouyer
1582 1.1 bouyer DPRINTF("%s: vendor %#x device %#x subvendor %#x subdevice %#x\n",
1583 1.1 bouyer DEVNAME(sc),
1584 1.1 bouyer sc->sc_info.mci_pci.mip_vendor,
1585 1.1 bouyer sc->sc_info.mci_pci.mip_device,
1586 1.1 bouyer sc->sc_info.mci_pci.mip_subvendor,
1587 1.1 bouyer sc->sc_info.mci_pci.mip_subdevice);
1588 1.1 bouyer
1589 1.1 bouyer DPRINTF("%s: type %#x port_count %d port_addr ",
1590 1.1 bouyer DEVNAME(sc),
1591 1.1 bouyer sc->sc_info.mci_host.mih_type,
1592 1.1 bouyer sc->sc_info.mci_host.mih_port_count);
1593 1.1 bouyer
1594 1.1 bouyer for (i = 0; i < 8; i++)
1595 1.4.4.2 martin DPRINTF("%.0" PRIx64 " ",
1596 1.4.4.2 martin sc->sc_info.mci_host.mih_port_addr[i]);
1597 1.1 bouyer DPRINTF("\n");
1598 1.1 bouyer
1599 1.1 bouyer DPRINTF("%s: type %.x port_count %d port_addr ",
1600 1.1 bouyer DEVNAME(sc),
1601 1.1 bouyer sc->sc_info.mci_device.mid_type,
1602 1.1 bouyer sc->sc_info.mci_device.mid_port_count);
1603 1.1 bouyer
1604 1.1 bouyer for (i = 0; i < 8; i++)
1605 1.4.4.2 martin DPRINTF("%.0" PRIx64 " ",
1606 1.4.4.2 martin sc->sc_info.mci_device.mid_port_addr[i]);
1607 1.1 bouyer DPRINTF("\n");
1608 1.1 bouyer
1609 1.1 bouyer return (0);
1610 1.1 bouyer }
1611 1.1 bouyer
1612 1.4.4.1 bouyer static int
1613 1.1 bouyer mfii_mfa_poll(struct mfii_softc *sc, struct mfii_ccb *ccb)
1614 1.1 bouyer {
1615 1.1 bouyer struct mfi_frame_header *hdr = ccb->ccb_request;
1616 1.1 bouyer u_int64_t r;
1617 1.1 bouyer int to = 0, rv = 0;
1618 1.1 bouyer
1619 1.1 bouyer #ifdef DIAGNOSTIC
1620 1.1 bouyer if (ccb->ccb_cookie != NULL || ccb->ccb_done != NULL)
1621 1.1 bouyer panic("mfii_mfa_poll called with cookie or done set");
1622 1.1 bouyer #endif
1623 1.1 bouyer
1624 1.1 bouyer hdr->mfh_context = ccb->ccb_smid;
1625 1.1 bouyer hdr->mfh_cmd_status = MFI_STAT_INVALID_STATUS;
1626 1.1 bouyer hdr->mfh_flags |= htole16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
1627 1.1 bouyer
1628 1.1 bouyer r = MFII_REQ_MFA(ccb->ccb_request_dva);
1629 1.1 bouyer memcpy(&ccb->ccb_req, &r, sizeof(ccb->ccb_req));
1630 1.1 bouyer
1631 1.1 bouyer mfii_start(sc, ccb);
1632 1.1 bouyer
1633 1.1 bouyer for (;;) {
1634 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_requests),
1635 1.1 bouyer ccb->ccb_request_offset, MFII_REQUEST_SIZE,
1636 1.1 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1637 1.1 bouyer
1638 1.1 bouyer if (hdr->mfh_cmd_status != MFI_STAT_INVALID_STATUS)
1639 1.1 bouyer break;
1640 1.1 bouyer
1641 1.1 bouyer if (to++ > 5000) { /* XXX 5 seconds busywait sucks */
1642 1.1 bouyer printf("%s: timeout on ccb %d\n", DEVNAME(sc),
1643 1.1 bouyer ccb->ccb_smid);
1644 1.1 bouyer ccb->ccb_flags |= MFI_CCB_F_ERR;
1645 1.1 bouyer rv = 1;
1646 1.1 bouyer break;
1647 1.1 bouyer }
1648 1.1 bouyer
1649 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_requests),
1650 1.1 bouyer ccb->ccb_request_offset, MFII_REQUEST_SIZE,
1651 1.1 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1652 1.1 bouyer
1653 1.1 bouyer delay(1000);
1654 1.1 bouyer }
1655 1.1 bouyer
1656 1.1 bouyer if (ccb->ccb_len > 0) {
1657 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap32,
1658 1.1 bouyer 0, ccb->ccb_dmamap32->dm_mapsize,
1659 1.1 bouyer (ccb->ccb_direction == MFII_DATA_IN) ?
1660 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1661 1.1 bouyer
1662 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap32);
1663 1.1 bouyer }
1664 1.1 bouyer
1665 1.1 bouyer return (rv);
1666 1.1 bouyer }
1667 1.1 bouyer
1668 1.4.4.1 bouyer static int
1669 1.1 bouyer mfii_poll(struct mfii_softc *sc, struct mfii_ccb *ccb)
1670 1.1 bouyer {
1671 1.1 bouyer void (*done)(struct mfii_softc *, struct mfii_ccb *);
1672 1.1 bouyer void *cookie;
1673 1.1 bouyer int rv = 1;
1674 1.1 bouyer
1675 1.1 bouyer done = ccb->ccb_done;
1676 1.1 bouyer cookie = ccb->ccb_cookie;
1677 1.1 bouyer
1678 1.1 bouyer ccb->ccb_done = mfii_poll_done;
1679 1.1 bouyer ccb->ccb_cookie = &rv;
1680 1.1 bouyer
1681 1.1 bouyer mfii_start(sc, ccb);
1682 1.1 bouyer
1683 1.1 bouyer do {
1684 1.1 bouyer delay(10);
1685 1.1 bouyer mfii_postq(sc);
1686 1.1 bouyer } while (rv == 1);
1687 1.1 bouyer
1688 1.1 bouyer ccb->ccb_cookie = cookie;
1689 1.1 bouyer done(sc, ccb);
1690 1.1 bouyer
1691 1.1 bouyer return (0);
1692 1.1 bouyer }
1693 1.1 bouyer
1694 1.4.4.1 bouyer static void
1695 1.1 bouyer mfii_poll_done(struct mfii_softc *sc, struct mfii_ccb *ccb)
1696 1.1 bouyer {
1697 1.1 bouyer int *rv = ccb->ccb_cookie;
1698 1.1 bouyer
1699 1.1 bouyer *rv = 0;
1700 1.1 bouyer }
1701 1.1 bouyer
1702 1.4.4.1 bouyer static int
1703 1.1 bouyer mfii_exec(struct mfii_softc *sc, struct mfii_ccb *ccb)
1704 1.1 bouyer {
1705 1.1 bouyer #ifdef DIAGNOSTIC
1706 1.1 bouyer if (ccb->ccb_cookie != NULL || ccb->ccb_done != NULL)
1707 1.1 bouyer panic("mfii_exec called with cookie or done set");
1708 1.1 bouyer #endif
1709 1.1 bouyer
1710 1.1 bouyer ccb->ccb_cookie = ccb;
1711 1.1 bouyer ccb->ccb_done = mfii_exec_done;
1712 1.1 bouyer
1713 1.1 bouyer mfii_start(sc, ccb);
1714 1.1 bouyer
1715 1.1 bouyer mutex_enter(&ccb->ccb_mtx);
1716 1.1 bouyer while (ccb->ccb_cookie != NULL)
1717 1.1 bouyer cv_wait(&ccb->ccb_cv, &ccb->ccb_mtx);
1718 1.1 bouyer mutex_exit(&ccb->ccb_mtx);
1719 1.1 bouyer
1720 1.1 bouyer return (0);
1721 1.1 bouyer }
1722 1.1 bouyer
1723 1.4.4.1 bouyer static void
1724 1.1 bouyer mfii_exec_done(struct mfii_softc *sc, struct mfii_ccb *ccb)
1725 1.1 bouyer {
1726 1.1 bouyer mutex_enter(&ccb->ccb_mtx);
1727 1.1 bouyer ccb->ccb_cookie = NULL;
1728 1.1 bouyer cv_signal(&ccb->ccb_cv);
1729 1.1 bouyer mutex_exit(&ccb->ccb_mtx);
1730 1.1 bouyer }
1731 1.1 bouyer
1732 1.4.4.1 bouyer static int
1733 1.1 bouyer mfii_mgmt(struct mfii_softc *sc, uint32_t opc, const union mfi_mbox *mbox,
1734 1.1 bouyer void *buf, size_t len, mfii_direction_t dir, bool poll)
1735 1.1 bouyer {
1736 1.1 bouyer struct mfii_ccb *ccb;
1737 1.1 bouyer int rv;
1738 1.1 bouyer
1739 1.1 bouyer KASSERT(mutex_owned(&sc->sc_lock));
1740 1.1 bouyer if (!sc->sc_running)
1741 1.1 bouyer return EAGAIN;
1742 1.1 bouyer
1743 1.1 bouyer ccb = mfii_get_ccb(sc);
1744 1.1 bouyer if (ccb == NULL)
1745 1.1 bouyer return (ENOMEM);
1746 1.1 bouyer
1747 1.1 bouyer mfii_scrub_ccb(ccb);
1748 1.1 bouyer rv = mfii_do_mgmt(sc, ccb, opc, mbox, buf, len, dir, poll);
1749 1.1 bouyer mfii_put_ccb(sc, ccb);
1750 1.1 bouyer
1751 1.1 bouyer return (rv);
1752 1.1 bouyer }
1753 1.1 bouyer
1754 1.4.4.1 bouyer static int
1755 1.1 bouyer mfii_do_mgmt(struct mfii_softc *sc, struct mfii_ccb *ccb, uint32_t opc,
1756 1.1 bouyer const union mfi_mbox *mbox, void *buf, size_t len, mfii_direction_t dir,
1757 1.1 bouyer bool poll)
1758 1.1 bouyer {
1759 1.1 bouyer struct mpii_msg_scsi_io *io = ccb->ccb_request;
1760 1.1 bouyer struct mfii_raid_context *ctx = (struct mfii_raid_context *)(io + 1);
1761 1.1 bouyer struct mfii_sge *sge = (struct mfii_sge *)(ctx + 1);
1762 1.1 bouyer struct mfi_dcmd_frame *dcmd = ccb->ccb_mfi;
1763 1.1 bouyer struct mfi_frame_header *hdr = &dcmd->mdf_header;
1764 1.1 bouyer int rv = EIO;
1765 1.1 bouyer
1766 1.1 bouyer if (cold)
1767 1.1 bouyer poll = true;
1768 1.1 bouyer
1769 1.1 bouyer ccb->ccb_data = buf;
1770 1.1 bouyer ccb->ccb_len = len;
1771 1.1 bouyer ccb->ccb_direction = dir;
1772 1.1 bouyer switch (dir) {
1773 1.1 bouyer case MFII_DATA_IN:
1774 1.1 bouyer hdr->mfh_flags = htole16(MFI_FRAME_DIR_READ);
1775 1.1 bouyer break;
1776 1.1 bouyer case MFII_DATA_OUT:
1777 1.1 bouyer hdr->mfh_flags = htole16(MFI_FRAME_DIR_WRITE);
1778 1.1 bouyer break;
1779 1.1 bouyer case MFII_DATA_NONE:
1780 1.1 bouyer hdr->mfh_flags = htole16(MFI_FRAME_DIR_NONE);
1781 1.1 bouyer break;
1782 1.1 bouyer }
1783 1.1 bouyer
1784 1.1 bouyer if (mfii_load_mfa(sc, ccb, &dcmd->mdf_sgl, poll) != 0) {
1785 1.1 bouyer rv = ENOMEM;
1786 1.1 bouyer goto done;
1787 1.1 bouyer }
1788 1.1 bouyer
1789 1.1 bouyer hdr->mfh_cmd = MFI_CMD_DCMD;
1790 1.1 bouyer hdr->mfh_context = ccb->ccb_smid;
1791 1.1 bouyer hdr->mfh_data_len = htole32(len);
1792 1.1 bouyer hdr->mfh_sg_count = ccb->ccb_dmamap32->dm_nsegs;
1793 1.1 bouyer KASSERT(!ccb->ccb_dma64);
1794 1.1 bouyer
1795 1.1 bouyer dcmd->mdf_opcode = opc;
1796 1.1 bouyer /* handle special opcodes */
1797 1.1 bouyer if (mbox != NULL)
1798 1.1 bouyer memcpy(&dcmd->mdf_mbox, mbox, sizeof(dcmd->mdf_mbox));
1799 1.1 bouyer
1800 1.1 bouyer io->function = MFII_FUNCTION_PASSTHRU_IO;
1801 1.1 bouyer io->sgl_offset0 = ((u_int8_t *)sge - (u_int8_t *)io) / 4;
1802 1.1 bouyer io->chain_offset = ((u_int8_t *)sge - (u_int8_t *)io) / 16;
1803 1.1 bouyer
1804 1.1 bouyer sge->sg_addr = htole64(ccb->ccb_mfi_dva);
1805 1.1 bouyer sge->sg_len = htole32(MFI_FRAME_SIZE);
1806 1.1 bouyer sge->sg_flags = MFII_SGE_CHAIN_ELEMENT | MFII_SGE_ADDR_IOCPLBNTA;
1807 1.1 bouyer
1808 1.1 bouyer ccb->ccb_req.flags = MFII_REQ_TYPE_SCSI;
1809 1.1 bouyer ccb->ccb_req.smid = le16toh(ccb->ccb_smid);
1810 1.1 bouyer
1811 1.1 bouyer if (poll) {
1812 1.1 bouyer ccb->ccb_done = mfii_empty_done;
1813 1.1 bouyer mfii_poll(sc, ccb);
1814 1.1 bouyer } else
1815 1.1 bouyer mfii_exec(sc, ccb);
1816 1.1 bouyer
1817 1.1 bouyer if (hdr->mfh_cmd_status == MFI_STAT_OK) {
1818 1.1 bouyer rv = 0;
1819 1.1 bouyer }
1820 1.1 bouyer
1821 1.1 bouyer done:
1822 1.1 bouyer return (rv);
1823 1.1 bouyer }
1824 1.1 bouyer
1825 1.4.4.1 bouyer static void
1826 1.1 bouyer mfii_empty_done(struct mfii_softc *sc, struct mfii_ccb *ccb)
1827 1.1 bouyer {
1828 1.1 bouyer return;
1829 1.1 bouyer }
1830 1.1 bouyer
1831 1.4.4.1 bouyer static int
1832 1.1 bouyer mfii_load_mfa(struct mfii_softc *sc, struct mfii_ccb *ccb,
1833 1.1 bouyer void *sglp, int nosleep)
1834 1.1 bouyer {
1835 1.1 bouyer union mfi_sgl *sgl = sglp;
1836 1.1 bouyer bus_dmamap_t dmap = ccb->ccb_dmamap32;
1837 1.1 bouyer int error;
1838 1.1 bouyer int i;
1839 1.1 bouyer
1840 1.1 bouyer KASSERT(!ccb->ccb_dma64);
1841 1.1 bouyer if (ccb->ccb_len == 0)
1842 1.1 bouyer return (0);
1843 1.1 bouyer
1844 1.1 bouyer error = bus_dmamap_load(sc->sc_dmat, dmap,
1845 1.1 bouyer ccb->ccb_data, ccb->ccb_len, NULL,
1846 1.1 bouyer nosleep ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
1847 1.1 bouyer if (error) {
1848 1.1 bouyer printf("%s: error %d loading dmamap\n", DEVNAME(sc), error);
1849 1.1 bouyer return (1);
1850 1.1 bouyer }
1851 1.1 bouyer
1852 1.1 bouyer for (i = 0; i < dmap->dm_nsegs; i++) {
1853 1.1 bouyer sgl->sg32[i].addr = htole32(dmap->dm_segs[i].ds_addr);
1854 1.1 bouyer sgl->sg32[i].len = htole32(dmap->dm_segs[i].ds_len);
1855 1.1 bouyer }
1856 1.1 bouyer
1857 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
1858 1.1 bouyer ccb->ccb_direction == MFII_DATA_OUT ?
1859 1.1 bouyer BUS_DMASYNC_PREWRITE : BUS_DMASYNC_PREREAD);
1860 1.1 bouyer
1861 1.1 bouyer return (0);
1862 1.1 bouyer }
1863 1.1 bouyer
1864 1.4.4.1 bouyer static void
1865 1.1 bouyer mfii_start(struct mfii_softc *sc, struct mfii_ccb *ccb)
1866 1.1 bouyer {
1867 1.4.4.2 martin uint32_t *r = (uint32_t *)&ccb->ccb_req;
1868 1.4.4.2 martin #if defined(__LP64__)
1869 1.4.4.2 martin uint64_t buf;
1870 1.4.4.2 martin #endif
1871 1.1 bouyer
1872 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_requests),
1873 1.1 bouyer ccb->ccb_request_offset, MFII_REQUEST_SIZE,
1874 1.1 bouyer BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1875 1.1 bouyer
1876 1.4.4.2 martin #if defined(__LP64__)
1877 1.4.4.2 martin buf = ((uint64_t)r[1] << 32) | r[0];
1878 1.4.4.2 martin bus_space_write_8(sc->sc_iot, sc->sc_ioh, MFI_IQPL, buf);
1879 1.1 bouyer #else
1880 1.1 bouyer mutex_enter(&sc->sc_post_mtx);
1881 1.1 bouyer bus_space_write_4(sc->sc_iot, sc->sc_ioh, MFI_IQPL, r[0]);
1882 1.1 bouyer bus_space_write_4(sc->sc_iot, sc->sc_ioh, MFI_IQPH, r[1]);
1883 1.1 bouyer bus_space_barrier(sc->sc_iot, sc->sc_ioh,
1884 1.4.4.2 martin MFI_IQPL, 8, BUS_SPACE_BARRIER_WRITE);
1885 1.1 bouyer mutex_exit(&sc->sc_post_mtx);
1886 1.1 bouyer #endif
1887 1.1 bouyer }
1888 1.1 bouyer
1889 1.4.4.1 bouyer static void
1890 1.1 bouyer mfii_done(struct mfii_softc *sc, struct mfii_ccb *ccb)
1891 1.1 bouyer {
1892 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_requests),
1893 1.1 bouyer ccb->ccb_request_offset, MFII_REQUEST_SIZE,
1894 1.1 bouyer BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1895 1.1 bouyer
1896 1.1 bouyer if (ccb->ccb_sgl_len > 0) {
1897 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_sgl),
1898 1.1 bouyer ccb->ccb_sgl_offset, ccb->ccb_sgl_len,
1899 1.1 bouyer BUS_DMASYNC_POSTWRITE);
1900 1.1 bouyer }
1901 1.1 bouyer
1902 1.1 bouyer if (ccb->ccb_dma64) {
1903 1.1 bouyer KASSERT(ccb->ccb_len > 0);
1904 1.1 bouyer bus_dmamap_sync(sc->sc_dmat64, ccb->ccb_dmamap64,
1905 1.1 bouyer 0, ccb->ccb_dmamap64->dm_mapsize,
1906 1.1 bouyer (ccb->ccb_direction == MFII_DATA_IN) ?
1907 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1908 1.1 bouyer
1909 1.1 bouyer bus_dmamap_unload(sc->sc_dmat64, ccb->ccb_dmamap64);
1910 1.1 bouyer } else if (ccb->ccb_len > 0) {
1911 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap32,
1912 1.1 bouyer 0, ccb->ccb_dmamap32->dm_mapsize,
1913 1.1 bouyer (ccb->ccb_direction == MFII_DATA_IN) ?
1914 1.1 bouyer BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1915 1.1 bouyer
1916 1.1 bouyer bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap32);
1917 1.1 bouyer }
1918 1.1 bouyer
1919 1.1 bouyer ccb->ccb_done(sc, ccb);
1920 1.1 bouyer }
1921 1.1 bouyer
1922 1.4.4.1 bouyer static int
1923 1.1 bouyer mfii_initialise_firmware(struct mfii_softc *sc)
1924 1.1 bouyer {
1925 1.1 bouyer struct mpii_msg_iocinit_request *iiq;
1926 1.1 bouyer struct mfii_dmamem *m;
1927 1.1 bouyer struct mfii_ccb *ccb;
1928 1.1 bouyer struct mfi_init_frame *init;
1929 1.1 bouyer int rv;
1930 1.1 bouyer
1931 1.1 bouyer m = mfii_dmamem_alloc(sc, sizeof(*iiq));
1932 1.1 bouyer if (m == NULL)
1933 1.1 bouyer return (1);
1934 1.1 bouyer
1935 1.1 bouyer iiq = MFII_DMA_KVA(m);
1936 1.1 bouyer memset(iiq, 0, sizeof(*iiq));
1937 1.1 bouyer
1938 1.1 bouyer iiq->function = MPII_FUNCTION_IOC_INIT;
1939 1.1 bouyer iiq->whoinit = MPII_WHOINIT_HOST_DRIVER;
1940 1.1 bouyer
1941 1.1 bouyer iiq->msg_version_maj = 0x02;
1942 1.1 bouyer iiq->msg_version_min = 0x00;
1943 1.1 bouyer iiq->hdr_version_unit = 0x10;
1944 1.1 bouyer iiq->hdr_version_dev = 0x0;
1945 1.1 bouyer
1946 1.1 bouyer iiq->system_request_frame_size = htole16(MFII_REQUEST_SIZE / 4);
1947 1.1 bouyer
1948 1.1 bouyer iiq->reply_descriptor_post_queue_depth =
1949 1.1 bouyer htole16(sc->sc_reply_postq_depth);
1950 1.1 bouyer iiq->reply_free_queue_depth = htole16(0);
1951 1.1 bouyer
1952 1.1 bouyer iiq->sense_buffer_address_high = htole32(
1953 1.1 bouyer MFII_DMA_DVA(sc->sc_sense) >> 32);
1954 1.1 bouyer
1955 1.3 bouyer iiq->reply_descriptor_post_queue_address_lo =
1956 1.3 bouyer htole32(MFII_DMA_DVA(sc->sc_reply_postq));
1957 1.3 bouyer iiq->reply_descriptor_post_queue_address_hi =
1958 1.3 bouyer htole32(MFII_DMA_DVA(sc->sc_reply_postq) >> 32);
1959 1.3 bouyer
1960 1.4.4.1 bouyer iiq->system_request_frame_base_address_lo =
1961 1.3 bouyer htole32(MFII_DMA_DVA(sc->sc_requests));
1962 1.4.4.1 bouyer iiq->system_request_frame_base_address_hi =
1963 1.3 bouyer htole32(MFII_DMA_DVA(sc->sc_requests) >> 32);
1964 1.1 bouyer
1965 1.1 bouyer iiq->timestamp = htole64(time_uptime);
1966 1.1 bouyer
1967 1.1 bouyer ccb = mfii_get_ccb(sc);
1968 1.1 bouyer if (ccb == NULL) {
1969 1.1 bouyer /* shouldn't ever run out of ccbs during attach */
1970 1.1 bouyer return (1);
1971 1.1 bouyer }
1972 1.1 bouyer mfii_scrub_ccb(ccb);
1973 1.1 bouyer init = ccb->ccb_request;
1974 1.1 bouyer
1975 1.1 bouyer init->mif_header.mfh_cmd = MFI_CMD_INIT;
1976 1.1 bouyer init->mif_header.mfh_data_len = htole32(sizeof(*iiq));
1977 1.1 bouyer init->mif_qinfo_new_addr_lo = htole32(MFII_DMA_DVA(m));
1978 1.1 bouyer init->mif_qinfo_new_addr_hi = htole32((uint64_t)MFII_DMA_DVA(m) >> 32);
1979 1.1 bouyer
1980 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_reply_postq),
1981 1.1 bouyer 0, MFII_DMA_LEN(sc->sc_reply_postq),
1982 1.1 bouyer BUS_DMASYNC_PREREAD);
1983 1.1 bouyer
1984 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(m),
1985 1.1 bouyer 0, sizeof(*iiq), BUS_DMASYNC_PREREAD);
1986 1.1 bouyer
1987 1.1 bouyer rv = mfii_mfa_poll(sc, ccb);
1988 1.1 bouyer
1989 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(m),
1990 1.1 bouyer 0, sizeof(*iiq), BUS_DMASYNC_POSTREAD);
1991 1.1 bouyer
1992 1.1 bouyer mfii_put_ccb(sc, ccb);
1993 1.1 bouyer mfii_dmamem_free(sc, m);
1994 1.1 bouyer
1995 1.1 bouyer return (rv);
1996 1.1 bouyer }
1997 1.1 bouyer
1998 1.4.4.1 bouyer static int
1999 1.1 bouyer mfii_my_intr(struct mfii_softc *sc)
2000 1.1 bouyer {
2001 1.1 bouyer u_int32_t status;
2002 1.1 bouyer
2003 1.1 bouyer status = mfii_read(sc, MFI_OSTS);
2004 1.1 bouyer
2005 1.1 bouyer DNPRINTF(MFII_D_INTR, "%s: intr status 0x%x\n", DEVNAME(sc), status);
2006 1.1 bouyer if (ISSET(status, 0x1)) {
2007 1.1 bouyer mfii_write(sc, MFI_OSTS, status);
2008 1.1 bouyer return (1);
2009 1.1 bouyer }
2010 1.1 bouyer
2011 1.1 bouyer return (ISSET(status, MFII_OSTS_INTR_VALID) ? 1 : 0);
2012 1.1 bouyer }
2013 1.1 bouyer
2014 1.4.4.1 bouyer static int
2015 1.1 bouyer mfii_intr(void *arg)
2016 1.1 bouyer {
2017 1.1 bouyer struct mfii_softc *sc = arg;
2018 1.1 bouyer
2019 1.1 bouyer if (!mfii_my_intr(sc))
2020 1.1 bouyer return (0);
2021 1.1 bouyer
2022 1.1 bouyer mfii_postq(sc);
2023 1.1 bouyer
2024 1.1 bouyer return (1);
2025 1.1 bouyer }
2026 1.1 bouyer
2027 1.4.4.1 bouyer static void
2028 1.1 bouyer mfii_postq(struct mfii_softc *sc)
2029 1.1 bouyer {
2030 1.1 bouyer struct mfii_ccb_list ccbs = SIMPLEQ_HEAD_INITIALIZER(ccbs);
2031 1.1 bouyer struct mpii_reply_descr *postq = MFII_DMA_KVA(sc->sc_reply_postq);
2032 1.1 bouyer struct mpii_reply_descr *rdp;
2033 1.1 bouyer struct mfii_ccb *ccb;
2034 1.1 bouyer int rpi = 0;
2035 1.1 bouyer
2036 1.1 bouyer mutex_enter(&sc->sc_reply_postq_mtx);
2037 1.1 bouyer
2038 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_reply_postq),
2039 1.1 bouyer 0, MFII_DMA_LEN(sc->sc_reply_postq),
2040 1.1 bouyer BUS_DMASYNC_POSTREAD);
2041 1.1 bouyer
2042 1.1 bouyer for (;;) {
2043 1.1 bouyer rdp = &postq[sc->sc_reply_postq_index];
2044 1.4.4.2 martin DNPRINTF(MFII_D_INTR,
2045 1.4.4.2 martin "%s: mfii_postq index %d flags 0x%x data 0x%x\n",
2046 1.1 bouyer DEVNAME(sc), sc->sc_reply_postq_index, rdp->reply_flags,
2047 1.1 bouyer rdp->data == 0xffffffff);
2048 1.1 bouyer if ((rdp->reply_flags & MPII_REPLY_DESCR_TYPE_MASK) ==
2049 1.1 bouyer MPII_REPLY_DESCR_UNUSED)
2050 1.1 bouyer break;
2051 1.1 bouyer if (rdp->data == 0xffffffff) {
2052 1.1 bouyer /*
2053 1.1 bouyer * ioc is still writing to the reply post queue
2054 1.1 bouyer * race condition - bail!
2055 1.1 bouyer */
2056 1.1 bouyer break;
2057 1.1 bouyer }
2058 1.1 bouyer
2059 1.1 bouyer ccb = &sc->sc_ccb[le16toh(rdp->smid) - 1];
2060 1.1 bouyer SIMPLEQ_INSERT_TAIL(&ccbs, ccb, ccb_link);
2061 1.1 bouyer memset(rdp, 0xff, sizeof(*rdp));
2062 1.1 bouyer
2063 1.1 bouyer sc->sc_reply_postq_index++;
2064 1.1 bouyer sc->sc_reply_postq_index %= sc->sc_reply_postq_depth;
2065 1.1 bouyer rpi = 1;
2066 1.1 bouyer }
2067 1.1 bouyer
2068 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_reply_postq),
2069 1.1 bouyer 0, MFII_DMA_LEN(sc->sc_reply_postq),
2070 1.1 bouyer BUS_DMASYNC_PREREAD);
2071 1.1 bouyer
2072 1.1 bouyer if (rpi)
2073 1.1 bouyer mfii_write(sc, MFII_RPI, sc->sc_reply_postq_index);
2074 1.1 bouyer
2075 1.1 bouyer mutex_exit(&sc->sc_reply_postq_mtx);
2076 1.1 bouyer
2077 1.1 bouyer while ((ccb = SIMPLEQ_FIRST(&ccbs)) != NULL) {
2078 1.1 bouyer SIMPLEQ_REMOVE_HEAD(&ccbs, ccb_link);
2079 1.1 bouyer mfii_done(sc, ccb);
2080 1.1 bouyer }
2081 1.1 bouyer }
2082 1.1 bouyer
2083 1.4.4.1 bouyer static void
2084 1.1 bouyer mfii_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
2085 1.4.4.1 bouyer void *arg)
2086 1.1 bouyer {
2087 1.1 bouyer struct scsipi_periph *periph;
2088 1.1 bouyer struct scsipi_xfer *xs;
2089 1.1 bouyer struct scsipi_adapter *adapt = chan->chan_adapter;
2090 1.1 bouyer struct mfii_softc *sc = device_private(adapt->adapt_dev);
2091 1.1 bouyer struct mfii_ccb *ccb;
2092 1.1 bouyer int timeout;
2093 1.1 bouyer int target;
2094 1.1 bouyer
2095 1.4.4.1 bouyer switch (req) {
2096 1.1 bouyer case ADAPTER_REQ_GROW_RESOURCES:
2097 1.1 bouyer /* Not supported. */
2098 1.1 bouyer return;
2099 1.1 bouyer case ADAPTER_REQ_SET_XFER_MODE:
2100 1.1 bouyer {
2101 1.1 bouyer struct scsipi_xfer_mode *xm = arg;
2102 1.1 bouyer xm->xm_mode = PERIPH_CAP_TQING;
2103 1.1 bouyer xm->xm_period = 0;
2104 1.1 bouyer xm->xm_offset = 0;
2105 1.1 bouyer scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_XFER_MODE, xm);
2106 1.1 bouyer return;
2107 1.1 bouyer }
2108 1.1 bouyer case ADAPTER_REQ_RUN_XFER:
2109 1.1 bouyer break;
2110 1.1 bouyer }
2111 1.1 bouyer
2112 1.1 bouyer xs = arg;
2113 1.1 bouyer periph = xs->xs_periph;
2114 1.1 bouyer target = periph->periph_target;
2115 1.1 bouyer
2116 1.1 bouyer if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present ||
2117 1.1 bouyer periph->periph_lun != 0) {
2118 1.1 bouyer xs->error = XS_SELTIMEOUT;
2119 1.1 bouyer scsipi_done(xs);
2120 1.1 bouyer return;
2121 1.1 bouyer }
2122 1.1 bouyer
2123 1.1 bouyer if ((xs->cmd->opcode == SCSI_SYNCHRONIZE_CACHE_10 ||
2124 1.1 bouyer xs->cmd->opcode == SCSI_SYNCHRONIZE_CACHE_16) && sc->sc_bbuok) {
2125 1.1 bouyer /* the cache is stable storage, don't flush */
2126 1.1 bouyer xs->error = XS_NOERROR;
2127 1.1 bouyer xs->status = SCSI_OK;
2128 1.1 bouyer xs->resid = 0;
2129 1.1 bouyer scsipi_done(xs);
2130 1.1 bouyer return;
2131 1.1 bouyer }
2132 1.1 bouyer
2133 1.1 bouyer ccb = mfii_get_ccb(sc);
2134 1.1 bouyer if (ccb == NULL) {
2135 1.1 bouyer xs->error = XS_RESOURCE_SHORTAGE;
2136 1.1 bouyer scsipi_done(xs);
2137 1.1 bouyer return;
2138 1.1 bouyer }
2139 1.1 bouyer mfii_scrub_ccb(ccb);
2140 1.1 bouyer ccb->ccb_cookie = xs;
2141 1.1 bouyer ccb->ccb_done = mfii_scsi_cmd_done;
2142 1.1 bouyer ccb->ccb_data = xs->data;
2143 1.1 bouyer ccb->ccb_len = xs->datalen;
2144 1.1 bouyer
2145 1.1 bouyer timeout = mstohz(xs->timeout);
2146 1.1 bouyer if (timeout == 0)
2147 1.1 bouyer timeout = 1;
2148 1.1 bouyer callout_reset(&xs->xs_callout, timeout, mfii_scsi_cmd_tmo, ccb);
2149 1.1 bouyer
2150 1.1 bouyer switch (xs->cmd->opcode) {
2151 1.1 bouyer case SCSI_READ_6_COMMAND:
2152 1.1 bouyer case READ_10:
2153 1.1 bouyer case READ_12:
2154 1.1 bouyer case READ_16:
2155 1.1 bouyer case SCSI_WRITE_6_COMMAND:
2156 1.1 bouyer case WRITE_10:
2157 1.1 bouyer case WRITE_12:
2158 1.1 bouyer case WRITE_16:
2159 1.1 bouyer if (mfii_scsi_cmd_io(sc, ccb, xs) != 0)
2160 1.1 bouyer goto stuffup;
2161 1.1 bouyer break;
2162 1.1 bouyer
2163 1.1 bouyer default:
2164 1.1 bouyer if (mfii_scsi_cmd_cdb(sc, ccb, xs) != 0)
2165 1.1 bouyer goto stuffup;
2166 1.1 bouyer break;
2167 1.1 bouyer }
2168 1.1 bouyer
2169 1.1 bouyer xs->error = XS_NOERROR;
2170 1.1 bouyer xs->resid = 0;
2171 1.1 bouyer
2172 1.1 bouyer DNPRINTF(MFII_D_CMD, "%s: start io %d cmd %d\n", DEVNAME(sc), target,
2173 1.1 bouyer xs->cmd->opcode);
2174 1.1 bouyer
2175 1.1 bouyer if (xs->xs_control & XS_CTL_POLL) {
2176 1.1 bouyer if (mfii_poll(sc, ccb) != 0)
2177 1.1 bouyer goto stuffup;
2178 1.1 bouyer return;
2179 1.1 bouyer }
2180 1.1 bouyer
2181 1.1 bouyer mfii_start(sc, ccb);
2182 1.1 bouyer
2183 1.1 bouyer return;
2184 1.1 bouyer
2185 1.1 bouyer stuffup:
2186 1.1 bouyer xs->error = XS_DRIVER_STUFFUP;
2187 1.1 bouyer scsipi_done(xs);
2188 1.1 bouyer mfii_put_ccb(sc, ccb);
2189 1.1 bouyer }
2190 1.1 bouyer
2191 1.4.4.1 bouyer static void
2192 1.1 bouyer mfii_scsi_cmd_done(struct mfii_softc *sc, struct mfii_ccb *ccb)
2193 1.1 bouyer {
2194 1.1 bouyer struct scsipi_xfer *xs = ccb->ccb_cookie;
2195 1.1 bouyer struct mpii_msg_scsi_io *io = ccb->ccb_request;
2196 1.1 bouyer struct mfii_raid_context *ctx = (struct mfii_raid_context *)(io + 1);
2197 1.1 bouyer
2198 1.1 bouyer if (callout_stop(&xs->xs_callout) != 0)
2199 1.4 bouyer return;
2200 1.1 bouyer
2201 1.1 bouyer switch (ctx->status) {
2202 1.1 bouyer case MFI_STAT_OK:
2203 1.1 bouyer break;
2204 1.1 bouyer
2205 1.1 bouyer case MFI_STAT_SCSI_DONE_WITH_ERROR:
2206 1.1 bouyer xs->error = XS_SENSE;
2207 1.1 bouyer memset(&xs->sense, 0, sizeof(xs->sense));
2208 1.1 bouyer memcpy(&xs->sense, ccb->ccb_sense, sizeof(xs->sense));
2209 1.1 bouyer break;
2210 1.1 bouyer
2211 1.1 bouyer case MFI_STAT_LD_OFFLINE:
2212 1.1 bouyer case MFI_STAT_DEVICE_NOT_FOUND:
2213 1.1 bouyer xs->error = XS_SELTIMEOUT;
2214 1.1 bouyer break;
2215 1.1 bouyer
2216 1.1 bouyer default:
2217 1.1 bouyer xs->error = XS_DRIVER_STUFFUP;
2218 1.1 bouyer break;
2219 1.1 bouyer }
2220 1.1 bouyer
2221 1.4 bouyer scsipi_done(xs);
2222 1.4 bouyer mfii_put_ccb(sc, ccb);
2223 1.1 bouyer }
2224 1.1 bouyer
2225 1.4.4.1 bouyer static int
2226 1.1 bouyer mfii_scsi_cmd_io(struct mfii_softc *sc, struct mfii_ccb *ccb,
2227 1.1 bouyer struct scsipi_xfer *xs)
2228 1.1 bouyer {
2229 1.1 bouyer struct scsipi_periph *periph = xs->xs_periph;
2230 1.1 bouyer struct mpii_msg_scsi_io *io = ccb->ccb_request;
2231 1.1 bouyer struct mfii_raid_context *ctx = (struct mfii_raid_context *)(io + 1);
2232 1.1 bouyer int segs;
2233 1.1 bouyer
2234 1.1 bouyer io->dev_handle = htole16(periph->periph_target);
2235 1.1 bouyer io->function = MFII_FUNCTION_LDIO_REQUEST;
2236 1.1 bouyer io->sense_buffer_low_address = htole32(ccb->ccb_sense_dva);
2237 1.1 bouyer io->sgl_flags = htole16(0x02); /* XXX */
2238 1.1 bouyer io->sense_buffer_length = sizeof(xs->sense);
2239 1.1 bouyer io->sgl_offset0 = (sizeof(*io) + sizeof(*ctx)) / 4;
2240 1.1 bouyer io->data_length = htole32(xs->datalen);
2241 1.1 bouyer io->io_flags = htole16(xs->cmdlen);
2242 1.1 bouyer switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
2243 1.1 bouyer case XS_CTL_DATA_IN:
2244 1.1 bouyer ccb->ccb_direction = MFII_DATA_IN;
2245 1.1 bouyer io->direction = MPII_SCSIIO_DIR_READ;
2246 1.1 bouyer break;
2247 1.1 bouyer case XS_CTL_DATA_OUT:
2248 1.1 bouyer ccb->ccb_direction = MFII_DATA_OUT;
2249 1.1 bouyer io->direction = MPII_SCSIIO_DIR_WRITE;
2250 1.1 bouyer break;
2251 1.1 bouyer default:
2252 1.1 bouyer ccb->ccb_direction = MFII_DATA_NONE;
2253 1.1 bouyer io->direction = MPII_SCSIIO_DIR_NONE;
2254 1.1 bouyer break;
2255 1.1 bouyer }
2256 1.1 bouyer memcpy(io->cdb, xs->cmd, xs->cmdlen);
2257 1.1 bouyer
2258 1.1 bouyer ctx->type_nseg = sc->sc_iop->ldio_ctx_type_nseg;
2259 1.1 bouyer ctx->timeout_value = htole16(0x14); /* XXX */
2260 1.1 bouyer ctx->reg_lock_flags = htole16(sc->sc_iop->ldio_ctx_reg_lock_flags);
2261 1.1 bouyer ctx->virtual_disk_target_id = htole16(periph->periph_target);
2262 1.1 bouyer
2263 1.1 bouyer if (mfii_load_ccb(sc, ccb, ctx + 1,
2264 1.1 bouyer ISSET(xs->xs_control, XS_CTL_NOSLEEP)) != 0)
2265 1.1 bouyer return (1);
2266 1.1 bouyer
2267 1.1 bouyer KASSERT(ccb->ccb_len == 0 || ccb->ccb_dma64);
2268 1.1 bouyer segs = (ccb->ccb_len == 0) ? 0 : ccb->ccb_dmamap64->dm_nsegs;
2269 1.1 bouyer switch (sc->sc_iop->num_sge_loc) {
2270 1.1 bouyer case MFII_IOP_NUM_SGE_LOC_ORIG:
2271 1.1 bouyer ctx->num_sge = segs;
2272 1.1 bouyer break;
2273 1.1 bouyer case MFII_IOP_NUM_SGE_LOC_35:
2274 1.1 bouyer /* 12 bit field, but we're only using the lower 8 */
2275 1.1 bouyer ctx->span_arm = segs;
2276 1.1 bouyer break;
2277 1.1 bouyer }
2278 1.1 bouyer
2279 1.1 bouyer ccb->ccb_req.flags = sc->sc_iop->ldio_req_type;
2280 1.1 bouyer ccb->ccb_req.smid = le16toh(ccb->ccb_smid);
2281 1.1 bouyer
2282 1.1 bouyer return (0);
2283 1.1 bouyer }
2284 1.1 bouyer
2285 1.4.4.1 bouyer static int
2286 1.1 bouyer mfii_scsi_cmd_cdb(struct mfii_softc *sc, struct mfii_ccb *ccb,
2287 1.1 bouyer struct scsipi_xfer *xs)
2288 1.1 bouyer {
2289 1.1 bouyer struct scsipi_periph *periph = xs->xs_periph;
2290 1.1 bouyer struct mpii_msg_scsi_io *io = ccb->ccb_request;
2291 1.1 bouyer struct mfii_raid_context *ctx = (struct mfii_raid_context *)(io + 1);
2292 1.1 bouyer
2293 1.1 bouyer io->dev_handle = htole16(periph->periph_target);
2294 1.1 bouyer io->function = MFII_FUNCTION_LDIO_REQUEST;
2295 1.1 bouyer io->sense_buffer_low_address = htole32(ccb->ccb_sense_dva);
2296 1.1 bouyer io->sgl_flags = htole16(0x02); /* XXX */
2297 1.1 bouyer io->sense_buffer_length = sizeof(xs->sense);
2298 1.1 bouyer io->sgl_offset0 = (sizeof(*io) + sizeof(*ctx)) / 4;
2299 1.1 bouyer io->data_length = htole32(xs->datalen);
2300 1.1 bouyer io->io_flags = htole16(xs->cmdlen);
2301 1.1 bouyer io->lun[0] = htobe16(periph->periph_lun);
2302 1.1 bouyer switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
2303 1.1 bouyer case XS_CTL_DATA_IN:
2304 1.1 bouyer ccb->ccb_direction = MFII_DATA_IN;
2305 1.1 bouyer io->direction = MPII_SCSIIO_DIR_READ;
2306 1.1 bouyer break;
2307 1.1 bouyer case XS_CTL_DATA_OUT:
2308 1.1 bouyer ccb->ccb_direction = MFII_DATA_OUT;
2309 1.1 bouyer io->direction = MPII_SCSIIO_DIR_WRITE;
2310 1.1 bouyer break;
2311 1.1 bouyer default:
2312 1.1 bouyer ccb->ccb_direction = MFII_DATA_NONE;
2313 1.1 bouyer io->direction = MPII_SCSIIO_DIR_NONE;
2314 1.1 bouyer break;
2315 1.1 bouyer }
2316 1.1 bouyer memcpy(io->cdb, xs->cmd, xs->cmdlen);
2317 1.1 bouyer
2318 1.1 bouyer ctx->virtual_disk_target_id = htole16(periph->periph_target);
2319 1.1 bouyer
2320 1.1 bouyer if (mfii_load_ccb(sc, ccb, ctx + 1,
2321 1.1 bouyer ISSET(xs->xs_control, XS_CTL_NOSLEEP)) != 0)
2322 1.1 bouyer return (1);
2323 1.1 bouyer
2324 1.1 bouyer ctx->num_sge = (ccb->ccb_len == 0) ? 0 : ccb->ccb_dmamap64->dm_nsegs;
2325 1.1 bouyer KASSERT(ccb->ccb_len == 0 || ccb->ccb_dma64);
2326 1.1 bouyer
2327 1.1 bouyer ccb->ccb_req.flags = MFII_REQ_TYPE_SCSI;
2328 1.1 bouyer ccb->ccb_req.smid = le16toh(ccb->ccb_smid);
2329 1.1 bouyer
2330 1.1 bouyer return (0);
2331 1.1 bouyer }
2332 1.1 bouyer
2333 1.1 bouyer #if 0
2334 1.1 bouyer void
2335 1.1 bouyer mfii_pd_scsi_cmd(struct scsipi_xfer *xs)
2336 1.1 bouyer {
2337 1.1 bouyer struct scsi_link *link = xs->sc_link;
2338 1.1 bouyer struct mfii_softc *sc = link->adapter_softc;
2339 1.1 bouyer struct mfii_ccb *ccb = xs->io;
2340 1.1 bouyer
2341 1.1 bouyer mfii_scrub_ccb(ccb);
2342 1.1 bouyer ccb->ccb_cookie = xs;
2343 1.1 bouyer ccb->ccb_done = mfii_scsi_cmd_done;
2344 1.1 bouyer ccb->ccb_data = xs->data;
2345 1.1 bouyer ccb->ccb_len = xs->datalen;
2346 1.1 bouyer
2347 1.1 bouyer // XXX timeout_set(&xs->stimeout, mfii_scsi_cmd_tmo, xs);
2348 1.1 bouyer
2349 1.1 bouyer xs->error = mfii_pd_scsi_cmd_cdb(sc, xs);
2350 1.1 bouyer if (xs->error != XS_NOERROR)
2351 1.1 bouyer goto done;
2352 1.1 bouyer
2353 1.1 bouyer xs->resid = 0;
2354 1.1 bouyer
2355 1.1 bouyer if (ISSET(xs->xs_control, XS_CTL_POLL)) {
2356 1.1 bouyer if (mfii_poll(sc, ccb) != 0)
2357 1.1 bouyer goto stuffup;
2358 1.1 bouyer return;
2359 1.1 bouyer }
2360 1.1 bouyer
2361 1.1 bouyer // XXX timeout_add_msec(&xs->stimeout, xs->timeout);
2362 1.1 bouyer mfii_start(sc, ccb);
2363 1.1 bouyer
2364 1.1 bouyer return;
2365 1.1 bouyer
2366 1.1 bouyer stuffup:
2367 1.1 bouyer xs->error = XS_DRIVER_STUFFUP;
2368 1.1 bouyer done:
2369 1.1 bouyer scsi_done(xs);
2370 1.1 bouyer }
2371 1.1 bouyer
2372 1.1 bouyer int
2373 1.1 bouyer mfii_pd_scsi_probe(struct scsi_link *link)
2374 1.1 bouyer {
2375 1.1 bouyer struct mfii_softc *sc = link->adapter_softc;
2376 1.1 bouyer struct mfi_pd_details mpd;
2377 1.1 bouyer union mfi_mbox mbox;
2378 1.1 bouyer int rv;
2379 1.1 bouyer
2380 1.1 bouyer if (link->lun > 0)
2381 1.1 bouyer return (0);
2382 1.1 bouyer
2383 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
2384 1.1 bouyer mbox.s[0] = htole16(link->target);
2385 1.1 bouyer
2386 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, &mpd, sizeof(mpd),
2387 1.1 bouyer MFII_DATA_IN, true);
2388 1.1 bouyer if (rv != 0)
2389 1.1 bouyer return (EIO);
2390 1.1 bouyer
2391 1.1 bouyer if (mpd.mpd_fw_state != htole16(MFI_PD_SYSTEM))
2392 1.1 bouyer return (ENXIO);
2393 1.1 bouyer
2394 1.1 bouyer return (0);
2395 1.1 bouyer }
2396 1.1 bouyer
2397 1.1 bouyer int
2398 1.1 bouyer mfii_pd_scsi_cmd_cdb(struct mfii_softc *sc, struct mfii_ccb *ccb,
2399 1.1 bouyer struct scsipi_xfer *xs)
2400 1.1 bouyer {
2401 1.1 bouyer struct scsi_link *link = xs->sc_link;
2402 1.1 bouyer struct mpii_msg_scsi_io *io = ccb->ccb_request;
2403 1.1 bouyer struct mfii_raid_context *ctx = (struct mfii_raid_context *)(io + 1);
2404 1.1 bouyer uint16_t dev_handle;
2405 1.1 bouyer
2406 1.1 bouyer dev_handle = mfii_dev_handle(sc, link->target);
2407 1.1 bouyer if (dev_handle == htole16(0xffff))
2408 1.1 bouyer return (XS_SELTIMEOUT);
2409 1.1 bouyer
2410 1.1 bouyer io->dev_handle = dev_handle;
2411 1.1 bouyer io->function = 0;
2412 1.1 bouyer io->sense_buffer_low_address = htole32(ccb->ccb_sense_dva);
2413 1.1 bouyer io->sgl_flags = htole16(0x02); /* XXX */
2414 1.1 bouyer io->sense_buffer_length = sizeof(xs->sense);
2415 1.1 bouyer io->sgl_offset0 = (sizeof(*io) + sizeof(*ctx)) / 4;
2416 1.1 bouyer io->data_length = htole32(xs->datalen);
2417 1.1 bouyer io->io_flags = htole16(xs->cmdlen);
2418 1.1 bouyer io->lun[0] = htobe16(link->lun);
2419 1.1 bouyer switch (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
2420 1.1 bouyer case XS_CTL_DATA_IN:
2421 1.1 bouyer ccb->ccb_direction = MFII_DATA_IN;
2422 1.1 bouyer io->direction = MPII_SCSIIO_DIR_READ;
2423 1.1 bouyer break;
2424 1.1 bouyer case XS_CTL_DATA_OUT:
2425 1.1 bouyer ccb->ccb_direction = MFII_DATA_OUT;
2426 1.1 bouyer io->direction = MPII_SCSIIO_DIR_WRITE;
2427 1.1 bouyer break;
2428 1.1 bouyer default:
2429 1.1 bouyer ccb->ccb_direction = MFII_DATA_NONE;
2430 1.1 bouyer io->direction = MPII_SCSIIO_DIR_NONE;
2431 1.1 bouyer break;
2432 1.1 bouyer }
2433 1.1 bouyer memcpy(io->cdb, xs->cmd, xs->cmdlen);
2434 1.1 bouyer
2435 1.1 bouyer ctx->virtual_disk_target_id = htole16(link->target);
2436 1.1 bouyer ctx->raid_flags = MFII_RAID_CTX_IO_TYPE_SYSPD;
2437 1.1 bouyer ctx->timeout_value = sc->sc_pd->pd_timeout;
2438 1.1 bouyer
2439 1.1 bouyer if (mfii_load_ccb(sc, ccb, ctx + 1,
2440 1.1 bouyer ISSET(xs->xs_control, XS_CTL_NOSLEEP)) != 0)
2441 1.1 bouyer return (XS_DRIVER_STUFFUP);
2442 1.1 bouyer
2443 1.1 bouyer ctx->num_sge = (ccb->ccb_len == 0) ? 0 : ccb->ccb_dmamap64->dm_nsegs;
2444 1.1 bouyer KASSERT(ccb->ccb_dma64);
2445 1.1 bouyer
2446 1.1 bouyer ccb->ccb_req.flags = MFII_REQ_TYPE_HI_PRI;
2447 1.1 bouyer ccb->ccb_req.smid = le16toh(ccb->ccb_smid);
2448 1.1 bouyer ccb->ccb_req.dev_handle = dev_handle;
2449 1.1 bouyer
2450 1.1 bouyer return (XS_NOERROR);
2451 1.1 bouyer }
2452 1.1 bouyer #endif
2453 1.1 bouyer
2454 1.4.4.1 bouyer static int
2455 1.1 bouyer mfii_load_ccb(struct mfii_softc *sc, struct mfii_ccb *ccb, void *sglp,
2456 1.1 bouyer int nosleep)
2457 1.1 bouyer {
2458 1.1 bouyer struct mpii_msg_request *req = ccb->ccb_request;
2459 1.1 bouyer struct mfii_sge *sge = NULL, *nsge = sglp;
2460 1.1 bouyer struct mfii_sge *ce = NULL;
2461 1.1 bouyer bus_dmamap_t dmap = ccb->ccb_dmamap64;
2462 1.1 bouyer u_int space;
2463 1.1 bouyer int i;
2464 1.1 bouyer
2465 1.1 bouyer int error;
2466 1.1 bouyer
2467 1.1 bouyer if (ccb->ccb_len == 0)
2468 1.1 bouyer return (0);
2469 1.1 bouyer
2470 1.1 bouyer ccb->ccb_dma64 = true;
2471 1.1 bouyer error = bus_dmamap_load(sc->sc_dmat64, dmap,
2472 1.1 bouyer ccb->ccb_data, ccb->ccb_len, NULL,
2473 1.1 bouyer nosleep ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
2474 1.1 bouyer if (error) {
2475 1.1 bouyer printf("%s: error %d loading dmamap\n", DEVNAME(sc), error);
2476 1.1 bouyer return (1);
2477 1.1 bouyer }
2478 1.1 bouyer
2479 1.1 bouyer space = (MFII_REQUEST_SIZE - ((u_int8_t *)nsge - (u_int8_t *)req)) /
2480 1.1 bouyer sizeof(*nsge);
2481 1.1 bouyer if (dmap->dm_nsegs > space) {
2482 1.1 bouyer space--;
2483 1.1 bouyer
2484 1.1 bouyer ccb->ccb_sgl_len = (dmap->dm_nsegs - space) * sizeof(*nsge);
2485 1.1 bouyer memset(ccb->ccb_sgl, 0, ccb->ccb_sgl_len);
2486 1.1 bouyer
2487 1.1 bouyer ce = nsge + space;
2488 1.1 bouyer ce->sg_addr = htole64(ccb->ccb_sgl_dva);
2489 1.1 bouyer ce->sg_len = htole32(ccb->ccb_sgl_len);
2490 1.1 bouyer ce->sg_flags = sc->sc_iop->sge_flag_chain;
2491 1.1 bouyer
2492 1.1 bouyer req->chain_offset = ((u_int8_t *)ce - (u_int8_t *)req) / 16;
2493 1.1 bouyer }
2494 1.1 bouyer
2495 1.1 bouyer for (i = 0; i < dmap->dm_nsegs; i++) {
2496 1.1 bouyer if (nsge == ce)
2497 1.1 bouyer nsge = ccb->ccb_sgl;
2498 1.1 bouyer
2499 1.1 bouyer sge = nsge;
2500 1.1 bouyer
2501 1.1 bouyer sge->sg_addr = htole64(dmap->dm_segs[i].ds_addr);
2502 1.1 bouyer sge->sg_len = htole32(dmap->dm_segs[i].ds_len);
2503 1.1 bouyer sge->sg_flags = MFII_SGE_ADDR_SYSTEM;
2504 1.1 bouyer
2505 1.1 bouyer nsge = sge + 1;
2506 1.1 bouyer }
2507 1.1 bouyer sge->sg_flags |= sc->sc_iop->sge_flag_eol;
2508 1.1 bouyer
2509 1.1 bouyer bus_dmamap_sync(sc->sc_dmat64, dmap, 0, dmap->dm_mapsize,
2510 1.1 bouyer ccb->ccb_direction == MFII_DATA_OUT ?
2511 1.1 bouyer BUS_DMASYNC_PREWRITE : BUS_DMASYNC_PREREAD);
2512 1.1 bouyer
2513 1.1 bouyer if (ccb->ccb_sgl_len > 0) {
2514 1.1 bouyer bus_dmamap_sync(sc->sc_dmat, MFII_DMA_MAP(sc->sc_sgl),
2515 1.1 bouyer ccb->ccb_sgl_offset, ccb->ccb_sgl_len,
2516 1.1 bouyer BUS_DMASYNC_PREWRITE);
2517 1.1 bouyer }
2518 1.1 bouyer
2519 1.1 bouyer return (0);
2520 1.1 bouyer }
2521 1.1 bouyer
2522 1.4.4.1 bouyer static void
2523 1.1 bouyer mfii_scsi_cmd_tmo(void *p)
2524 1.1 bouyer {
2525 1.1 bouyer struct mfii_ccb *ccb = p;
2526 1.1 bouyer struct mfii_softc *sc = ccb->ccb_sc;
2527 1.1 bouyer bool start_abort;
2528 1.1 bouyer
2529 1.1 bouyer printf("%s: cmd timeout ccb %p\n", DEVNAME(sc), p);
2530 1.1 bouyer
2531 1.1 bouyer mutex_enter(&sc->sc_abort_mtx);
2532 1.1 bouyer start_abort = (SIMPLEQ_FIRST(&sc->sc_abort_list) == 0);
2533 1.1 bouyer SIMPLEQ_INSERT_TAIL(&sc->sc_abort_list, ccb, ccb_link);
2534 1.1 bouyer if (start_abort)
2535 1.1 bouyer workqueue_enqueue(sc->sc_abort_wq, &sc->sc_abort_work, NULL);
2536 1.1 bouyer mutex_exit(&sc->sc_abort_mtx);
2537 1.1 bouyer }
2538 1.1 bouyer
2539 1.4.4.1 bouyer static void
2540 1.1 bouyer mfii_abort_task(struct work *wk, void *scp)
2541 1.1 bouyer {
2542 1.1 bouyer struct mfii_softc *sc = scp;
2543 1.1 bouyer struct mfii_ccb *list;
2544 1.1 bouyer
2545 1.1 bouyer mutex_enter(&sc->sc_abort_mtx);
2546 1.1 bouyer list = SIMPLEQ_FIRST(&sc->sc_abort_list);
2547 1.1 bouyer SIMPLEQ_INIT(&sc->sc_abort_list);
2548 1.1 bouyer mutex_exit(&sc->sc_abort_mtx);
2549 1.1 bouyer
2550 1.1 bouyer while (list != NULL) {
2551 1.1 bouyer struct mfii_ccb *ccb = list;
2552 1.1 bouyer struct scsipi_xfer *xs = ccb->ccb_cookie;
2553 1.1 bouyer struct scsipi_periph *periph = xs->xs_periph;
2554 1.1 bouyer struct mfii_ccb *accb;
2555 1.1 bouyer
2556 1.1 bouyer list = SIMPLEQ_NEXT(ccb, ccb_link);
2557 1.1 bouyer
2558 1.1 bouyer if (!sc->sc_ld[periph->periph_target].ld_present) {
2559 1.1 bouyer /* device is gone */
2560 1.4 bouyer xs->error = XS_SELTIMEOUT;
2561 1.4 bouyer scsipi_done(xs);
2562 1.4 bouyer mfii_put_ccb(sc, ccb);
2563 1.1 bouyer continue;
2564 1.1 bouyer }
2565 1.1 bouyer
2566 1.1 bouyer accb = mfii_get_ccb(sc);
2567 1.1 bouyer mfii_scrub_ccb(accb);
2568 1.1 bouyer mfii_abort(sc, accb, periph->periph_target, ccb->ccb_smid,
2569 1.1 bouyer MPII_SCSI_TASK_ABORT_TASK,
2570 1.1 bouyer htole32(MFII_TASK_MGMT_FLAGS_PD));
2571 1.1 bouyer
2572 1.1 bouyer accb->ccb_cookie = ccb;
2573 1.1 bouyer accb->ccb_done = mfii_scsi_cmd_abort_done;
2574 1.1 bouyer
2575 1.1 bouyer mfii_start(sc, accb);
2576 1.1 bouyer }
2577 1.1 bouyer }
2578 1.1 bouyer
2579 1.4.4.1 bouyer static void
2580 1.1 bouyer mfii_abort(struct mfii_softc *sc, struct mfii_ccb *accb, uint16_t dev_handle,
2581 1.1 bouyer uint16_t smid, uint8_t type, uint32_t flags)
2582 1.1 bouyer {
2583 1.1 bouyer struct mfii_task_mgmt *msg;
2584 1.1 bouyer struct mpii_msg_scsi_task_request *req;
2585 1.1 bouyer
2586 1.1 bouyer msg = accb->ccb_request;
2587 1.1 bouyer req = &msg->mpii_request;
2588 1.1 bouyer req->dev_handle = dev_handle;
2589 1.1 bouyer req->function = MPII_FUNCTION_SCSI_TASK_MGMT;
2590 1.1 bouyer req->task_type = type;
2591 1.1 bouyer req->task_mid = htole16( smid);
2592 1.1 bouyer msg->flags = flags;
2593 1.1 bouyer
2594 1.1 bouyer accb->ccb_req.flags = MFII_REQ_TYPE_HI_PRI;
2595 1.1 bouyer accb->ccb_req.smid = le16toh(accb->ccb_smid);
2596 1.1 bouyer }
2597 1.1 bouyer
2598 1.4.4.1 bouyer static void
2599 1.1 bouyer mfii_scsi_cmd_abort_done(struct mfii_softc *sc, struct mfii_ccb *accb)
2600 1.1 bouyer {
2601 1.1 bouyer struct mfii_ccb *ccb = accb->ccb_cookie;
2602 1.1 bouyer struct scsipi_xfer *xs = ccb->ccb_cookie;
2603 1.1 bouyer
2604 1.1 bouyer /* XXX check accb completion? */
2605 1.1 bouyer
2606 1.1 bouyer mfii_put_ccb(sc, accb);
2607 1.4 bouyer printf("%s: cmd aborted ccb %p\n", DEVNAME(sc), ccb);
2608 1.1 bouyer
2609 1.4 bouyer xs->error = XS_TIMEOUT;
2610 1.4 bouyer scsipi_done(xs);
2611 1.4 bouyer mfii_put_ccb(sc, ccb);
2612 1.1 bouyer }
2613 1.1 bouyer
2614 1.4.4.1 bouyer static struct mfii_ccb *
2615 1.1 bouyer mfii_get_ccb(struct mfii_softc *sc)
2616 1.1 bouyer {
2617 1.1 bouyer struct mfii_ccb *ccb;
2618 1.1 bouyer
2619 1.1 bouyer mutex_enter(&sc->sc_ccb_mtx);
2620 1.1 bouyer if (!sc->sc_running) {
2621 1.1 bouyer ccb = NULL;
2622 1.1 bouyer } else {
2623 1.1 bouyer ccb = SIMPLEQ_FIRST(&sc->sc_ccb_freeq);
2624 1.1 bouyer if (ccb != NULL)
2625 1.1 bouyer SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_freeq, ccb_link);
2626 1.1 bouyer }
2627 1.1 bouyer mutex_exit(&sc->sc_ccb_mtx);
2628 1.1 bouyer return (ccb);
2629 1.1 bouyer }
2630 1.1 bouyer
2631 1.4.4.1 bouyer static void
2632 1.1 bouyer mfii_scrub_ccb(struct mfii_ccb *ccb)
2633 1.1 bouyer {
2634 1.1 bouyer ccb->ccb_cookie = NULL;
2635 1.1 bouyer ccb->ccb_done = NULL;
2636 1.1 bouyer ccb->ccb_flags = 0;
2637 1.1 bouyer ccb->ccb_data = NULL;
2638 1.1 bouyer ccb->ccb_direction = MFII_DATA_NONE;
2639 1.1 bouyer ccb->ccb_dma64 = false;
2640 1.1 bouyer ccb->ccb_len = 0;
2641 1.1 bouyer ccb->ccb_sgl_len = 0;
2642 1.1 bouyer memset(&ccb->ccb_req, 0, sizeof(ccb->ccb_req));
2643 1.1 bouyer memset(ccb->ccb_request, 0, MFII_REQUEST_SIZE);
2644 1.1 bouyer memset(ccb->ccb_mfi, 0, MFI_FRAME_SIZE);
2645 1.1 bouyer }
2646 1.1 bouyer
2647 1.4.4.1 bouyer static void
2648 1.1 bouyer mfii_put_ccb(struct mfii_softc *sc, struct mfii_ccb *ccb)
2649 1.1 bouyer {
2650 1.1 bouyer mutex_enter(&sc->sc_ccb_mtx);
2651 1.1 bouyer SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_freeq, ccb, ccb_link);
2652 1.1 bouyer mutex_exit(&sc->sc_ccb_mtx);
2653 1.1 bouyer }
2654 1.1 bouyer
2655 1.4.4.1 bouyer static int
2656 1.1 bouyer mfii_init_ccb(struct mfii_softc *sc)
2657 1.1 bouyer {
2658 1.1 bouyer struct mfii_ccb *ccb;
2659 1.1 bouyer u_int8_t *request = MFII_DMA_KVA(sc->sc_requests);
2660 1.1 bouyer u_int8_t *mfi = MFII_DMA_KVA(sc->sc_mfi);
2661 1.1 bouyer u_int8_t *sense = MFII_DMA_KVA(sc->sc_sense);
2662 1.1 bouyer u_int8_t *sgl = MFII_DMA_KVA(sc->sc_sgl);
2663 1.1 bouyer u_int i;
2664 1.1 bouyer int error;
2665 1.1 bouyer
2666 1.1 bouyer sc->sc_ccb = malloc(sc->sc_max_cmds * sizeof(struct mfii_ccb),
2667 1.1 bouyer M_DEVBUF, M_WAITOK|M_ZERO);
2668 1.1 bouyer
2669 1.1 bouyer for (i = 0; i < sc->sc_max_cmds; i++) {
2670 1.1 bouyer ccb = &sc->sc_ccb[i];
2671 1.1 bouyer ccb->ccb_sc = sc;
2672 1.1 bouyer
2673 1.1 bouyer /* create a dma map for transfer */
2674 1.1 bouyer error = bus_dmamap_create(sc->sc_dmat,
2675 1.1 bouyer MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0,
2676 1.1 bouyer BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap32);
2677 1.1 bouyer if (error) {
2678 1.1 bouyer printf("%s: cannot create ccb dmamap32 (%d)\n",
2679 1.1 bouyer DEVNAME(sc), error);
2680 1.1 bouyer goto destroy;
2681 1.1 bouyer }
2682 1.1 bouyer error = bus_dmamap_create(sc->sc_dmat64,
2683 1.1 bouyer MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0,
2684 1.1 bouyer BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap64);
2685 1.1 bouyer if (error) {
2686 1.1 bouyer printf("%s: cannot create ccb dmamap64 (%d)\n",
2687 1.1 bouyer DEVNAME(sc), error);
2688 1.1 bouyer goto destroy32;
2689 1.1 bouyer }
2690 1.1 bouyer
2691 1.1 bouyer /* select i + 1'th request. 0 is reserved for events */
2692 1.1 bouyer ccb->ccb_smid = i + 1;
2693 1.1 bouyer ccb->ccb_request_offset = MFII_REQUEST_SIZE * (i + 1);
2694 1.1 bouyer ccb->ccb_request = request + ccb->ccb_request_offset;
2695 1.1 bouyer ccb->ccb_request_dva = MFII_DMA_DVA(sc->sc_requests) +
2696 1.1 bouyer ccb->ccb_request_offset;
2697 1.1 bouyer
2698 1.1 bouyer /* select i'th MFI command frame */
2699 1.1 bouyer ccb->ccb_mfi_offset = MFI_FRAME_SIZE * i;
2700 1.1 bouyer ccb->ccb_mfi = mfi + ccb->ccb_mfi_offset;
2701 1.1 bouyer ccb->ccb_mfi_dva = MFII_DMA_DVA(sc->sc_mfi) +
2702 1.1 bouyer ccb->ccb_mfi_offset;
2703 1.1 bouyer
2704 1.1 bouyer /* select i'th sense */
2705 1.1 bouyer ccb->ccb_sense_offset = MFI_SENSE_SIZE * i;
2706 1.1 bouyer ccb->ccb_sense = (struct mfi_sense *)(sense +
2707 1.1 bouyer ccb->ccb_sense_offset);
2708 1.1 bouyer ccb->ccb_sense_dva = MFII_DMA_DVA(sc->sc_sense) +
2709 1.1 bouyer ccb->ccb_sense_offset;
2710 1.1 bouyer
2711 1.1 bouyer /* select i'th sgl */
2712 1.1 bouyer ccb->ccb_sgl_offset = sizeof(struct mfii_sge) *
2713 1.1 bouyer sc->sc_max_sgl * i;
2714 1.1 bouyer ccb->ccb_sgl = (struct mfii_sge *)(sgl + ccb->ccb_sgl_offset);
2715 1.1 bouyer ccb->ccb_sgl_dva = MFII_DMA_DVA(sc->sc_sgl) +
2716 1.1 bouyer ccb->ccb_sgl_offset;
2717 1.1 bouyer
2718 1.1 bouyer mutex_init(&ccb->ccb_mtx, MUTEX_DEFAULT, IPL_BIO);
2719 1.1 bouyer cv_init(&ccb->ccb_cv, "mfiiexec");
2720 1.1 bouyer
2721 1.1 bouyer /* add ccb to queue */
2722 1.1 bouyer mfii_put_ccb(sc, ccb);
2723 1.1 bouyer }
2724 1.1 bouyer
2725 1.1 bouyer return (0);
2726 1.1 bouyer
2727 1.1 bouyer destroy32:
2728 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap32);
2729 1.1 bouyer destroy:
2730 1.1 bouyer /* free dma maps and ccb memory */
2731 1.1 bouyer while ((ccb = mfii_get_ccb(sc)) != NULL) {
2732 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap32);
2733 1.1 bouyer bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap64);
2734 1.1 bouyer }
2735 1.1 bouyer
2736 1.1 bouyer free(sc->sc_ccb, M_DEVBUF);
2737 1.1 bouyer
2738 1.1 bouyer return (1);
2739 1.1 bouyer }
2740 1.1 bouyer
2741 1.1 bouyer #if NBIO > 0
2742 1.4.4.1 bouyer static int
2743 1.1 bouyer mfii_ioctl(device_t dev, u_long cmd, void *addr)
2744 1.1 bouyer {
2745 1.1 bouyer struct mfii_softc *sc = device_private(dev);
2746 1.1 bouyer int error = 0;
2747 1.1 bouyer
2748 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_ioctl ", DEVNAME(sc));
2749 1.1 bouyer
2750 1.1 bouyer mutex_enter(&sc->sc_lock);
2751 1.1 bouyer
2752 1.1 bouyer switch (cmd) {
2753 1.1 bouyer case BIOCINQ:
2754 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "inq\n");
2755 1.1 bouyer error = mfii_ioctl_inq(sc, (struct bioc_inq *)addr);
2756 1.1 bouyer break;
2757 1.1 bouyer
2758 1.1 bouyer case BIOCVOL:
2759 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "vol\n");
2760 1.1 bouyer error = mfii_ioctl_vol(sc, (struct bioc_vol *)addr);
2761 1.1 bouyer break;
2762 1.1 bouyer
2763 1.1 bouyer case BIOCDISK:
2764 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "disk\n");
2765 1.1 bouyer error = mfii_ioctl_disk(sc, (struct bioc_disk *)addr);
2766 1.1 bouyer break;
2767 1.1 bouyer
2768 1.1 bouyer case BIOCALARM:
2769 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "alarm\n");
2770 1.1 bouyer error = mfii_ioctl_alarm(sc, (struct bioc_alarm *)addr);
2771 1.1 bouyer break;
2772 1.1 bouyer
2773 1.1 bouyer case BIOCBLINK:
2774 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "blink\n");
2775 1.1 bouyer error = mfii_ioctl_blink(sc, (struct bioc_blink *)addr);
2776 1.1 bouyer break;
2777 1.1 bouyer
2778 1.1 bouyer case BIOCSETSTATE:
2779 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "setstate\n");
2780 1.1 bouyer error = mfii_ioctl_setstate(sc, (struct bioc_setstate *)addr);
2781 1.1 bouyer break;
2782 1.1 bouyer
2783 1.1 bouyer #if 0
2784 1.1 bouyer case BIOCPATROL:
2785 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "patrol\n");
2786 1.1 bouyer error = mfii_ioctl_patrol(sc, (struct bioc_patrol *)addr);
2787 1.1 bouyer break;
2788 1.1 bouyer #endif
2789 1.1 bouyer
2790 1.1 bouyer default:
2791 1.1 bouyer DNPRINTF(MFII_D_IOCTL, " invalid ioctl\n");
2792 1.1 bouyer error = ENOTTY;
2793 1.1 bouyer }
2794 1.1 bouyer
2795 1.1 bouyer mutex_exit(&sc->sc_lock);
2796 1.1 bouyer
2797 1.1 bouyer return (error);
2798 1.1 bouyer }
2799 1.1 bouyer
2800 1.4.4.1 bouyer static int
2801 1.1 bouyer mfii_bio_getitall(struct mfii_softc *sc)
2802 1.1 bouyer {
2803 1.1 bouyer int i, d, rv = EINVAL;
2804 1.1 bouyer size_t size;
2805 1.1 bouyer union mfi_mbox mbox;
2806 1.1 bouyer struct mfi_conf *cfg = NULL;
2807 1.1 bouyer struct mfi_ld_details *ld_det = NULL;
2808 1.1 bouyer
2809 1.1 bouyer /* get info */
2810 1.1 bouyer if (mfii_get_info(sc)) {
2811 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_get_info failed\n",
2812 1.1 bouyer DEVNAME(sc));
2813 1.1 bouyer goto done;
2814 1.1 bouyer }
2815 1.1 bouyer
2816 1.1 bouyer /* send single element command to retrieve size for full structure */
2817 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_NOWAIT | M_ZERO);
2818 1.1 bouyer if (cfg == NULL)
2819 1.1 bouyer goto done;
2820 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_CONF_GET, NULL, cfg, sizeof(*cfg),
2821 1.1 bouyer MFII_DATA_IN, false)) {
2822 1.1 bouyer free(cfg, M_DEVBUF);
2823 1.1 bouyer goto done;
2824 1.1 bouyer }
2825 1.1 bouyer
2826 1.1 bouyer size = cfg->mfc_size;
2827 1.1 bouyer free(cfg, M_DEVBUF);
2828 1.1 bouyer
2829 1.1 bouyer /* memory for read config */
2830 1.1 bouyer cfg = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
2831 1.1 bouyer if (cfg == NULL)
2832 1.1 bouyer goto done;
2833 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_CONF_GET, NULL, cfg, size,
2834 1.1 bouyer MFII_DATA_IN, false)) {
2835 1.1 bouyer free(cfg, M_DEVBUF);
2836 1.1 bouyer goto done;
2837 1.1 bouyer }
2838 1.1 bouyer
2839 1.1 bouyer /* replace current pointer with new one */
2840 1.1 bouyer if (sc->sc_cfg)
2841 1.1 bouyer free(sc->sc_cfg, M_DEVBUF);
2842 1.1 bouyer sc->sc_cfg = cfg;
2843 1.1 bouyer
2844 1.1 bouyer /* get all ld info */
2845 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_LD_GET_LIST, NULL, &sc->sc_ld_list,
2846 1.1 bouyer sizeof(sc->sc_ld_list), MFII_DATA_IN, false))
2847 1.1 bouyer goto done;
2848 1.1 bouyer
2849 1.1 bouyer /* get memory for all ld structures */
2850 1.1 bouyer size = cfg->mfc_no_ld * sizeof(struct mfi_ld_details);
2851 1.1 bouyer if (sc->sc_ld_sz != size) {
2852 1.1 bouyer if (sc->sc_ld_details)
2853 1.1 bouyer free(sc->sc_ld_details, M_DEVBUF);
2854 1.1 bouyer
2855 1.1 bouyer ld_det = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
2856 1.1 bouyer if (ld_det == NULL)
2857 1.1 bouyer goto done;
2858 1.1 bouyer sc->sc_ld_sz = size;
2859 1.1 bouyer sc->sc_ld_details = ld_det;
2860 1.1 bouyer }
2861 1.1 bouyer
2862 1.1 bouyer /* find used physical disks */
2863 1.1 bouyer size = sizeof(struct mfi_ld_details);
2864 1.1 bouyer for (i = 0, d = 0; i < cfg->mfc_no_ld; i++) {
2865 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
2866 1.1 bouyer mbox.b[0] = sc->sc_ld_list.mll_list[i].mll_ld.mld_target;
2867 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_LD_GET_INFO, &mbox,
2868 1.1 bouyer &sc->sc_ld_details[i], size, MFII_DATA_IN, false))
2869 1.1 bouyer goto done;
2870 1.1 bouyer
2871 1.1 bouyer d += sc->sc_ld_details[i].mld_cfg.mlc_parm.mpa_no_drv_per_span *
2872 1.1 bouyer sc->sc_ld_details[i].mld_cfg.mlc_parm.mpa_span_depth;
2873 1.1 bouyer }
2874 1.1 bouyer sc->sc_no_pd = d;
2875 1.1 bouyer
2876 1.1 bouyer rv = 0;
2877 1.1 bouyer done:
2878 1.1 bouyer return (rv);
2879 1.1 bouyer }
2880 1.1 bouyer
2881 1.4.4.1 bouyer static int
2882 1.1 bouyer mfii_ioctl_inq(struct mfii_softc *sc, struct bioc_inq *bi)
2883 1.1 bouyer {
2884 1.1 bouyer int rv = EINVAL;
2885 1.1 bouyer struct mfi_conf *cfg = NULL;
2886 1.1 bouyer
2887 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_ioctl_inq\n", DEVNAME(sc));
2888 1.1 bouyer
2889 1.1 bouyer if (mfii_bio_getitall(sc)) {
2890 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_bio_getitall failed\n",
2891 1.1 bouyer DEVNAME(sc));
2892 1.1 bouyer goto done;
2893 1.1 bouyer }
2894 1.1 bouyer
2895 1.1 bouyer /* count unused disks as volumes */
2896 1.1 bouyer if (sc->sc_cfg == NULL)
2897 1.1 bouyer goto done;
2898 1.1 bouyer cfg = sc->sc_cfg;
2899 1.1 bouyer
2900 1.1 bouyer bi->bi_nodisk = sc->sc_info.mci_pd_disks_present;
2901 1.1 bouyer bi->bi_novol = cfg->mfc_no_ld + cfg->mfc_no_hs;
2902 1.1 bouyer #if notyet
2903 1.1 bouyer bi->bi_novol = cfg->mfc_no_ld + cfg->mfc_no_hs +
2904 1.1 bouyer (bi->bi_nodisk - sc->sc_no_pd);
2905 1.1 bouyer #endif
2906 1.1 bouyer /* tell bio who we are */
2907 1.1 bouyer strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev));
2908 1.1 bouyer
2909 1.1 bouyer rv = 0;
2910 1.1 bouyer done:
2911 1.1 bouyer return (rv);
2912 1.1 bouyer }
2913 1.1 bouyer
2914 1.4.4.1 bouyer static int
2915 1.1 bouyer mfii_ioctl_vol(struct mfii_softc *sc, struct bioc_vol *bv)
2916 1.1 bouyer {
2917 1.1 bouyer int i, per, rv = EINVAL;
2918 1.1 bouyer
2919 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_ioctl_vol %#x\n",
2920 1.1 bouyer DEVNAME(sc), bv->bv_volid);
2921 1.1 bouyer
2922 1.1 bouyer /* we really could skip and expect that inq took care of it */
2923 1.1 bouyer if (mfii_bio_getitall(sc)) {
2924 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_bio_getitall failed\n",
2925 1.1 bouyer DEVNAME(sc));
2926 1.1 bouyer goto done;
2927 1.1 bouyer }
2928 1.1 bouyer
2929 1.1 bouyer if (bv->bv_volid >= sc->sc_ld_list.mll_no_ld) {
2930 1.1 bouyer /* go do hotspares & unused disks */
2931 1.1 bouyer rv = mfii_bio_hs(sc, bv->bv_volid, MFI_MGMT_VD, bv);
2932 1.1 bouyer goto done;
2933 1.1 bouyer }
2934 1.1 bouyer
2935 1.1 bouyer i = bv->bv_volid;
2936 1.1 bouyer strlcpy(bv->bv_dev, sc->sc_ld_details[i].mld_cfg.mlc_prop.mlp_name,
2937 1.1 bouyer sizeof(bv->bv_dev));
2938 1.1 bouyer
2939 1.4.4.1 bouyer switch (sc->sc_ld_list.mll_list[i].mll_state) {
2940 1.1 bouyer case MFI_LD_OFFLINE:
2941 1.1 bouyer bv->bv_status = BIOC_SVOFFLINE;
2942 1.1 bouyer break;
2943 1.1 bouyer
2944 1.1 bouyer case MFI_LD_PART_DEGRADED:
2945 1.1 bouyer case MFI_LD_DEGRADED:
2946 1.1 bouyer bv->bv_status = BIOC_SVDEGRADED;
2947 1.1 bouyer break;
2948 1.1 bouyer
2949 1.1 bouyer case MFI_LD_ONLINE:
2950 1.1 bouyer bv->bv_status = BIOC_SVONLINE;
2951 1.1 bouyer break;
2952 1.1 bouyer
2953 1.1 bouyer default:
2954 1.1 bouyer bv->bv_status = BIOC_SVINVALID;
2955 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: invalid logical disk state %#x\n",
2956 1.1 bouyer DEVNAME(sc),
2957 1.1 bouyer sc->sc_ld_list.mll_list[i].mll_state);
2958 1.1 bouyer }
2959 1.1 bouyer
2960 1.1 bouyer /* additional status can modify MFI status */
2961 1.1 bouyer switch (sc->sc_ld_details[i].mld_progress.mlp_in_prog) {
2962 1.1 bouyer case MFI_LD_PROG_CC:
2963 1.1 bouyer bv->bv_status = BIOC_SVSCRUB;
2964 1.1 bouyer per = (int)sc->sc_ld_details[i].mld_progress.mlp_cc.mp_progress;
2965 1.1 bouyer bv->bv_percent = (per * 100) / 0xffff;
2966 1.1 bouyer bv->bv_seconds =
2967 1.1 bouyer sc->sc_ld_details[i].mld_progress.mlp_cc.mp_elapsed_seconds;
2968 1.1 bouyer break;
2969 1.1 bouyer
2970 1.4.4.1 bouyer case MFI_LD_PROG_BGI:
2971 1.4.4.1 bouyer bv->bv_status = BIOC_SVSCRUB;
2972 1.4.4.1 bouyer per = (int)sc->sc_ld_details[i].mld_progress.mlp_bgi.mp_progress;
2973 1.4.4.1 bouyer bv->bv_percent = (per * 100) / 0xffff;
2974 1.4.4.1 bouyer bv->bv_seconds =
2975 1.4.4.1 bouyer sc->sc_ld_details[i].mld_progress.mlp_bgi.mp_elapsed_seconds;
2976 1.4.4.1 bouyer break;
2977 1.4.4.1 bouyer
2978 1.1 bouyer case MFI_LD_PROG_FGI:
2979 1.1 bouyer case MFI_LD_PROG_RECONSTRUCT:
2980 1.1 bouyer /* nothing yet */
2981 1.1 bouyer break;
2982 1.1 bouyer }
2983 1.1 bouyer
2984 1.1 bouyer #if 0
2985 1.1 bouyer if (sc->sc_ld_details[i].mld_cfg.mlc_prop.mlp_cur_cache_policy & 0x01)
2986 1.1 bouyer bv->bv_cache = BIOC_CVWRITEBACK;
2987 1.1 bouyer else
2988 1.1 bouyer bv->bv_cache = BIOC_CVWRITETHROUGH;
2989 1.1 bouyer #endif
2990 1.1 bouyer
2991 1.1 bouyer /*
2992 1.1 bouyer * The RAID levels are determined per the SNIA DDF spec, this is only
2993 1.1 bouyer * a subset that is valid for the MFI controller.
2994 1.1 bouyer */
2995 1.1 bouyer bv->bv_level = sc->sc_ld_details[i].mld_cfg.mlc_parm.mpa_pri_raid;
2996 1.1 bouyer if (sc->sc_ld_details[i].mld_cfg.mlc_parm.mpa_span_depth > 1)
2997 1.1 bouyer bv->bv_level *= 10;
2998 1.1 bouyer
2999 1.4.4.2 martin bv->bv_nodisk =
3000 1.4.4.2 martin sc->sc_ld_details[i].mld_cfg.mlc_parm.mpa_no_drv_per_span *
3001 1.1 bouyer sc->sc_ld_details[i].mld_cfg.mlc_parm.mpa_span_depth;
3002 1.1 bouyer
3003 1.1 bouyer bv->bv_size = sc->sc_ld_details[i].mld_size * 512; /* bytes per block */
3004 1.4.4.1 bouyer bv->bv_stripe_size =
3005 1.4.4.1 bouyer (512 << sc->sc_ld_details[i].mld_cfg.mlc_parm.mpa_stripe_size)
3006 1.4.4.1 bouyer / 1024; /* in KB */
3007 1.1 bouyer
3008 1.1 bouyer rv = 0;
3009 1.1 bouyer done:
3010 1.1 bouyer return (rv);
3011 1.1 bouyer }
3012 1.1 bouyer
3013 1.4.4.1 bouyer static int
3014 1.1 bouyer mfii_ioctl_disk(struct mfii_softc *sc, struct bioc_disk *bd)
3015 1.1 bouyer {
3016 1.1 bouyer struct mfi_conf *cfg;
3017 1.1 bouyer struct mfi_array *ar;
3018 1.1 bouyer struct mfi_ld_cfg *ld;
3019 1.1 bouyer struct mfi_pd_details *pd;
3020 1.1 bouyer struct mfi_pd_list *pl;
3021 1.1 bouyer struct scsipi_inquiry_data *inqbuf;
3022 1.1 bouyer char vend[8+16+4+1], *vendp;
3023 1.1 bouyer int i, rv = EINVAL;
3024 1.1 bouyer int arr, vol, disk, span;
3025 1.1 bouyer union mfi_mbox mbox;
3026 1.1 bouyer
3027 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_ioctl_disk %#x\n",
3028 1.1 bouyer DEVNAME(sc), bd->bd_diskid);
3029 1.1 bouyer
3030 1.1 bouyer /* we really could skip and expect that inq took care of it */
3031 1.1 bouyer if (mfii_bio_getitall(sc)) {
3032 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_bio_getitall failed\n",
3033 1.1 bouyer DEVNAME(sc));
3034 1.1 bouyer return (rv);
3035 1.1 bouyer }
3036 1.1 bouyer cfg = sc->sc_cfg;
3037 1.1 bouyer
3038 1.1 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK);
3039 1.1 bouyer pl = malloc(sizeof *pl, M_DEVBUF, M_WAITOK);
3040 1.1 bouyer
3041 1.1 bouyer ar = cfg->mfc_array;
3042 1.1 bouyer vol = bd->bd_volid;
3043 1.1 bouyer if (vol >= cfg->mfc_no_ld) {
3044 1.1 bouyer /* do hotspares */
3045 1.1 bouyer rv = mfii_bio_hs(sc, bd->bd_volid, MFI_MGMT_SD, bd);
3046 1.1 bouyer goto freeme;
3047 1.1 bouyer }
3048 1.1 bouyer
3049 1.1 bouyer /* calculate offset to ld structure */
3050 1.1 bouyer ld = (struct mfi_ld_cfg *)(
3051 1.1 bouyer ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) +
3052 1.1 bouyer cfg->mfc_array_size * cfg->mfc_no_array);
3053 1.1 bouyer
3054 1.1 bouyer /* use span 0 only when raid group is not spanned */
3055 1.1 bouyer if (ld[vol].mlc_parm.mpa_span_depth > 1)
3056 1.1 bouyer span = bd->bd_diskid / ld[vol].mlc_parm.mpa_no_drv_per_span;
3057 1.1 bouyer else
3058 1.1 bouyer span = 0;
3059 1.1 bouyer arr = ld[vol].mlc_span[span].mls_index;
3060 1.1 bouyer
3061 1.1 bouyer /* offset disk into pd list */
3062 1.1 bouyer disk = bd->bd_diskid % ld[vol].mlc_parm.mpa_no_drv_per_span;
3063 1.1 bouyer
3064 1.1 bouyer if (ar[arr].pd[disk].mar_pd.mfp_id == 0xffffU) {
3065 1.1 bouyer /* disk is missing but succeed command */
3066 1.1 bouyer bd->bd_status = BIOC_SDFAILED;
3067 1.1 bouyer rv = 0;
3068 1.1 bouyer
3069 1.1 bouyer /* try to find an unused disk for the target to rebuild */
3070 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_PD_GET_LIST, NULL, pl, sizeof(*pl),
3071 1.1 bouyer MFII_DATA_IN, false))
3072 1.1 bouyer goto freeme;
3073 1.1 bouyer
3074 1.1 bouyer for (i = 0; i < pl->mpl_no_pd; i++) {
3075 1.1 bouyer if (pl->mpl_address[i].mpa_scsi_type != 0)
3076 1.1 bouyer continue;
3077 1.1 bouyer
3078 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
3079 1.1 bouyer mbox.s[0] = pl->mpl_address[i].mpa_pd_id;
3080 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox,
3081 1.1 bouyer pd, sizeof(*pd), MFII_DATA_IN, false))
3082 1.1 bouyer continue;
3083 1.1 bouyer
3084 1.1 bouyer if (pd->mpd_fw_state == MFI_PD_UNCONFIG_GOOD ||
3085 1.1 bouyer pd->mpd_fw_state == MFI_PD_UNCONFIG_BAD)
3086 1.1 bouyer break;
3087 1.1 bouyer }
3088 1.1 bouyer
3089 1.1 bouyer if (i == pl->mpl_no_pd)
3090 1.1 bouyer goto freeme;
3091 1.1 bouyer } else {
3092 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
3093 1.1 bouyer mbox.s[0] = ar[arr].pd[disk].mar_pd.mfp_id;
3094 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, pd, sizeof(*pd),
3095 1.1 bouyer MFII_DATA_IN, false)) {
3096 1.1 bouyer bd->bd_status = BIOC_SDINVALID;
3097 1.1 bouyer goto freeme;
3098 1.1 bouyer }
3099 1.1 bouyer }
3100 1.1 bouyer
3101 1.1 bouyer /* get the remaining fields */
3102 1.1 bouyer bd->bd_channel = pd->mpd_enc_idx;
3103 1.1 bouyer bd->bd_target = pd->mpd_enc_slot;
3104 1.1 bouyer
3105 1.1 bouyer /* get status */
3106 1.1 bouyer switch (pd->mpd_fw_state){
3107 1.1 bouyer case MFI_PD_UNCONFIG_GOOD:
3108 1.1 bouyer case MFI_PD_UNCONFIG_BAD:
3109 1.1 bouyer bd->bd_status = BIOC_SDUNUSED;
3110 1.1 bouyer break;
3111 1.1 bouyer
3112 1.1 bouyer case MFI_PD_HOTSPARE: /* XXX dedicated hotspare part of array? */
3113 1.1 bouyer bd->bd_status = BIOC_SDHOTSPARE;
3114 1.1 bouyer break;
3115 1.1 bouyer
3116 1.1 bouyer case MFI_PD_OFFLINE:
3117 1.1 bouyer bd->bd_status = BIOC_SDOFFLINE;
3118 1.1 bouyer break;
3119 1.1 bouyer
3120 1.1 bouyer case MFI_PD_FAILED:
3121 1.1 bouyer bd->bd_status = BIOC_SDFAILED;
3122 1.1 bouyer break;
3123 1.1 bouyer
3124 1.1 bouyer case MFI_PD_REBUILD:
3125 1.1 bouyer bd->bd_status = BIOC_SDREBUILD;
3126 1.1 bouyer break;
3127 1.1 bouyer
3128 1.1 bouyer case MFI_PD_ONLINE:
3129 1.1 bouyer bd->bd_status = BIOC_SDONLINE;
3130 1.1 bouyer break;
3131 1.1 bouyer
3132 1.1 bouyer case MFI_PD_COPYBACK:
3133 1.1 bouyer case MFI_PD_SYSTEM:
3134 1.1 bouyer default:
3135 1.1 bouyer bd->bd_status = BIOC_SDINVALID;
3136 1.1 bouyer break;
3137 1.1 bouyer }
3138 1.1 bouyer
3139 1.1 bouyer bd->bd_size = pd->mpd_size * 512; /* bytes per block */
3140 1.1 bouyer
3141 1.1 bouyer inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data;
3142 1.1 bouyer vendp = inqbuf->vendor;
3143 1.1 bouyer memcpy(vend, vendp, sizeof vend - 1);
3144 1.1 bouyer vend[sizeof vend - 1] = '\0';
3145 1.1 bouyer strlcpy(bd->bd_vendor, vend, sizeof(bd->bd_vendor));
3146 1.1 bouyer
3147 1.1 bouyer /* XXX find a way to retrieve serial nr from drive */
3148 1.1 bouyer /* XXX find a way to get bd_procdev */
3149 1.1 bouyer
3150 1.1 bouyer #if 0
3151 1.1 bouyer mfp = &pd->mpd_progress;
3152 1.1 bouyer if (mfp->mfp_in_prog & MFI_PD_PROG_PR) {
3153 1.1 bouyer mp = &mfp->mfp_patrol_read;
3154 1.1 bouyer bd->bd_patrol.bdp_percent = (mp->mp_progress * 100) / 0xffff;
3155 1.1 bouyer bd->bd_patrol.bdp_seconds = mp->mp_elapsed_seconds;
3156 1.1 bouyer }
3157 1.1 bouyer #endif
3158 1.1 bouyer
3159 1.1 bouyer rv = 0;
3160 1.1 bouyer freeme:
3161 1.1 bouyer free(pd, M_DEVBUF);
3162 1.1 bouyer free(pl, M_DEVBUF);
3163 1.1 bouyer
3164 1.1 bouyer return (rv);
3165 1.1 bouyer }
3166 1.1 bouyer
3167 1.4.4.1 bouyer static int
3168 1.1 bouyer mfii_ioctl_alarm(struct mfii_softc *sc, struct bioc_alarm *ba)
3169 1.1 bouyer {
3170 1.1 bouyer uint32_t opc;
3171 1.1 bouyer int rv = 0;
3172 1.1 bouyer int8_t ret;
3173 1.1 bouyer mfii_direction_t dir = MFII_DATA_NONE;
3174 1.1 bouyer
3175 1.4.4.1 bouyer switch (ba->ba_opcode) {
3176 1.1 bouyer case BIOC_SADISABLE:
3177 1.1 bouyer opc = MR_DCMD_SPEAKER_DISABLE;
3178 1.1 bouyer break;
3179 1.1 bouyer
3180 1.1 bouyer case BIOC_SAENABLE:
3181 1.1 bouyer opc = MR_DCMD_SPEAKER_ENABLE;
3182 1.1 bouyer break;
3183 1.1 bouyer
3184 1.1 bouyer case BIOC_SASILENCE:
3185 1.1 bouyer opc = MR_DCMD_SPEAKER_SILENCE;
3186 1.1 bouyer break;
3187 1.1 bouyer
3188 1.1 bouyer case BIOC_GASTATUS:
3189 1.1 bouyer opc = MR_DCMD_SPEAKER_GET;
3190 1.1 bouyer dir = MFII_DATA_IN;
3191 1.1 bouyer break;
3192 1.1 bouyer
3193 1.1 bouyer case BIOC_SATEST:
3194 1.1 bouyer opc = MR_DCMD_SPEAKER_TEST;
3195 1.1 bouyer break;
3196 1.1 bouyer
3197 1.1 bouyer default:
3198 1.4.4.2 martin DNPRINTF(MFII_D_IOCTL,
3199 1.4.4.2 martin "%s: mfii_ioctl_alarm biocalarm invalid opcode %x\n",
3200 1.4.4.2 martin DEVNAME(sc), ba->ba_opcode);
3201 1.1 bouyer return (EINVAL);
3202 1.1 bouyer }
3203 1.1 bouyer
3204 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, &ret, sizeof(ret), dir, false))
3205 1.1 bouyer rv = EINVAL;
3206 1.1 bouyer else
3207 1.1 bouyer if (ba->ba_opcode == BIOC_GASTATUS)
3208 1.1 bouyer ba->ba_status = ret;
3209 1.1 bouyer else
3210 1.1 bouyer ba->ba_status = 0;
3211 1.1 bouyer
3212 1.1 bouyer return (rv);
3213 1.1 bouyer }
3214 1.1 bouyer
3215 1.4.4.1 bouyer static int
3216 1.1 bouyer mfii_ioctl_blink(struct mfii_softc *sc, struct bioc_blink *bb)
3217 1.1 bouyer {
3218 1.1 bouyer int i, found, rv = EINVAL;
3219 1.1 bouyer union mfi_mbox mbox;
3220 1.1 bouyer uint32_t cmd;
3221 1.1 bouyer struct mfi_pd_list *pd;
3222 1.1 bouyer
3223 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_ioctl_blink %x\n", DEVNAME(sc),
3224 1.1 bouyer bb->bb_status);
3225 1.1 bouyer
3226 1.1 bouyer /* channel 0 means not in an enclosure so can't be blinked */
3227 1.1 bouyer if (bb->bb_channel == 0)
3228 1.1 bouyer return (EINVAL);
3229 1.1 bouyer
3230 1.1 bouyer pd = malloc(sizeof(*pd), M_DEVBUF, M_WAITOK);
3231 1.1 bouyer
3232 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_PD_GET_LIST, NULL, pd, sizeof(*pd),
3233 1.1 bouyer MFII_DATA_IN, false))
3234 1.1 bouyer goto done;
3235 1.1 bouyer
3236 1.1 bouyer for (i = 0, found = 0; i < pd->mpl_no_pd; i++)
3237 1.1 bouyer if (bb->bb_channel == pd->mpl_address[i].mpa_enc_index &&
3238 1.1 bouyer bb->bb_target == pd->mpl_address[i].mpa_enc_slot) {
3239 1.1 bouyer found = 1;
3240 1.1 bouyer break;
3241 1.1 bouyer }
3242 1.1 bouyer
3243 1.1 bouyer if (!found)
3244 1.1 bouyer goto done;
3245 1.1 bouyer
3246 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
3247 1.1 bouyer mbox.s[0] = pd->mpl_address[i].mpa_pd_id;
3248 1.1 bouyer
3249 1.1 bouyer switch (bb->bb_status) {
3250 1.1 bouyer case BIOC_SBUNBLINK:
3251 1.1 bouyer cmd = MR_DCMD_PD_UNBLINK;
3252 1.1 bouyer break;
3253 1.1 bouyer
3254 1.1 bouyer case BIOC_SBBLINK:
3255 1.1 bouyer cmd = MR_DCMD_PD_BLINK;
3256 1.1 bouyer break;
3257 1.1 bouyer
3258 1.1 bouyer case BIOC_SBALARM:
3259 1.1 bouyer default:
3260 1.4.4.2 martin DNPRINTF(MFII_D_IOCTL,
3261 1.4.4.2 martin "%s: mfii_ioctl_blink biocblink invalid opcode %x\n",
3262 1.4.4.2 martin DEVNAME(sc), bb->bb_status);
3263 1.1 bouyer goto done;
3264 1.1 bouyer }
3265 1.1 bouyer
3266 1.1 bouyer
3267 1.1 bouyer if (mfii_mgmt(sc, cmd, &mbox, NULL, 0, MFII_DATA_NONE, false))
3268 1.1 bouyer goto done;
3269 1.1 bouyer
3270 1.1 bouyer rv = 0;
3271 1.1 bouyer done:
3272 1.1 bouyer free(pd, M_DEVBUF);
3273 1.1 bouyer return (rv);
3274 1.1 bouyer }
3275 1.1 bouyer
3276 1.1 bouyer static int
3277 1.1 bouyer mfii_makegood(struct mfii_softc *sc, uint16_t pd_id)
3278 1.1 bouyer {
3279 1.1 bouyer struct mfii_foreign_scan_info *fsi;
3280 1.1 bouyer struct mfi_pd_details *pd;
3281 1.1 bouyer union mfi_mbox mbox;
3282 1.1 bouyer int rv;
3283 1.1 bouyer
3284 1.1 bouyer fsi = malloc(sizeof *fsi, M_DEVBUF, M_WAITOK);
3285 1.1 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK);
3286 1.1 bouyer
3287 1.1 bouyer memset(&mbox, 0, sizeof mbox);
3288 1.1 bouyer mbox.s[0] = pd_id;
3289 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, pd, sizeof(*pd),
3290 1.1 bouyer MFII_DATA_IN, false);
3291 1.1 bouyer if (rv != 0)
3292 1.1 bouyer goto done;
3293 1.1 bouyer
3294 1.1 bouyer if (pd->mpd_fw_state == MFI_PD_UNCONFIG_BAD) {
3295 1.1 bouyer mbox.s[0] = pd_id;
3296 1.1 bouyer mbox.s[1] = pd->mpd_pd.mfp_seq;
3297 1.1 bouyer mbox.b[4] = MFI_PD_UNCONFIG_GOOD;
3298 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_SET_STATE, &mbox, NULL, 0,
3299 1.1 bouyer MFII_DATA_NONE, false);
3300 1.1 bouyer if (rv != 0)
3301 1.1 bouyer goto done;
3302 1.1 bouyer }
3303 1.1 bouyer
3304 1.1 bouyer memset(&mbox, 0, sizeof mbox);
3305 1.1 bouyer mbox.s[0] = pd_id;
3306 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, pd, sizeof(*pd),
3307 1.1 bouyer MFII_DATA_IN, false);
3308 1.1 bouyer if (rv != 0)
3309 1.1 bouyer goto done;
3310 1.1 bouyer
3311 1.1 bouyer if (pd->mpd_ddf_state & MFI_DDF_FOREIGN) {
3312 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_CFG_FOREIGN_SCAN, NULL,
3313 1.1 bouyer fsi, sizeof(*fsi), MFII_DATA_IN, false);
3314 1.1 bouyer if (rv != 0)
3315 1.1 bouyer goto done;
3316 1.1 bouyer
3317 1.1 bouyer if (fsi->count > 0) {
3318 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_CFG_FOREIGN_CLEAR, NULL,
3319 1.1 bouyer NULL, 0, MFII_DATA_NONE, false);
3320 1.1 bouyer if (rv != 0)
3321 1.1 bouyer goto done;
3322 1.1 bouyer }
3323 1.1 bouyer }
3324 1.1 bouyer
3325 1.1 bouyer memset(&mbox, 0, sizeof mbox);
3326 1.1 bouyer mbox.s[0] = pd_id;
3327 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, pd, sizeof(*pd),
3328 1.1 bouyer MFII_DATA_IN, false);
3329 1.1 bouyer if (rv != 0)
3330 1.1 bouyer goto done;
3331 1.1 bouyer
3332 1.1 bouyer if (pd->mpd_fw_state != MFI_PD_UNCONFIG_GOOD ||
3333 1.1 bouyer pd->mpd_ddf_state & MFI_DDF_FOREIGN)
3334 1.1 bouyer rv = ENXIO;
3335 1.1 bouyer
3336 1.1 bouyer done:
3337 1.1 bouyer free(fsi, M_DEVBUF);
3338 1.1 bouyer free(pd, M_DEVBUF);
3339 1.1 bouyer
3340 1.1 bouyer return (rv);
3341 1.1 bouyer }
3342 1.1 bouyer
3343 1.1 bouyer static int
3344 1.1 bouyer mfii_makespare(struct mfii_softc *sc, uint16_t pd_id)
3345 1.1 bouyer {
3346 1.1 bouyer struct mfi_hotspare *hs;
3347 1.1 bouyer struct mfi_pd_details *pd;
3348 1.1 bouyer union mfi_mbox mbox;
3349 1.1 bouyer size_t size;
3350 1.1 bouyer int rv = EINVAL;
3351 1.1 bouyer
3352 1.1 bouyer /* we really could skip and expect that inq took care of it */
3353 1.1 bouyer if (mfii_bio_getitall(sc)) {
3354 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_bio_getitall failed\n",
3355 1.1 bouyer DEVNAME(sc));
3356 1.1 bouyer return (rv);
3357 1.1 bouyer }
3358 1.1 bouyer size = sizeof *hs + sizeof(uint16_t) * sc->sc_cfg->mfc_no_array;
3359 1.1 bouyer
3360 1.1 bouyer hs = malloc(size, M_DEVBUF, M_WAITOK);
3361 1.1 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK);
3362 1.1 bouyer
3363 1.1 bouyer memset(&mbox, 0, sizeof mbox);
3364 1.1 bouyer mbox.s[0] = pd_id;
3365 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, pd, sizeof(*pd),
3366 1.1 bouyer MFII_DATA_IN, false);
3367 1.1 bouyer if (rv != 0)
3368 1.1 bouyer goto done;
3369 1.1 bouyer
3370 1.1 bouyer memset(hs, 0, size);
3371 1.1 bouyer hs->mhs_pd.mfp_id = pd->mpd_pd.mfp_id;
3372 1.1 bouyer hs->mhs_pd.mfp_seq = pd->mpd_pd.mfp_seq;
3373 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_CFG_MAKE_SPARE, NULL, hs, size,
3374 1.1 bouyer MFII_DATA_OUT, false);
3375 1.1 bouyer
3376 1.1 bouyer done:
3377 1.1 bouyer free(hs, M_DEVBUF);
3378 1.1 bouyer free(pd, M_DEVBUF);
3379 1.1 bouyer
3380 1.1 bouyer return (rv);
3381 1.1 bouyer }
3382 1.1 bouyer
3383 1.4.4.1 bouyer static int
3384 1.1 bouyer mfii_ioctl_setstate(struct mfii_softc *sc, struct bioc_setstate *bs)
3385 1.1 bouyer {
3386 1.1 bouyer struct mfi_pd_details *pd;
3387 1.1 bouyer struct mfi_pd_list *pl;
3388 1.1 bouyer int i, found, rv = EINVAL;
3389 1.1 bouyer union mfi_mbox mbox;
3390 1.1 bouyer
3391 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_ioctl_setstate %x\n", DEVNAME(sc),
3392 1.1 bouyer bs->bs_status);
3393 1.1 bouyer
3394 1.1 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK);
3395 1.1 bouyer pl = malloc(sizeof *pl, M_DEVBUF, M_WAITOK);
3396 1.1 bouyer
3397 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_PD_GET_LIST, NULL, pl, sizeof(*pl),
3398 1.1 bouyer MFII_DATA_IN, false))
3399 1.1 bouyer goto done;
3400 1.1 bouyer
3401 1.1 bouyer for (i = 0, found = 0; i < pl->mpl_no_pd; i++)
3402 1.1 bouyer if (bs->bs_channel == pl->mpl_address[i].mpa_enc_index &&
3403 1.1 bouyer bs->bs_target == pl->mpl_address[i].mpa_enc_slot) {
3404 1.1 bouyer found = 1;
3405 1.1 bouyer break;
3406 1.1 bouyer }
3407 1.1 bouyer
3408 1.1 bouyer if (!found)
3409 1.1 bouyer goto done;
3410 1.1 bouyer
3411 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
3412 1.1 bouyer mbox.s[0] = pl->mpl_address[i].mpa_pd_id;
3413 1.1 bouyer
3414 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, pd, sizeof(*pd),
3415 1.1 bouyer MFII_DATA_IN, false))
3416 1.1 bouyer goto done;
3417 1.1 bouyer
3418 1.1 bouyer mbox.s[0] = pl->mpl_address[i].mpa_pd_id;
3419 1.1 bouyer mbox.s[1] = pd->mpd_pd.mfp_seq;
3420 1.1 bouyer
3421 1.1 bouyer switch (bs->bs_status) {
3422 1.1 bouyer case BIOC_SSONLINE:
3423 1.1 bouyer mbox.b[4] = MFI_PD_ONLINE;
3424 1.1 bouyer break;
3425 1.1 bouyer
3426 1.1 bouyer case BIOC_SSOFFLINE:
3427 1.1 bouyer mbox.b[4] = MFI_PD_OFFLINE;
3428 1.1 bouyer break;
3429 1.1 bouyer
3430 1.1 bouyer case BIOC_SSHOTSPARE:
3431 1.1 bouyer mbox.b[4] = MFI_PD_HOTSPARE;
3432 1.1 bouyer break;
3433 1.1 bouyer
3434 1.1 bouyer case BIOC_SSREBUILD:
3435 1.1 bouyer if (pd->mpd_fw_state != MFI_PD_OFFLINE) {
3436 1.1 bouyer if ((rv = mfii_makegood(sc,
3437 1.1 bouyer pl->mpl_address[i].mpa_pd_id)))
3438 1.1 bouyer goto done;
3439 1.1 bouyer
3440 1.1 bouyer if ((rv = mfii_makespare(sc,
3441 1.1 bouyer pl->mpl_address[i].mpa_pd_id)))
3442 1.1 bouyer goto done;
3443 1.1 bouyer
3444 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
3445 1.1 bouyer mbox.s[0] = pl->mpl_address[i].mpa_pd_id;
3446 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox,
3447 1.1 bouyer pd, sizeof(*pd), MFII_DATA_IN, false);
3448 1.1 bouyer if (rv != 0)
3449 1.1 bouyer goto done;
3450 1.1 bouyer
3451 1.1 bouyer /* rebuilding might be started by mfii_makespare() */
3452 1.1 bouyer if (pd->mpd_fw_state == MFI_PD_REBUILD) {
3453 1.1 bouyer rv = 0;
3454 1.1 bouyer goto done;
3455 1.1 bouyer }
3456 1.1 bouyer
3457 1.1 bouyer mbox.s[0] = pl->mpl_address[i].mpa_pd_id;
3458 1.1 bouyer mbox.s[1] = pd->mpd_pd.mfp_seq;
3459 1.1 bouyer }
3460 1.1 bouyer mbox.b[4] = MFI_PD_REBUILD;
3461 1.1 bouyer break;
3462 1.1 bouyer
3463 1.1 bouyer default:
3464 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_ioctl_setstate invalid "
3465 1.1 bouyer "opcode %x\n", DEVNAME(sc), bs->bs_status);
3466 1.1 bouyer goto done;
3467 1.1 bouyer }
3468 1.1 bouyer
3469 1.1 bouyer
3470 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_PD_SET_STATE, &mbox, NULL, 0,
3471 1.1 bouyer MFII_DATA_NONE, false);
3472 1.1 bouyer done:
3473 1.1 bouyer free(pd, M_DEVBUF);
3474 1.1 bouyer free(pl, M_DEVBUF);
3475 1.1 bouyer return (rv);
3476 1.1 bouyer }
3477 1.1 bouyer
3478 1.1 bouyer #if 0
3479 1.1 bouyer int
3480 1.1 bouyer mfii_ioctl_patrol(struct mfii_softc *sc, struct bioc_patrol *bp)
3481 1.1 bouyer {
3482 1.1 bouyer uint32_t opc;
3483 1.1 bouyer int rv = 0;
3484 1.1 bouyer struct mfi_pr_properties prop;
3485 1.1 bouyer struct mfi_pr_status status;
3486 1.1 bouyer uint32_t time, exec_freq;
3487 1.1 bouyer
3488 1.1 bouyer switch (bp->bp_opcode) {
3489 1.1 bouyer case BIOC_SPSTOP:
3490 1.1 bouyer case BIOC_SPSTART:
3491 1.1 bouyer if (bp->bp_opcode == BIOC_SPSTART)
3492 1.1 bouyer opc = MR_DCMD_PR_START;
3493 1.1 bouyer else
3494 1.1 bouyer opc = MR_DCMD_PR_STOP;
3495 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, NULL, 0, MFII_DATA_IN, false))
3496 1.1 bouyer return (EINVAL);
3497 1.1 bouyer break;
3498 1.1 bouyer
3499 1.1 bouyer case BIOC_SPMANUAL:
3500 1.1 bouyer case BIOC_SPDISABLE:
3501 1.1 bouyer case BIOC_SPAUTO:
3502 1.1 bouyer /* Get device's time. */
3503 1.1 bouyer opc = MR_DCMD_TIME_SECS_GET;
3504 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, &time, sizeof(time),
3505 1.1 bouyer MFII_DATA_IN, false))
3506 1.1 bouyer return (EINVAL);
3507 1.1 bouyer
3508 1.1 bouyer opc = MR_DCMD_PR_GET_PROPERTIES;
3509 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, &prop, sizeof(prop),
3510 1.1 bouyer MFII_DATA_IN, false))
3511 1.1 bouyer return (EINVAL);
3512 1.1 bouyer
3513 1.1 bouyer switch (bp->bp_opcode) {
3514 1.1 bouyer case BIOC_SPMANUAL:
3515 1.1 bouyer prop.op_mode = MFI_PR_OPMODE_MANUAL;
3516 1.1 bouyer break;
3517 1.1 bouyer case BIOC_SPDISABLE:
3518 1.1 bouyer prop.op_mode = MFI_PR_OPMODE_DISABLED;
3519 1.1 bouyer break;
3520 1.1 bouyer case BIOC_SPAUTO:
3521 1.1 bouyer if (bp->bp_autoival != 0) {
3522 1.1 bouyer if (bp->bp_autoival == -1)
3523 1.1 bouyer /* continuously */
3524 1.1 bouyer exec_freq = 0xffffffffU;
3525 1.1 bouyer else if (bp->bp_autoival > 0)
3526 1.1 bouyer exec_freq = bp->bp_autoival;
3527 1.1 bouyer else
3528 1.1 bouyer return (EINVAL);
3529 1.1 bouyer prop.exec_freq = exec_freq;
3530 1.1 bouyer }
3531 1.1 bouyer if (bp->bp_autonext != 0) {
3532 1.1 bouyer if (bp->bp_autonext < 0)
3533 1.1 bouyer return (EINVAL);
3534 1.1 bouyer else
3535 1.4.4.2 martin prop.next_exec =
3536 1.4.4.2 martin time + bp->bp_autonext;
3537 1.1 bouyer }
3538 1.1 bouyer prop.op_mode = MFI_PR_OPMODE_AUTO;
3539 1.1 bouyer break;
3540 1.1 bouyer }
3541 1.1 bouyer
3542 1.1 bouyer opc = MR_DCMD_PR_SET_PROPERTIES;
3543 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, &prop, sizeof(prop),
3544 1.1 bouyer MFII_DATA_OUT, false))
3545 1.1 bouyer return (EINVAL);
3546 1.1 bouyer
3547 1.1 bouyer break;
3548 1.1 bouyer
3549 1.1 bouyer case BIOC_GPSTATUS:
3550 1.1 bouyer opc = MR_DCMD_PR_GET_PROPERTIES;
3551 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, &prop, sizeof(prop),
3552 1.1 bouyer MFII_DATA_IN, false))
3553 1.1 bouyer return (EINVAL);
3554 1.1 bouyer
3555 1.1 bouyer opc = MR_DCMD_PR_GET_STATUS;
3556 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, &status, sizeof(status),
3557 1.1 bouyer MFII_DATA_IN, false))
3558 1.1 bouyer return (EINVAL);
3559 1.1 bouyer
3560 1.1 bouyer /* Get device's time. */
3561 1.1 bouyer opc = MR_DCMD_TIME_SECS_GET;
3562 1.1 bouyer if (mfii_mgmt(sc, opc, NULL, &time, sizeof(time),
3563 1.1 bouyer MFII_DATA_IN, false))
3564 1.1 bouyer return (EINVAL);
3565 1.1 bouyer
3566 1.1 bouyer switch (prop.op_mode) {
3567 1.1 bouyer case MFI_PR_OPMODE_AUTO:
3568 1.1 bouyer bp->bp_mode = BIOC_SPMAUTO;
3569 1.1 bouyer bp->bp_autoival = prop.exec_freq;
3570 1.1 bouyer bp->bp_autonext = prop.next_exec;
3571 1.1 bouyer bp->bp_autonow = time;
3572 1.1 bouyer break;
3573 1.1 bouyer case MFI_PR_OPMODE_MANUAL:
3574 1.1 bouyer bp->bp_mode = BIOC_SPMMANUAL;
3575 1.1 bouyer break;
3576 1.1 bouyer case MFI_PR_OPMODE_DISABLED:
3577 1.1 bouyer bp->bp_mode = BIOC_SPMDISABLED;
3578 1.1 bouyer break;
3579 1.1 bouyer default:
3580 1.1 bouyer printf("%s: unknown patrol mode %d\n",
3581 1.1 bouyer DEVNAME(sc), prop.op_mode);
3582 1.1 bouyer break;
3583 1.1 bouyer }
3584 1.1 bouyer
3585 1.1 bouyer switch (status.state) {
3586 1.1 bouyer case MFI_PR_STATE_STOPPED:
3587 1.1 bouyer bp->bp_status = BIOC_SPSSTOPPED;
3588 1.1 bouyer break;
3589 1.1 bouyer case MFI_PR_STATE_READY:
3590 1.1 bouyer bp->bp_status = BIOC_SPSREADY;
3591 1.1 bouyer break;
3592 1.1 bouyer case MFI_PR_STATE_ACTIVE:
3593 1.1 bouyer bp->bp_status = BIOC_SPSACTIVE;
3594 1.1 bouyer break;
3595 1.1 bouyer case MFI_PR_STATE_ABORTED:
3596 1.1 bouyer bp->bp_status = BIOC_SPSABORTED;
3597 1.1 bouyer break;
3598 1.1 bouyer default:
3599 1.1 bouyer printf("%s: unknown patrol state %d\n",
3600 1.1 bouyer DEVNAME(sc), status.state);
3601 1.1 bouyer break;
3602 1.1 bouyer }
3603 1.1 bouyer
3604 1.1 bouyer break;
3605 1.1 bouyer
3606 1.1 bouyer default:
3607 1.4.4.2 martin DNPRINTF(MFII_D_IOCTL,
3608 1.4.4.2 martin "%s: mfii_ioctl_patrol biocpatrol invalid opcode %x\n",
3609 1.4.4.2 martin DEVNAME(sc), bp->bp_opcode);
3610 1.1 bouyer return (EINVAL);
3611 1.1 bouyer }
3612 1.1 bouyer
3613 1.1 bouyer return (rv);
3614 1.1 bouyer }
3615 1.1 bouyer #endif
3616 1.1 bouyer
3617 1.4.4.1 bouyer static int
3618 1.1 bouyer mfii_bio_hs(struct mfii_softc *sc, int volid, int type, void *bio_hs)
3619 1.1 bouyer {
3620 1.1 bouyer struct mfi_conf *cfg;
3621 1.1 bouyer struct mfi_hotspare *hs;
3622 1.1 bouyer struct mfi_pd_details *pd;
3623 1.1 bouyer struct bioc_disk *sdhs;
3624 1.1 bouyer struct bioc_vol *vdhs;
3625 1.1 bouyer struct scsipi_inquiry_data *inqbuf;
3626 1.1 bouyer char vend[8+16+4+1], *vendp;
3627 1.1 bouyer int i, rv = EINVAL;
3628 1.1 bouyer uint32_t size;
3629 1.1 bouyer union mfi_mbox mbox;
3630 1.1 bouyer
3631 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_vol_hs %d\n", DEVNAME(sc), volid);
3632 1.1 bouyer
3633 1.1 bouyer if (!bio_hs)
3634 1.1 bouyer return (EINVAL);
3635 1.1 bouyer
3636 1.1 bouyer pd = malloc(sizeof *pd, M_DEVBUF, M_WAITOK);
3637 1.1 bouyer
3638 1.1 bouyer /* send single element command to retrieve size for full structure */
3639 1.1 bouyer cfg = malloc(sizeof *cfg, M_DEVBUF, M_WAITOK);
3640 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_CONF_GET, NULL, cfg, sizeof(*cfg),
3641 1.1 bouyer MFII_DATA_IN, false))
3642 1.1 bouyer goto freeme;
3643 1.1 bouyer
3644 1.1 bouyer size = cfg->mfc_size;
3645 1.1 bouyer free(cfg, M_DEVBUF);
3646 1.1 bouyer
3647 1.1 bouyer /* memory for read config */
3648 1.1 bouyer cfg = malloc(size, M_DEVBUF, M_WAITOK|M_ZERO);
3649 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_CONF_GET, NULL, cfg, size,
3650 1.1 bouyer MFII_DATA_IN, false))
3651 1.1 bouyer goto freeme;
3652 1.1 bouyer
3653 1.1 bouyer /* calculate offset to hs structure */
3654 1.1 bouyer hs = (struct mfi_hotspare *)(
3655 1.1 bouyer ((uint8_t *)cfg) + offsetof(struct mfi_conf, mfc_array) +
3656 1.1 bouyer cfg->mfc_array_size * cfg->mfc_no_array +
3657 1.1 bouyer cfg->mfc_ld_size * cfg->mfc_no_ld);
3658 1.1 bouyer
3659 1.1 bouyer if (volid < cfg->mfc_no_ld)
3660 1.1 bouyer goto freeme; /* not a hotspare */
3661 1.1 bouyer
3662 1.1 bouyer if (volid > (cfg->mfc_no_ld + cfg->mfc_no_hs))
3663 1.1 bouyer goto freeme; /* not a hotspare */
3664 1.1 bouyer
3665 1.1 bouyer /* offset into hotspare structure */
3666 1.1 bouyer i = volid - cfg->mfc_no_ld;
3667 1.1 bouyer
3668 1.4.4.2 martin DNPRINTF(MFII_D_IOCTL,
3669 1.4.4.2 martin "%s: mfii_vol_hs i %d volid %d no_ld %d no_hs %d "
3670 1.1 bouyer "hs %p cfg %p id %02x\n", DEVNAME(sc), i, volid, cfg->mfc_no_ld,
3671 1.1 bouyer cfg->mfc_no_hs, hs, cfg, hs[i].mhs_pd.mfp_id);
3672 1.1 bouyer
3673 1.1 bouyer /* get pd fields */
3674 1.1 bouyer memset(&mbox, 0, sizeof(mbox));
3675 1.1 bouyer mbox.s[0] = hs[i].mhs_pd.mfp_id;
3676 1.1 bouyer if (mfii_mgmt(sc, MR_DCMD_PD_GET_INFO, &mbox, pd, sizeof(*pd),
3677 1.1 bouyer MFII_DATA_IN, false)) {
3678 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_vol_hs illegal PD\n",
3679 1.1 bouyer DEVNAME(sc));
3680 1.1 bouyer goto freeme;
3681 1.1 bouyer }
3682 1.1 bouyer
3683 1.1 bouyer switch (type) {
3684 1.1 bouyer case MFI_MGMT_VD:
3685 1.1 bouyer vdhs = bio_hs;
3686 1.1 bouyer vdhs->bv_status = BIOC_SVONLINE;
3687 1.1 bouyer vdhs->bv_size = pd->mpd_size / 2 * 1024; /* XXX why? */
3688 1.1 bouyer vdhs->bv_level = -1; /* hotspare */
3689 1.1 bouyer vdhs->bv_nodisk = 1;
3690 1.1 bouyer break;
3691 1.1 bouyer
3692 1.1 bouyer case MFI_MGMT_SD:
3693 1.1 bouyer sdhs = bio_hs;
3694 1.1 bouyer sdhs->bd_status = BIOC_SDHOTSPARE;
3695 1.1 bouyer sdhs->bd_size = pd->mpd_size / 2 * 1024; /* XXX why? */
3696 1.1 bouyer sdhs->bd_channel = pd->mpd_enc_idx;
3697 1.1 bouyer sdhs->bd_target = pd->mpd_enc_slot;
3698 1.1 bouyer inqbuf = (struct scsipi_inquiry_data *)&pd->mpd_inq_data;
3699 1.1 bouyer vendp = inqbuf->vendor;
3700 1.1 bouyer memcpy(vend, vendp, sizeof vend - 1);
3701 1.1 bouyer vend[sizeof vend - 1] = '\0';
3702 1.1 bouyer strlcpy(sdhs->bd_vendor, vend, sizeof(sdhs->bd_vendor));
3703 1.1 bouyer break;
3704 1.1 bouyer
3705 1.1 bouyer default:
3706 1.1 bouyer goto freeme;
3707 1.1 bouyer }
3708 1.1 bouyer
3709 1.1 bouyer DNPRINTF(MFII_D_IOCTL, "%s: mfii_vol_hs 6\n", DEVNAME(sc));
3710 1.1 bouyer rv = 0;
3711 1.1 bouyer freeme:
3712 1.1 bouyer free(pd, M_DEVBUF);
3713 1.1 bouyer free(cfg, M_DEVBUF);
3714 1.1 bouyer
3715 1.1 bouyer return (rv);
3716 1.1 bouyer }
3717 1.1 bouyer
3718 1.1 bouyer #endif /* NBIO > 0 */
3719 1.1 bouyer
3720 1.1 bouyer #define MFI_BBU_SENSORS 4
3721 1.1 bouyer
3722 1.4.4.1 bouyer static void
3723 1.1 bouyer mfii_bbu(struct mfii_softc *sc, envsys_data_t *edata)
3724 1.1 bouyer {
3725 1.1 bouyer struct mfi_bbu_status bbu;
3726 1.1 bouyer u_int32_t status;
3727 1.1 bouyer u_int32_t mask;
3728 1.1 bouyer u_int32_t soh_bad;
3729 1.1 bouyer int rv;
3730 1.1 bouyer
3731 1.1 bouyer mutex_enter(&sc->sc_lock);
3732 1.1 bouyer rv = mfii_mgmt(sc, MR_DCMD_BBU_GET_STATUS, NULL, &bbu,
3733 1.1 bouyer sizeof(bbu), MFII_DATA_IN, false);
3734 1.1 bouyer mutex_exit(&sc->sc_lock);
3735 1.1 bouyer if (rv != 0) {
3736 1.1 bouyer edata->state = ENVSYS_SINVALID;
3737 1.1 bouyer edata->value_cur = 0;
3738 1.1 bouyer return;
3739 1.1 bouyer }
3740 1.1 bouyer
3741 1.1 bouyer switch (bbu.battery_type) {
3742 1.1 bouyer case MFI_BBU_TYPE_IBBU:
3743 1.4.4.1 bouyer case MFI_BBU_TYPE_IBBU09:
3744 1.4.4.2 martin case MFI_BBU_TYPE_CVPM02:
3745 1.1 bouyer mask = MFI_BBU_STATE_BAD_IBBU;
3746 1.1 bouyer soh_bad = 0;
3747 1.1 bouyer break;
3748 1.1 bouyer case MFI_BBU_TYPE_BBU:
3749 1.1 bouyer mask = MFI_BBU_STATE_BAD_BBU;
3750 1.1 bouyer soh_bad = (bbu.detail.bbu.is_SOH_good == 0);
3751 1.1 bouyer break;
3752 1.1 bouyer
3753 1.1 bouyer case MFI_BBU_TYPE_NONE:
3754 1.1 bouyer default:
3755 1.1 bouyer edata->state = ENVSYS_SCRITICAL;
3756 1.1 bouyer edata->value_cur = 0;
3757 1.1 bouyer return;
3758 1.1 bouyer }
3759 1.1 bouyer
3760 1.1 bouyer status = le32toh(bbu.fw_status) & mask;
3761 1.4.4.1 bouyer switch (edata->sensor) {
3762 1.1 bouyer case 0:
3763 1.1 bouyer edata->value_cur = (status || soh_bad) ? 0 : 1;
3764 1.1 bouyer edata->state =
3765 1.1 bouyer edata->value_cur ? ENVSYS_SVALID : ENVSYS_SCRITICAL;
3766 1.1 bouyer return;
3767 1.1 bouyer case 1:
3768 1.1 bouyer edata->value_cur = le16toh(bbu.voltage) * 1000;
3769 1.1 bouyer edata->state = ENVSYS_SVALID;
3770 1.1 bouyer return;
3771 1.1 bouyer case 2:
3772 1.1 bouyer edata->value_cur = (int16_t)le16toh(bbu.current) * 1000;
3773 1.1 bouyer edata->state = ENVSYS_SVALID;
3774 1.1 bouyer return;
3775 1.1 bouyer case 3:
3776 1.4.4.2 martin edata->value_cur =
3777 1.4.4.2 martin le16toh(bbu.temperature) * 1000000 + 273150000;
3778 1.1 bouyer edata->state = ENVSYS_SVALID;
3779 1.1 bouyer return;
3780 1.1 bouyer }
3781 1.1 bouyer }
3782 1.1 bouyer
3783 1.4.4.1 bouyer static void
3784 1.1 bouyer mfii_refresh_ld_sensor(struct mfii_softc *sc, envsys_data_t *edata)
3785 1.1 bouyer {
3786 1.1 bouyer struct bioc_vol bv;
3787 1.1 bouyer int error;
3788 1.1 bouyer
3789 1.1 bouyer memset(&bv, 0, sizeof(bv));
3790 1.1 bouyer bv.bv_volid = edata->sensor - MFI_BBU_SENSORS;
3791 1.1 bouyer mutex_enter(&sc->sc_lock);
3792 1.1 bouyer error = mfii_ioctl_vol(sc, &bv);
3793 1.1 bouyer mutex_exit(&sc->sc_lock);
3794 1.1 bouyer if (error)
3795 1.1 bouyer bv.bv_status = BIOC_SVINVALID;
3796 1.1 bouyer bio_vol_to_envsys(edata, &bv);
3797 1.1 bouyer }
3798 1.1 bouyer
3799 1.4.4.1 bouyer static void
3800 1.1 bouyer mfii_init_ld_sensor(struct mfii_softc *sc, envsys_data_t *sensor, int i)
3801 1.1 bouyer {
3802 1.1 bouyer sensor->units = ENVSYS_DRIVE;
3803 1.1 bouyer sensor->state = ENVSYS_SINVALID;
3804 1.1 bouyer sensor->value_cur = ENVSYS_DRIVE_EMPTY;
3805 1.1 bouyer /* Enable monitoring for drive state changes */
3806 1.1 bouyer sensor->flags |= ENVSYS_FMONSTCHANGED;
3807 1.1 bouyer snprintf(sensor->desc, sizeof(sensor->desc), "%s:%d", DEVNAME(sc), i);
3808 1.1 bouyer }
3809 1.1 bouyer
3810 1.1 bouyer static void
3811 1.1 bouyer mfii_attach_sensor(struct mfii_softc *sc, envsys_data_t *s)
3812 1.1 bouyer {
3813 1.1 bouyer if (sysmon_envsys_sensor_attach(sc->sc_sme, s))
3814 1.1 bouyer aprint_error_dev(sc->sc_dev,
3815 1.1 bouyer "failed to attach sensor %s\n", s->desc);
3816 1.1 bouyer }
3817 1.1 bouyer
3818 1.4.4.1 bouyer static int
3819 1.1 bouyer mfii_create_sensors(struct mfii_softc *sc)
3820 1.1 bouyer {
3821 1.1 bouyer int i, rv;
3822 1.1 bouyer const int nsensors = MFI_BBU_SENSORS + MFI_MAX_LD;
3823 1.1 bouyer
3824 1.1 bouyer sc->sc_sme = sysmon_envsys_create();
3825 1.1 bouyer sc->sc_sensors = malloc(sizeof(envsys_data_t) * nsensors,
3826 1.1 bouyer M_DEVBUF, M_NOWAIT | M_ZERO);
3827 1.1 bouyer
3828 1.1 bouyer if (sc->sc_sensors == NULL) {
3829 1.1 bouyer aprint_error_dev(sc->sc_dev, "can't allocate envsys_data_t\n");
3830 1.1 bouyer return ENOMEM;
3831 1.1 bouyer }
3832 1.1 bouyer /* BBU */
3833 1.1 bouyer sc->sc_sensors[0].units = ENVSYS_INDICATOR;
3834 1.1 bouyer sc->sc_sensors[0].state = ENVSYS_SINVALID;
3835 1.1 bouyer sc->sc_sensors[0].value_cur = 0;
3836 1.1 bouyer sc->sc_sensors[1].units = ENVSYS_SVOLTS_DC;
3837 1.1 bouyer sc->sc_sensors[1].state = ENVSYS_SINVALID;
3838 1.1 bouyer sc->sc_sensors[1].value_cur = 0;
3839 1.1 bouyer sc->sc_sensors[2].units = ENVSYS_SAMPS;
3840 1.1 bouyer sc->sc_sensors[2].state = ENVSYS_SINVALID;
3841 1.1 bouyer sc->sc_sensors[2].value_cur = 0;
3842 1.1 bouyer sc->sc_sensors[3].units = ENVSYS_STEMP;
3843 1.1 bouyer sc->sc_sensors[3].state = ENVSYS_SINVALID;
3844 1.1 bouyer sc->sc_sensors[3].value_cur = 0;
3845 1.1 bouyer
3846 1.1 bouyer if (ISSET(le32toh(sc->sc_info.mci_hw_present), MFI_INFO_HW_BBU)) {
3847 1.1 bouyer sc->sc_bbuok = true;
3848 1.1 bouyer sc->sc_sensors[0].flags |= ENVSYS_FMONCRITICAL;
3849 1.1 bouyer snprintf(sc->sc_sensors[0].desc, sizeof(sc->sc_sensors[0].desc),
3850 1.1 bouyer "%s BBU state", DEVNAME(sc));
3851 1.1 bouyer snprintf(sc->sc_sensors[1].desc, sizeof(sc->sc_sensors[1].desc),
3852 1.1 bouyer "%s BBU voltage", DEVNAME(sc));
3853 1.1 bouyer snprintf(sc->sc_sensors[2].desc, sizeof(sc->sc_sensors[2].desc),
3854 1.1 bouyer "%s BBU current", DEVNAME(sc));
3855 1.1 bouyer snprintf(sc->sc_sensors[3].desc, sizeof(sc->sc_sensors[3].desc),
3856 1.1 bouyer "%s BBU temperature", DEVNAME(sc));
3857 1.1 bouyer for (i = 0; i < MFI_BBU_SENSORS; i++) {
3858 1.1 bouyer mfii_attach_sensor(sc, &sc->sc_sensors[i]);
3859 1.1 bouyer }
3860 1.1 bouyer }
3861 1.1 bouyer
3862 1.1 bouyer for (i = 0; i < sc->sc_ld_list.mll_no_ld; i++) {
3863 1.1 bouyer mfii_init_ld_sensor(sc, &sc->sc_sensors[i + MFI_BBU_SENSORS], i);
3864 1.1 bouyer mfii_attach_sensor(sc, &sc->sc_sensors[i + MFI_BBU_SENSORS]);
3865 1.1 bouyer }
3866 1.1 bouyer
3867 1.1 bouyer sc->sc_sme->sme_name = DEVNAME(sc);
3868 1.1 bouyer sc->sc_sme->sme_cookie = sc;
3869 1.1 bouyer sc->sc_sme->sme_refresh = mfii_refresh_sensor;
3870 1.1 bouyer rv = sysmon_envsys_register(sc->sc_sme);
3871 1.1 bouyer if (rv) {
3872 1.1 bouyer aprint_error_dev(sc->sc_dev,
3873 1.1 bouyer "unable to register with sysmon (rv = %d)\n", rv);
3874 1.4.4.2 martin sysmon_envsys_destroy(sc->sc_sme);
3875 1.4.4.2 martin sc->sc_sme = NULL;
3876 1.1 bouyer }
3877 1.1 bouyer return rv;
3878 1.1 bouyer
3879 1.1 bouyer }
3880 1.1 bouyer
3881 1.1 bouyer static int
3882 1.1 bouyer mfii_destroy_sensors(struct mfii_softc *sc)
3883 1.1 bouyer {
3884 1.1 bouyer if (sc->sc_sme == NULL)
3885 1.1 bouyer return 0;
3886 1.1 bouyer sysmon_envsys_unregister(sc->sc_sme);
3887 1.1 bouyer sc->sc_sme = NULL;
3888 1.1 bouyer free(sc->sc_sensors, M_DEVBUF);
3889 1.4.4.1 bouyer return 0;
3890 1.4.4.1 bouyer }
3891 1.1 bouyer
3892 1.4.4.1 bouyer static void
3893 1.1 bouyer mfii_refresh_sensor(struct sysmon_envsys *sme, envsys_data_t *edata)
3894 1.1 bouyer {
3895 1.1 bouyer struct mfii_softc *sc = sme->sme_cookie;
3896 1.1 bouyer
3897 1.1 bouyer if (edata->sensor >= MFI_BBU_SENSORS + MFI_MAX_LD)
3898 1.1 bouyer return;
3899 1.1 bouyer
3900 1.1 bouyer if (edata->sensor < MFI_BBU_SENSORS) {
3901 1.1 bouyer if (sc->sc_bbuok)
3902 1.1 bouyer mfii_bbu(sc, edata);
3903 1.1 bouyer } else {
3904 1.1 bouyer mfii_refresh_ld_sensor(sc, edata);
3905 1.1 bouyer }
3906 1.1 bouyer }
3907