mly.c revision 1.18 1 1.18 perry /* $NetBSD: mly.c,v 1.18 2003/03/31 03:23:38 perry Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.1 ad * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 ad * by Andrew Doran, Thor Lancelot Simon, and Eric Haszlakiewicz.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad * 3. All advertising materials mentioning features or use of this software
19 1.1 ad * must display the following acknowledgement:
20 1.1 ad * This product includes software developed by the NetBSD
21 1.1 ad * Foundation, Inc. and its contributors.
22 1.1 ad * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 ad * contributors may be used to endorse or promote products derived
24 1.1 ad * from this software without specific prior written permission.
25 1.1 ad *
26 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
37 1.1 ad */
38 1.1 ad
39 1.1 ad /*-
40 1.1 ad * Copyright (c) 2000, 2001 Michael Smith
41 1.1 ad * Copyright (c) 2000 BSDi
42 1.1 ad * All rights reserved.
43 1.1 ad *
44 1.1 ad * Redistribution and use in source and binary forms, with or without
45 1.1 ad * modification, are permitted provided that the following conditions
46 1.1 ad * are met:
47 1.1 ad * 1. Redistributions of source code must retain the above copyright
48 1.1 ad * notice, this list of conditions and the following disclaimer.
49 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 ad * notice, this list of conditions and the following disclaimer in the
51 1.1 ad * documentation and/or other materials provided with the distribution.
52 1.1 ad *
53 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
54 1.1 ad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55 1.1 ad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56 1.1 ad * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
57 1.1 ad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58 1.1 ad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59 1.1 ad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60 1.1 ad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61 1.1 ad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62 1.1 ad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63 1.1 ad * SUCH DAMAGE.
64 1.1 ad *
65 1.1 ad * from FreeBSD: mly.c,v 1.8 2001/07/14 00:12:22 msmith Exp
66 1.1 ad */
67 1.1 ad
68 1.1 ad /*
69 1.1 ad * Driver for the Mylex AcceleRAID and eXtremeRAID family with v6 firmware.
70 1.1 ad *
71 1.1 ad * TODO:
72 1.1 ad *
73 1.1 ad * o Make mly->mly_btl a hash, then MLY_BTL_RESCAN becomes a SIMPLEQ.
74 1.1 ad * o Handle FC and multiple LUNs.
75 1.1 ad * o Fix mmbox usage.
76 1.1 ad * o Fix transfer speed fudge.
77 1.1 ad */
78 1.8 lukem
79 1.8 lukem #include <sys/cdefs.h>
80 1.18 perry __KERNEL_RCSID(0, "$NetBSD: mly.c,v 1.18 2003/03/31 03:23:38 perry Exp $");
81 1.1 ad
82 1.1 ad #include <sys/param.h>
83 1.1 ad #include <sys/systm.h>
84 1.1 ad #include <sys/device.h>
85 1.1 ad #include <sys/kernel.h>
86 1.1 ad #include <sys/queue.h>
87 1.1 ad #include <sys/buf.h>
88 1.1 ad #include <sys/endian.h>
89 1.1 ad #include <sys/conf.h>
90 1.1 ad #include <sys/malloc.h>
91 1.1 ad #include <sys/ioctl.h>
92 1.1 ad #include <sys/scsiio.h>
93 1.1 ad #include <sys/kthread.h>
94 1.1 ad
95 1.1 ad #include <uvm/uvm_extern.h>
96 1.1 ad
97 1.1 ad #include <machine/bus.h>
98 1.1 ad
99 1.1 ad #include <dev/scsipi/scsi_all.h>
100 1.1 ad #include <dev/scsipi/scsipi_all.h>
101 1.1 ad #include <dev/scsipi/scsiconf.h>
102 1.1 ad
103 1.1 ad #include <dev/pci/pcireg.h>
104 1.1 ad #include <dev/pci/pcivar.h>
105 1.1 ad #include <dev/pci/pcidevs.h>
106 1.1 ad
107 1.1 ad #include <dev/pci/mlyreg.h>
108 1.1 ad #include <dev/pci/mlyio.h>
109 1.1 ad #include <dev/pci/mlyvar.h>
110 1.1 ad #include <dev/pci/mly_tables.h>
111 1.1 ad
112 1.1 ad static void mly_attach(struct device *, struct device *, void *);
113 1.1 ad static int mly_match(struct device *, struct cfdata *, void *);
114 1.1 ad static const struct mly_ident *mly_find_ident(struct pci_attach_args *);
115 1.1 ad static int mly_fwhandshake(struct mly_softc *);
116 1.1 ad static int mly_flush(struct mly_softc *);
117 1.1 ad static int mly_intr(void *);
118 1.1 ad static void mly_shutdown(void *);
119 1.1 ad
120 1.1 ad static int mly_alloc_ccbs(struct mly_softc *);
121 1.1 ad static void mly_check_event(struct mly_softc *);
122 1.1 ad static void mly_complete_event(struct mly_softc *, struct mly_ccb *);
123 1.1 ad static void mly_complete_rescan(struct mly_softc *, struct mly_ccb *);
124 1.1 ad static int mly_dmamem_alloc(struct mly_softc *, int, bus_dmamap_t *,
125 1.1 ad caddr_t *, bus_addr_t *, bus_dma_segment_t *);
126 1.1 ad static void mly_dmamem_free(struct mly_softc *, int, bus_dmamap_t,
127 1.1 ad caddr_t, bus_dma_segment_t *);
128 1.1 ad static int mly_enable_mmbox(struct mly_softc *);
129 1.1 ad static void mly_fetch_event(struct mly_softc *);
130 1.1 ad static int mly_get_controllerinfo(struct mly_softc *);
131 1.1 ad static int mly_get_eventstatus(struct mly_softc *);
132 1.1 ad static int mly_ioctl(struct mly_softc *, struct mly_cmd_ioctl *,
133 1.1 ad void **, size_t, void *, size_t *);
134 1.1 ad static void mly_padstr(char *, const char *, int);
135 1.1 ad static void mly_process_event(struct mly_softc *, struct mly_event *);
136 1.1 ad static void mly_release_ccbs(struct mly_softc *);
137 1.1 ad static int mly_scan_btl(struct mly_softc *, int, int);
138 1.1 ad static void mly_scan_channel(struct mly_softc *, int);
139 1.1 ad static void mly_thread(void *);
140 1.1 ad static void mly_thread_create(void *);
141 1.1 ad
142 1.1 ad static int mly_ccb_alloc(struct mly_softc *, struct mly_ccb **);
143 1.1 ad static void mly_ccb_complete(struct mly_softc *, struct mly_ccb *);
144 1.1 ad static void mly_ccb_enqueue(struct mly_softc *, struct mly_ccb *);
145 1.1 ad static void mly_ccb_free(struct mly_softc *, struct mly_ccb *);
146 1.1 ad static int mly_ccb_map(struct mly_softc *, struct mly_ccb *);
147 1.1 ad static int mly_ccb_poll(struct mly_softc *, struct mly_ccb *, int);
148 1.1 ad static int mly_ccb_submit(struct mly_softc *, struct mly_ccb *);
149 1.1 ad static void mly_ccb_unmap(struct mly_softc *, struct mly_ccb *);
150 1.1 ad static int mly_ccb_wait(struct mly_softc *, struct mly_ccb *, int);
151 1.1 ad
152 1.1 ad static void mly_get_xfer_mode(struct mly_softc *, int,
153 1.1 ad struct scsipi_xfer_mode *);
154 1.1 ad static void mly_scsipi_complete(struct mly_softc *, struct mly_ccb *);
155 1.1 ad static int mly_scsipi_ioctl(struct scsipi_channel *, u_long, caddr_t,
156 1.1 ad int, struct proc *);
157 1.1 ad static void mly_scsipi_minphys(struct buf *);
158 1.1 ad static void mly_scsipi_request(struct scsipi_channel *,
159 1.1 ad scsipi_adapter_req_t, void *);
160 1.1 ad
161 1.1 ad static int mly_user_command(struct mly_softc *, struct mly_user_command *);
162 1.1 ad static int mly_user_health(struct mly_softc *, struct mly_user_health *);
163 1.1 ad
164 1.1 ad extern struct cfdriver mly_cd;
165 1.1 ad
166 1.13 thorpej CFATTACH_DECL(mly, sizeof(struct mly_softc),
167 1.14 thorpej mly_match, mly_attach, NULL, NULL);
168 1.11 gehenna
169 1.11 gehenna dev_type_open(mlyopen);
170 1.11 gehenna dev_type_close(mlyclose);
171 1.11 gehenna dev_type_ioctl(mlyioctl);
172 1.11 gehenna
173 1.11 gehenna const struct cdevsw mly_cdevsw = {
174 1.11 gehenna mlyopen, mlyclose, noread, nowrite, mlyioctl,
175 1.15 jdolecek nostop, notty, nopoll, nommap, nokqfilter,
176 1.1 ad };
177 1.1 ad
178 1.1 ad struct mly_ident {
179 1.1 ad u_short vendor;
180 1.1 ad u_short product;
181 1.1 ad u_short subvendor;
182 1.1 ad u_short subproduct;
183 1.1 ad int hwif;
184 1.1 ad const char *desc;
185 1.1 ad } static const mly_ident[] = {
186 1.1 ad {
187 1.1 ad PCI_VENDOR_MYLEX,
188 1.1 ad PCI_PRODUCT_MYLEX_EXTREMERAID,
189 1.1 ad PCI_VENDOR_MYLEX,
190 1.1 ad 0x0040,
191 1.1 ad MLY_HWIF_STRONGARM,
192 1.1 ad "eXtremeRAID 2000"
193 1.1 ad },
194 1.1 ad {
195 1.1 ad PCI_VENDOR_MYLEX,
196 1.1 ad PCI_PRODUCT_MYLEX_EXTREMERAID,
197 1.1 ad PCI_VENDOR_MYLEX,
198 1.1 ad 0x0030,
199 1.1 ad MLY_HWIF_STRONGARM,
200 1.1 ad "eXtremeRAID 3000"
201 1.1 ad },
202 1.1 ad {
203 1.1 ad PCI_VENDOR_MYLEX,
204 1.1 ad PCI_PRODUCT_MYLEX_ACCELERAID,
205 1.1 ad PCI_VENDOR_MYLEX,
206 1.1 ad 0x0050,
207 1.1 ad MLY_HWIF_I960RX,
208 1.1 ad "AcceleRAID 352"
209 1.1 ad },
210 1.1 ad {
211 1.1 ad PCI_VENDOR_MYLEX,
212 1.1 ad PCI_PRODUCT_MYLEX_ACCELERAID,
213 1.1 ad PCI_VENDOR_MYLEX,
214 1.1 ad 0x0052,
215 1.1 ad MLY_HWIF_I960RX,
216 1.1 ad "AcceleRAID 170"
217 1.1 ad },
218 1.1 ad {
219 1.1 ad PCI_VENDOR_MYLEX,
220 1.1 ad PCI_PRODUCT_MYLEX_ACCELERAID,
221 1.1 ad PCI_VENDOR_MYLEX,
222 1.1 ad 0x0054,
223 1.1 ad MLY_HWIF_I960RX,
224 1.1 ad "AcceleRAID 160"
225 1.1 ad },
226 1.1 ad };
227 1.1 ad
228 1.1 ad static void *mly_sdh;
229 1.1 ad
230 1.1 ad /*
231 1.1 ad * Try to find a `mly_ident' entry corresponding to this board.
232 1.1 ad */
233 1.1 ad static const struct mly_ident *
234 1.1 ad mly_find_ident(struct pci_attach_args *pa)
235 1.1 ad {
236 1.1 ad const struct mly_ident *mpi, *maxmpi;
237 1.1 ad pcireg_t reg;
238 1.1 ad
239 1.1 ad mpi = mly_ident;
240 1.1 ad maxmpi = mpi + sizeof(mly_ident) / sizeof(mly_ident[0]);
241 1.2 ad
242 1.2 ad if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O)
243 1.2 ad return (NULL);
244 1.1 ad
245 1.1 ad for (; mpi < maxmpi; mpi++) {
246 1.1 ad if (PCI_VENDOR(pa->pa_id) != mpi->vendor ||
247 1.1 ad PCI_PRODUCT(pa->pa_id) != mpi->product)
248 1.1 ad continue;
249 1.1 ad
250 1.1 ad if (mpi->subvendor == 0x0000)
251 1.1 ad return (mpi);
252 1.1 ad
253 1.1 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
254 1.1 ad
255 1.1 ad if (PCI_VENDOR(reg) == mpi->subvendor &&
256 1.1 ad PCI_PRODUCT(reg) == mpi->subproduct)
257 1.1 ad return (mpi);
258 1.1 ad }
259 1.1 ad
260 1.1 ad return (NULL);
261 1.1 ad }
262 1.1 ad
263 1.1 ad /*
264 1.1 ad * Match a supported board.
265 1.1 ad */
266 1.1 ad static int
267 1.1 ad mly_match(struct device *parent, struct cfdata *cfdata, void *aux)
268 1.1 ad {
269 1.1 ad
270 1.1 ad return (mly_find_ident(aux) != NULL);
271 1.1 ad }
272 1.1 ad
273 1.1 ad /*
274 1.1 ad * Attach a supported board.
275 1.1 ad */
276 1.1 ad static void
277 1.1 ad mly_attach(struct device *parent, struct device *self, void *aux)
278 1.1 ad {
279 1.1 ad struct pci_attach_args *pa;
280 1.1 ad struct mly_softc *mly;
281 1.1 ad struct mly_ioctl_getcontrollerinfo *mi;
282 1.1 ad const struct mly_ident *ident;
283 1.1 ad pci_chipset_tag_t pc;
284 1.1 ad pci_intr_handle_t ih;
285 1.1 ad bus_space_handle_t memh, ioh;
286 1.1 ad bus_space_tag_t memt, iot;
287 1.1 ad pcireg_t reg;
288 1.1 ad const char *intrstr;
289 1.1 ad int ior, memr, i, rv, state;
290 1.1 ad struct scsipi_adapter *adapt;
291 1.1 ad struct scsipi_channel *chan;
292 1.1 ad
293 1.1 ad mly = (struct mly_softc *)self;
294 1.1 ad pa = aux;
295 1.1 ad pc = pa->pa_pc;
296 1.1 ad ident = mly_find_ident(pa);
297 1.1 ad state = 0;
298 1.1 ad
299 1.1 ad mly->mly_dmat = pa->pa_dmat;
300 1.1 ad mly->mly_hwif = ident->hwif;
301 1.1 ad
302 1.1 ad printf(": Mylex %s\n", ident->desc);
303 1.1 ad
304 1.1 ad /*
305 1.1 ad * Map the PCI register window.
306 1.1 ad */
307 1.1 ad memr = -1;
308 1.1 ad ior = -1;
309 1.1 ad
310 1.1 ad for (i = 0x10; i <= 0x14; i += 4) {
311 1.1 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
312 1.1 ad
313 1.1 ad if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
314 1.1 ad if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
315 1.1 ad ior = i;
316 1.1 ad } else {
317 1.1 ad if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
318 1.1 ad memr = i;
319 1.1 ad }
320 1.1 ad }
321 1.1 ad
322 1.1 ad if (memr != -1)
323 1.1 ad if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
324 1.1 ad &memt, &memh, NULL, NULL))
325 1.1 ad memr = -1;
326 1.1 ad if (ior != -1)
327 1.1 ad if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
328 1.1 ad &iot, &ioh, NULL, NULL))
329 1.1 ad ior = -1;
330 1.1 ad
331 1.1 ad if (memr != -1) {
332 1.1 ad mly->mly_iot = memt;
333 1.1 ad mly->mly_ioh = memh;
334 1.1 ad } else if (ior != -1) {
335 1.1 ad mly->mly_iot = iot;
336 1.1 ad mly->mly_ioh = ioh;
337 1.1 ad } else {
338 1.1 ad printf("%s: can't map i/o or memory space\n", self->dv_xname);
339 1.1 ad return;
340 1.1 ad }
341 1.1 ad
342 1.1 ad /*
343 1.1 ad * Enable the device.
344 1.1 ad */
345 1.1 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
346 1.1 ad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
347 1.1 ad reg | PCI_COMMAND_MASTER_ENABLE);
348 1.1 ad
349 1.1 ad /*
350 1.1 ad * Map and establish the interrupt.
351 1.1 ad */
352 1.1 ad if (pci_intr_map(pa, &ih)) {
353 1.1 ad printf("%s: can't map interrupt\n", self->dv_xname);
354 1.1 ad return;
355 1.1 ad }
356 1.1 ad intrstr = pci_intr_string(pc, ih);
357 1.1 ad mly->mly_ih = pci_intr_establish(pc, ih, IPL_BIO, mly_intr, mly);
358 1.1 ad if (mly->mly_ih == NULL) {
359 1.1 ad printf("%s: can't establish interrupt", self->dv_xname);
360 1.1 ad if (intrstr != NULL)
361 1.1 ad printf(" at %s", intrstr);
362 1.1 ad printf("\n");
363 1.1 ad return;
364 1.1 ad }
365 1.1 ad
366 1.1 ad if (intrstr != NULL)
367 1.1 ad printf("%s: interrupting at %s\n", mly->mly_dv.dv_xname,
368 1.1 ad intrstr);
369 1.1 ad
370 1.1 ad /*
371 1.1 ad * Take care of interface-specific tasks.
372 1.1 ad */
373 1.1 ad switch (mly->mly_hwif) {
374 1.1 ad case MLY_HWIF_I960RX:
375 1.1 ad mly->mly_doorbell_true = 0x00;
376 1.1 ad mly->mly_cmd_mailbox = MLY_I960RX_COMMAND_MAILBOX;
377 1.1 ad mly->mly_status_mailbox = MLY_I960RX_STATUS_MAILBOX;
378 1.1 ad mly->mly_idbr = MLY_I960RX_IDBR;
379 1.1 ad mly->mly_odbr = MLY_I960RX_ODBR;
380 1.1 ad mly->mly_error_status = MLY_I960RX_ERROR_STATUS;
381 1.1 ad mly->mly_interrupt_status = MLY_I960RX_INTERRUPT_STATUS;
382 1.1 ad mly->mly_interrupt_mask = MLY_I960RX_INTERRUPT_MASK;
383 1.1 ad break;
384 1.1 ad
385 1.1 ad case MLY_HWIF_STRONGARM:
386 1.1 ad mly->mly_doorbell_true = 0xff;
387 1.1 ad mly->mly_cmd_mailbox = MLY_STRONGARM_COMMAND_MAILBOX;
388 1.1 ad mly->mly_status_mailbox = MLY_STRONGARM_STATUS_MAILBOX;
389 1.1 ad mly->mly_idbr = MLY_STRONGARM_IDBR;
390 1.1 ad mly->mly_odbr = MLY_STRONGARM_ODBR;
391 1.1 ad mly->mly_error_status = MLY_STRONGARM_ERROR_STATUS;
392 1.1 ad mly->mly_interrupt_status = MLY_STRONGARM_INTERRUPT_STATUS;
393 1.1 ad mly->mly_interrupt_mask = MLY_STRONGARM_INTERRUPT_MASK;
394 1.1 ad break;
395 1.1 ad }
396 1.1 ad
397 1.1 ad /*
398 1.1 ad * Allocate and map the scatter/gather lists.
399 1.1 ad */
400 1.1 ad rv = mly_dmamem_alloc(mly, MLY_SGL_SIZE * MLY_MAX_CCBS,
401 1.1 ad &mly->mly_sg_dmamap, (caddr_t *)&mly->mly_sg,
402 1.1 ad &mly->mly_sg_busaddr, &mly->mly_sg_seg);
403 1.1 ad if (rv) {
404 1.1 ad printf("%s: unable to allocate S/G maps\n",
405 1.1 ad mly->mly_dv.dv_xname);
406 1.1 ad goto bad;
407 1.1 ad }
408 1.1 ad state++;
409 1.1 ad
410 1.1 ad /*
411 1.1 ad * Allocate and map the memory mailbox.
412 1.1 ad */
413 1.1 ad rv = mly_dmamem_alloc(mly, sizeof(struct mly_mmbox),
414 1.1 ad &mly->mly_mmbox_dmamap, (caddr_t *)&mly->mly_mmbox,
415 1.1 ad &mly->mly_mmbox_busaddr, &mly->mly_mmbox_seg);
416 1.1 ad if (rv) {
417 1.1 ad printf("%s: unable to allocate mailboxes\n",
418 1.1 ad mly->mly_dv.dv_xname);
419 1.1 ad goto bad;
420 1.1 ad }
421 1.1 ad state++;
422 1.1 ad
423 1.1 ad /*
424 1.1 ad * Initialise per-controller queues.
425 1.1 ad */
426 1.1 ad SLIST_INIT(&mly->mly_ccb_free);
427 1.1 ad SIMPLEQ_INIT(&mly->mly_ccb_queue);
428 1.1 ad
429 1.1 ad /*
430 1.1 ad * Disable interrupts before we start talking to the controller.
431 1.1 ad */
432 1.1 ad mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);
433 1.1 ad
434 1.1 ad /*
435 1.1 ad * Wait for the controller to come ready, handshaking with the
436 1.1 ad * firmware if required. This is typically only necessary on
437 1.1 ad * platforms where the controller BIOS does not run.
438 1.1 ad */
439 1.1 ad if (mly_fwhandshake(mly)) {
440 1.1 ad printf("%s: unable to bring controller online\n",
441 1.1 ad mly->mly_dv.dv_xname);
442 1.1 ad goto bad;
443 1.1 ad }
444 1.1 ad
445 1.1 ad /*
446 1.1 ad * Allocate initial command buffers, obtain controller feature
447 1.1 ad * information, and then reallocate command buffers, since we'll
448 1.1 ad * know how many we want.
449 1.1 ad */
450 1.1 ad if (mly_alloc_ccbs(mly)) {
451 1.1 ad printf("%s: unable to allocate CCBs\n",
452 1.1 ad mly->mly_dv.dv_xname);
453 1.1 ad goto bad;
454 1.1 ad }
455 1.1 ad state++;
456 1.1 ad if (mly_get_controllerinfo(mly)) {
457 1.1 ad printf("%s: unable to retrieve controller info\n",
458 1.1 ad mly->mly_dv.dv_xname);
459 1.1 ad goto bad;
460 1.1 ad }
461 1.1 ad mly_release_ccbs(mly);
462 1.1 ad if (mly_alloc_ccbs(mly)) {
463 1.1 ad printf("%s: unable to allocate CCBs\n",
464 1.1 ad mly->mly_dv.dv_xname);
465 1.1 ad state--;
466 1.1 ad goto bad;
467 1.1 ad }
468 1.1 ad
469 1.1 ad /*
470 1.1 ad * Get the current event counter for health purposes, populate the
471 1.1 ad * initial health status buffer.
472 1.1 ad */
473 1.1 ad if (mly_get_eventstatus(mly)) {
474 1.1 ad printf("%s: unable to retrieve event status\n",
475 1.1 ad mly->mly_dv.dv_xname);
476 1.1 ad goto bad;
477 1.1 ad }
478 1.1 ad
479 1.1 ad /*
480 1.1 ad * Enable memory-mailbox mode.
481 1.1 ad */
482 1.1 ad if (mly_enable_mmbox(mly)) {
483 1.1 ad printf("%s: unable to enable memory mailbox\n",
484 1.1 ad mly->mly_dv.dv_xname);
485 1.1 ad goto bad;
486 1.1 ad }
487 1.1 ad
488 1.1 ad /*
489 1.1 ad * Print a little information about the controller.
490 1.1 ad */
491 1.1 ad mi = mly->mly_controllerinfo;
492 1.1 ad
493 1.1 ad printf("%s: %d physical channel%s, firmware %d.%02d-%d-%02d "
494 1.1 ad "(%02d%02d%02d%02d), %dMB RAM\n", mly->mly_dv.dv_xname,
495 1.1 ad mi->physical_channels_present,
496 1.1 ad (mi->physical_channels_present) > 1 ? "s" : "",
497 1.1 ad mi->fw_major, mi->fw_minor, mi->fw_turn, mi->fw_build,
498 1.1 ad mi->fw_century, mi->fw_year, mi->fw_month, mi->fw_day,
499 1.1 ad le16toh(mi->memory_size));
500 1.1 ad
501 1.1 ad /*
502 1.1 ad * Register our `shutdownhook'.
503 1.1 ad */
504 1.1 ad if (mly_sdh == NULL)
505 1.1 ad shutdownhook_establish(mly_shutdown, NULL);
506 1.1 ad
507 1.1 ad /*
508 1.1 ad * Clear any previous BTL information. For each bus that scsipi
509 1.1 ad * wants to scan, we'll receive the SCBUSIOLLSCAN ioctl and retrieve
510 1.1 ad * all BTL info at that point.
511 1.1 ad */
512 1.1 ad memset(&mly->mly_btl, 0, sizeof(mly->mly_btl));
513 1.1 ad
514 1.1 ad mly->mly_nchans = mly->mly_controllerinfo->physical_channels_present +
515 1.1 ad mly->mly_controllerinfo->virtual_channels_present;
516 1.1 ad
517 1.1 ad /*
518 1.1 ad * Attach to scsipi.
519 1.1 ad */
520 1.1 ad adapt = &mly->mly_adapt;
521 1.1 ad memset(adapt, 0, sizeof(*adapt));
522 1.1 ad adapt->adapt_dev = &mly->mly_dv;
523 1.1 ad adapt->adapt_nchannels = mly->mly_nchans;
524 1.1 ad adapt->adapt_openings = mly->mly_ncmds - MLY_CCBS_RESV;
525 1.1 ad adapt->adapt_max_periph = mly->mly_ncmds - MLY_CCBS_RESV;
526 1.1 ad adapt->adapt_request = mly_scsipi_request;
527 1.1 ad adapt->adapt_minphys = mly_scsipi_minphys;
528 1.1 ad adapt->adapt_ioctl = mly_scsipi_ioctl;
529 1.1 ad
530 1.1 ad for (i = 0; i < mly->mly_nchans; i++) {
531 1.1 ad chan = &mly->mly_chans[i];
532 1.1 ad memset(chan, 0, sizeof(*chan));
533 1.1 ad chan->chan_adapter = adapt;
534 1.1 ad chan->chan_bustype = &scsi_bustype;
535 1.1 ad chan->chan_channel = i;
536 1.1 ad chan->chan_ntargets = MLY_MAX_TARGETS;
537 1.1 ad chan->chan_nluns = MLY_MAX_LUNS;
538 1.1 ad chan->chan_id = mly->mly_controllerparam->initiator_id;
539 1.1 ad chan->chan_flags = SCSIPI_CHAN_NOSETTLE;
540 1.1 ad config_found(&mly->mly_dv, chan, scsiprint);
541 1.1 ad }
542 1.1 ad
543 1.1 ad /*
544 1.1 ad * Now enable interrupts...
545 1.1 ad */
546 1.1 ad mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);
547 1.1 ad
548 1.1 ad /*
549 1.1 ad * Finally, create our monitoring thread.
550 1.1 ad */
551 1.1 ad kthread_create(mly_thread_create, mly);
552 1.1 ad
553 1.1 ad mly->mly_state |= MLY_STATE_INITOK;
554 1.1 ad return;
555 1.1 ad
556 1.1 ad bad:
557 1.1 ad if (state > 2)
558 1.1 ad mly_release_ccbs(mly);
559 1.1 ad if (state > 1)
560 1.1 ad mly_dmamem_free(mly, sizeof(struct mly_mmbox),
561 1.1 ad mly->mly_mmbox_dmamap, (caddr_t)mly->mly_mmbox,
562 1.1 ad &mly->mly_mmbox_seg);
563 1.1 ad if (state > 0)
564 1.1 ad mly_dmamem_free(mly, MLY_SGL_SIZE * MLY_MAX_CCBS,
565 1.1 ad mly->mly_sg_dmamap, (caddr_t)mly->mly_sg,
566 1.1 ad &mly->mly_sg_seg);
567 1.1 ad }
568 1.1 ad
569 1.1 ad /*
570 1.1 ad * Scan all possible devices on the specified channel.
571 1.1 ad */
572 1.1 ad static void
573 1.1 ad mly_scan_channel(struct mly_softc *mly, int bus)
574 1.1 ad {
575 1.3 ad int s, target;
576 1.1 ad
577 1.3 ad for (target = 0; target < MLY_MAX_TARGETS; target++) {
578 1.3 ad s = splbio();
579 1.3 ad if (!mly_scan_btl(mly, bus, target)) {
580 1.3 ad tsleep(&mly->mly_btl[bus][target], PRIBIO, "mlyscan",
581 1.3 ad 0);
582 1.3 ad }
583 1.3 ad splx(s);
584 1.1 ad }
585 1.1 ad }
586 1.1 ad
587 1.1 ad /*
588 1.1 ad * Shut down all configured `mly' devices.
589 1.1 ad */
590 1.1 ad static void
591 1.1 ad mly_shutdown(void *cookie)
592 1.1 ad {
593 1.1 ad struct mly_softc *mly;
594 1.1 ad int i;
595 1.1 ad
596 1.1 ad for (i = 0; i < mly_cd.cd_ndevs; i++) {
597 1.1 ad if ((mly = device_lookup(&mly_cd, i)) == NULL)
598 1.1 ad continue;
599 1.1 ad
600 1.1 ad if (mly_flush(mly))
601 1.1 ad printf("%s: unable to flush cache\n",
602 1.1 ad mly->mly_dv.dv_xname);
603 1.1 ad }
604 1.1 ad }
605 1.1 ad
606 1.1 ad /*
607 1.1 ad * Fill in the mly_controllerinfo and mly_controllerparam fields in the
608 1.1 ad * softc.
609 1.1 ad */
610 1.1 ad static int
611 1.1 ad mly_get_controllerinfo(struct mly_softc *mly)
612 1.1 ad {
613 1.1 ad struct mly_cmd_ioctl mci;
614 1.1 ad int rv;
615 1.1 ad
616 1.1 ad /*
617 1.1 ad * Build the getcontrollerinfo ioctl and send it.
618 1.1 ad */
619 1.1 ad memset(&mci, 0, sizeof(mci));
620 1.1 ad mci.sub_ioctl = MDACIOCTL_GETCONTROLLERINFO;
621 1.1 ad rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerinfo,
622 1.1 ad sizeof(*mly->mly_controllerinfo), NULL, NULL);
623 1.1 ad if (rv != 0)
624 1.1 ad return (rv);
625 1.1 ad
626 1.1 ad /*
627 1.1 ad * Build the getcontrollerparameter ioctl and send it.
628 1.1 ad */
629 1.1 ad memset(&mci, 0, sizeof(mci));
630 1.1 ad mci.sub_ioctl = MDACIOCTL_GETCONTROLLERPARAMETER;
631 1.1 ad rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerparam,
632 1.1 ad sizeof(*mly->mly_controllerparam), NULL, NULL);
633 1.1 ad
634 1.1 ad return (rv);
635 1.1 ad }
636 1.1 ad
637 1.1 ad /*
638 1.1 ad * Rescan a device, possibly as a consequence of getting an event which
639 1.1 ad * suggests that it may have changed. Must be called with interrupts
640 1.1 ad * blocked.
641 1.1 ad */
642 1.1 ad static int
643 1.1 ad mly_scan_btl(struct mly_softc *mly, int bus, int target)
644 1.1 ad {
645 1.1 ad struct mly_ccb *mc;
646 1.1 ad struct mly_cmd_ioctl *mci;
647 1.1 ad int rv;
648 1.1 ad
649 1.1 ad if (target == mly->mly_controllerparam->initiator_id) {
650 1.1 ad mly->mly_btl[bus][target].mb_flags = MLY_BTL_PROTECTED;
651 1.1 ad return (EIO);
652 1.1 ad }
653 1.1 ad
654 1.1 ad /* Don't re-scan if a scan is already in progress. */
655 1.1 ad if ((mly->mly_btl[bus][target].mb_flags & MLY_BTL_SCANNING) != 0)
656 1.1 ad return (EBUSY);
657 1.1 ad
658 1.1 ad /* Get a command. */
659 1.1 ad if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
660 1.1 ad return (rv);
661 1.1 ad
662 1.1 ad /* Set up the data buffer. */
663 1.1 ad mc->mc_data = malloc(sizeof(union mly_devinfo),
664 1.9 tsutsui M_DEVBUF, M_NOWAIT|M_ZERO);
665 1.1 ad
666 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
667 1.1 ad mc->mc_complete = mly_complete_rescan;
668 1.1 ad
669 1.1 ad /*
670 1.1 ad * Build the ioctl.
671 1.1 ad */
672 1.1 ad mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
673 1.1 ad mci->opcode = MDACMD_IOCTL;
674 1.1 ad mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
675 1.1 ad memset(&mci->param, 0, sizeof(mci->param));
676 1.1 ad
677 1.1 ad if (MLY_BUS_IS_VIRTUAL(mly, bus)) {
678 1.1 ad mc->mc_length = sizeof(struct mly_ioctl_getlogdevinfovalid);
679 1.1 ad mci->data_size = htole32(mc->mc_length);
680 1.1 ad mci->sub_ioctl = MDACIOCTL_GETLOGDEVINFOVALID;
681 1.1 ad _lto3l(MLY_LOGADDR(0, MLY_LOGDEV_ID(mly, bus, target)),
682 1.1 ad mci->addr);
683 1.1 ad } else {
684 1.1 ad mc->mc_length = sizeof(struct mly_ioctl_getphysdevinfovalid);
685 1.1 ad mci->data_size = htole32(mc->mc_length);
686 1.1 ad mci->sub_ioctl = MDACIOCTL_GETPHYSDEVINFOVALID;
687 1.1 ad _lto3l(MLY_PHYADDR(0, bus, target, 0), mci->addr);
688 1.1 ad }
689 1.1 ad
690 1.1 ad /*
691 1.1 ad * Dispatch the command.
692 1.1 ad */
693 1.3 ad if ((rv = mly_ccb_map(mly, mc)) != 0) {
694 1.3 ad free(mc->mc_data, M_DEVBUF);
695 1.3 ad mly_ccb_free(mly, mc);
696 1.3 ad return(rv);
697 1.3 ad }
698 1.3 ad
699 1.1 ad mly->mly_btl[bus][target].mb_flags |= MLY_BTL_SCANNING;
700 1.1 ad mly_ccb_enqueue(mly, mc);
701 1.1 ad return (0);
702 1.1 ad }
703 1.1 ad
704 1.1 ad /*
705 1.1 ad * Handle the completion of a rescan operation.
706 1.1 ad */
707 1.1 ad static void
708 1.1 ad mly_complete_rescan(struct mly_softc *mly, struct mly_ccb *mc)
709 1.1 ad {
710 1.1 ad struct mly_ioctl_getlogdevinfovalid *ldi;
711 1.1 ad struct mly_ioctl_getphysdevinfovalid *pdi;
712 1.1 ad struct mly_cmd_ioctl *mci;
713 1.1 ad struct mly_btl btl, *btlp;
714 1.1 ad struct scsipi_xfer_mode xm;
715 1.1 ad int bus, target, rescan;
716 1.1 ad u_int tmp;
717 1.1 ad
718 1.1 ad mly_ccb_unmap(mly, mc);
719 1.1 ad
720 1.1 ad /*
721 1.1 ad * Recover the bus and target from the command. We need these even
722 1.1 ad * in the case where we don't have a useful response.
723 1.1 ad */
724 1.1 ad mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
725 1.1 ad tmp = _3ltol(mci->addr);
726 1.1 ad rescan = 0;
727 1.1 ad
728 1.1 ad if (mci->sub_ioctl == MDACIOCTL_GETLOGDEVINFOVALID) {
729 1.1 ad bus = MLY_LOGDEV_BUS(mly, MLY_LOGADDR_DEV(tmp));
730 1.1 ad target = MLY_LOGDEV_TARGET(mly, MLY_LOGADDR_DEV(tmp));
731 1.1 ad } else {
732 1.1 ad bus = MLY_PHYADDR_CHANNEL(tmp);
733 1.1 ad target = MLY_PHYADDR_TARGET(tmp);
734 1.1 ad }
735 1.1 ad
736 1.1 ad btlp = &mly->mly_btl[bus][target];
737 1.1 ad
738 1.1 ad /* The default result is 'no device'. */
739 1.1 ad memset(&btl, 0, sizeof(btl));
740 1.1 ad btl.mb_flags = MLY_BTL_PROTECTED;
741 1.1 ad
742 1.1 ad /* If the rescan completed OK, we have possibly-new BTL data. */
743 1.1 ad if (mc->mc_status != 0)
744 1.1 ad goto out;
745 1.1 ad
746 1.1 ad if (mc->mc_length == sizeof(*ldi)) {
747 1.1 ad ldi = (struct mly_ioctl_getlogdevinfovalid *)mc->mc_data;
748 1.1 ad tmp = le32toh(ldi->logical_device_number);
749 1.1 ad
750 1.1 ad if (MLY_LOGDEV_BUS(mly, tmp) != bus ||
751 1.1 ad MLY_LOGDEV_TARGET(mly, tmp) != target) {
752 1.3 ad #ifdef MLYDEBUG
753 1.1 ad printf("%s: WARNING: BTL rescan (logical) for %d:%d "
754 1.1 ad "returned data for %d:%d instead\n",
755 1.1 ad mly->mly_dv.dv_xname, bus, target,
756 1.1 ad MLY_LOGDEV_BUS(mly, tmp),
757 1.1 ad MLY_LOGDEV_TARGET(mly, tmp));
758 1.1 ad #endif
759 1.1 ad goto out;
760 1.1 ad }
761 1.1 ad
762 1.1 ad btl.mb_flags = MLY_BTL_LOGICAL | MLY_BTL_TQING;
763 1.1 ad btl.mb_type = ldi->raid_level;
764 1.1 ad btl.mb_state = ldi->state;
765 1.1 ad } else if (mc->mc_length == sizeof(*pdi)) {
766 1.1 ad pdi = (struct mly_ioctl_getphysdevinfovalid *)mc->mc_data;
767 1.1 ad
768 1.1 ad if (pdi->channel != bus || pdi->target != target) {
769 1.3 ad #ifdef MLYDEBUG
770 1.1 ad printf("%s: WARNING: BTL rescan (physical) for %d:%d "
771 1.1 ad " returned data for %d:%d instead\n",
772 1.1 ad mly->mly_dv.dv_xname,
773 1.1 ad bus, target, pdi->channel, pdi->target);
774 1.1 ad #endif
775 1.1 ad goto out;
776 1.1 ad }
777 1.1 ad
778 1.1 ad btl.mb_flags = MLY_BTL_PHYSICAL;
779 1.1 ad btl.mb_type = MLY_DEVICE_TYPE_PHYSICAL;
780 1.1 ad btl.mb_state = pdi->state;
781 1.1 ad btl.mb_speed = pdi->speed;
782 1.1 ad btl.mb_width = pdi->width;
783 1.1 ad
784 1.1 ad if (pdi->state != MLY_DEVICE_STATE_UNCONFIGURED)
785 1.1 ad btl.mb_flags |= MLY_BTL_PROTECTED;
786 1.1 ad if (pdi->command_tags != 0)
787 1.1 ad btl.mb_flags |= MLY_BTL_TQING;
788 1.1 ad } else {
789 1.1 ad printf("%s: BTL rescan result invalid\n", mly->mly_dv.dv_xname);
790 1.1 ad goto out;
791 1.1 ad }
792 1.1 ad
793 1.1 ad /* Decide whether we need to rescan the device. */
794 1.1 ad if (btl.mb_flags != btlp->mb_flags ||
795 1.1 ad btl.mb_speed != btlp->mb_speed ||
796 1.1 ad btl.mb_width != btlp->mb_width)
797 1.1 ad rescan = 1;
798 1.1 ad
799 1.1 ad out:
800 1.1 ad *btlp = btl;
801 1.1 ad
802 1.1 ad if (rescan && (btl.mb_flags & MLY_BTL_PROTECTED) == 0) {
803 1.1 ad xm.xm_target = target;
804 1.1 ad mly_get_xfer_mode(mly, bus, &xm);
805 1.1 ad /* XXX SCSI mid-layer rescan goes here. */
806 1.1 ad }
807 1.1 ad
808 1.1 ad /* Wake anybody waiting on the device to be rescanned. */
809 1.1 ad wakeup(btlp);
810 1.1 ad
811 1.1 ad free(mc->mc_data, M_DEVBUF);
812 1.1 ad mly_ccb_free(mly, mc);
813 1.1 ad }
814 1.1 ad
815 1.1 ad /*
816 1.1 ad * Get the current health status and set the 'next event' counter to suit.
817 1.1 ad */
818 1.1 ad static int
819 1.1 ad mly_get_eventstatus(struct mly_softc *mly)
820 1.1 ad {
821 1.1 ad struct mly_cmd_ioctl mci;
822 1.1 ad struct mly_health_status *mh;
823 1.1 ad int rv;
824 1.1 ad
825 1.1 ad /* Build the gethealthstatus ioctl and send it. */
826 1.1 ad memset(&mci, 0, sizeof(mci));
827 1.1 ad mh = NULL;
828 1.1 ad mci.sub_ioctl = MDACIOCTL_GETHEALTHSTATUS;
829 1.1 ad
830 1.16 thorpej rv = mly_ioctl(mly, &mci, (void *)&mh, sizeof(*mh), NULL, NULL);
831 1.1 ad if (rv)
832 1.1 ad return (rv);
833 1.1 ad
834 1.1 ad /* Get the event counter. */
835 1.1 ad mly->mly_event_change = le32toh(mh->change_counter);
836 1.1 ad mly->mly_event_waiting = le32toh(mh->next_event);
837 1.1 ad mly->mly_event_counter = le32toh(mh->next_event);
838 1.1 ad
839 1.1 ad /* Save the health status into the memory mailbox */
840 1.1 ad memcpy(&mly->mly_mmbox->mmm_health.status, mh, sizeof(*mh));
841 1.1 ad
842 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
843 1.1 ad offsetof(struct mly_mmbox, mmm_health),
844 1.1 ad sizeof(mly->mly_mmbox->mmm_health),
845 1.1 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
846 1.1 ad
847 1.1 ad free(mh, M_DEVBUF);
848 1.1 ad return (0);
849 1.1 ad }
850 1.1 ad
851 1.1 ad /*
852 1.3 ad * Enable memory mailbox mode.
853 1.1 ad */
854 1.1 ad static int
855 1.1 ad mly_enable_mmbox(struct mly_softc *mly)
856 1.1 ad {
857 1.1 ad struct mly_cmd_ioctl mci;
858 1.1 ad u_int8_t *sp;
859 1.1 ad u_int64_t tmp;
860 1.1 ad int rv;
861 1.1 ad
862 1.1 ad /* Build the ioctl and send it. */
863 1.1 ad memset(&mci, 0, sizeof(mci));
864 1.1 ad mci.sub_ioctl = MDACIOCTL_SETMEMORYMAILBOX;
865 1.1 ad
866 1.1 ad /* Set buffer addresses. */
867 1.1 ad tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_command);
868 1.1 ad mci.param.setmemorymailbox.command_mailbox_physaddr = htole64(tmp);
869 1.1 ad
870 1.1 ad tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_status);
871 1.1 ad mci.param.setmemorymailbox.status_mailbox_physaddr = htole64(tmp);
872 1.1 ad
873 1.1 ad tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_health);
874 1.1 ad mci.param.setmemorymailbox.health_buffer_physaddr = htole64(tmp);
875 1.1 ad
876 1.1 ad /* Set buffer sizes - abuse of data_size field is revolting. */
877 1.1 ad sp = (u_int8_t *)&mci.data_size;
878 1.1 ad sp[0] = (sizeof(union mly_cmd_packet) * MLY_MMBOX_COMMANDS) >> 10;
879 1.1 ad sp[1] = (sizeof(union mly_status_packet) * MLY_MMBOX_STATUS) >> 10;
880 1.1 ad mci.param.setmemorymailbox.health_buffer_size =
881 1.1 ad sizeof(union mly_health_region) >> 10;
882 1.1 ad
883 1.1 ad rv = mly_ioctl(mly, &mci, NULL, 0, NULL, NULL);
884 1.1 ad if (rv)
885 1.1 ad return (rv);
886 1.1 ad
887 1.1 ad mly->mly_state |= MLY_STATE_MMBOX_ACTIVE;
888 1.1 ad return (0);
889 1.1 ad }
890 1.1 ad
891 1.1 ad /*
892 1.1 ad * Flush all pending I/O from the controller.
893 1.1 ad */
894 1.1 ad static int
895 1.1 ad mly_flush(struct mly_softc *mly)
896 1.1 ad {
897 1.1 ad struct mly_cmd_ioctl mci;
898 1.1 ad
899 1.1 ad /* Build the ioctl */
900 1.1 ad memset(&mci, 0, sizeof(mci));
901 1.1 ad mci.sub_ioctl = MDACIOCTL_FLUSHDEVICEDATA;
902 1.1 ad mci.param.deviceoperation.operation_device =
903 1.1 ad MLY_OPDEVICE_PHYSICAL_CONTROLLER;
904 1.1 ad
905 1.1 ad /* Pass it off to the controller */
906 1.1 ad return (mly_ioctl(mly, &mci, NULL, 0, NULL, NULL));
907 1.1 ad }
908 1.1 ad
909 1.1 ad /*
910 1.1 ad * Perform an ioctl command.
911 1.1 ad *
912 1.3 ad * If (data) is not NULL, the command requires data transfer to the
913 1.3 ad * controller. If (*data) is NULL the command requires data transfer from
914 1.3 ad * the controller, and we will allocate a buffer for it.
915 1.1 ad */
916 1.1 ad static int
917 1.1 ad mly_ioctl(struct mly_softc *mly, struct mly_cmd_ioctl *ioctl, void **data,
918 1.1 ad size_t datasize, void *sense_buffer,
919 1.1 ad size_t *sense_length)
920 1.1 ad {
921 1.1 ad struct mly_ccb *mc;
922 1.1 ad struct mly_cmd_ioctl *mci;
923 1.1 ad u_int8_t status;
924 1.1 ad int rv;
925 1.1 ad
926 1.1 ad mc = NULL;
927 1.1 ad if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
928 1.1 ad goto bad;
929 1.1 ad
930 1.1 ad /*
931 1.1 ad * Copy the ioctl structure, but save some important fields and then
932 1.1 ad * fixup.
933 1.1 ad */
934 1.1 ad mci = &mc->mc_packet->ioctl;
935 1.1 ad ioctl->sense_buffer_address = htole64(mci->sense_buffer_address);
936 1.1 ad ioctl->maximum_sense_size = mci->maximum_sense_size;
937 1.1 ad *mci = *ioctl;
938 1.1 ad mci->opcode = MDACMD_IOCTL;
939 1.1 ad mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
940 1.1 ad
941 1.1 ad /* Handle the data buffer. */
942 1.1 ad if (data != NULL) {
943 1.1 ad if (*data == NULL) {
944 1.1 ad /* Allocate data buffer */
945 1.1 ad mc->mc_data = malloc(datasize, M_DEVBUF, M_NOWAIT);
946 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
947 1.1 ad } else {
948 1.1 ad mc->mc_data = *data;
949 1.1 ad mc->mc_flags |= MLY_CCB_DATAOUT;
950 1.1 ad }
951 1.1 ad mc->mc_length = datasize;
952 1.1 ad mc->mc_packet->generic.data_size = htole32(datasize);
953 1.1 ad }
954 1.1 ad
955 1.1 ad /* Run the command. */
956 1.1 ad if (datasize > 0)
957 1.1 ad if ((rv = mly_ccb_map(mly, mc)) != 0)
958 1.1 ad goto bad;
959 1.1 ad rv = mly_ccb_poll(mly, mc, 30000);
960 1.1 ad if (datasize > 0)
961 1.1 ad mly_ccb_unmap(mly, mc);
962 1.1 ad if (rv != 0)
963 1.1 ad goto bad;
964 1.1 ad
965 1.1 ad /* Clean up and return any data. */
966 1.1 ad status = mc->mc_status;
967 1.1 ad
968 1.1 ad if (status != 0)
969 1.1 ad printf("mly_ioctl: command status %d\n", status);
970 1.1 ad
971 1.1 ad if (mc->mc_sense > 0 && sense_buffer != NULL) {
972 1.1 ad memcpy(sense_buffer, mc->mc_packet, mc->mc_sense);
973 1.1 ad *sense_length = mc->mc_sense;
974 1.1 ad goto bad;
975 1.1 ad }
976 1.1 ad
977 1.1 ad /* Should we return a data pointer? */
978 1.1 ad if (data != NULL && *data == NULL)
979 1.1 ad *data = mc->mc_data;
980 1.1 ad
981 1.1 ad /* Command completed OK. */
982 1.1 ad rv = (status != 0 ? EIO : 0);
983 1.1 ad
984 1.1 ad bad:
985 1.1 ad if (mc != NULL) {
986 1.1 ad /* Do we need to free a data buffer we allocated? */
987 1.1 ad if (rv != 0 && mc->mc_data != NULL && *data == NULL)
988 1.1 ad free(mc->mc_data, M_DEVBUF);
989 1.1 ad mly_ccb_free(mly, mc);
990 1.1 ad }
991 1.1 ad
992 1.1 ad return (rv);
993 1.1 ad }
994 1.1 ad
995 1.1 ad /*
996 1.1 ad * Check for event(s) outstanding in the controller.
997 1.1 ad */
998 1.1 ad static void
999 1.1 ad mly_check_event(struct mly_softc *mly)
1000 1.1 ad {
1001 1.1 ad
1002 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1003 1.1 ad offsetof(struct mly_mmbox, mmm_health),
1004 1.1 ad sizeof(mly->mly_mmbox->mmm_health),
1005 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1006 1.1 ad
1007 1.1 ad /*
1008 1.1 ad * The controller may have updated the health status information, so
1009 1.1 ad * check for it here. Note that the counters are all in host
1010 1.1 ad * memory, so this check is very cheap. Also note that we depend on
1011 1.1 ad * checking on completion
1012 1.1 ad */
1013 1.1 ad if (le32toh(mly->mly_mmbox->mmm_health.status.change_counter) !=
1014 1.1 ad mly->mly_event_change) {
1015 1.1 ad mly->mly_event_change =
1016 1.1 ad le32toh(mly->mly_mmbox->mmm_health.status.change_counter);
1017 1.1 ad mly->mly_event_waiting =
1018 1.1 ad le32toh(mly->mly_mmbox->mmm_health.status.next_event);
1019 1.1 ad
1020 1.1 ad /* Wake up anyone that might be interested in this. */
1021 1.1 ad wakeup(&mly->mly_event_change);
1022 1.1 ad }
1023 1.1 ad
1024 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1025 1.1 ad offsetof(struct mly_mmbox, mmm_health),
1026 1.1 ad sizeof(mly->mly_mmbox->mmm_health),
1027 1.1 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1028 1.1 ad
1029 1.1 ad if (mly->mly_event_counter != mly->mly_event_waiting)
1030 1.1 ad mly_fetch_event(mly);
1031 1.1 ad }
1032 1.1 ad
1033 1.1 ad /*
1034 1.1 ad * Fetch one event from the controller. If we fail due to resource
1035 1.1 ad * starvation, we'll be retried the next time a command completes.
1036 1.1 ad */
1037 1.1 ad static void
1038 1.1 ad mly_fetch_event(struct mly_softc *mly)
1039 1.1 ad {
1040 1.1 ad struct mly_ccb *mc;
1041 1.1 ad struct mly_cmd_ioctl *mci;
1042 1.1 ad int s;
1043 1.1 ad u_int32_t event;
1044 1.1 ad
1045 1.1 ad /* Get a command. */
1046 1.1 ad if (mly_ccb_alloc(mly, &mc))
1047 1.1 ad return;
1048 1.1 ad
1049 1.1 ad /* Set up the data buffer. */
1050 1.9 tsutsui mc->mc_data = malloc(sizeof(struct mly_event), M_DEVBUF,
1051 1.9 tsutsui M_NOWAIT|M_ZERO);
1052 1.1 ad
1053 1.1 ad mc->mc_length = sizeof(struct mly_event);
1054 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
1055 1.1 ad mc->mc_complete = mly_complete_event;
1056 1.1 ad
1057 1.1 ad /*
1058 1.1 ad * Get an event number to fetch. It's possible that we've raced
1059 1.1 ad * with another context for the last event, in which case there will
1060 1.1 ad * be no more events.
1061 1.1 ad */
1062 1.1 ad s = splbio();
1063 1.1 ad if (mly->mly_event_counter == mly->mly_event_waiting) {
1064 1.1 ad splx(s);
1065 1.1 ad free(mc->mc_data, M_DEVBUF);
1066 1.1 ad mly_ccb_free(mly, mc);
1067 1.1 ad return;
1068 1.1 ad }
1069 1.1 ad event = mly->mly_event_counter++;
1070 1.1 ad splx(s);
1071 1.1 ad
1072 1.1 ad /*
1073 1.1 ad * Build the ioctl.
1074 1.1 ad *
1075 1.1 ad * At this point we are committed to sending this request, as it
1076 1.1 ad * will be the only one constructed for this particular event
1077 1.1 ad * number.
1078 1.1 ad */
1079 1.1 ad mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
1080 1.1 ad mci->opcode = MDACMD_IOCTL;
1081 1.1 ad mci->data_size = htole32(sizeof(struct mly_event));
1082 1.1 ad _lto3l(MLY_PHYADDR(0, 0, (event >> 16) & 0xff, (event >> 24) & 0xff),
1083 1.1 ad mci->addr);
1084 1.1 ad mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
1085 1.1 ad mci->sub_ioctl = MDACIOCTL_GETEVENT;
1086 1.1 ad mci->param.getevent.sequence_number_low = htole16(event & 0xffff);
1087 1.1 ad
1088 1.1 ad /*
1089 1.1 ad * Submit the command.
1090 1.1 ad */
1091 1.1 ad if (mly_ccb_map(mly, mc) != 0)
1092 1.1 ad goto bad;
1093 1.1 ad mly_ccb_enqueue(mly, mc);
1094 1.1 ad return;
1095 1.1 ad
1096 1.1 ad bad:
1097 1.1 ad printf("%s: couldn't fetch event %u\n", mly->mly_dv.dv_xname, event);
1098 1.1 ad free(mc->mc_data, M_DEVBUF);
1099 1.1 ad mly_ccb_free(mly, mc);
1100 1.1 ad }
1101 1.1 ad
1102 1.1 ad /*
1103 1.1 ad * Handle the completion of an event poll.
1104 1.1 ad */
1105 1.1 ad static void
1106 1.1 ad mly_complete_event(struct mly_softc *mly, struct mly_ccb *mc)
1107 1.1 ad {
1108 1.1 ad struct mly_event *me;
1109 1.1 ad
1110 1.1 ad me = (struct mly_event *)mc->mc_data;
1111 1.1 ad mly_ccb_unmap(mly, mc);
1112 1.1 ad mly_ccb_free(mly, mc);
1113 1.1 ad
1114 1.1 ad /* If the event was successfully fetched, process it. */
1115 1.1 ad if (mc->mc_status == SCSI_OK)
1116 1.1 ad mly_process_event(mly, me);
1117 1.1 ad else
1118 1.1 ad printf("%s: unable to fetch event; status = 0x%x\n",
1119 1.1 ad mly->mly_dv.dv_xname, mc->mc_status);
1120 1.1 ad
1121 1.1 ad free(me, M_DEVBUF);
1122 1.1 ad
1123 1.1 ad /* Check for another event. */
1124 1.1 ad mly_check_event(mly);
1125 1.1 ad }
1126 1.1 ad
1127 1.1 ad /*
1128 1.17 wiz * Process a controller event. Called with interrupts blocked (i.e., at
1129 1.1 ad * interrupt time).
1130 1.1 ad */
1131 1.1 ad static void
1132 1.1 ad mly_process_event(struct mly_softc *mly, struct mly_event *me)
1133 1.1 ad {
1134 1.1 ad struct scsipi_sense_data *ssd;
1135 1.1 ad int bus, target, event, class, action;
1136 1.1 ad const char *fp, *tp;
1137 1.1 ad
1138 1.1 ad ssd = (struct scsipi_sense_data *)&me->sense[0];
1139 1.1 ad
1140 1.1 ad /*
1141 1.1 ad * Errors can be reported using vendor-unique sense data. In this
1142 1.1 ad * case, the event code will be 0x1c (Request sense data present),
1143 1.1 ad * the sense key will be 0x09 (vendor specific), the MSB of the ASC
1144 1.1 ad * will be set, and the actual event code will be a 16-bit value
1145 1.1 ad * comprised of the ASCQ (low byte) and low seven bits of the ASC
1146 1.1 ad * (low seven bits of the high byte).
1147 1.1 ad */
1148 1.1 ad if (le32toh(me->code) == 0x1c &&
1149 1.1 ad (ssd->flags & SSD_KEY) == SKEY_VENDOR_UNIQUE &&
1150 1.1 ad (ssd->add_sense_code & 0x80) != 0) {
1151 1.1 ad event = ((int)(ssd->add_sense_code & ~0x80) << 8) +
1152 1.1 ad ssd->add_sense_code_qual;
1153 1.1 ad } else
1154 1.1 ad event = le32toh(me->code);
1155 1.1 ad
1156 1.1 ad /* Look up event, get codes. */
1157 1.1 ad fp = mly_describe_code(mly_table_event, event);
1158 1.1 ad
1159 1.1 ad /* Quiet event? */
1160 1.1 ad class = fp[0];
1161 1.1 ad #ifdef notyet
1162 1.1 ad if (isupper(class) && bootverbose)
1163 1.1 ad class = tolower(class);
1164 1.1 ad #endif
1165 1.1 ad
1166 1.1 ad /* Get action code, text string. */
1167 1.1 ad action = fp[1];
1168 1.1 ad tp = fp + 3;
1169 1.1 ad
1170 1.1 ad /*
1171 1.1 ad * Print some information about the event.
1172 1.1 ad *
1173 1.1 ad * This code uses a table derived from the corresponding portion of
1174 1.1 ad * the Linux driver, and thus the parser is very similar.
1175 1.1 ad */
1176 1.1 ad switch (class) {
1177 1.1 ad case 'p':
1178 1.1 ad /*
1179 1.1 ad * Error on physical drive.
1180 1.1 ad */
1181 1.1 ad printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname,
1182 1.1 ad me->channel, me->target, tp);
1183 1.1 ad if (action == 'r')
1184 1.1 ad mly->mly_btl[me->channel][me->target].mb_flags |=
1185 1.1 ad MLY_BTL_RESCAN;
1186 1.1 ad break;
1187 1.1 ad
1188 1.1 ad case 'l':
1189 1.1 ad case 'm':
1190 1.1 ad /*
1191 1.1 ad * Error on logical unit, or message about logical unit.
1192 1.1 ad */
1193 1.1 ad bus = MLY_LOGDEV_BUS(mly, me->lun);
1194 1.1 ad target = MLY_LOGDEV_TARGET(mly, me->lun);
1195 1.4 ad printf("%s: logical device %d:%d %s\n", mly->mly_dv.dv_xname,
1196 1.4 ad bus, target, tp);
1197 1.1 ad if (action == 'r')
1198 1.1 ad mly->mly_btl[bus][target].mb_flags |= MLY_BTL_RESCAN;
1199 1.1 ad break;
1200 1.1 ad
1201 1.1 ad case 's':
1202 1.1 ad /*
1203 1.1 ad * Report of sense data.
1204 1.1 ad */
1205 1.1 ad if (((ssd->flags & SSD_KEY) == SKEY_NO_SENSE ||
1206 1.1 ad (ssd->flags & SSD_KEY) == SKEY_NOT_READY) &&
1207 1.1 ad ssd->add_sense_code == 0x04 &&
1208 1.1 ad (ssd->add_sense_code_qual == 0x01 ||
1209 1.1 ad ssd->add_sense_code_qual == 0x02)) {
1210 1.1 ad /* Ignore NO_SENSE or NOT_READY in one case */
1211 1.1 ad break;
1212 1.1 ad }
1213 1.1 ad
1214 1.1 ad /*
1215 1.1 ad * XXX Should translate this if SCSIVERBOSE.
1216 1.1 ad */
1217 1.1 ad printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname,
1218 1.1 ad me->channel, me->target, tp);
1219 1.1 ad printf("%s: sense key %d asc %02x ascq %02x\n",
1220 1.1 ad mly->mly_dv.dv_xname, ssd->flags & SSD_KEY,
1221 1.1 ad ssd->add_sense_code, ssd->add_sense_code_qual);
1222 1.1 ad printf("%s: info %x%x%x%x csi %x%x%x%x\n",
1223 1.1 ad mly->mly_dv.dv_xname, ssd->info[0], ssd->info[1],
1224 1.1 ad ssd->info[2], ssd->info[3], ssd->cmd_spec_info[0],
1225 1.1 ad ssd->cmd_spec_info[1], ssd->cmd_spec_info[2],
1226 1.1 ad ssd->cmd_spec_info[3]);
1227 1.1 ad if (action == 'r')
1228 1.1 ad mly->mly_btl[me->channel][me->target].mb_flags |=
1229 1.1 ad MLY_BTL_RESCAN;
1230 1.1 ad break;
1231 1.1 ad
1232 1.1 ad case 'e':
1233 1.1 ad printf("%s: ", mly->mly_dv.dv_xname);
1234 1.1 ad printf(tp, me->target, me->lun);
1235 1.1 ad break;
1236 1.1 ad
1237 1.1 ad case 'c':
1238 1.1 ad printf("%s: controller %s\n", mly->mly_dv.dv_xname, tp);
1239 1.1 ad break;
1240 1.1 ad
1241 1.1 ad case '?':
1242 1.1 ad printf("%s: %s - %d\n", mly->mly_dv.dv_xname, tp, event);
1243 1.1 ad break;
1244 1.1 ad
1245 1.1 ad default:
1246 1.1 ad /* Probably a 'noisy' event being ignored. */
1247 1.1 ad break;
1248 1.1 ad }
1249 1.1 ad }
1250 1.1 ad
1251 1.1 ad /*
1252 1.1 ad * Create the monitoring thread. Called after the standard kernel threads
1253 1.1 ad * have been created.
1254 1.1 ad */
1255 1.1 ad static void
1256 1.1 ad mly_thread_create(void *cookie)
1257 1.1 ad {
1258 1.1 ad struct mly_softc *mly;
1259 1.1 ad int rv;
1260 1.1 ad
1261 1.1 ad mly = cookie;
1262 1.1 ad
1263 1.1 ad rv = kthread_create1(mly_thread, mly, &mly->mly_thread, "%s",
1264 1.1 ad mly->mly_dv.dv_xname);
1265 1.1 ad if (rv != 0)
1266 1.1 ad printf("%s: unable to create thread (%d)\n",
1267 1.1 ad mly->mly_dv.dv_xname, rv);
1268 1.1 ad }
1269 1.1 ad
1270 1.1 ad /*
1271 1.1 ad * Perform periodic activities.
1272 1.1 ad */
1273 1.1 ad static void
1274 1.1 ad mly_thread(void *cookie)
1275 1.1 ad {
1276 1.1 ad struct mly_softc *mly;
1277 1.1 ad struct mly_btl *btl;
1278 1.1 ad int s, bus, target, done;
1279 1.1 ad
1280 1.1 ad mly = (struct mly_softc *)cookie;
1281 1.1 ad
1282 1.1 ad for (;;) {
1283 1.1 ad /* Check for new events. */
1284 1.1 ad mly_check_event(mly);
1285 1.1 ad
1286 1.1 ad /* Re-scan up to 1 device. */
1287 1.1 ad s = splbio();
1288 1.5 ad done = 0;
1289 1.1 ad for (bus = 0; bus < mly->mly_nchans && !done; bus++) {
1290 1.1 ad for (target = 0; target < MLY_MAX_TARGETS; target++) {
1291 1.1 ad /* Perform device rescan? */
1292 1.1 ad btl = &mly->mly_btl[bus][target];
1293 1.1 ad if ((btl->mb_flags & MLY_BTL_RESCAN) != 0) {
1294 1.1 ad btl->mb_flags ^= MLY_BTL_RESCAN;
1295 1.1 ad mly_scan_btl(mly, bus, target);
1296 1.1 ad done = 1;
1297 1.1 ad break;
1298 1.1 ad }
1299 1.1 ad }
1300 1.1 ad }
1301 1.1 ad splx(s);
1302 1.1 ad
1303 1.1 ad /* Sleep for N seconds. */
1304 1.1 ad tsleep(mly_thread, PWAIT, "mlyzzz",
1305 1.1 ad hz * MLY_PERIODIC_INTERVAL);
1306 1.1 ad }
1307 1.1 ad }
1308 1.1 ad
1309 1.1 ad /*
1310 1.1 ad * Submit a command to the controller and poll on completion. Return
1311 1.1 ad * non-zero on timeout.
1312 1.1 ad */
1313 1.1 ad static int
1314 1.1 ad mly_ccb_poll(struct mly_softc *mly, struct mly_ccb *mc, int timo)
1315 1.1 ad {
1316 1.1 ad int rv;
1317 1.1 ad
1318 1.1 ad if ((rv = mly_ccb_submit(mly, mc)) != 0)
1319 1.1 ad return (rv);
1320 1.1 ad
1321 1.1 ad for (timo *= 10; timo != 0; timo--) {
1322 1.1 ad if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0)
1323 1.1 ad break;
1324 1.1 ad mly_intr(mly);
1325 1.1 ad DELAY(100);
1326 1.1 ad }
1327 1.1 ad
1328 1.1 ad return (timo == 0);
1329 1.1 ad }
1330 1.1 ad
1331 1.1 ad /*
1332 1.1 ad * Submit a command to the controller and sleep on completion. Return
1333 1.1 ad * non-zero on timeout.
1334 1.1 ad */
1335 1.1 ad static int
1336 1.1 ad mly_ccb_wait(struct mly_softc *mly, struct mly_ccb *mc, int timo)
1337 1.1 ad {
1338 1.1 ad int rv, s;
1339 1.1 ad
1340 1.1 ad mly_ccb_enqueue(mly, mc);
1341 1.1 ad
1342 1.1 ad s = splbio();
1343 1.1 ad if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0) {
1344 1.1 ad splx(s);
1345 1.1 ad return (0);
1346 1.1 ad }
1347 1.1 ad rv = tsleep(mc, PRIBIO, "mlywccb", timo * hz / 1000);
1348 1.1 ad splx(s);
1349 1.1 ad
1350 1.1 ad return (rv);
1351 1.1 ad }
1352 1.1 ad
1353 1.1 ad /*
1354 1.1 ad * If a CCB is specified, enqueue it. Pull CCBs off the software queue in
1355 1.1 ad * the order that they were enqueued and try to submit their command blocks
1356 1.1 ad * to the controller for execution.
1357 1.1 ad */
1358 1.1 ad void
1359 1.1 ad mly_ccb_enqueue(struct mly_softc *mly, struct mly_ccb *mc)
1360 1.1 ad {
1361 1.1 ad int s;
1362 1.1 ad
1363 1.1 ad s = splbio();
1364 1.1 ad
1365 1.1 ad if (mc != NULL)
1366 1.1 ad SIMPLEQ_INSERT_TAIL(&mly->mly_ccb_queue, mc, mc_link.simpleq);
1367 1.1 ad
1368 1.1 ad while ((mc = SIMPLEQ_FIRST(&mly->mly_ccb_queue)) != NULL) {
1369 1.1 ad if (mly_ccb_submit(mly, mc))
1370 1.1 ad break;
1371 1.10 lukem SIMPLEQ_REMOVE_HEAD(&mly->mly_ccb_queue, mc_link.simpleq);
1372 1.1 ad }
1373 1.1 ad
1374 1.1 ad splx(s);
1375 1.1 ad }
1376 1.1 ad
1377 1.1 ad /*
1378 1.1 ad * Deliver a command to the controller.
1379 1.1 ad */
1380 1.1 ad static int
1381 1.1 ad mly_ccb_submit(struct mly_softc *mly, struct mly_ccb *mc)
1382 1.1 ad {
1383 1.1 ad union mly_cmd_packet *pkt;
1384 1.1 ad int s, off;
1385 1.1 ad
1386 1.1 ad mc->mc_packet->generic.command_id = htole16(mc->mc_slot);
1387 1.1 ad
1388 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap,
1389 1.1 ad mc->mc_packetphys - mly->mly_pkt_busaddr,
1390 1.1 ad sizeof(union mly_cmd_packet),
1391 1.1 ad BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1392 1.1 ad
1393 1.1 ad s = splbio();
1394 1.1 ad
1395 1.1 ad /*
1396 1.1 ad * Do we have to use the hardware mailbox?
1397 1.1 ad */
1398 1.1 ad if ((mly->mly_state & MLY_STATE_MMBOX_ACTIVE) == 0) {
1399 1.1 ad /*
1400 1.1 ad * Check to see if the controller is ready for us.
1401 1.1 ad */
1402 1.1 ad if (mly_idbr_true(mly, MLY_HM_CMDSENT)) {
1403 1.1 ad splx(s);
1404 1.1 ad return (EBUSY);
1405 1.1 ad }
1406 1.1 ad
1407 1.1 ad /*
1408 1.1 ad * It's ready, send the command.
1409 1.1 ad */
1410 1.1 ad mly_outl(mly, mly->mly_cmd_mailbox,
1411 1.1 ad (u_int64_t)mc->mc_packetphys & 0xffffffff);
1412 1.1 ad mly_outl(mly, mly->mly_cmd_mailbox + 4,
1413 1.1 ad (u_int64_t)mc->mc_packetphys >> 32);
1414 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_HM_CMDSENT);
1415 1.1 ad } else {
1416 1.1 ad pkt = &mly->mly_mmbox->mmm_command[mly->mly_mmbox_cmd_idx];
1417 1.1 ad off = (caddr_t)pkt - (caddr_t)mly->mly_mmbox;
1418 1.1 ad
1419 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1420 1.1 ad off, sizeof(mly->mly_mmbox->mmm_command[0]),
1421 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1422 1.1 ad
1423 1.1 ad /* Check to see if the next index is free yet. */
1424 1.1 ad if (pkt->mmbox.flag != 0) {
1425 1.1 ad splx(s);
1426 1.1 ad return (EBUSY);
1427 1.1 ad }
1428 1.1 ad
1429 1.1 ad /* Copy in new command */
1430 1.1 ad memcpy(pkt->mmbox.data, mc->mc_packet->mmbox.data,
1431 1.1 ad sizeof(pkt->mmbox.data));
1432 1.1 ad
1433 1.1 ad /* Copy flag last. */
1434 1.1 ad pkt->mmbox.flag = mc->mc_packet->mmbox.flag;
1435 1.1 ad
1436 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1437 1.1 ad off, sizeof(mly->mly_mmbox->mmm_command[0]),
1438 1.1 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1439 1.1 ad
1440 1.1 ad /* Signal controller and update index. */
1441 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_AM_CMDSENT);
1442 1.1 ad mly->mly_mmbox_cmd_idx =
1443 1.1 ad (mly->mly_mmbox_cmd_idx + 1) % MLY_MMBOX_COMMANDS;
1444 1.1 ad }
1445 1.1 ad
1446 1.1 ad splx(s);
1447 1.1 ad return (0);
1448 1.1 ad }
1449 1.1 ad
1450 1.1 ad /*
1451 1.1 ad * Pick up completed commands from the controller and handle accordingly.
1452 1.1 ad */
1453 1.1 ad int
1454 1.1 ad mly_intr(void *cookie)
1455 1.1 ad {
1456 1.1 ad struct mly_ccb *mc;
1457 1.1 ad union mly_status_packet *sp;
1458 1.1 ad u_int16_t slot;
1459 1.1 ad int forus, off;
1460 1.1 ad struct mly_softc *mly;
1461 1.1 ad
1462 1.1 ad mly = cookie;
1463 1.1 ad forus = 0;
1464 1.1 ad
1465 1.1 ad /*
1466 1.1 ad * Pick up hardware-mailbox commands.
1467 1.1 ad */
1468 1.1 ad if (mly_odbr_true(mly, MLY_HM_STSREADY)) {
1469 1.1 ad slot = mly_inw(mly, mly->mly_status_mailbox);
1470 1.1 ad
1471 1.1 ad if (slot < MLY_SLOT_MAX) {
1472 1.1 ad mc = mly->mly_ccbs + (slot - MLY_SLOT_START);
1473 1.1 ad mc->mc_status =
1474 1.1 ad mly_inb(mly, mly->mly_status_mailbox + 2);
1475 1.1 ad mc->mc_sense =
1476 1.1 ad mly_inb(mly, mly->mly_status_mailbox + 3);
1477 1.1 ad mc->mc_resid =
1478 1.1 ad mly_inl(mly, mly->mly_status_mailbox + 4);
1479 1.1 ad
1480 1.1 ad mly_ccb_complete(mly, mc);
1481 1.1 ad } else {
1482 1.1 ad /* Slot 0xffff may mean "extremely bogus command". */
1483 1.1 ad printf("%s: got HM completion for illegal slot %u\n",
1484 1.1 ad mly->mly_dv.dv_xname, slot);
1485 1.1 ad }
1486 1.1 ad
1487 1.1 ad /* Unconditionally acknowledge status. */
1488 1.1 ad mly_outb(mly, mly->mly_odbr, MLY_HM_STSREADY);
1489 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK);
1490 1.1 ad forus = 1;
1491 1.1 ad }
1492 1.1 ad
1493 1.1 ad /*
1494 1.1 ad * Pick up memory-mailbox commands.
1495 1.1 ad */
1496 1.1 ad if (mly_odbr_true(mly, MLY_AM_STSREADY)) {
1497 1.1 ad for (;;) {
1498 1.1 ad sp = &mly->mly_mmbox->mmm_status[mly->mly_mmbox_sts_idx];
1499 1.1 ad off = (caddr_t)sp - (caddr_t)mly->mly_mmbox;
1500 1.1 ad
1501 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1502 1.1 ad off, sizeof(mly->mly_mmbox->mmm_command[0]),
1503 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1504 1.1 ad
1505 1.1 ad /* Check for more status. */
1506 1.1 ad if (sp->mmbox.flag == 0)
1507 1.1 ad break;
1508 1.1 ad
1509 1.1 ad /* Get slot number. */
1510 1.1 ad slot = le16toh(sp->status.command_id);
1511 1.1 ad if (slot < MLY_SLOT_MAX) {
1512 1.1 ad mc = mly->mly_ccbs + (slot - MLY_SLOT_START);
1513 1.1 ad mc->mc_status = sp->status.status;
1514 1.1 ad mc->mc_sense = sp->status.sense_length;
1515 1.1 ad mc->mc_resid = le32toh(sp->status.residue);
1516 1.1 ad mly_ccb_complete(mly, mc);
1517 1.1 ad } else {
1518 1.1 ad /*
1519 1.1 ad * Slot 0xffff may mean "extremely bogus
1520 1.1 ad * command".
1521 1.1 ad */
1522 1.1 ad printf("%s: got AM completion for illegal "
1523 1.1 ad "slot %u at %d\n", mly->mly_dv.dv_xname,
1524 1.1 ad slot, mly->mly_mmbox_sts_idx);
1525 1.1 ad }
1526 1.1 ad
1527 1.1 ad /* Clear and move to next index. */
1528 1.1 ad sp->mmbox.flag = 0;
1529 1.1 ad mly->mly_mmbox_sts_idx =
1530 1.1 ad (mly->mly_mmbox_sts_idx + 1) % MLY_MMBOX_STATUS;
1531 1.1 ad }
1532 1.1 ad
1533 1.1 ad /* Acknowledge that we have collected status value(s). */
1534 1.1 ad mly_outb(mly, mly->mly_odbr, MLY_AM_STSREADY);
1535 1.1 ad forus = 1;
1536 1.1 ad }
1537 1.1 ad
1538 1.1 ad /*
1539 1.1 ad * Run the queue.
1540 1.1 ad */
1541 1.10 lukem if (forus && ! SIMPLEQ_EMPTY(&mly->mly_ccb_queue))
1542 1.1 ad mly_ccb_enqueue(mly, NULL);
1543 1.1 ad
1544 1.1 ad return (forus);
1545 1.1 ad }
1546 1.1 ad
1547 1.1 ad /*
1548 1.1 ad * Process completed commands
1549 1.1 ad */
1550 1.1 ad static void
1551 1.1 ad mly_ccb_complete(struct mly_softc *mly, struct mly_ccb *mc)
1552 1.1 ad {
1553 1.1 ad void (*complete)(struct mly_softc *, struct mly_ccb *);
1554 1.1 ad
1555 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap,
1556 1.1 ad mc->mc_packetphys - mly->mly_pkt_busaddr,
1557 1.1 ad sizeof(union mly_cmd_packet),
1558 1.1 ad BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1559 1.1 ad
1560 1.1 ad complete = mc->mc_complete;
1561 1.1 ad mc->mc_flags |= MLY_CCB_COMPLETE;
1562 1.1 ad
1563 1.1 ad /*
1564 1.1 ad * Call completion handler or wake up sleeping consumer.
1565 1.1 ad */
1566 1.1 ad if (complete != NULL)
1567 1.1 ad (*complete)(mly, mc);
1568 1.1 ad else
1569 1.1 ad wakeup(mc);
1570 1.1 ad }
1571 1.1 ad
1572 1.1 ad /*
1573 1.1 ad * Allocate a command.
1574 1.1 ad */
1575 1.1 ad int
1576 1.1 ad mly_ccb_alloc(struct mly_softc *mly, struct mly_ccb **mcp)
1577 1.1 ad {
1578 1.1 ad struct mly_ccb *mc;
1579 1.1 ad int s;
1580 1.1 ad
1581 1.1 ad s = splbio();
1582 1.1 ad mc = SLIST_FIRST(&mly->mly_ccb_free);
1583 1.1 ad if (mc != NULL)
1584 1.1 ad SLIST_REMOVE_HEAD(&mly->mly_ccb_free, mc_link.slist);
1585 1.1 ad splx(s);
1586 1.1 ad
1587 1.1 ad *mcp = mc;
1588 1.1 ad return (mc == NULL ? EAGAIN : 0);
1589 1.1 ad }
1590 1.1 ad
1591 1.1 ad /*
1592 1.1 ad * Release a command back to the freelist.
1593 1.1 ad */
1594 1.1 ad void
1595 1.1 ad mly_ccb_free(struct mly_softc *mly, struct mly_ccb *mc)
1596 1.1 ad {
1597 1.1 ad int s;
1598 1.1 ad
1599 1.1 ad /*
1600 1.1 ad * Fill in parts of the command that may cause confusion if a
1601 1.1 ad * consumer doesn't when we are later allocated.
1602 1.1 ad */
1603 1.1 ad mc->mc_data = NULL;
1604 1.1 ad mc->mc_flags = 0;
1605 1.1 ad mc->mc_complete = NULL;
1606 1.1 ad mc->mc_private = NULL;
1607 1.3 ad mc->mc_packet->generic.command_control = 0;
1608 1.1 ad
1609 1.1 ad /*
1610 1.1 ad * By default, we set up to overwrite the command packet with sense
1611 1.1 ad * information.
1612 1.1 ad */
1613 1.1 ad mc->mc_packet->generic.sense_buffer_address =
1614 1.1 ad htole64(mc->mc_packetphys);
1615 1.1 ad mc->mc_packet->generic.maximum_sense_size =
1616 1.1 ad sizeof(union mly_cmd_packet);
1617 1.1 ad
1618 1.1 ad s = splbio();
1619 1.1 ad SLIST_INSERT_HEAD(&mly->mly_ccb_free, mc, mc_link.slist);
1620 1.1 ad splx(s);
1621 1.1 ad }
1622 1.1 ad
1623 1.1 ad /*
1624 1.18 perry * Allocate and initialize command and packet structures.
1625 1.1 ad *
1626 1.1 ad * If the controller supports fewer than MLY_MAX_CCBS commands, limit our
1627 1.1 ad * allocation to that number. If we don't yet know how many commands the
1628 1.18 perry * controller supports, allocate a very small set (suitable for initialization
1629 1.1 ad * purposes only).
1630 1.1 ad */
1631 1.1 ad static int
1632 1.1 ad mly_alloc_ccbs(struct mly_softc *mly)
1633 1.1 ad {
1634 1.1 ad struct mly_ccb *mc;
1635 1.1 ad int i, rv;
1636 1.1 ad
1637 1.1 ad if (mly->mly_controllerinfo == NULL)
1638 1.1 ad mly->mly_ncmds = MLY_CCBS_RESV;
1639 1.1 ad else {
1640 1.1 ad i = le16toh(mly->mly_controllerinfo->maximum_parallel_commands);
1641 1.1 ad mly->mly_ncmds = min(MLY_MAX_CCBS, i);
1642 1.1 ad }
1643 1.1 ad
1644 1.1 ad /*
1645 1.1 ad * Allocate enough space for all the command packets in one chunk
1646 1.1 ad * and map them permanently into controller-visible space.
1647 1.1 ad */
1648 1.1 ad rv = mly_dmamem_alloc(mly,
1649 1.1 ad mly->mly_ncmds * sizeof(union mly_cmd_packet),
1650 1.1 ad &mly->mly_pkt_dmamap, (caddr_t *)&mly->mly_pkt,
1651 1.1 ad &mly->mly_pkt_busaddr, &mly->mly_pkt_seg);
1652 1.1 ad if (rv)
1653 1.1 ad return (rv);
1654 1.1 ad
1655 1.1 ad mly->mly_ccbs = malloc(sizeof(struct mly_ccb) * mly->mly_ncmds,
1656 1.9 tsutsui M_DEVBUF, M_NOWAIT|M_ZERO);
1657 1.1 ad
1658 1.1 ad for (i = 0; i < mly->mly_ncmds; i++) {
1659 1.1 ad mc = mly->mly_ccbs + i;
1660 1.1 ad mc->mc_slot = MLY_SLOT_START + i;
1661 1.1 ad mc->mc_packet = mly->mly_pkt + i;
1662 1.1 ad mc->mc_packetphys = mly->mly_pkt_busaddr +
1663 1.1 ad (i * sizeof(union mly_cmd_packet));
1664 1.1 ad
1665 1.1 ad rv = bus_dmamap_create(mly->mly_dmat, MLY_MAX_XFER,
1666 1.1 ad MLY_MAX_SEGS, MLY_MAX_XFER, 0,
1667 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
1668 1.1 ad &mc->mc_datamap);
1669 1.1 ad if (rv) {
1670 1.1 ad mly_release_ccbs(mly);
1671 1.1 ad return (rv);
1672 1.1 ad }
1673 1.1 ad
1674 1.1 ad mly_ccb_free(mly, mc);
1675 1.1 ad }
1676 1.1 ad
1677 1.1 ad return (0);
1678 1.1 ad }
1679 1.1 ad
1680 1.1 ad /*
1681 1.1 ad * Free all the storage held by commands.
1682 1.1 ad *
1683 1.1 ad * Must be called with all commands on the free list.
1684 1.1 ad */
1685 1.1 ad static void
1686 1.1 ad mly_release_ccbs(struct mly_softc *mly)
1687 1.1 ad {
1688 1.1 ad struct mly_ccb *mc;
1689 1.1 ad
1690 1.1 ad /* Throw away command buffer DMA maps. */
1691 1.1 ad while (mly_ccb_alloc(mly, &mc) == 0)
1692 1.1 ad bus_dmamap_destroy(mly->mly_dmat, mc->mc_datamap);
1693 1.1 ad
1694 1.1 ad /* Release CCB storage. */
1695 1.1 ad free(mly->mly_ccbs, M_DEVBUF);
1696 1.1 ad
1697 1.1 ad /* Release the packet storage. */
1698 1.1 ad mly_dmamem_free(mly, mly->mly_ncmds * sizeof(union mly_cmd_packet),
1699 1.1 ad mly->mly_pkt_dmamap, (caddr_t)mly->mly_pkt, &mly->mly_pkt_seg);
1700 1.1 ad }
1701 1.1 ad
1702 1.1 ad /*
1703 1.1 ad * Map a command into controller-visible space.
1704 1.1 ad */
1705 1.1 ad static int
1706 1.1 ad mly_ccb_map(struct mly_softc *mly, struct mly_ccb *mc)
1707 1.1 ad {
1708 1.1 ad struct mly_cmd_generic *gen;
1709 1.1 ad struct mly_sg_entry *sg;
1710 1.1 ad bus_dma_segment_t *ds;
1711 1.1 ad int flg, nseg, rv;
1712 1.1 ad
1713 1.1 ad #ifdef DIAGNOSTIC
1714 1.1 ad /* Don't map more than once. */
1715 1.1 ad if ((mc->mc_flags & MLY_CCB_MAPPED) != 0)
1716 1.1 ad panic("mly_ccb_map: already mapped");
1717 1.1 ad mc->mc_flags |= MLY_CCB_MAPPED;
1718 1.1 ad
1719 1.1 ad /* Does the command have a data buffer? */
1720 1.1 ad if (mc->mc_data == NULL)
1721 1.1 ad panic("mly_ccb_map: no data buffer");
1722 1.1 ad #endif
1723 1.1 ad
1724 1.1 ad rv = bus_dmamap_load(mly->mly_dmat, mc->mc_datamap, mc->mc_data,
1725 1.1 ad mc->mc_length, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
1726 1.1 ad ((mc->mc_flags & MLY_CCB_DATAIN) != 0 ?
1727 1.1 ad BUS_DMA_READ : BUS_DMA_WRITE));
1728 1.1 ad if (rv != 0)
1729 1.1 ad return (rv);
1730 1.1 ad
1731 1.1 ad gen = &mc->mc_packet->generic;
1732 1.1 ad
1733 1.1 ad /*
1734 1.1 ad * Can we use the transfer structure directly?
1735 1.1 ad */
1736 1.1 ad if ((nseg = mc->mc_datamap->dm_nsegs) <= 2) {
1737 1.1 ad mc->mc_sgoff = -1;
1738 1.1 ad sg = &gen->transfer.direct.sg[0];
1739 1.1 ad } else {
1740 1.1 ad mc->mc_sgoff = (mc->mc_slot - MLY_SLOT_START) *
1741 1.1 ad MLY_MAX_SEGS;
1742 1.1 ad sg = mly->mly_sg + mc->mc_sgoff;
1743 1.1 ad gen->command_control |= MLY_CMDCTL_EXTENDED_SG_TABLE;
1744 1.1 ad gen->transfer.indirect.entries[0] = htole16(nseg);
1745 1.1 ad gen->transfer.indirect.table_physaddr[0] =
1746 1.1 ad htole64(mly->mly_sg_busaddr +
1747 1.1 ad (mc->mc_sgoff * sizeof(struct mly_sg_entry)));
1748 1.1 ad }
1749 1.1 ad
1750 1.1 ad /*
1751 1.1 ad * Fill the S/G table.
1752 1.1 ad */
1753 1.1 ad for (ds = mc->mc_datamap->dm_segs; nseg != 0; nseg--, sg++, ds++) {
1754 1.1 ad sg->physaddr = htole64(ds->ds_addr);
1755 1.1 ad sg->length = htole64(ds->ds_len);
1756 1.1 ad }
1757 1.1 ad
1758 1.1 ad /*
1759 1.1 ad * Sync up the data map.
1760 1.1 ad */
1761 1.1 ad if ((mc->mc_flags & MLY_CCB_DATAIN) != 0)
1762 1.1 ad flg = BUS_DMASYNC_PREREAD;
1763 1.1 ad else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */ {
1764 1.1 ad gen->command_control |= MLY_CMDCTL_DATA_DIRECTION;
1765 1.1 ad flg = BUS_DMASYNC_PREWRITE;
1766 1.1 ad }
1767 1.1 ad
1768 1.1 ad bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg);
1769 1.1 ad
1770 1.1 ad /*
1771 1.1 ad * Sync up the chained S/G table, if we're using one.
1772 1.1 ad */
1773 1.1 ad if (mc->mc_sgoff == -1)
1774 1.1 ad return (0);
1775 1.1 ad
1776 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff,
1777 1.1 ad MLY_SGL_SIZE, BUS_DMASYNC_PREWRITE);
1778 1.1 ad
1779 1.1 ad return (0);
1780 1.1 ad }
1781 1.1 ad
1782 1.1 ad /*
1783 1.1 ad * Unmap a command from controller-visible space.
1784 1.1 ad */
1785 1.1 ad static void
1786 1.1 ad mly_ccb_unmap(struct mly_softc *mly, struct mly_ccb *mc)
1787 1.1 ad {
1788 1.1 ad int flg;
1789 1.1 ad
1790 1.1 ad #ifdef DIAGNOSTIC
1791 1.1 ad if ((mc->mc_flags & MLY_CCB_MAPPED) == 0)
1792 1.1 ad panic("mly_ccb_unmap: not mapped");
1793 1.1 ad mc->mc_flags &= ~MLY_CCB_MAPPED;
1794 1.1 ad #endif
1795 1.1 ad
1796 1.1 ad if ((mc->mc_flags & MLY_CCB_DATAIN) != 0)
1797 1.1 ad flg = BUS_DMASYNC_POSTREAD;
1798 1.1 ad else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */
1799 1.1 ad flg = BUS_DMASYNC_POSTWRITE;
1800 1.1 ad
1801 1.1 ad bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg);
1802 1.1 ad bus_dmamap_unload(mly->mly_dmat, mc->mc_datamap);
1803 1.1 ad
1804 1.1 ad if (mc->mc_sgoff == -1)
1805 1.1 ad return;
1806 1.1 ad
1807 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff,
1808 1.1 ad MLY_SGL_SIZE, BUS_DMASYNC_POSTWRITE);
1809 1.1 ad }
1810 1.1 ad
1811 1.1 ad /*
1812 1.1 ad * Adjust the size of each I/O before it passes to the SCSI layer.
1813 1.1 ad */
1814 1.1 ad static void
1815 1.1 ad mly_scsipi_minphys(struct buf *bp)
1816 1.1 ad {
1817 1.1 ad
1818 1.1 ad if (bp->b_bcount > MLY_MAX_XFER)
1819 1.1 ad bp->b_bcount = MLY_MAX_XFER;
1820 1.1 ad minphys(bp);
1821 1.1 ad }
1822 1.1 ad
1823 1.1 ad /*
1824 1.1 ad * Start a SCSI command.
1825 1.1 ad */
1826 1.1 ad static void
1827 1.1 ad mly_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
1828 1.1 ad void *arg)
1829 1.1 ad {
1830 1.1 ad struct mly_ccb *mc;
1831 1.1 ad struct mly_cmd_scsi_small *ss;
1832 1.1 ad struct scsipi_xfer *xs;
1833 1.1 ad struct scsipi_periph *periph;
1834 1.1 ad struct mly_softc *mly;
1835 1.1 ad struct mly_btl *btl;
1836 1.1 ad int s, tmp;
1837 1.1 ad
1838 1.1 ad mly = (void *)chan->chan_adapter->adapt_dev;
1839 1.1 ad
1840 1.1 ad switch (req) {
1841 1.1 ad case ADAPTER_REQ_RUN_XFER:
1842 1.1 ad xs = arg;
1843 1.1 ad periph = xs->xs_periph;
1844 1.1 ad btl = &mly->mly_btl[chan->chan_channel][periph->periph_target];
1845 1.1 ad s = splbio();
1846 1.1 ad tmp = btl->mb_flags;
1847 1.1 ad splx(s);
1848 1.1 ad
1849 1.1 ad /*
1850 1.1 ad * Check for I/O attempt to a protected or non-existant
1851 1.1 ad * device.
1852 1.1 ad */
1853 1.1 ad if ((tmp & MLY_BTL_PROTECTED) != 0) {
1854 1.1 ad xs->error = XS_SELTIMEOUT;
1855 1.1 ad scsipi_done(xs);
1856 1.1 ad break;
1857 1.1 ad }
1858 1.1 ad
1859 1.1 ad #ifdef DIAGNOSTIC
1860 1.1 ad /* XXX Increase if/when we support large SCSI commands. */
1861 1.1 ad if (xs->cmdlen > MLY_CMD_SCSI_SMALL_CDB) {
1862 1.1 ad printf("%s: cmd too large\n", mly->mly_dv.dv_xname);
1863 1.1 ad xs->error = XS_DRIVER_STUFFUP;
1864 1.1 ad scsipi_done(xs);
1865 1.1 ad break;
1866 1.1 ad }
1867 1.1 ad #endif
1868 1.1 ad
1869 1.1 ad if (mly_ccb_alloc(mly, &mc)) {
1870 1.1 ad xs->error = XS_RESOURCE_SHORTAGE;
1871 1.1 ad scsipi_done(xs);
1872 1.1 ad break;
1873 1.1 ad }
1874 1.1 ad
1875 1.1 ad /* Build the command. */
1876 1.1 ad mc->mc_data = xs->data;
1877 1.1 ad mc->mc_length = xs->datalen;
1878 1.1 ad mc->mc_complete = mly_scsipi_complete;
1879 1.1 ad mc->mc_private = xs;
1880 1.1 ad
1881 1.1 ad /* Build the packet for the controller. */
1882 1.1 ad ss = &mc->mc_packet->scsi_small;
1883 1.1 ad ss->opcode = MDACMD_SCSI;
1884 1.1 ad #ifdef notdef
1885 1.1 ad /*
1886 1.1 ad * XXX FreeBSD does this, but it doesn't fix anything,
1887 1.1 ad * XXX and appears potentially harmful.
1888 1.1 ad */
1889 1.1 ad ss->command_control |= MLY_CMDCTL_DISABLE_DISCONNECT;
1890 1.1 ad #endif
1891 1.3 ad
1892 1.1 ad ss->data_size = htole32(xs->datalen);
1893 1.1 ad _lto3l(MLY_PHYADDR(0, chan->chan_channel,
1894 1.1 ad periph->periph_target, periph->periph_lun), ss->addr);
1895 1.1 ad
1896 1.1 ad if (xs->timeout < 60 * 1000)
1897 1.1 ad ss->timeout = xs->timeout / 1000 |
1898 1.1 ad MLY_TIMEOUT_SECONDS;
1899 1.1 ad else if (xs->timeout < 60 * 60 * 1000)
1900 1.1 ad ss->timeout = xs->timeout / (60 * 1000) |
1901 1.1 ad MLY_TIMEOUT_MINUTES;
1902 1.1 ad else
1903 1.1 ad ss->timeout = xs->timeout / (60 * 60 * 1000) |
1904 1.1 ad MLY_TIMEOUT_HOURS;
1905 1.1 ad
1906 1.1 ad ss->maximum_sense_size = sizeof(xs->sense);
1907 1.1 ad ss->cdb_length = xs->cmdlen;
1908 1.1 ad memcpy(ss->cdb, xs->cmd, xs->cmdlen);
1909 1.1 ad
1910 1.7 ad if (mc->mc_length != 0) {
1911 1.7 ad if ((xs->xs_control & XS_CTL_DATA_OUT) != 0)
1912 1.7 ad mc->mc_flags |= MLY_CCB_DATAOUT;
1913 1.7 ad else /* if ((xs->xs_control & XS_CTL_DATA_IN) != 0) */
1914 1.7 ad mc->mc_flags |= MLY_CCB_DATAIN;
1915 1.7 ad
1916 1.1 ad if (mly_ccb_map(mly, mc) != 0) {
1917 1.1 ad xs->error = XS_DRIVER_STUFFUP;
1918 1.1 ad mly_ccb_free(mly, mc);
1919 1.1 ad scsipi_done(xs);
1920 1.1 ad break;
1921 1.1 ad }
1922 1.7 ad }
1923 1.1 ad
1924 1.1 ad /*
1925 1.1 ad * Give the command to the controller.
1926 1.1 ad */
1927 1.1 ad if ((xs->xs_control & XS_CTL_POLL) != 0) {
1928 1.1 ad if (mly_ccb_poll(mly, mc, xs->timeout + 5000)) {
1929 1.1 ad xs->error = XS_REQUEUE;
1930 1.1 ad if (mc->mc_length != 0)
1931 1.1 ad mly_ccb_unmap(mly, mc);
1932 1.1 ad mly_ccb_free(mly, mc);
1933 1.1 ad scsipi_done(xs);
1934 1.1 ad }
1935 1.1 ad } else
1936 1.1 ad mly_ccb_enqueue(mly, mc);
1937 1.1 ad
1938 1.1 ad break;
1939 1.1 ad
1940 1.1 ad case ADAPTER_REQ_GROW_RESOURCES:
1941 1.1 ad /*
1942 1.1 ad * Not supported.
1943 1.1 ad */
1944 1.1 ad break;
1945 1.1 ad
1946 1.1 ad case ADAPTER_REQ_SET_XFER_MODE:
1947 1.1 ad /*
1948 1.1 ad * We can't change the transfer mode, but at least let
1949 1.1 ad * scsipi know what the adapter has negotiated.
1950 1.1 ad */
1951 1.1 ad mly_get_xfer_mode(mly, chan->chan_channel, arg);
1952 1.1 ad break;
1953 1.1 ad }
1954 1.1 ad }
1955 1.1 ad
1956 1.1 ad /*
1957 1.1 ad * Handle completion of a SCSI command.
1958 1.1 ad */
1959 1.1 ad static void
1960 1.1 ad mly_scsipi_complete(struct mly_softc *mly, struct mly_ccb *mc)
1961 1.1 ad {
1962 1.1 ad struct scsipi_xfer *xs;
1963 1.1 ad struct scsipi_channel *chan;
1964 1.1 ad struct scsipi_inquiry_data *inq;
1965 1.1 ad struct mly_btl *btl;
1966 1.1 ad int target, sl, s;
1967 1.1 ad const char *p;
1968 1.1 ad
1969 1.1 ad xs = mc->mc_private;
1970 1.1 ad xs->status = mc->mc_status;
1971 1.1 ad
1972 1.1 ad /*
1973 1.1 ad * XXX The `resid' value as returned by the controller appears to be
1974 1.1 ad * bogus, so we always set it to zero. Is it perhaps the transfer
1975 1.1 ad * count?
1976 1.1 ad */
1977 1.1 ad xs->resid = 0; /* mc->mc_resid; */
1978 1.1 ad
1979 1.1 ad if (mc->mc_length != 0)
1980 1.1 ad mly_ccb_unmap(mly, mc);
1981 1.1 ad
1982 1.1 ad switch (mc->mc_status) {
1983 1.1 ad case SCSI_OK:
1984 1.1 ad /*
1985 1.1 ad * In order to report logical device type and status, we
1986 1.1 ad * overwrite the result of the INQUIRY command to logical
1987 1.1 ad * devices.
1988 1.1 ad */
1989 1.1 ad if (xs->cmd->opcode == INQUIRY) {
1990 1.1 ad chan = xs->xs_periph->periph_channel;
1991 1.1 ad target = xs->xs_periph->periph_target;
1992 1.1 ad btl = &mly->mly_btl[chan->chan_channel][target];
1993 1.1 ad
1994 1.1 ad s = splbio();
1995 1.1 ad if ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) {
1996 1.1 ad inq = (struct scsipi_inquiry_data *)xs->data;
1997 1.1 ad mly_padstr(inq->vendor, "MYLEX", 8);
1998 1.1 ad p = mly_describe_code(mly_table_device_type,
1999 1.1 ad btl->mb_type);
2000 1.1 ad mly_padstr(inq->product, p, 16);
2001 1.1 ad p = mly_describe_code(mly_table_device_state,
2002 1.1 ad btl->mb_state);
2003 1.1 ad mly_padstr(inq->revision, p, 4);
2004 1.1 ad }
2005 1.1 ad splx(s);
2006 1.1 ad }
2007 1.1 ad
2008 1.1 ad xs->error = XS_NOERROR;
2009 1.1 ad break;
2010 1.1 ad
2011 1.1 ad case SCSI_CHECK:
2012 1.1 ad sl = mc->mc_sense;
2013 1.1 ad if (sl > sizeof(xs->sense.scsi_sense))
2014 1.1 ad sl = sizeof(xs->sense.scsi_sense);
2015 1.1 ad memcpy(&xs->sense.scsi_sense, mc->mc_packet, sl);
2016 1.1 ad xs->error = XS_SENSE;
2017 1.1 ad break;
2018 1.1 ad
2019 1.1 ad case SCSI_BUSY:
2020 1.1 ad case SCSI_QUEUE_FULL:
2021 1.1 ad xs->error = XS_BUSY;
2022 1.1 ad break;
2023 1.1 ad
2024 1.1 ad default:
2025 1.1 ad printf("%s: unknown SCSI status 0x%x\n",
2026 1.1 ad mly->mly_dv.dv_xname, xs->status);
2027 1.1 ad xs->error = XS_DRIVER_STUFFUP;
2028 1.1 ad break;
2029 1.1 ad }
2030 1.1 ad
2031 1.1 ad mly_ccb_free(mly, mc);
2032 1.1 ad scsipi_done(xs);
2033 1.1 ad }
2034 1.1 ad
2035 1.1 ad /*
2036 1.1 ad * Notify scsipi about a target's transfer mode.
2037 1.1 ad */
2038 1.1 ad static void
2039 1.1 ad mly_get_xfer_mode(struct mly_softc *mly, int bus, struct scsipi_xfer_mode *xm)
2040 1.1 ad {
2041 1.1 ad struct mly_btl *btl;
2042 1.1 ad int s;
2043 1.1 ad
2044 1.1 ad btl = &mly->mly_btl[bus][xm->xm_target];
2045 1.1 ad xm->xm_mode = 0;
2046 1.1 ad
2047 1.1 ad s = splbio();
2048 1.1 ad
2049 1.1 ad if ((btl->mb_flags & MLY_BTL_PHYSICAL) != 0) {
2050 1.1 ad if (btl->mb_speed == 0) {
2051 1.1 ad xm->xm_period = 0;
2052 1.1 ad xm->xm_offset = 0;
2053 1.1 ad } else {
2054 1.1 ad xm->xm_period = 12; /* XXX */
2055 1.1 ad xm->xm_offset = 8; /* XXX */
2056 1.1 ad xm->xm_mode |= PERIPH_CAP_SYNC; /* XXX */
2057 1.1 ad }
2058 1.1 ad
2059 1.1 ad switch (btl->mb_width) {
2060 1.1 ad case 32:
2061 1.1 ad xm->xm_mode = PERIPH_CAP_WIDE32;
2062 1.1 ad break;
2063 1.1 ad case 16:
2064 1.1 ad xm->xm_mode = PERIPH_CAP_WIDE16;
2065 1.1 ad break;
2066 1.1 ad default:
2067 1.1 ad xm->xm_mode = 0;
2068 1.1 ad break;
2069 1.1 ad }
2070 1.1 ad } else /* ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) */ {
2071 1.1 ad xm->xm_mode = PERIPH_CAP_WIDE16 | PERIPH_CAP_SYNC;
2072 1.1 ad xm->xm_period = 12;
2073 1.1 ad xm->xm_offset = 8;
2074 1.1 ad }
2075 1.1 ad
2076 1.1 ad if ((btl->mb_flags & MLY_BTL_TQING) != 0)
2077 1.1 ad xm->xm_mode |= PERIPH_CAP_TQING;
2078 1.1 ad
2079 1.1 ad splx(s);
2080 1.1 ad
2081 1.1 ad scsipi_async_event(&mly->mly_chans[bus], ASYNC_EVENT_XFER_MODE, xm);
2082 1.1 ad }
2083 1.1 ad
2084 1.1 ad /*
2085 1.1 ad * ioctl hook; used here only to initiate low-level rescans.
2086 1.1 ad */
2087 1.1 ad static int
2088 1.1 ad mly_scsipi_ioctl(struct scsipi_channel *chan, u_long cmd, caddr_t data,
2089 1.1 ad int flag, struct proc *p)
2090 1.1 ad {
2091 1.1 ad struct mly_softc *mly;
2092 1.1 ad int rv;
2093 1.1 ad
2094 1.1 ad mly = (struct mly_softc *)chan->chan_adapter->adapt_dev;
2095 1.1 ad
2096 1.1 ad switch (cmd) {
2097 1.1 ad case SCBUSIOLLSCAN:
2098 1.1 ad mly_scan_channel(mly, chan->chan_channel);
2099 1.1 ad rv = 0;
2100 1.1 ad break;
2101 1.1 ad default:
2102 1.1 ad rv = ENOTTY;
2103 1.1 ad break;
2104 1.1 ad }
2105 1.1 ad
2106 1.1 ad return (rv);
2107 1.1 ad }
2108 1.1 ad
2109 1.1 ad /*
2110 1.18 perry * Handshake with the firmware while the card is being initialized.
2111 1.1 ad */
2112 1.1 ad static int
2113 1.1 ad mly_fwhandshake(struct mly_softc *mly)
2114 1.1 ad {
2115 1.1 ad u_int8_t error, param0, param1;
2116 1.1 ad int spinup;
2117 1.1 ad
2118 1.1 ad spinup = 0;
2119 1.1 ad
2120 1.18 perry /* Set HM_STSACK and let the firmware initialize. */
2121 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK);
2122 1.1 ad DELAY(1000); /* too short? */
2123 1.1 ad
2124 1.18 perry /* If HM_STSACK is still true, the controller is initializing. */
2125 1.1 ad if (!mly_idbr_true(mly, MLY_HM_STSACK))
2126 1.1 ad return (0);
2127 1.1 ad
2128 1.18 perry printf("%s: controller initialization started\n",
2129 1.1 ad mly->mly_dv.dv_xname);
2130 1.1 ad
2131 1.1 ad /*
2132 1.18 perry * Spin waiting for initialization to finish, or for a message to be
2133 1.1 ad * delivered.
2134 1.1 ad */
2135 1.1 ad while (mly_idbr_true(mly, MLY_HM_STSACK)) {
2136 1.1 ad /* Check for a message */
2137 1.1 ad if (!mly_error_valid(mly))
2138 1.1 ad continue;
2139 1.1 ad
2140 1.1 ad error = mly_inb(mly, mly->mly_error_status) & ~MLY_MSG_EMPTY;
2141 1.1 ad param0 = mly_inb(mly, mly->mly_cmd_mailbox);
2142 1.1 ad param1 = mly_inb(mly, mly->mly_cmd_mailbox + 1);
2143 1.1 ad
2144 1.1 ad switch (error) {
2145 1.1 ad case MLY_MSG_SPINUP:
2146 1.1 ad if (!spinup) {
2147 1.1 ad printf("%s: drive spinup in progress\n",
2148 1.1 ad mly->mly_dv.dv_xname);
2149 1.1 ad spinup = 1;
2150 1.1 ad }
2151 1.1 ad break;
2152 1.1 ad
2153 1.1 ad case MLY_MSG_RACE_RECOVERY_FAIL:
2154 1.1 ad printf("%s: mirror race recovery failed - \n",
2155 1.1 ad mly->mly_dv.dv_xname);
2156 1.1 ad printf("%s: one or more drives offline\n",
2157 1.1 ad mly->mly_dv.dv_xname);
2158 1.1 ad break;
2159 1.1 ad
2160 1.1 ad case MLY_MSG_RACE_IN_PROGRESS:
2161 1.1 ad printf("%s: mirror race recovery in progress\n",
2162 1.1 ad mly->mly_dv.dv_xname);
2163 1.1 ad break;
2164 1.1 ad
2165 1.1 ad case MLY_MSG_RACE_ON_CRITICAL:
2166 1.1 ad printf("%s: mirror race recovery on critical drive\n",
2167 1.1 ad mly->mly_dv.dv_xname);
2168 1.1 ad break;
2169 1.1 ad
2170 1.1 ad case MLY_MSG_PARITY_ERROR:
2171 1.1 ad printf("%s: FATAL MEMORY PARITY ERROR\n",
2172 1.1 ad mly->mly_dv.dv_xname);
2173 1.1 ad return (ENXIO);
2174 1.1 ad
2175 1.1 ad default:
2176 1.18 perry printf("%s: unknown initialization code 0x%x\n",
2177 1.1 ad mly->mly_dv.dv_xname, error);
2178 1.1 ad break;
2179 1.1 ad }
2180 1.1 ad }
2181 1.1 ad
2182 1.1 ad return (0);
2183 1.1 ad }
2184 1.1 ad
2185 1.1 ad /*
2186 1.1 ad * Space-fill a character string
2187 1.1 ad */
2188 1.1 ad static void
2189 1.1 ad mly_padstr(char *dst, const char *src, int len)
2190 1.1 ad {
2191 1.1 ad
2192 1.1 ad while (len-- > 0) {
2193 1.1 ad if (*src != '\0')
2194 1.1 ad *dst++ = *src++;
2195 1.1 ad else
2196 1.1 ad *dst++ = ' ';
2197 1.1 ad }
2198 1.1 ad }
2199 1.1 ad
2200 1.1 ad /*
2201 1.1 ad * Allocate DMA safe memory.
2202 1.1 ad */
2203 1.1 ad static int
2204 1.1 ad mly_dmamem_alloc(struct mly_softc *mly, int size, bus_dmamap_t *dmamap,
2205 1.1 ad caddr_t *kva, bus_addr_t *paddr, bus_dma_segment_t *seg)
2206 1.1 ad {
2207 1.1 ad int rseg, rv, state;
2208 1.1 ad
2209 1.1 ad state = 0;
2210 1.1 ad
2211 1.1 ad if ((rv = bus_dmamem_alloc(mly->mly_dmat, size, NBPG, 0,
2212 1.1 ad seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
2213 1.1 ad printf("%s: dmamem_alloc = %d\n", mly->mly_dv.dv_xname, rv);
2214 1.1 ad goto bad;
2215 1.1 ad }
2216 1.1 ad
2217 1.1 ad state++;
2218 1.1 ad
2219 1.1 ad if ((rv = bus_dmamem_map(mly->mly_dmat, seg, 1, size, kva,
2220 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
2221 1.1 ad printf("%s: dmamem_map = %d\n", mly->mly_dv.dv_xname, rv);
2222 1.1 ad goto bad;
2223 1.1 ad }
2224 1.1 ad
2225 1.1 ad state++;
2226 1.1 ad
2227 1.1 ad if ((rv = bus_dmamap_create(mly->mly_dmat, size, size, 1, 0,
2228 1.1 ad BUS_DMA_NOWAIT, dmamap)) != 0) {
2229 1.1 ad printf("%s: dmamap_create = %d\n", mly->mly_dv.dv_xname, rv);
2230 1.1 ad goto bad;
2231 1.1 ad }
2232 1.1 ad
2233 1.1 ad state++;
2234 1.1 ad
2235 1.1 ad if ((rv = bus_dmamap_load(mly->mly_dmat, *dmamap, *kva, size,
2236 1.1 ad NULL, BUS_DMA_NOWAIT)) != 0) {
2237 1.1 ad printf("%s: dmamap_load = %d\n", mly->mly_dv.dv_xname, rv);
2238 1.1 ad goto bad;
2239 1.1 ad }
2240 1.1 ad
2241 1.1 ad *paddr = (*dmamap)->dm_segs[0].ds_addr;
2242 1.1 ad memset(*kva, 0, size);
2243 1.1 ad return (0);
2244 1.1 ad
2245 1.1 ad bad:
2246 1.1 ad if (state > 2)
2247 1.1 ad bus_dmamap_destroy(mly->mly_dmat, *dmamap);
2248 1.1 ad if (state > 1)
2249 1.1 ad bus_dmamem_unmap(mly->mly_dmat, *kva, size);
2250 1.1 ad if (state > 0)
2251 1.1 ad bus_dmamem_free(mly->mly_dmat, seg, 1);
2252 1.1 ad
2253 1.1 ad return (rv);
2254 1.1 ad }
2255 1.1 ad
2256 1.1 ad /*
2257 1.1 ad * Free DMA safe memory.
2258 1.1 ad */
2259 1.1 ad static void
2260 1.1 ad mly_dmamem_free(struct mly_softc *mly, int size, bus_dmamap_t dmamap,
2261 1.1 ad caddr_t kva, bus_dma_segment_t *seg)
2262 1.1 ad {
2263 1.1 ad
2264 1.1 ad bus_dmamap_unload(mly->mly_dmat, dmamap);
2265 1.1 ad bus_dmamap_destroy(mly->mly_dmat, dmamap);
2266 1.1 ad bus_dmamem_unmap(mly->mly_dmat, kva, size);
2267 1.1 ad bus_dmamem_free(mly->mly_dmat, seg, 1);
2268 1.1 ad }
2269 1.1 ad
2270 1.1 ad
2271 1.1 ad /*
2272 1.1 ad * Accept an open operation on the control device.
2273 1.1 ad */
2274 1.1 ad int
2275 1.1 ad mlyopen(dev_t dev, int flag, int mode, struct proc *p)
2276 1.1 ad {
2277 1.1 ad struct mly_softc *mly;
2278 1.1 ad
2279 1.1 ad if ((mly = device_lookup(&mly_cd, minor(dev))) == NULL)
2280 1.1 ad return (ENXIO);
2281 1.1 ad if ((mly->mly_state & MLY_STATE_INITOK) == 0)
2282 1.1 ad return (ENXIO);
2283 1.1 ad if ((mly->mly_state & MLY_STATE_OPEN) != 0)
2284 1.1 ad return (EBUSY);
2285 1.1 ad
2286 1.1 ad mly->mly_state |= MLY_STATE_OPEN;
2287 1.1 ad return (0);
2288 1.1 ad }
2289 1.1 ad
2290 1.1 ad /*
2291 1.1 ad * Accept the last close on the control device.
2292 1.1 ad */
2293 1.1 ad int
2294 1.1 ad mlyclose(dev_t dev, int flag, int mode, struct proc *p)
2295 1.1 ad {
2296 1.1 ad struct mly_softc *mly;
2297 1.1 ad
2298 1.1 ad mly = device_lookup(&mly_cd, minor(dev));
2299 1.1 ad mly->mly_state &= ~MLY_STATE_OPEN;
2300 1.1 ad return (0);
2301 1.1 ad }
2302 1.1 ad
2303 1.1 ad /*
2304 1.1 ad * Handle control operations.
2305 1.1 ad */
2306 1.1 ad int
2307 1.1 ad mlyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
2308 1.1 ad {
2309 1.1 ad struct mly_softc *mly;
2310 1.1 ad int rv;
2311 1.1 ad
2312 1.1 ad if (securelevel >= 2)
2313 1.1 ad return (EPERM);
2314 1.1 ad
2315 1.1 ad mly = device_lookup(&mly_cd, minor(dev));
2316 1.1 ad
2317 1.1 ad switch (cmd) {
2318 1.1 ad case MLYIO_COMMAND:
2319 1.1 ad rv = mly_user_command(mly, (void *)data);
2320 1.1 ad break;
2321 1.1 ad case MLYIO_HEALTH:
2322 1.1 ad rv = mly_user_health(mly, (void *)data);
2323 1.1 ad break;
2324 1.1 ad default:
2325 1.1 ad rv = ENOTTY;
2326 1.1 ad break;
2327 1.1 ad }
2328 1.1 ad
2329 1.1 ad return (rv);
2330 1.1 ad }
2331 1.1 ad
2332 1.1 ad /*
2333 1.1 ad * Execute a command passed in from userspace.
2334 1.1 ad *
2335 1.1 ad * The control structure contains the actual command for the controller, as
2336 1.1 ad * well as the user-space data pointer and data size, and an optional sense
2337 1.1 ad * buffer size/pointer. On completion, the data size is adjusted to the
2338 1.1 ad * command residual, and the sense buffer size to the size of the returned
2339 1.1 ad * sense data.
2340 1.1 ad */
2341 1.1 ad static int
2342 1.1 ad mly_user_command(struct mly_softc *mly, struct mly_user_command *uc)
2343 1.1 ad {
2344 1.1 ad struct mly_ccb *mc;
2345 1.1 ad int rv, mapped;
2346 1.1 ad
2347 1.1 ad if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
2348 1.1 ad return (rv);
2349 1.1 ad
2350 1.1 ad mapped = 0;
2351 1.1 ad mc->mc_data = NULL;
2352 1.1 ad
2353 1.1 ad /*
2354 1.1 ad * Handle data size/direction.
2355 1.1 ad */
2356 1.1 ad if ((mc->mc_length = abs(uc->DataTransferLength)) != 0) {
2357 1.6 ad if (mc->mc_length > MAXPHYS) {
2358 1.6 ad rv = EINVAL;
2359 1.6 ad goto out;
2360 1.6 ad }
2361 1.6 ad
2362 1.1 ad mc->mc_data = malloc(mc->mc_length, M_DEVBUF, M_WAITOK);
2363 1.1 ad if (mc->mc_data == NULL) {
2364 1.1 ad rv = ENOMEM;
2365 1.1 ad goto out;
2366 1.1 ad }
2367 1.1 ad
2368 1.1 ad if (uc->DataTransferLength > 0) {
2369 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
2370 1.1 ad memset(mc->mc_data, 0, mc->mc_length);
2371 1.1 ad }
2372 1.1 ad
2373 1.1 ad if (uc->DataTransferLength < 0) {
2374 1.1 ad mc->mc_flags |= MLY_CCB_DATAOUT;
2375 1.1 ad rv = copyin(uc->DataTransferBuffer, mc->mc_data,
2376 1.1 ad mc->mc_length);
2377 1.1 ad if (rv != 0)
2378 1.1 ad goto out;
2379 1.1 ad }
2380 1.1 ad
2381 1.1 ad if ((rv = mly_ccb_map(mly, mc)) != 0)
2382 1.1 ad goto out;
2383 1.1 ad mapped = 1;
2384 1.1 ad }
2385 1.1 ad
2386 1.1 ad /* Copy in the command and execute it. */
2387 1.1 ad memcpy(mc->mc_packet, &uc->CommandMailbox, sizeof(uc->CommandMailbox));
2388 1.1 ad
2389 1.1 ad if ((rv = mly_ccb_wait(mly, mc, 60000)) != 0)
2390 1.1 ad goto out;
2391 1.1 ad
2392 1.1 ad /* Return the data to userspace. */
2393 1.1 ad if (uc->DataTransferLength > 0) {
2394 1.1 ad rv = copyout(mc->mc_data, uc->DataTransferBuffer,
2395 1.1 ad mc->mc_length);
2396 1.1 ad if (rv != 0)
2397 1.1 ad goto out;
2398 1.1 ad }
2399 1.1 ad
2400 1.1 ad /* Return the sense buffer to userspace. */
2401 1.1 ad if (uc->RequestSenseLength > 0 && mc->mc_sense > 0) {
2402 1.1 ad rv = copyout(mc->mc_packet, uc->RequestSenseBuffer,
2403 1.1 ad min(uc->RequestSenseLength, mc->mc_sense));
2404 1.1 ad if (rv != 0)
2405 1.1 ad goto out;
2406 1.1 ad }
2407 1.1 ad
2408 1.1 ad /* Return command results to userspace (caller will copy out). */
2409 1.1 ad uc->DataTransferLength = mc->mc_resid;
2410 1.1 ad uc->RequestSenseLength = min(uc->RequestSenseLength, mc->mc_sense);
2411 1.1 ad uc->CommandStatus = mc->mc_status;
2412 1.1 ad rv = 0;
2413 1.1 ad
2414 1.1 ad out:
2415 1.1 ad if (mapped)
2416 1.1 ad mly_ccb_unmap(mly, mc);
2417 1.1 ad if (mc->mc_data != NULL)
2418 1.1 ad free(mc->mc_data, M_DEVBUF);
2419 1.1 ad if (mc != NULL)
2420 1.1 ad mly_ccb_free(mly, mc);
2421 1.1 ad
2422 1.1 ad return (rv);
2423 1.1 ad }
2424 1.1 ad
2425 1.1 ad /*
2426 1.1 ad * Return health status to userspace. If the health change index in the
2427 1.1 ad * user structure does not match that currently exported by the controller,
2428 1.1 ad * we return the current status immediately. Otherwise, we block until
2429 1.1 ad * either interrupted or new status is delivered.
2430 1.1 ad */
2431 1.1 ad static int
2432 1.1 ad mly_user_health(struct mly_softc *mly, struct mly_user_health *uh)
2433 1.1 ad {
2434 1.1 ad struct mly_health_status mh;
2435 1.1 ad int rv, s;
2436 1.1 ad
2437 1.1 ad /* Fetch the current health status from userspace. */
2438 1.1 ad rv = copyin(uh->HealthStatusBuffer, &mh, sizeof(mh));
2439 1.1 ad if (rv != 0)
2440 1.1 ad return (rv);
2441 1.1 ad
2442 1.1 ad /* spin waiting for a status update */
2443 1.1 ad s = splbio();
2444 1.1 ad if (mly->mly_event_change == mh.change_counter)
2445 1.1 ad rv = tsleep(&mly->mly_event_change, PRIBIO | PCATCH,
2446 1.1 ad "mlyhealth", 0);
2447 1.1 ad splx(s);
2448 1.1 ad
2449 1.1 ad if (rv == 0) {
2450 1.1 ad /*
2451 1.1 ad * Copy the controller's health status buffer out (there is
2452 1.1 ad * a race here if it changes again).
2453 1.1 ad */
2454 1.1 ad rv = copyout(&mly->mly_mmbox->mmm_health.status,
2455 1.1 ad uh->HealthStatusBuffer, sizeof(uh->HealthStatusBuffer));
2456 1.1 ad }
2457 1.1 ad
2458 1.1 ad return (rv);
2459 1.1 ad }
2460