mly.c revision 1.41 1 1.41 cegger /* $NetBSD: mly.c,v 1.41 2009/05/06 10:34:32 cegger Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.1 ad * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 ad * by Andrew Doran, Thor Lancelot Simon, and Eric Haszlakiewicz.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad *
19 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
30 1.1 ad */
31 1.1 ad
32 1.1 ad /*-
33 1.1 ad * Copyright (c) 2000, 2001 Michael Smith
34 1.1 ad * Copyright (c) 2000 BSDi
35 1.1 ad * All rights reserved.
36 1.1 ad *
37 1.1 ad * Redistribution and use in source and binary forms, with or without
38 1.1 ad * modification, are permitted provided that the following conditions
39 1.1 ad * are met:
40 1.1 ad * 1. Redistributions of source code must retain the above copyright
41 1.1 ad * notice, this list of conditions and the following disclaimer.
42 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 ad * notice, this list of conditions and the following disclaimer in the
44 1.1 ad * documentation and/or other materials provided with the distribution.
45 1.1 ad *
46 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 1.1 ad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 1.1 ad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 1.1 ad * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 1.1 ad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 1.1 ad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 1.1 ad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 1.1 ad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 1.1 ad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 1.1 ad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 1.1 ad * SUCH DAMAGE.
57 1.1 ad *
58 1.1 ad * from FreeBSD: mly.c,v 1.8 2001/07/14 00:12:22 msmith Exp
59 1.1 ad */
60 1.1 ad
61 1.1 ad /*
62 1.1 ad * Driver for the Mylex AcceleRAID and eXtremeRAID family with v6 firmware.
63 1.1 ad *
64 1.1 ad * TODO:
65 1.1 ad *
66 1.1 ad * o Make mly->mly_btl a hash, then MLY_BTL_RESCAN becomes a SIMPLEQ.
67 1.1 ad * o Handle FC and multiple LUNs.
68 1.1 ad * o Fix mmbox usage.
69 1.1 ad * o Fix transfer speed fudge.
70 1.1 ad */
71 1.8 lukem
72 1.8 lukem #include <sys/cdefs.h>
73 1.41 cegger __KERNEL_RCSID(0, "$NetBSD: mly.c,v 1.41 2009/05/06 10:34:32 cegger Exp $");
74 1.1 ad
75 1.1 ad #include <sys/param.h>
76 1.1 ad #include <sys/systm.h>
77 1.1 ad #include <sys/device.h>
78 1.1 ad #include <sys/kernel.h>
79 1.1 ad #include <sys/queue.h>
80 1.1 ad #include <sys/buf.h>
81 1.1 ad #include <sys/endian.h>
82 1.1 ad #include <sys/conf.h>
83 1.1 ad #include <sys/malloc.h>
84 1.1 ad #include <sys/ioctl.h>
85 1.1 ad #include <sys/scsiio.h>
86 1.1 ad #include <sys/kthread.h>
87 1.31 elad #include <sys/kauth.h>
88 1.1 ad
89 1.1 ad #include <uvm/uvm_extern.h>
90 1.1 ad
91 1.36 ad #include <sys/bus.h>
92 1.1 ad
93 1.1 ad #include <dev/scsipi/scsi_all.h>
94 1.1 ad #include <dev/scsipi/scsipi_all.h>
95 1.1 ad #include <dev/scsipi/scsiconf.h>
96 1.1 ad
97 1.1 ad #include <dev/pci/pcireg.h>
98 1.1 ad #include <dev/pci/pcivar.h>
99 1.1 ad #include <dev/pci/pcidevs.h>
100 1.1 ad
101 1.1 ad #include <dev/pci/mlyreg.h>
102 1.1 ad #include <dev/pci/mlyio.h>
103 1.1 ad #include <dev/pci/mlyvar.h>
104 1.1 ad #include <dev/pci/mly_tables.h>
105 1.1 ad
106 1.41 cegger static void mly_attach(device_t, device_t, void *);
107 1.41 cegger static int mly_match(device_t, cfdata_t, void *);
108 1.1 ad static const struct mly_ident *mly_find_ident(struct pci_attach_args *);
109 1.1 ad static int mly_fwhandshake(struct mly_softc *);
110 1.1 ad static int mly_flush(struct mly_softc *);
111 1.1 ad static int mly_intr(void *);
112 1.1 ad static void mly_shutdown(void *);
113 1.1 ad
114 1.1 ad static int mly_alloc_ccbs(struct mly_softc *);
115 1.1 ad static void mly_check_event(struct mly_softc *);
116 1.1 ad static void mly_complete_event(struct mly_softc *, struct mly_ccb *);
117 1.1 ad static void mly_complete_rescan(struct mly_softc *, struct mly_ccb *);
118 1.23 perry static int mly_dmamem_alloc(struct mly_softc *, int, bus_dmamap_t *,
119 1.34 christos void **, bus_addr_t *, bus_dma_segment_t *);
120 1.23 perry static void mly_dmamem_free(struct mly_softc *, int, bus_dmamap_t,
121 1.34 christos void *, bus_dma_segment_t *);
122 1.1 ad static int mly_enable_mmbox(struct mly_softc *);
123 1.1 ad static void mly_fetch_event(struct mly_softc *);
124 1.1 ad static int mly_get_controllerinfo(struct mly_softc *);
125 1.1 ad static int mly_get_eventstatus(struct mly_softc *);
126 1.1 ad static int mly_ioctl(struct mly_softc *, struct mly_cmd_ioctl *,
127 1.1 ad void **, size_t, void *, size_t *);
128 1.1 ad static void mly_padstr(char *, const char *, int);
129 1.1 ad static void mly_process_event(struct mly_softc *, struct mly_event *);
130 1.1 ad static void mly_release_ccbs(struct mly_softc *);
131 1.1 ad static int mly_scan_btl(struct mly_softc *, int, int);
132 1.1 ad static void mly_scan_channel(struct mly_softc *, int);
133 1.1 ad static void mly_thread(void *);
134 1.1 ad
135 1.1 ad static int mly_ccb_alloc(struct mly_softc *, struct mly_ccb **);
136 1.1 ad static void mly_ccb_complete(struct mly_softc *, struct mly_ccb *);
137 1.1 ad static void mly_ccb_enqueue(struct mly_softc *, struct mly_ccb *);
138 1.1 ad static void mly_ccb_free(struct mly_softc *, struct mly_ccb *);
139 1.1 ad static int mly_ccb_map(struct mly_softc *, struct mly_ccb *);
140 1.1 ad static int mly_ccb_poll(struct mly_softc *, struct mly_ccb *, int);
141 1.1 ad static int mly_ccb_submit(struct mly_softc *, struct mly_ccb *);
142 1.1 ad static void mly_ccb_unmap(struct mly_softc *, struct mly_ccb *);
143 1.1 ad static int mly_ccb_wait(struct mly_softc *, struct mly_ccb *, int);
144 1.1 ad
145 1.23 perry static void mly_get_xfer_mode(struct mly_softc *, int,
146 1.1 ad struct scsipi_xfer_mode *);
147 1.1 ad static void mly_scsipi_complete(struct mly_softc *, struct mly_ccb *);
148 1.34 christos static int mly_scsipi_ioctl(struct scsipi_channel *, u_long, void *,
149 1.1 ad int, struct proc *);
150 1.1 ad static void mly_scsipi_minphys(struct buf *);
151 1.1 ad static void mly_scsipi_request(struct scsipi_channel *,
152 1.1 ad scsipi_adapter_req_t, void *);
153 1.1 ad
154 1.1 ad static int mly_user_command(struct mly_softc *, struct mly_user_command *);
155 1.1 ad static int mly_user_health(struct mly_softc *, struct mly_user_health *);
156 1.1 ad
157 1.1 ad extern struct cfdriver mly_cd;
158 1.1 ad
159 1.13 thorpej CFATTACH_DECL(mly, sizeof(struct mly_softc),
160 1.14 thorpej mly_match, mly_attach, NULL, NULL);
161 1.11 gehenna
162 1.11 gehenna dev_type_open(mlyopen);
163 1.11 gehenna dev_type_close(mlyclose);
164 1.11 gehenna dev_type_ioctl(mlyioctl);
165 1.11 gehenna
166 1.11 gehenna const struct cdevsw mly_cdevsw = {
167 1.11 gehenna mlyopen, mlyclose, noread, nowrite, mlyioctl,
168 1.29 christos nostop, notty, nopoll, nommap, nokqfilter, D_OTHER,
169 1.1 ad };
170 1.1 ad
171 1.29 christos static struct mly_ident {
172 1.1 ad u_short vendor;
173 1.1 ad u_short product;
174 1.1 ad u_short subvendor;
175 1.1 ad u_short subproduct;
176 1.1 ad int hwif;
177 1.1 ad const char *desc;
178 1.29 christos } const mly_ident[] = {
179 1.1 ad {
180 1.1 ad PCI_VENDOR_MYLEX,
181 1.1 ad PCI_PRODUCT_MYLEX_EXTREMERAID,
182 1.1 ad PCI_VENDOR_MYLEX,
183 1.1 ad 0x0040,
184 1.1 ad MLY_HWIF_STRONGARM,
185 1.1 ad "eXtremeRAID 2000"
186 1.1 ad },
187 1.1 ad {
188 1.1 ad PCI_VENDOR_MYLEX,
189 1.1 ad PCI_PRODUCT_MYLEX_EXTREMERAID,
190 1.1 ad PCI_VENDOR_MYLEX,
191 1.1 ad 0x0030,
192 1.1 ad MLY_HWIF_STRONGARM,
193 1.1 ad "eXtremeRAID 3000"
194 1.1 ad },
195 1.1 ad {
196 1.1 ad PCI_VENDOR_MYLEX,
197 1.1 ad PCI_PRODUCT_MYLEX_ACCELERAID,
198 1.1 ad PCI_VENDOR_MYLEX,
199 1.1 ad 0x0050,
200 1.1 ad MLY_HWIF_I960RX,
201 1.1 ad "AcceleRAID 352"
202 1.1 ad },
203 1.1 ad {
204 1.1 ad PCI_VENDOR_MYLEX,
205 1.1 ad PCI_PRODUCT_MYLEX_ACCELERAID,
206 1.1 ad PCI_VENDOR_MYLEX,
207 1.1 ad 0x0052,
208 1.1 ad MLY_HWIF_I960RX,
209 1.1 ad "AcceleRAID 170"
210 1.1 ad },
211 1.1 ad {
212 1.1 ad PCI_VENDOR_MYLEX,
213 1.1 ad PCI_PRODUCT_MYLEX_ACCELERAID,
214 1.1 ad PCI_VENDOR_MYLEX,
215 1.1 ad 0x0054,
216 1.1 ad MLY_HWIF_I960RX,
217 1.1 ad "AcceleRAID 160"
218 1.1 ad },
219 1.1 ad };
220 1.1 ad
221 1.1 ad static void *mly_sdh;
222 1.1 ad
223 1.1 ad /*
224 1.1 ad * Try to find a `mly_ident' entry corresponding to this board.
225 1.1 ad */
226 1.1 ad static const struct mly_ident *
227 1.1 ad mly_find_ident(struct pci_attach_args *pa)
228 1.1 ad {
229 1.1 ad const struct mly_ident *mpi, *maxmpi;
230 1.1 ad pcireg_t reg;
231 1.1 ad
232 1.1 ad mpi = mly_ident;
233 1.1 ad maxmpi = mpi + sizeof(mly_ident) / sizeof(mly_ident[0]);
234 1.2 ad
235 1.2 ad if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O)
236 1.2 ad return (NULL);
237 1.1 ad
238 1.1 ad for (; mpi < maxmpi; mpi++) {
239 1.1 ad if (PCI_VENDOR(pa->pa_id) != mpi->vendor ||
240 1.1 ad PCI_PRODUCT(pa->pa_id) != mpi->product)
241 1.1 ad continue;
242 1.1 ad
243 1.1 ad if (mpi->subvendor == 0x0000)
244 1.1 ad return (mpi);
245 1.1 ad
246 1.1 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
247 1.1 ad
248 1.1 ad if (PCI_VENDOR(reg) == mpi->subvendor &&
249 1.1 ad PCI_PRODUCT(reg) == mpi->subproduct)
250 1.1 ad return (mpi);
251 1.1 ad }
252 1.1 ad
253 1.1 ad return (NULL);
254 1.1 ad }
255 1.1 ad
256 1.1 ad /*
257 1.1 ad * Match a supported board.
258 1.1 ad */
259 1.1 ad static int
260 1.41 cegger mly_match(device_t parent, cfdata_t cfdata, void *aux)
261 1.1 ad {
262 1.1 ad
263 1.1 ad return (mly_find_ident(aux) != NULL);
264 1.1 ad }
265 1.1 ad
266 1.1 ad /*
267 1.1 ad * Attach a supported board.
268 1.1 ad */
269 1.1 ad static void
270 1.41 cegger mly_attach(device_t parent, device_t self, void *aux)
271 1.1 ad {
272 1.1 ad struct pci_attach_args *pa;
273 1.1 ad struct mly_softc *mly;
274 1.1 ad struct mly_ioctl_getcontrollerinfo *mi;
275 1.1 ad const struct mly_ident *ident;
276 1.1 ad pci_chipset_tag_t pc;
277 1.1 ad pci_intr_handle_t ih;
278 1.1 ad bus_space_handle_t memh, ioh;
279 1.1 ad bus_space_tag_t memt, iot;
280 1.1 ad pcireg_t reg;
281 1.1 ad const char *intrstr;
282 1.1 ad int ior, memr, i, rv, state;
283 1.1 ad struct scsipi_adapter *adapt;
284 1.1 ad struct scsipi_channel *chan;
285 1.1 ad
286 1.1 ad mly = (struct mly_softc *)self;
287 1.1 ad pa = aux;
288 1.1 ad pc = pa->pa_pc;
289 1.1 ad ident = mly_find_ident(pa);
290 1.1 ad state = 0;
291 1.1 ad
292 1.1 ad mly->mly_dmat = pa->pa_dmat;
293 1.1 ad mly->mly_hwif = ident->hwif;
294 1.1 ad
295 1.1 ad printf(": Mylex %s\n", ident->desc);
296 1.1 ad
297 1.1 ad /*
298 1.1 ad * Map the PCI register window.
299 1.1 ad */
300 1.1 ad memr = -1;
301 1.1 ad ior = -1;
302 1.1 ad
303 1.1 ad for (i = 0x10; i <= 0x14; i += 4) {
304 1.1 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
305 1.1 ad
306 1.1 ad if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
307 1.1 ad if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
308 1.1 ad ior = i;
309 1.1 ad } else {
310 1.1 ad if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
311 1.1 ad memr = i;
312 1.1 ad }
313 1.1 ad }
314 1.1 ad
315 1.1 ad if (memr != -1)
316 1.1 ad if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
317 1.1 ad &memt, &memh, NULL, NULL))
318 1.1 ad memr = -1;
319 1.1 ad if (ior != -1)
320 1.1 ad if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
321 1.1 ad &iot, &ioh, NULL, NULL))
322 1.1 ad ior = -1;
323 1.1 ad
324 1.1 ad if (memr != -1) {
325 1.1 ad mly->mly_iot = memt;
326 1.1 ad mly->mly_ioh = memh;
327 1.1 ad } else if (ior != -1) {
328 1.1 ad mly->mly_iot = iot;
329 1.1 ad mly->mly_ioh = ioh;
330 1.1 ad } else {
331 1.37 cegger aprint_error_dev(self, "can't map i/o or memory space\n");
332 1.1 ad return;
333 1.1 ad }
334 1.1 ad
335 1.1 ad /*
336 1.1 ad * Enable the device.
337 1.1 ad */
338 1.1 ad reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
339 1.1 ad pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
340 1.1 ad reg | PCI_COMMAND_MASTER_ENABLE);
341 1.1 ad
342 1.1 ad /*
343 1.1 ad * Map and establish the interrupt.
344 1.1 ad */
345 1.1 ad if (pci_intr_map(pa, &ih)) {
346 1.37 cegger aprint_error_dev(self, "can't map interrupt\n");
347 1.1 ad return;
348 1.1 ad }
349 1.1 ad intrstr = pci_intr_string(pc, ih);
350 1.1 ad mly->mly_ih = pci_intr_establish(pc, ih, IPL_BIO, mly_intr, mly);
351 1.1 ad if (mly->mly_ih == NULL) {
352 1.37 cegger aprint_error_dev(self, "can't establish interrupt");
353 1.1 ad if (intrstr != NULL)
354 1.1 ad printf(" at %s", intrstr);
355 1.1 ad printf("\n");
356 1.1 ad return;
357 1.1 ad }
358 1.1 ad
359 1.1 ad if (intrstr != NULL)
360 1.37 cegger printf("%s: interrupting at %s\n", device_xname(&mly->mly_dv),
361 1.1 ad intrstr);
362 1.1 ad
363 1.1 ad /*
364 1.1 ad * Take care of interface-specific tasks.
365 1.1 ad */
366 1.1 ad switch (mly->mly_hwif) {
367 1.1 ad case MLY_HWIF_I960RX:
368 1.1 ad mly->mly_doorbell_true = 0x00;
369 1.1 ad mly->mly_cmd_mailbox = MLY_I960RX_COMMAND_MAILBOX;
370 1.1 ad mly->mly_status_mailbox = MLY_I960RX_STATUS_MAILBOX;
371 1.1 ad mly->mly_idbr = MLY_I960RX_IDBR;
372 1.1 ad mly->mly_odbr = MLY_I960RX_ODBR;
373 1.1 ad mly->mly_error_status = MLY_I960RX_ERROR_STATUS;
374 1.1 ad mly->mly_interrupt_status = MLY_I960RX_INTERRUPT_STATUS;
375 1.1 ad mly->mly_interrupt_mask = MLY_I960RX_INTERRUPT_MASK;
376 1.1 ad break;
377 1.1 ad
378 1.1 ad case MLY_HWIF_STRONGARM:
379 1.1 ad mly->mly_doorbell_true = 0xff;
380 1.1 ad mly->mly_cmd_mailbox = MLY_STRONGARM_COMMAND_MAILBOX;
381 1.1 ad mly->mly_status_mailbox = MLY_STRONGARM_STATUS_MAILBOX;
382 1.1 ad mly->mly_idbr = MLY_STRONGARM_IDBR;
383 1.1 ad mly->mly_odbr = MLY_STRONGARM_ODBR;
384 1.1 ad mly->mly_error_status = MLY_STRONGARM_ERROR_STATUS;
385 1.1 ad mly->mly_interrupt_status = MLY_STRONGARM_INTERRUPT_STATUS;
386 1.1 ad mly->mly_interrupt_mask = MLY_STRONGARM_INTERRUPT_MASK;
387 1.1 ad break;
388 1.1 ad }
389 1.1 ad
390 1.1 ad /*
391 1.1 ad * Allocate and map the scatter/gather lists.
392 1.1 ad */
393 1.1 ad rv = mly_dmamem_alloc(mly, MLY_SGL_SIZE * MLY_MAX_CCBS,
394 1.34 christos &mly->mly_sg_dmamap, (void **)&mly->mly_sg,
395 1.1 ad &mly->mly_sg_busaddr, &mly->mly_sg_seg);
396 1.1 ad if (rv) {
397 1.1 ad printf("%s: unable to allocate S/G maps\n",
398 1.37 cegger device_xname(&mly->mly_dv));
399 1.1 ad goto bad;
400 1.1 ad }
401 1.1 ad state++;
402 1.1 ad
403 1.1 ad /*
404 1.1 ad * Allocate and map the memory mailbox.
405 1.1 ad */
406 1.1 ad rv = mly_dmamem_alloc(mly, sizeof(struct mly_mmbox),
407 1.34 christos &mly->mly_mmbox_dmamap, (void **)&mly->mly_mmbox,
408 1.1 ad &mly->mly_mmbox_busaddr, &mly->mly_mmbox_seg);
409 1.1 ad if (rv) {
410 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to allocate mailboxes\n");
411 1.1 ad goto bad;
412 1.1 ad }
413 1.1 ad state++;
414 1.1 ad
415 1.1 ad /*
416 1.1 ad * Initialise per-controller queues.
417 1.1 ad */
418 1.1 ad SLIST_INIT(&mly->mly_ccb_free);
419 1.1 ad SIMPLEQ_INIT(&mly->mly_ccb_queue);
420 1.1 ad
421 1.1 ad /*
422 1.1 ad * Disable interrupts before we start talking to the controller.
423 1.1 ad */
424 1.1 ad mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);
425 1.1 ad
426 1.23 perry /*
427 1.1 ad * Wait for the controller to come ready, handshaking with the
428 1.1 ad * firmware if required. This is typically only necessary on
429 1.1 ad * platforms where the controller BIOS does not run.
430 1.1 ad */
431 1.1 ad if (mly_fwhandshake(mly)) {
432 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to bring controller online\n");
433 1.1 ad goto bad;
434 1.1 ad }
435 1.1 ad
436 1.1 ad /*
437 1.1 ad * Allocate initial command buffers, obtain controller feature
438 1.1 ad * information, and then reallocate command buffers, since we'll
439 1.1 ad * know how many we want.
440 1.1 ad */
441 1.1 ad if (mly_alloc_ccbs(mly)) {
442 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to allocate CCBs\n");
443 1.1 ad goto bad;
444 1.1 ad }
445 1.1 ad state++;
446 1.1 ad if (mly_get_controllerinfo(mly)) {
447 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to retrieve controller info\n");
448 1.1 ad goto bad;
449 1.1 ad }
450 1.1 ad mly_release_ccbs(mly);
451 1.1 ad if (mly_alloc_ccbs(mly)) {
452 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to allocate CCBs\n");
453 1.1 ad state--;
454 1.1 ad goto bad;
455 1.1 ad }
456 1.1 ad
457 1.1 ad /*
458 1.1 ad * Get the current event counter for health purposes, populate the
459 1.1 ad * initial health status buffer.
460 1.1 ad */
461 1.1 ad if (mly_get_eventstatus(mly)) {
462 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to retrieve event status\n");
463 1.1 ad goto bad;
464 1.1 ad }
465 1.1 ad
466 1.1 ad /*
467 1.1 ad * Enable memory-mailbox mode.
468 1.1 ad */
469 1.1 ad if (mly_enable_mmbox(mly)) {
470 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to enable memory mailbox\n");
471 1.1 ad goto bad;
472 1.1 ad }
473 1.1 ad
474 1.23 perry /*
475 1.1 ad * Print a little information about the controller.
476 1.1 ad */
477 1.1 ad mi = mly->mly_controllerinfo;
478 1.1 ad
479 1.1 ad printf("%s: %d physical channel%s, firmware %d.%02d-%d-%02d "
480 1.37 cegger "(%02d%02d%02d%02d), %dMB RAM\n", device_xname(&mly->mly_dv),
481 1.1 ad mi->physical_channels_present,
482 1.1 ad (mi->physical_channels_present) > 1 ? "s" : "",
483 1.1 ad mi->fw_major, mi->fw_minor, mi->fw_turn, mi->fw_build,
484 1.1 ad mi->fw_century, mi->fw_year, mi->fw_month, mi->fw_day,
485 1.1 ad le16toh(mi->memory_size));
486 1.1 ad
487 1.1 ad /*
488 1.1 ad * Register our `shutdownhook'.
489 1.1 ad */
490 1.1 ad if (mly_sdh == NULL)
491 1.1 ad shutdownhook_establish(mly_shutdown, NULL);
492 1.1 ad
493 1.1 ad /*
494 1.1 ad * Clear any previous BTL information. For each bus that scsipi
495 1.1 ad * wants to scan, we'll receive the SCBUSIOLLSCAN ioctl and retrieve
496 1.1 ad * all BTL info at that point.
497 1.1 ad */
498 1.1 ad memset(&mly->mly_btl, 0, sizeof(mly->mly_btl));
499 1.1 ad
500 1.1 ad mly->mly_nchans = mly->mly_controllerinfo->physical_channels_present +
501 1.1 ad mly->mly_controllerinfo->virtual_channels_present;
502 1.1 ad
503 1.1 ad /*
504 1.1 ad * Attach to scsipi.
505 1.1 ad */
506 1.1 ad adapt = &mly->mly_adapt;
507 1.1 ad memset(adapt, 0, sizeof(*adapt));
508 1.1 ad adapt->adapt_dev = &mly->mly_dv;
509 1.1 ad adapt->adapt_nchannels = mly->mly_nchans;
510 1.1 ad adapt->adapt_openings = mly->mly_ncmds - MLY_CCBS_RESV;
511 1.1 ad adapt->adapt_max_periph = mly->mly_ncmds - MLY_CCBS_RESV;
512 1.1 ad adapt->adapt_request = mly_scsipi_request;
513 1.1 ad adapt->adapt_minphys = mly_scsipi_minphys;
514 1.1 ad adapt->adapt_ioctl = mly_scsipi_ioctl;
515 1.1 ad
516 1.1 ad for (i = 0; i < mly->mly_nchans; i++) {
517 1.1 ad chan = &mly->mly_chans[i];
518 1.1 ad memset(chan, 0, sizeof(*chan));
519 1.1 ad chan->chan_adapter = adapt;
520 1.1 ad chan->chan_bustype = &scsi_bustype;
521 1.1 ad chan->chan_channel = i;
522 1.1 ad chan->chan_ntargets = MLY_MAX_TARGETS;
523 1.1 ad chan->chan_nluns = MLY_MAX_LUNS;
524 1.1 ad chan->chan_id = mly->mly_controllerparam->initiator_id;
525 1.1 ad chan->chan_flags = SCSIPI_CHAN_NOSETTLE;
526 1.1 ad config_found(&mly->mly_dv, chan, scsiprint);
527 1.1 ad }
528 1.1 ad
529 1.1 ad /*
530 1.1 ad * Now enable interrupts...
531 1.1 ad */
532 1.1 ad mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);
533 1.1 ad
534 1.1 ad /*
535 1.1 ad * Finally, create our monitoring thread.
536 1.1 ad */
537 1.1 ad mly->mly_state |= MLY_STATE_INITOK;
538 1.35 ad rv = kthread_create(PRI_NONE, 0, NULL, mly_thread, mly,
539 1.37 cegger &mly->mly_thread, "%s", device_xname(&mly->mly_dv));
540 1.35 ad if (rv != 0)
541 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to create thread (%d)\n",
542 1.37 cegger rv);
543 1.1 ad return;
544 1.1 ad
545 1.1 ad bad:
546 1.1 ad if (state > 2)
547 1.1 ad mly_release_ccbs(mly);
548 1.1 ad if (state > 1)
549 1.1 ad mly_dmamem_free(mly, sizeof(struct mly_mmbox),
550 1.34 christos mly->mly_mmbox_dmamap, (void *)mly->mly_mmbox,
551 1.1 ad &mly->mly_mmbox_seg);
552 1.1 ad if (state > 0)
553 1.1 ad mly_dmamem_free(mly, MLY_SGL_SIZE * MLY_MAX_CCBS,
554 1.34 christos mly->mly_sg_dmamap, (void *)mly->mly_sg,
555 1.1 ad &mly->mly_sg_seg);
556 1.1 ad }
557 1.1 ad
558 1.1 ad /*
559 1.1 ad * Scan all possible devices on the specified channel.
560 1.1 ad */
561 1.1 ad static void
562 1.1 ad mly_scan_channel(struct mly_softc *mly, int bus)
563 1.1 ad {
564 1.3 ad int s, target;
565 1.1 ad
566 1.3 ad for (target = 0; target < MLY_MAX_TARGETS; target++) {
567 1.3 ad s = splbio();
568 1.3 ad if (!mly_scan_btl(mly, bus, target)) {
569 1.3 ad tsleep(&mly->mly_btl[bus][target], PRIBIO, "mlyscan",
570 1.3 ad 0);
571 1.3 ad }
572 1.3 ad splx(s);
573 1.1 ad }
574 1.1 ad }
575 1.1 ad
576 1.1 ad /*
577 1.1 ad * Shut down all configured `mly' devices.
578 1.1 ad */
579 1.1 ad static void
580 1.32 christos mly_shutdown(void *cookie)
581 1.1 ad {
582 1.1 ad struct mly_softc *mly;
583 1.1 ad int i;
584 1.1 ad
585 1.1 ad for (i = 0; i < mly_cd.cd_ndevs; i++) {
586 1.39 tsutsui if ((mly = device_lookup_private(&mly_cd, i)) == NULL)
587 1.1 ad continue;
588 1.1 ad
589 1.1 ad if (mly_flush(mly))
590 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to flush cache\n");
591 1.1 ad }
592 1.1 ad }
593 1.1 ad
594 1.1 ad /*
595 1.1 ad * Fill in the mly_controllerinfo and mly_controllerparam fields in the
596 1.1 ad * softc.
597 1.1 ad */
598 1.1 ad static int
599 1.1 ad mly_get_controllerinfo(struct mly_softc *mly)
600 1.1 ad {
601 1.1 ad struct mly_cmd_ioctl mci;
602 1.1 ad int rv;
603 1.1 ad
604 1.1 ad /*
605 1.1 ad * Build the getcontrollerinfo ioctl and send it.
606 1.1 ad */
607 1.1 ad memset(&mci, 0, sizeof(mci));
608 1.1 ad mci.sub_ioctl = MDACIOCTL_GETCONTROLLERINFO;
609 1.1 ad rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerinfo,
610 1.1 ad sizeof(*mly->mly_controllerinfo), NULL, NULL);
611 1.1 ad if (rv != 0)
612 1.1 ad return (rv);
613 1.1 ad
614 1.1 ad /*
615 1.1 ad * Build the getcontrollerparameter ioctl and send it.
616 1.1 ad */
617 1.1 ad memset(&mci, 0, sizeof(mci));
618 1.1 ad mci.sub_ioctl = MDACIOCTL_GETCONTROLLERPARAMETER;
619 1.1 ad rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerparam,
620 1.1 ad sizeof(*mly->mly_controllerparam), NULL, NULL);
621 1.1 ad
622 1.1 ad return (rv);
623 1.1 ad }
624 1.1 ad
625 1.1 ad /*
626 1.1 ad * Rescan a device, possibly as a consequence of getting an event which
627 1.1 ad * suggests that it may have changed. Must be called with interrupts
628 1.1 ad * blocked.
629 1.1 ad */
630 1.1 ad static int
631 1.1 ad mly_scan_btl(struct mly_softc *mly, int bus, int target)
632 1.1 ad {
633 1.1 ad struct mly_ccb *mc;
634 1.1 ad struct mly_cmd_ioctl *mci;
635 1.1 ad int rv;
636 1.1 ad
637 1.1 ad if (target == mly->mly_controllerparam->initiator_id) {
638 1.1 ad mly->mly_btl[bus][target].mb_flags = MLY_BTL_PROTECTED;
639 1.1 ad return (EIO);
640 1.1 ad }
641 1.1 ad
642 1.1 ad /* Don't re-scan if a scan is already in progress. */
643 1.1 ad if ((mly->mly_btl[bus][target].mb_flags & MLY_BTL_SCANNING) != 0)
644 1.1 ad return (EBUSY);
645 1.1 ad
646 1.1 ad /* Get a command. */
647 1.1 ad if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
648 1.1 ad return (rv);
649 1.1 ad
650 1.1 ad /* Set up the data buffer. */
651 1.23 perry mc->mc_data = malloc(sizeof(union mly_devinfo),
652 1.9 tsutsui M_DEVBUF, M_NOWAIT|M_ZERO);
653 1.1 ad
654 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
655 1.1 ad mc->mc_complete = mly_complete_rescan;
656 1.1 ad
657 1.23 perry /*
658 1.1 ad * Build the ioctl.
659 1.1 ad */
660 1.1 ad mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
661 1.1 ad mci->opcode = MDACMD_IOCTL;
662 1.1 ad mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
663 1.1 ad memset(&mci->param, 0, sizeof(mci->param));
664 1.1 ad
665 1.1 ad if (MLY_BUS_IS_VIRTUAL(mly, bus)) {
666 1.1 ad mc->mc_length = sizeof(struct mly_ioctl_getlogdevinfovalid);
667 1.1 ad mci->data_size = htole32(mc->mc_length);
668 1.1 ad mci->sub_ioctl = MDACIOCTL_GETLOGDEVINFOVALID;
669 1.1 ad _lto3l(MLY_LOGADDR(0, MLY_LOGDEV_ID(mly, bus, target)),
670 1.1 ad mci->addr);
671 1.1 ad } else {
672 1.1 ad mc->mc_length = sizeof(struct mly_ioctl_getphysdevinfovalid);
673 1.1 ad mci->data_size = htole32(mc->mc_length);
674 1.1 ad mci->sub_ioctl = MDACIOCTL_GETPHYSDEVINFOVALID;
675 1.1 ad _lto3l(MLY_PHYADDR(0, bus, target, 0), mci->addr);
676 1.1 ad }
677 1.1 ad
678 1.1 ad /*
679 1.1 ad * Dispatch the command.
680 1.1 ad */
681 1.3 ad if ((rv = mly_ccb_map(mly, mc)) != 0) {
682 1.3 ad free(mc->mc_data, M_DEVBUF);
683 1.3 ad mly_ccb_free(mly, mc);
684 1.3 ad return(rv);
685 1.3 ad }
686 1.3 ad
687 1.1 ad mly->mly_btl[bus][target].mb_flags |= MLY_BTL_SCANNING;
688 1.1 ad mly_ccb_enqueue(mly, mc);
689 1.1 ad return (0);
690 1.1 ad }
691 1.1 ad
692 1.1 ad /*
693 1.1 ad * Handle the completion of a rescan operation.
694 1.1 ad */
695 1.1 ad static void
696 1.1 ad mly_complete_rescan(struct mly_softc *mly, struct mly_ccb *mc)
697 1.1 ad {
698 1.1 ad struct mly_ioctl_getlogdevinfovalid *ldi;
699 1.1 ad struct mly_ioctl_getphysdevinfovalid *pdi;
700 1.1 ad struct mly_cmd_ioctl *mci;
701 1.1 ad struct mly_btl btl, *btlp;
702 1.1 ad struct scsipi_xfer_mode xm;
703 1.1 ad int bus, target, rescan;
704 1.1 ad u_int tmp;
705 1.1 ad
706 1.1 ad mly_ccb_unmap(mly, mc);
707 1.1 ad
708 1.1 ad /*
709 1.1 ad * Recover the bus and target from the command. We need these even
710 1.1 ad * in the case where we don't have a useful response.
711 1.1 ad */
712 1.1 ad mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
713 1.1 ad tmp = _3ltol(mci->addr);
714 1.1 ad rescan = 0;
715 1.1 ad
716 1.1 ad if (mci->sub_ioctl == MDACIOCTL_GETLOGDEVINFOVALID) {
717 1.1 ad bus = MLY_LOGDEV_BUS(mly, MLY_LOGADDR_DEV(tmp));
718 1.1 ad target = MLY_LOGDEV_TARGET(mly, MLY_LOGADDR_DEV(tmp));
719 1.1 ad } else {
720 1.1 ad bus = MLY_PHYADDR_CHANNEL(tmp);
721 1.1 ad target = MLY_PHYADDR_TARGET(tmp);
722 1.1 ad }
723 1.1 ad
724 1.1 ad btlp = &mly->mly_btl[bus][target];
725 1.1 ad
726 1.1 ad /* The default result is 'no device'. */
727 1.1 ad memset(&btl, 0, sizeof(btl));
728 1.1 ad btl.mb_flags = MLY_BTL_PROTECTED;
729 1.1 ad
730 1.1 ad /* If the rescan completed OK, we have possibly-new BTL data. */
731 1.1 ad if (mc->mc_status != 0)
732 1.1 ad goto out;
733 1.1 ad
734 1.1 ad if (mc->mc_length == sizeof(*ldi)) {
735 1.1 ad ldi = (struct mly_ioctl_getlogdevinfovalid *)mc->mc_data;
736 1.1 ad tmp = le32toh(ldi->logical_device_number);
737 1.1 ad
738 1.1 ad if (MLY_LOGDEV_BUS(mly, tmp) != bus ||
739 1.1 ad MLY_LOGDEV_TARGET(mly, tmp) != target) {
740 1.3 ad #ifdef MLYDEBUG
741 1.1 ad printf("%s: WARNING: BTL rescan (logical) for %d:%d "
742 1.23 perry "returned data for %d:%d instead\n",
743 1.37 cegger device_xname(&mly->mly_dv), bus, target,
744 1.1 ad MLY_LOGDEV_BUS(mly, tmp),
745 1.1 ad MLY_LOGDEV_TARGET(mly, tmp));
746 1.1 ad #endif
747 1.1 ad goto out;
748 1.1 ad }
749 1.1 ad
750 1.1 ad btl.mb_flags = MLY_BTL_LOGICAL | MLY_BTL_TQING;
751 1.1 ad btl.mb_type = ldi->raid_level;
752 1.1 ad btl.mb_state = ldi->state;
753 1.1 ad } else if (mc->mc_length == sizeof(*pdi)) {
754 1.1 ad pdi = (struct mly_ioctl_getphysdevinfovalid *)mc->mc_data;
755 1.1 ad
756 1.1 ad if (pdi->channel != bus || pdi->target != target) {
757 1.3 ad #ifdef MLYDEBUG
758 1.1 ad printf("%s: WARNING: BTL rescan (physical) for %d:%d "
759 1.23 perry " returned data for %d:%d instead\n",
760 1.37 cegger device_xname(&mly->mly_dv),
761 1.1 ad bus, target, pdi->channel, pdi->target);
762 1.1 ad #endif
763 1.1 ad goto out;
764 1.1 ad }
765 1.1 ad
766 1.1 ad btl.mb_flags = MLY_BTL_PHYSICAL;
767 1.1 ad btl.mb_type = MLY_DEVICE_TYPE_PHYSICAL;
768 1.1 ad btl.mb_state = pdi->state;
769 1.1 ad btl.mb_speed = pdi->speed;
770 1.1 ad btl.mb_width = pdi->width;
771 1.1 ad
772 1.1 ad if (pdi->state != MLY_DEVICE_STATE_UNCONFIGURED)
773 1.1 ad btl.mb_flags |= MLY_BTL_PROTECTED;
774 1.1 ad if (pdi->command_tags != 0)
775 1.1 ad btl.mb_flags |= MLY_BTL_TQING;
776 1.1 ad } else {
777 1.37 cegger printf("%s: BTL rescan result invalid\n", device_xname(&mly->mly_dv));
778 1.1 ad goto out;
779 1.1 ad }
780 1.1 ad
781 1.1 ad /* Decide whether we need to rescan the device. */
782 1.1 ad if (btl.mb_flags != btlp->mb_flags ||
783 1.1 ad btl.mb_speed != btlp->mb_speed ||
784 1.1 ad btl.mb_width != btlp->mb_width)
785 1.1 ad rescan = 1;
786 1.1 ad
787 1.1 ad out:
788 1.1 ad *btlp = btl;
789 1.1 ad
790 1.1 ad if (rescan && (btl.mb_flags & MLY_BTL_PROTECTED) == 0) {
791 1.1 ad xm.xm_target = target;
792 1.1 ad mly_get_xfer_mode(mly, bus, &xm);
793 1.1 ad /* XXX SCSI mid-layer rescan goes here. */
794 1.1 ad }
795 1.1 ad
796 1.1 ad /* Wake anybody waiting on the device to be rescanned. */
797 1.1 ad wakeup(btlp);
798 1.1 ad
799 1.1 ad free(mc->mc_data, M_DEVBUF);
800 1.1 ad mly_ccb_free(mly, mc);
801 1.1 ad }
802 1.1 ad
803 1.1 ad /*
804 1.1 ad * Get the current health status and set the 'next event' counter to suit.
805 1.1 ad */
806 1.1 ad static int
807 1.1 ad mly_get_eventstatus(struct mly_softc *mly)
808 1.1 ad {
809 1.1 ad struct mly_cmd_ioctl mci;
810 1.1 ad struct mly_health_status *mh;
811 1.1 ad int rv;
812 1.1 ad
813 1.1 ad /* Build the gethealthstatus ioctl and send it. */
814 1.1 ad memset(&mci, 0, sizeof(mci));
815 1.1 ad mh = NULL;
816 1.1 ad mci.sub_ioctl = MDACIOCTL_GETHEALTHSTATUS;
817 1.1 ad
818 1.16 thorpej rv = mly_ioctl(mly, &mci, (void *)&mh, sizeof(*mh), NULL, NULL);
819 1.1 ad if (rv)
820 1.1 ad return (rv);
821 1.1 ad
822 1.1 ad /* Get the event counter. */
823 1.1 ad mly->mly_event_change = le32toh(mh->change_counter);
824 1.1 ad mly->mly_event_waiting = le32toh(mh->next_event);
825 1.1 ad mly->mly_event_counter = le32toh(mh->next_event);
826 1.1 ad
827 1.1 ad /* Save the health status into the memory mailbox */
828 1.1 ad memcpy(&mly->mly_mmbox->mmm_health.status, mh, sizeof(*mh));
829 1.1 ad
830 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
831 1.1 ad offsetof(struct mly_mmbox, mmm_health),
832 1.1 ad sizeof(mly->mly_mmbox->mmm_health),
833 1.1 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
834 1.1 ad
835 1.1 ad free(mh, M_DEVBUF);
836 1.1 ad return (0);
837 1.1 ad }
838 1.1 ad
839 1.1 ad /*
840 1.3 ad * Enable memory mailbox mode.
841 1.1 ad */
842 1.1 ad static int
843 1.1 ad mly_enable_mmbox(struct mly_softc *mly)
844 1.1 ad {
845 1.1 ad struct mly_cmd_ioctl mci;
846 1.1 ad u_int8_t *sp;
847 1.1 ad u_int64_t tmp;
848 1.1 ad int rv;
849 1.1 ad
850 1.1 ad /* Build the ioctl and send it. */
851 1.1 ad memset(&mci, 0, sizeof(mci));
852 1.1 ad mci.sub_ioctl = MDACIOCTL_SETMEMORYMAILBOX;
853 1.1 ad
854 1.1 ad /* Set buffer addresses. */
855 1.1 ad tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_command);
856 1.1 ad mci.param.setmemorymailbox.command_mailbox_physaddr = htole64(tmp);
857 1.1 ad
858 1.1 ad tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_status);
859 1.1 ad mci.param.setmemorymailbox.status_mailbox_physaddr = htole64(tmp);
860 1.1 ad
861 1.1 ad tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_health);
862 1.1 ad mci.param.setmemorymailbox.health_buffer_physaddr = htole64(tmp);
863 1.1 ad
864 1.1 ad /* Set buffer sizes - abuse of data_size field is revolting. */
865 1.1 ad sp = (u_int8_t *)&mci.data_size;
866 1.1 ad sp[0] = (sizeof(union mly_cmd_packet) * MLY_MMBOX_COMMANDS) >> 10;
867 1.1 ad sp[1] = (sizeof(union mly_status_packet) * MLY_MMBOX_STATUS) >> 10;
868 1.1 ad mci.param.setmemorymailbox.health_buffer_size =
869 1.1 ad sizeof(union mly_health_region) >> 10;
870 1.1 ad
871 1.1 ad rv = mly_ioctl(mly, &mci, NULL, 0, NULL, NULL);
872 1.1 ad if (rv)
873 1.1 ad return (rv);
874 1.1 ad
875 1.1 ad mly->mly_state |= MLY_STATE_MMBOX_ACTIVE;
876 1.1 ad return (0);
877 1.1 ad }
878 1.1 ad
879 1.1 ad /*
880 1.1 ad * Flush all pending I/O from the controller.
881 1.1 ad */
882 1.1 ad static int
883 1.1 ad mly_flush(struct mly_softc *mly)
884 1.1 ad {
885 1.1 ad struct mly_cmd_ioctl mci;
886 1.1 ad
887 1.1 ad /* Build the ioctl */
888 1.1 ad memset(&mci, 0, sizeof(mci));
889 1.1 ad mci.sub_ioctl = MDACIOCTL_FLUSHDEVICEDATA;
890 1.1 ad mci.param.deviceoperation.operation_device =
891 1.1 ad MLY_OPDEVICE_PHYSICAL_CONTROLLER;
892 1.1 ad
893 1.1 ad /* Pass it off to the controller */
894 1.1 ad return (mly_ioctl(mly, &mci, NULL, 0, NULL, NULL));
895 1.1 ad }
896 1.1 ad
897 1.1 ad /*
898 1.1 ad * Perform an ioctl command.
899 1.1 ad *
900 1.3 ad * If (data) is not NULL, the command requires data transfer to the
901 1.3 ad * controller. If (*data) is NULL the command requires data transfer from
902 1.3 ad * the controller, and we will allocate a buffer for it.
903 1.1 ad */
904 1.1 ad static int
905 1.1 ad mly_ioctl(struct mly_softc *mly, struct mly_cmd_ioctl *ioctl, void **data,
906 1.1 ad size_t datasize, void *sense_buffer,
907 1.1 ad size_t *sense_length)
908 1.1 ad {
909 1.1 ad struct mly_ccb *mc;
910 1.1 ad struct mly_cmd_ioctl *mci;
911 1.1 ad u_int8_t status;
912 1.1 ad int rv;
913 1.1 ad
914 1.1 ad mc = NULL;
915 1.1 ad if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
916 1.1 ad goto bad;
917 1.1 ad
918 1.1 ad /*
919 1.1 ad * Copy the ioctl structure, but save some important fields and then
920 1.1 ad * fixup.
921 1.1 ad */
922 1.1 ad mci = &mc->mc_packet->ioctl;
923 1.1 ad ioctl->sense_buffer_address = htole64(mci->sense_buffer_address);
924 1.1 ad ioctl->maximum_sense_size = mci->maximum_sense_size;
925 1.1 ad *mci = *ioctl;
926 1.1 ad mci->opcode = MDACMD_IOCTL;
927 1.1 ad mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
928 1.1 ad
929 1.1 ad /* Handle the data buffer. */
930 1.1 ad if (data != NULL) {
931 1.1 ad if (*data == NULL) {
932 1.1 ad /* Allocate data buffer */
933 1.1 ad mc->mc_data = malloc(datasize, M_DEVBUF, M_NOWAIT);
934 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
935 1.1 ad } else {
936 1.1 ad mc->mc_data = *data;
937 1.1 ad mc->mc_flags |= MLY_CCB_DATAOUT;
938 1.1 ad }
939 1.1 ad mc->mc_length = datasize;
940 1.1 ad mc->mc_packet->generic.data_size = htole32(datasize);
941 1.1 ad }
942 1.1 ad
943 1.1 ad /* Run the command. */
944 1.1 ad if (datasize > 0)
945 1.1 ad if ((rv = mly_ccb_map(mly, mc)) != 0)
946 1.1 ad goto bad;
947 1.1 ad rv = mly_ccb_poll(mly, mc, 30000);
948 1.1 ad if (datasize > 0)
949 1.1 ad mly_ccb_unmap(mly, mc);
950 1.1 ad if (rv != 0)
951 1.1 ad goto bad;
952 1.1 ad
953 1.1 ad /* Clean up and return any data. */
954 1.1 ad status = mc->mc_status;
955 1.1 ad
956 1.1 ad if (status != 0)
957 1.1 ad printf("mly_ioctl: command status %d\n", status);
958 1.1 ad
959 1.1 ad if (mc->mc_sense > 0 && sense_buffer != NULL) {
960 1.1 ad memcpy(sense_buffer, mc->mc_packet, mc->mc_sense);
961 1.1 ad *sense_length = mc->mc_sense;
962 1.1 ad goto bad;
963 1.1 ad }
964 1.1 ad
965 1.1 ad /* Should we return a data pointer? */
966 1.1 ad if (data != NULL && *data == NULL)
967 1.1 ad *data = mc->mc_data;
968 1.1 ad
969 1.1 ad /* Command completed OK. */
970 1.1 ad rv = (status != 0 ? EIO : 0);
971 1.1 ad
972 1.1 ad bad:
973 1.1 ad if (mc != NULL) {
974 1.1 ad /* Do we need to free a data buffer we allocated? */
975 1.26 christos if (rv != 0 && mc->mc_data != NULL &&
976 1.26 christos (data == NULL || *data == NULL))
977 1.1 ad free(mc->mc_data, M_DEVBUF);
978 1.1 ad mly_ccb_free(mly, mc);
979 1.1 ad }
980 1.1 ad
981 1.1 ad return (rv);
982 1.1 ad }
983 1.1 ad
984 1.1 ad /*
985 1.1 ad * Check for event(s) outstanding in the controller.
986 1.1 ad */
987 1.1 ad static void
988 1.1 ad mly_check_event(struct mly_softc *mly)
989 1.1 ad {
990 1.1 ad
991 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
992 1.1 ad offsetof(struct mly_mmbox, mmm_health),
993 1.1 ad sizeof(mly->mly_mmbox->mmm_health),
994 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
995 1.1 ad
996 1.1 ad /*
997 1.1 ad * The controller may have updated the health status information, so
998 1.1 ad * check for it here. Note that the counters are all in host
999 1.1 ad * memory, so this check is very cheap. Also note that we depend on
1000 1.1 ad * checking on completion
1001 1.1 ad */
1002 1.1 ad if (le32toh(mly->mly_mmbox->mmm_health.status.change_counter) !=
1003 1.1 ad mly->mly_event_change) {
1004 1.1 ad mly->mly_event_change =
1005 1.1 ad le32toh(mly->mly_mmbox->mmm_health.status.change_counter);
1006 1.1 ad mly->mly_event_waiting =
1007 1.1 ad le32toh(mly->mly_mmbox->mmm_health.status.next_event);
1008 1.1 ad
1009 1.1 ad /* Wake up anyone that might be interested in this. */
1010 1.1 ad wakeup(&mly->mly_event_change);
1011 1.1 ad }
1012 1.1 ad
1013 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1014 1.1 ad offsetof(struct mly_mmbox, mmm_health),
1015 1.1 ad sizeof(mly->mly_mmbox->mmm_health),
1016 1.1 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1017 1.1 ad
1018 1.1 ad if (mly->mly_event_counter != mly->mly_event_waiting)
1019 1.1 ad mly_fetch_event(mly);
1020 1.1 ad }
1021 1.1 ad
1022 1.1 ad /*
1023 1.1 ad * Fetch one event from the controller. If we fail due to resource
1024 1.1 ad * starvation, we'll be retried the next time a command completes.
1025 1.1 ad */
1026 1.1 ad static void
1027 1.1 ad mly_fetch_event(struct mly_softc *mly)
1028 1.1 ad {
1029 1.1 ad struct mly_ccb *mc;
1030 1.1 ad struct mly_cmd_ioctl *mci;
1031 1.1 ad int s;
1032 1.1 ad u_int32_t event;
1033 1.1 ad
1034 1.1 ad /* Get a command. */
1035 1.1 ad if (mly_ccb_alloc(mly, &mc))
1036 1.1 ad return;
1037 1.1 ad
1038 1.1 ad /* Set up the data buffer. */
1039 1.9 tsutsui mc->mc_data = malloc(sizeof(struct mly_event), M_DEVBUF,
1040 1.9 tsutsui M_NOWAIT|M_ZERO);
1041 1.1 ad
1042 1.1 ad mc->mc_length = sizeof(struct mly_event);
1043 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
1044 1.1 ad mc->mc_complete = mly_complete_event;
1045 1.1 ad
1046 1.1 ad /*
1047 1.1 ad * Get an event number to fetch. It's possible that we've raced
1048 1.1 ad * with another context for the last event, in which case there will
1049 1.1 ad * be no more events.
1050 1.1 ad */
1051 1.1 ad s = splbio();
1052 1.1 ad if (mly->mly_event_counter == mly->mly_event_waiting) {
1053 1.1 ad splx(s);
1054 1.1 ad free(mc->mc_data, M_DEVBUF);
1055 1.1 ad mly_ccb_free(mly, mc);
1056 1.1 ad return;
1057 1.1 ad }
1058 1.1 ad event = mly->mly_event_counter++;
1059 1.1 ad splx(s);
1060 1.1 ad
1061 1.23 perry /*
1062 1.1 ad * Build the ioctl.
1063 1.1 ad *
1064 1.1 ad * At this point we are committed to sending this request, as it
1065 1.1 ad * will be the only one constructed for this particular event
1066 1.1 ad * number.
1067 1.1 ad */
1068 1.1 ad mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
1069 1.1 ad mci->opcode = MDACMD_IOCTL;
1070 1.1 ad mci->data_size = htole32(sizeof(struct mly_event));
1071 1.1 ad _lto3l(MLY_PHYADDR(0, 0, (event >> 16) & 0xff, (event >> 24) & 0xff),
1072 1.1 ad mci->addr);
1073 1.1 ad mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
1074 1.1 ad mci->sub_ioctl = MDACIOCTL_GETEVENT;
1075 1.1 ad mci->param.getevent.sequence_number_low = htole16(event & 0xffff);
1076 1.1 ad
1077 1.1 ad /*
1078 1.1 ad * Submit the command.
1079 1.1 ad */
1080 1.1 ad if (mly_ccb_map(mly, mc) != 0)
1081 1.1 ad goto bad;
1082 1.1 ad mly_ccb_enqueue(mly, mc);
1083 1.1 ad return;
1084 1.1 ad
1085 1.1 ad bad:
1086 1.37 cegger printf("%s: couldn't fetch event %u\n", device_xname(&mly->mly_dv), event);
1087 1.1 ad free(mc->mc_data, M_DEVBUF);
1088 1.1 ad mly_ccb_free(mly, mc);
1089 1.1 ad }
1090 1.1 ad
1091 1.1 ad /*
1092 1.1 ad * Handle the completion of an event poll.
1093 1.1 ad */
1094 1.1 ad static void
1095 1.1 ad mly_complete_event(struct mly_softc *mly, struct mly_ccb *mc)
1096 1.1 ad {
1097 1.1 ad struct mly_event *me;
1098 1.1 ad
1099 1.1 ad me = (struct mly_event *)mc->mc_data;
1100 1.1 ad mly_ccb_unmap(mly, mc);
1101 1.1 ad mly_ccb_free(mly, mc);
1102 1.1 ad
1103 1.1 ad /* If the event was successfully fetched, process it. */
1104 1.1 ad if (mc->mc_status == SCSI_OK)
1105 1.1 ad mly_process_event(mly, me);
1106 1.1 ad else
1107 1.37 cegger aprint_error_dev(&mly->mly_dv, "unable to fetch event; status = 0x%x\n",
1108 1.37 cegger mc->mc_status);
1109 1.1 ad
1110 1.1 ad free(me, M_DEVBUF);
1111 1.1 ad
1112 1.1 ad /* Check for another event. */
1113 1.1 ad mly_check_event(mly);
1114 1.1 ad }
1115 1.1 ad
1116 1.1 ad /*
1117 1.17 wiz * Process a controller event. Called with interrupts blocked (i.e., at
1118 1.1 ad * interrupt time).
1119 1.1 ad */
1120 1.1 ad static void
1121 1.1 ad mly_process_event(struct mly_softc *mly, struct mly_event *me)
1122 1.1 ad {
1123 1.22 thorpej struct scsi_sense_data *ssd;
1124 1.1 ad int bus, target, event, class, action;
1125 1.1 ad const char *fp, *tp;
1126 1.1 ad
1127 1.22 thorpej ssd = (struct scsi_sense_data *)&me->sense[0];
1128 1.1 ad
1129 1.23 perry /*
1130 1.1 ad * Errors can be reported using vendor-unique sense data. In this
1131 1.1 ad * case, the event code will be 0x1c (Request sense data present),
1132 1.1 ad * the sense key will be 0x09 (vendor specific), the MSB of the ASC
1133 1.1 ad * will be set, and the actual event code will be a 16-bit value
1134 1.1 ad * comprised of the ASCQ (low byte) and low seven bits of the ASC
1135 1.1 ad * (low seven bits of the high byte).
1136 1.1 ad */
1137 1.1 ad if (le32toh(me->code) == 0x1c &&
1138 1.22 thorpej SSD_SENSE_KEY(ssd->flags) == SKEY_VENDOR_SPECIFIC &&
1139 1.22 thorpej (ssd->asc & 0x80) != 0) {
1140 1.22 thorpej event = ((int)(ssd->asc & ~0x80) << 8) +
1141 1.22 thorpej ssd->ascq;
1142 1.1 ad } else
1143 1.1 ad event = le32toh(me->code);
1144 1.1 ad
1145 1.1 ad /* Look up event, get codes. */
1146 1.1 ad fp = mly_describe_code(mly_table_event, event);
1147 1.1 ad
1148 1.1 ad /* Quiet event? */
1149 1.1 ad class = fp[0];
1150 1.1 ad #ifdef notyet
1151 1.1 ad if (isupper(class) && bootverbose)
1152 1.1 ad class = tolower(class);
1153 1.1 ad #endif
1154 1.1 ad
1155 1.1 ad /* Get action code, text string. */
1156 1.1 ad action = fp[1];
1157 1.1 ad tp = fp + 3;
1158 1.1 ad
1159 1.1 ad /*
1160 1.1 ad * Print some information about the event.
1161 1.1 ad *
1162 1.1 ad * This code uses a table derived from the corresponding portion of
1163 1.1 ad * the Linux driver, and thus the parser is very similar.
1164 1.1 ad */
1165 1.1 ad switch (class) {
1166 1.1 ad case 'p':
1167 1.1 ad /*
1168 1.1 ad * Error on physical drive.
1169 1.1 ad */
1170 1.37 cegger printf("%s: physical device %d:%d %s\n", device_xname(&mly->mly_dv),
1171 1.1 ad me->channel, me->target, tp);
1172 1.1 ad if (action == 'r')
1173 1.1 ad mly->mly_btl[me->channel][me->target].mb_flags |=
1174 1.1 ad MLY_BTL_RESCAN;
1175 1.1 ad break;
1176 1.1 ad
1177 1.1 ad case 'l':
1178 1.1 ad case 'm':
1179 1.1 ad /*
1180 1.1 ad * Error on logical unit, or message about logical unit.
1181 1.1 ad */
1182 1.1 ad bus = MLY_LOGDEV_BUS(mly, me->lun);
1183 1.1 ad target = MLY_LOGDEV_TARGET(mly, me->lun);
1184 1.37 cegger printf("%s: logical device %d:%d %s\n", device_xname(&mly->mly_dv),
1185 1.4 ad bus, target, tp);
1186 1.1 ad if (action == 'r')
1187 1.1 ad mly->mly_btl[bus][target].mb_flags |= MLY_BTL_RESCAN;
1188 1.1 ad break;
1189 1.1 ad
1190 1.1 ad case 's':
1191 1.1 ad /*
1192 1.1 ad * Report of sense data.
1193 1.1 ad */
1194 1.22 thorpej if ((SSD_SENSE_KEY(ssd->flags) == SKEY_NO_SENSE ||
1195 1.23 perry SSD_SENSE_KEY(ssd->flags) == SKEY_NOT_READY) &&
1196 1.23 perry ssd->asc == 0x04 &&
1197 1.22 thorpej (ssd->ascq == 0x01 ||
1198 1.22 thorpej ssd->ascq == 0x02)) {
1199 1.1 ad /* Ignore NO_SENSE or NOT_READY in one case */
1200 1.1 ad break;
1201 1.1 ad }
1202 1.1 ad
1203 1.1 ad /*
1204 1.1 ad * XXX Should translate this if SCSIVERBOSE.
1205 1.1 ad */
1206 1.37 cegger printf("%s: physical device %d:%d %s\n", device_xname(&mly->mly_dv),
1207 1.1 ad me->channel, me->target, tp);
1208 1.1 ad printf("%s: sense key %d asc %02x ascq %02x\n",
1209 1.37 cegger device_xname(&mly->mly_dv), SSD_SENSE_KEY(ssd->flags),
1210 1.22 thorpej ssd->asc, ssd->ascq);
1211 1.1 ad printf("%s: info %x%x%x%x csi %x%x%x%x\n",
1212 1.37 cegger device_xname(&mly->mly_dv), ssd->info[0], ssd->info[1],
1213 1.22 thorpej ssd->info[2], ssd->info[3], ssd->csi[0],
1214 1.22 thorpej ssd->csi[1], ssd->csi[2],
1215 1.22 thorpej ssd->csi[3]);
1216 1.1 ad if (action == 'r')
1217 1.1 ad mly->mly_btl[me->channel][me->target].mb_flags |=
1218 1.1 ad MLY_BTL_RESCAN;
1219 1.1 ad break;
1220 1.1 ad
1221 1.1 ad case 'e':
1222 1.37 cegger printf("%s: ", device_xname(&mly->mly_dv));
1223 1.1 ad printf(tp, me->target, me->lun);
1224 1.1 ad break;
1225 1.1 ad
1226 1.1 ad case 'c':
1227 1.37 cegger printf("%s: controller %s\n", device_xname(&mly->mly_dv), tp);
1228 1.1 ad break;
1229 1.1 ad
1230 1.1 ad case '?':
1231 1.37 cegger printf("%s: %s - %d\n", device_xname(&mly->mly_dv), tp, event);
1232 1.1 ad break;
1233 1.1 ad
1234 1.1 ad default:
1235 1.1 ad /* Probably a 'noisy' event being ignored. */
1236 1.1 ad break;
1237 1.1 ad }
1238 1.1 ad }
1239 1.1 ad
1240 1.1 ad /*
1241 1.1 ad * Perform periodic activities.
1242 1.1 ad */
1243 1.1 ad static void
1244 1.1 ad mly_thread(void *cookie)
1245 1.1 ad {
1246 1.1 ad struct mly_softc *mly;
1247 1.1 ad struct mly_btl *btl;
1248 1.1 ad int s, bus, target, done;
1249 1.1 ad
1250 1.1 ad mly = (struct mly_softc *)cookie;
1251 1.1 ad
1252 1.1 ad for (;;) {
1253 1.1 ad /* Check for new events. */
1254 1.1 ad mly_check_event(mly);
1255 1.1 ad
1256 1.1 ad /* Re-scan up to 1 device. */
1257 1.1 ad s = splbio();
1258 1.5 ad done = 0;
1259 1.1 ad for (bus = 0; bus < mly->mly_nchans && !done; bus++) {
1260 1.1 ad for (target = 0; target < MLY_MAX_TARGETS; target++) {
1261 1.1 ad /* Perform device rescan? */
1262 1.1 ad btl = &mly->mly_btl[bus][target];
1263 1.1 ad if ((btl->mb_flags & MLY_BTL_RESCAN) != 0) {
1264 1.1 ad btl->mb_flags ^= MLY_BTL_RESCAN;
1265 1.1 ad mly_scan_btl(mly, bus, target);
1266 1.1 ad done = 1;
1267 1.1 ad break;
1268 1.1 ad }
1269 1.1 ad }
1270 1.1 ad }
1271 1.1 ad splx(s);
1272 1.1 ad
1273 1.1 ad /* Sleep for N seconds. */
1274 1.1 ad tsleep(mly_thread, PWAIT, "mlyzzz",
1275 1.1 ad hz * MLY_PERIODIC_INTERVAL);
1276 1.1 ad }
1277 1.1 ad }
1278 1.1 ad
1279 1.1 ad /*
1280 1.1 ad * Submit a command to the controller and poll on completion. Return
1281 1.1 ad * non-zero on timeout.
1282 1.1 ad */
1283 1.1 ad static int
1284 1.1 ad mly_ccb_poll(struct mly_softc *mly, struct mly_ccb *mc, int timo)
1285 1.1 ad {
1286 1.1 ad int rv;
1287 1.1 ad
1288 1.1 ad if ((rv = mly_ccb_submit(mly, mc)) != 0)
1289 1.1 ad return (rv);
1290 1.1 ad
1291 1.1 ad for (timo *= 10; timo != 0; timo--) {
1292 1.1 ad if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0)
1293 1.1 ad break;
1294 1.1 ad mly_intr(mly);
1295 1.1 ad DELAY(100);
1296 1.1 ad }
1297 1.1 ad
1298 1.1 ad return (timo == 0);
1299 1.1 ad }
1300 1.1 ad
1301 1.1 ad /*
1302 1.1 ad * Submit a command to the controller and sleep on completion. Return
1303 1.1 ad * non-zero on timeout.
1304 1.1 ad */
1305 1.1 ad static int
1306 1.1 ad mly_ccb_wait(struct mly_softc *mly, struct mly_ccb *mc, int timo)
1307 1.1 ad {
1308 1.1 ad int rv, s;
1309 1.1 ad
1310 1.1 ad mly_ccb_enqueue(mly, mc);
1311 1.1 ad
1312 1.1 ad s = splbio();
1313 1.1 ad if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0) {
1314 1.1 ad splx(s);
1315 1.1 ad return (0);
1316 1.1 ad }
1317 1.1 ad rv = tsleep(mc, PRIBIO, "mlywccb", timo * hz / 1000);
1318 1.1 ad splx(s);
1319 1.1 ad
1320 1.1 ad return (rv);
1321 1.1 ad }
1322 1.1 ad
1323 1.1 ad /*
1324 1.1 ad * If a CCB is specified, enqueue it. Pull CCBs off the software queue in
1325 1.1 ad * the order that they were enqueued and try to submit their command blocks
1326 1.1 ad * to the controller for execution.
1327 1.1 ad */
1328 1.1 ad void
1329 1.1 ad mly_ccb_enqueue(struct mly_softc *mly, struct mly_ccb *mc)
1330 1.1 ad {
1331 1.1 ad int s;
1332 1.1 ad
1333 1.1 ad s = splbio();
1334 1.1 ad
1335 1.1 ad if (mc != NULL)
1336 1.1 ad SIMPLEQ_INSERT_TAIL(&mly->mly_ccb_queue, mc, mc_link.simpleq);
1337 1.1 ad
1338 1.1 ad while ((mc = SIMPLEQ_FIRST(&mly->mly_ccb_queue)) != NULL) {
1339 1.1 ad if (mly_ccb_submit(mly, mc))
1340 1.1 ad break;
1341 1.10 lukem SIMPLEQ_REMOVE_HEAD(&mly->mly_ccb_queue, mc_link.simpleq);
1342 1.1 ad }
1343 1.1 ad
1344 1.1 ad splx(s);
1345 1.1 ad }
1346 1.1 ad
1347 1.1 ad /*
1348 1.1 ad * Deliver a command to the controller.
1349 1.1 ad */
1350 1.1 ad static int
1351 1.1 ad mly_ccb_submit(struct mly_softc *mly, struct mly_ccb *mc)
1352 1.1 ad {
1353 1.1 ad union mly_cmd_packet *pkt;
1354 1.1 ad int s, off;
1355 1.1 ad
1356 1.1 ad mc->mc_packet->generic.command_id = htole16(mc->mc_slot);
1357 1.1 ad
1358 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap,
1359 1.1 ad mc->mc_packetphys - mly->mly_pkt_busaddr,
1360 1.1 ad sizeof(union mly_cmd_packet),
1361 1.1 ad BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1362 1.1 ad
1363 1.1 ad s = splbio();
1364 1.1 ad
1365 1.1 ad /*
1366 1.1 ad * Do we have to use the hardware mailbox?
1367 1.1 ad */
1368 1.1 ad if ((mly->mly_state & MLY_STATE_MMBOX_ACTIVE) == 0) {
1369 1.1 ad /*
1370 1.1 ad * Check to see if the controller is ready for us.
1371 1.1 ad */
1372 1.1 ad if (mly_idbr_true(mly, MLY_HM_CMDSENT)) {
1373 1.1 ad splx(s);
1374 1.1 ad return (EBUSY);
1375 1.1 ad }
1376 1.1 ad
1377 1.1 ad /*
1378 1.1 ad * It's ready, send the command.
1379 1.1 ad */
1380 1.1 ad mly_outl(mly, mly->mly_cmd_mailbox,
1381 1.1 ad (u_int64_t)mc->mc_packetphys & 0xffffffff);
1382 1.1 ad mly_outl(mly, mly->mly_cmd_mailbox + 4,
1383 1.1 ad (u_int64_t)mc->mc_packetphys >> 32);
1384 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_HM_CMDSENT);
1385 1.1 ad } else {
1386 1.1 ad pkt = &mly->mly_mmbox->mmm_command[mly->mly_mmbox_cmd_idx];
1387 1.34 christos off = (char *)pkt - (char *)mly->mly_mmbox;
1388 1.1 ad
1389 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1390 1.1 ad off, sizeof(mly->mly_mmbox->mmm_command[0]),
1391 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1392 1.1 ad
1393 1.1 ad /* Check to see if the next index is free yet. */
1394 1.1 ad if (pkt->mmbox.flag != 0) {
1395 1.1 ad splx(s);
1396 1.1 ad return (EBUSY);
1397 1.1 ad }
1398 1.1 ad
1399 1.1 ad /* Copy in new command */
1400 1.1 ad memcpy(pkt->mmbox.data, mc->mc_packet->mmbox.data,
1401 1.1 ad sizeof(pkt->mmbox.data));
1402 1.1 ad
1403 1.1 ad /* Copy flag last. */
1404 1.1 ad pkt->mmbox.flag = mc->mc_packet->mmbox.flag;
1405 1.1 ad
1406 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1407 1.1 ad off, sizeof(mly->mly_mmbox->mmm_command[0]),
1408 1.1 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1409 1.1 ad
1410 1.1 ad /* Signal controller and update index. */
1411 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_AM_CMDSENT);
1412 1.1 ad mly->mly_mmbox_cmd_idx =
1413 1.1 ad (mly->mly_mmbox_cmd_idx + 1) % MLY_MMBOX_COMMANDS;
1414 1.1 ad }
1415 1.1 ad
1416 1.1 ad splx(s);
1417 1.1 ad return (0);
1418 1.1 ad }
1419 1.1 ad
1420 1.1 ad /*
1421 1.1 ad * Pick up completed commands from the controller and handle accordingly.
1422 1.1 ad */
1423 1.1 ad int
1424 1.1 ad mly_intr(void *cookie)
1425 1.1 ad {
1426 1.1 ad struct mly_ccb *mc;
1427 1.1 ad union mly_status_packet *sp;
1428 1.1 ad u_int16_t slot;
1429 1.1 ad int forus, off;
1430 1.1 ad struct mly_softc *mly;
1431 1.1 ad
1432 1.1 ad mly = cookie;
1433 1.1 ad forus = 0;
1434 1.1 ad
1435 1.1 ad /*
1436 1.1 ad * Pick up hardware-mailbox commands.
1437 1.1 ad */
1438 1.1 ad if (mly_odbr_true(mly, MLY_HM_STSREADY)) {
1439 1.1 ad slot = mly_inw(mly, mly->mly_status_mailbox);
1440 1.1 ad
1441 1.1 ad if (slot < MLY_SLOT_MAX) {
1442 1.1 ad mc = mly->mly_ccbs + (slot - MLY_SLOT_START);
1443 1.1 ad mc->mc_status =
1444 1.1 ad mly_inb(mly, mly->mly_status_mailbox + 2);
1445 1.1 ad mc->mc_sense =
1446 1.1 ad mly_inb(mly, mly->mly_status_mailbox + 3);
1447 1.1 ad mc->mc_resid =
1448 1.1 ad mly_inl(mly, mly->mly_status_mailbox + 4);
1449 1.1 ad
1450 1.1 ad mly_ccb_complete(mly, mc);
1451 1.1 ad } else {
1452 1.1 ad /* Slot 0xffff may mean "extremely bogus command". */
1453 1.1 ad printf("%s: got HM completion for illegal slot %u\n",
1454 1.37 cegger device_xname(&mly->mly_dv), slot);
1455 1.1 ad }
1456 1.1 ad
1457 1.1 ad /* Unconditionally acknowledge status. */
1458 1.1 ad mly_outb(mly, mly->mly_odbr, MLY_HM_STSREADY);
1459 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK);
1460 1.1 ad forus = 1;
1461 1.1 ad }
1462 1.1 ad
1463 1.1 ad /*
1464 1.1 ad * Pick up memory-mailbox commands.
1465 1.1 ad */
1466 1.1 ad if (mly_odbr_true(mly, MLY_AM_STSREADY)) {
1467 1.1 ad for (;;) {
1468 1.1 ad sp = &mly->mly_mmbox->mmm_status[mly->mly_mmbox_sts_idx];
1469 1.34 christos off = (char *)sp - (char *)mly->mly_mmbox;
1470 1.1 ad
1471 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1472 1.1 ad off, sizeof(mly->mly_mmbox->mmm_command[0]),
1473 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1474 1.1 ad
1475 1.1 ad /* Check for more status. */
1476 1.1 ad if (sp->mmbox.flag == 0)
1477 1.1 ad break;
1478 1.1 ad
1479 1.1 ad /* Get slot number. */
1480 1.1 ad slot = le16toh(sp->status.command_id);
1481 1.1 ad if (slot < MLY_SLOT_MAX) {
1482 1.1 ad mc = mly->mly_ccbs + (slot - MLY_SLOT_START);
1483 1.1 ad mc->mc_status = sp->status.status;
1484 1.1 ad mc->mc_sense = sp->status.sense_length;
1485 1.1 ad mc->mc_resid = le32toh(sp->status.residue);
1486 1.1 ad mly_ccb_complete(mly, mc);
1487 1.1 ad } else {
1488 1.1 ad /*
1489 1.1 ad * Slot 0xffff may mean "extremely bogus
1490 1.1 ad * command".
1491 1.1 ad */
1492 1.1 ad printf("%s: got AM completion for illegal "
1493 1.37 cegger "slot %u at %d\n", device_xname(&mly->mly_dv),
1494 1.1 ad slot, mly->mly_mmbox_sts_idx);
1495 1.1 ad }
1496 1.1 ad
1497 1.1 ad /* Clear and move to next index. */
1498 1.1 ad sp->mmbox.flag = 0;
1499 1.1 ad mly->mly_mmbox_sts_idx =
1500 1.1 ad (mly->mly_mmbox_sts_idx + 1) % MLY_MMBOX_STATUS;
1501 1.1 ad }
1502 1.1 ad
1503 1.1 ad /* Acknowledge that we have collected status value(s). */
1504 1.1 ad mly_outb(mly, mly->mly_odbr, MLY_AM_STSREADY);
1505 1.1 ad forus = 1;
1506 1.1 ad }
1507 1.1 ad
1508 1.1 ad /*
1509 1.1 ad * Run the queue.
1510 1.1 ad */
1511 1.10 lukem if (forus && ! SIMPLEQ_EMPTY(&mly->mly_ccb_queue))
1512 1.1 ad mly_ccb_enqueue(mly, NULL);
1513 1.1 ad
1514 1.1 ad return (forus);
1515 1.1 ad }
1516 1.1 ad
1517 1.1 ad /*
1518 1.1 ad * Process completed commands
1519 1.1 ad */
1520 1.1 ad static void
1521 1.1 ad mly_ccb_complete(struct mly_softc *mly, struct mly_ccb *mc)
1522 1.1 ad {
1523 1.1 ad void (*complete)(struct mly_softc *, struct mly_ccb *);
1524 1.1 ad
1525 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap,
1526 1.1 ad mc->mc_packetphys - mly->mly_pkt_busaddr,
1527 1.1 ad sizeof(union mly_cmd_packet),
1528 1.1 ad BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1529 1.1 ad
1530 1.1 ad complete = mc->mc_complete;
1531 1.1 ad mc->mc_flags |= MLY_CCB_COMPLETE;
1532 1.1 ad
1533 1.23 perry /*
1534 1.1 ad * Call completion handler or wake up sleeping consumer.
1535 1.1 ad */
1536 1.1 ad if (complete != NULL)
1537 1.1 ad (*complete)(mly, mc);
1538 1.1 ad else
1539 1.1 ad wakeup(mc);
1540 1.1 ad }
1541 1.1 ad
1542 1.1 ad /*
1543 1.1 ad * Allocate a command.
1544 1.1 ad */
1545 1.1 ad int
1546 1.1 ad mly_ccb_alloc(struct mly_softc *mly, struct mly_ccb **mcp)
1547 1.1 ad {
1548 1.1 ad struct mly_ccb *mc;
1549 1.1 ad int s;
1550 1.1 ad
1551 1.1 ad s = splbio();
1552 1.1 ad mc = SLIST_FIRST(&mly->mly_ccb_free);
1553 1.1 ad if (mc != NULL)
1554 1.1 ad SLIST_REMOVE_HEAD(&mly->mly_ccb_free, mc_link.slist);
1555 1.1 ad splx(s);
1556 1.1 ad
1557 1.1 ad *mcp = mc;
1558 1.1 ad return (mc == NULL ? EAGAIN : 0);
1559 1.1 ad }
1560 1.1 ad
1561 1.1 ad /*
1562 1.1 ad * Release a command back to the freelist.
1563 1.1 ad */
1564 1.1 ad void
1565 1.1 ad mly_ccb_free(struct mly_softc *mly, struct mly_ccb *mc)
1566 1.1 ad {
1567 1.1 ad int s;
1568 1.1 ad
1569 1.1 ad /*
1570 1.1 ad * Fill in parts of the command that may cause confusion if a
1571 1.1 ad * consumer doesn't when we are later allocated.
1572 1.1 ad */
1573 1.1 ad mc->mc_data = NULL;
1574 1.1 ad mc->mc_flags = 0;
1575 1.1 ad mc->mc_complete = NULL;
1576 1.1 ad mc->mc_private = NULL;
1577 1.3 ad mc->mc_packet->generic.command_control = 0;
1578 1.1 ad
1579 1.1 ad /*
1580 1.1 ad * By default, we set up to overwrite the command packet with sense
1581 1.1 ad * information.
1582 1.1 ad */
1583 1.1 ad mc->mc_packet->generic.sense_buffer_address =
1584 1.1 ad htole64(mc->mc_packetphys);
1585 1.1 ad mc->mc_packet->generic.maximum_sense_size =
1586 1.1 ad sizeof(union mly_cmd_packet);
1587 1.1 ad
1588 1.1 ad s = splbio();
1589 1.1 ad SLIST_INSERT_HEAD(&mly->mly_ccb_free, mc, mc_link.slist);
1590 1.1 ad splx(s);
1591 1.1 ad }
1592 1.1 ad
1593 1.1 ad /*
1594 1.18 perry * Allocate and initialize command and packet structures.
1595 1.1 ad *
1596 1.1 ad * If the controller supports fewer than MLY_MAX_CCBS commands, limit our
1597 1.1 ad * allocation to that number. If we don't yet know how many commands the
1598 1.18 perry * controller supports, allocate a very small set (suitable for initialization
1599 1.1 ad * purposes only).
1600 1.1 ad */
1601 1.1 ad static int
1602 1.1 ad mly_alloc_ccbs(struct mly_softc *mly)
1603 1.1 ad {
1604 1.1 ad struct mly_ccb *mc;
1605 1.1 ad int i, rv;
1606 1.1 ad
1607 1.1 ad if (mly->mly_controllerinfo == NULL)
1608 1.1 ad mly->mly_ncmds = MLY_CCBS_RESV;
1609 1.1 ad else {
1610 1.1 ad i = le16toh(mly->mly_controllerinfo->maximum_parallel_commands);
1611 1.1 ad mly->mly_ncmds = min(MLY_MAX_CCBS, i);
1612 1.1 ad }
1613 1.1 ad
1614 1.1 ad /*
1615 1.1 ad * Allocate enough space for all the command packets in one chunk
1616 1.1 ad * and map them permanently into controller-visible space.
1617 1.1 ad */
1618 1.1 ad rv = mly_dmamem_alloc(mly,
1619 1.1 ad mly->mly_ncmds * sizeof(union mly_cmd_packet),
1620 1.34 christos &mly->mly_pkt_dmamap, (void **)&mly->mly_pkt,
1621 1.1 ad &mly->mly_pkt_busaddr, &mly->mly_pkt_seg);
1622 1.1 ad if (rv)
1623 1.1 ad return (rv);
1624 1.1 ad
1625 1.1 ad mly->mly_ccbs = malloc(sizeof(struct mly_ccb) * mly->mly_ncmds,
1626 1.9 tsutsui M_DEVBUF, M_NOWAIT|M_ZERO);
1627 1.1 ad
1628 1.1 ad for (i = 0; i < mly->mly_ncmds; i++) {
1629 1.1 ad mc = mly->mly_ccbs + i;
1630 1.1 ad mc->mc_slot = MLY_SLOT_START + i;
1631 1.1 ad mc->mc_packet = mly->mly_pkt + i;
1632 1.1 ad mc->mc_packetphys = mly->mly_pkt_busaddr +
1633 1.1 ad (i * sizeof(union mly_cmd_packet));
1634 1.1 ad
1635 1.1 ad rv = bus_dmamap_create(mly->mly_dmat, MLY_MAX_XFER,
1636 1.1 ad MLY_MAX_SEGS, MLY_MAX_XFER, 0,
1637 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
1638 1.1 ad &mc->mc_datamap);
1639 1.1 ad if (rv) {
1640 1.1 ad mly_release_ccbs(mly);
1641 1.1 ad return (rv);
1642 1.1 ad }
1643 1.1 ad
1644 1.1 ad mly_ccb_free(mly, mc);
1645 1.1 ad }
1646 1.1 ad
1647 1.1 ad return (0);
1648 1.1 ad }
1649 1.1 ad
1650 1.1 ad /*
1651 1.1 ad * Free all the storage held by commands.
1652 1.1 ad *
1653 1.1 ad * Must be called with all commands on the free list.
1654 1.1 ad */
1655 1.1 ad static void
1656 1.1 ad mly_release_ccbs(struct mly_softc *mly)
1657 1.1 ad {
1658 1.1 ad struct mly_ccb *mc;
1659 1.1 ad
1660 1.1 ad /* Throw away command buffer DMA maps. */
1661 1.1 ad while (mly_ccb_alloc(mly, &mc) == 0)
1662 1.1 ad bus_dmamap_destroy(mly->mly_dmat, mc->mc_datamap);
1663 1.1 ad
1664 1.1 ad /* Release CCB storage. */
1665 1.1 ad free(mly->mly_ccbs, M_DEVBUF);
1666 1.1 ad
1667 1.1 ad /* Release the packet storage. */
1668 1.1 ad mly_dmamem_free(mly, mly->mly_ncmds * sizeof(union mly_cmd_packet),
1669 1.34 christos mly->mly_pkt_dmamap, (void *)mly->mly_pkt, &mly->mly_pkt_seg);
1670 1.1 ad }
1671 1.1 ad
1672 1.1 ad /*
1673 1.1 ad * Map a command into controller-visible space.
1674 1.1 ad */
1675 1.1 ad static int
1676 1.1 ad mly_ccb_map(struct mly_softc *mly, struct mly_ccb *mc)
1677 1.1 ad {
1678 1.1 ad struct mly_cmd_generic *gen;
1679 1.1 ad struct mly_sg_entry *sg;
1680 1.1 ad bus_dma_segment_t *ds;
1681 1.1 ad int flg, nseg, rv;
1682 1.1 ad
1683 1.1 ad #ifdef DIAGNOSTIC
1684 1.1 ad /* Don't map more than once. */
1685 1.1 ad if ((mc->mc_flags & MLY_CCB_MAPPED) != 0)
1686 1.1 ad panic("mly_ccb_map: already mapped");
1687 1.1 ad mc->mc_flags |= MLY_CCB_MAPPED;
1688 1.1 ad
1689 1.1 ad /* Does the command have a data buffer? */
1690 1.1 ad if (mc->mc_data == NULL)
1691 1.1 ad panic("mly_ccb_map: no data buffer");
1692 1.1 ad #endif
1693 1.1 ad
1694 1.1 ad rv = bus_dmamap_load(mly->mly_dmat, mc->mc_datamap, mc->mc_data,
1695 1.1 ad mc->mc_length, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
1696 1.1 ad ((mc->mc_flags & MLY_CCB_DATAIN) != 0 ?
1697 1.1 ad BUS_DMA_READ : BUS_DMA_WRITE));
1698 1.1 ad if (rv != 0)
1699 1.1 ad return (rv);
1700 1.1 ad
1701 1.1 ad gen = &mc->mc_packet->generic;
1702 1.1 ad
1703 1.1 ad /*
1704 1.1 ad * Can we use the transfer structure directly?
1705 1.1 ad */
1706 1.1 ad if ((nseg = mc->mc_datamap->dm_nsegs) <= 2) {
1707 1.1 ad mc->mc_sgoff = -1;
1708 1.1 ad sg = &gen->transfer.direct.sg[0];
1709 1.1 ad } else {
1710 1.1 ad mc->mc_sgoff = (mc->mc_slot - MLY_SLOT_START) *
1711 1.1 ad MLY_MAX_SEGS;
1712 1.1 ad sg = mly->mly_sg + mc->mc_sgoff;
1713 1.1 ad gen->command_control |= MLY_CMDCTL_EXTENDED_SG_TABLE;
1714 1.1 ad gen->transfer.indirect.entries[0] = htole16(nseg);
1715 1.1 ad gen->transfer.indirect.table_physaddr[0] =
1716 1.1 ad htole64(mly->mly_sg_busaddr +
1717 1.1 ad (mc->mc_sgoff * sizeof(struct mly_sg_entry)));
1718 1.1 ad }
1719 1.1 ad
1720 1.1 ad /*
1721 1.1 ad * Fill the S/G table.
1722 1.1 ad */
1723 1.1 ad for (ds = mc->mc_datamap->dm_segs; nseg != 0; nseg--, sg++, ds++) {
1724 1.1 ad sg->physaddr = htole64(ds->ds_addr);
1725 1.1 ad sg->length = htole64(ds->ds_len);
1726 1.1 ad }
1727 1.1 ad
1728 1.1 ad /*
1729 1.1 ad * Sync up the data map.
1730 1.1 ad */
1731 1.1 ad if ((mc->mc_flags & MLY_CCB_DATAIN) != 0)
1732 1.1 ad flg = BUS_DMASYNC_PREREAD;
1733 1.1 ad else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */ {
1734 1.1 ad gen->command_control |= MLY_CMDCTL_DATA_DIRECTION;
1735 1.1 ad flg = BUS_DMASYNC_PREWRITE;
1736 1.1 ad }
1737 1.1 ad
1738 1.1 ad bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg);
1739 1.1 ad
1740 1.1 ad /*
1741 1.1 ad * Sync up the chained S/G table, if we're using one.
1742 1.1 ad */
1743 1.1 ad if (mc->mc_sgoff == -1)
1744 1.1 ad return (0);
1745 1.1 ad
1746 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff,
1747 1.1 ad MLY_SGL_SIZE, BUS_DMASYNC_PREWRITE);
1748 1.1 ad
1749 1.1 ad return (0);
1750 1.1 ad }
1751 1.1 ad
1752 1.1 ad /*
1753 1.1 ad * Unmap a command from controller-visible space.
1754 1.1 ad */
1755 1.1 ad static void
1756 1.1 ad mly_ccb_unmap(struct mly_softc *mly, struct mly_ccb *mc)
1757 1.1 ad {
1758 1.1 ad int flg;
1759 1.1 ad
1760 1.1 ad #ifdef DIAGNOSTIC
1761 1.1 ad if ((mc->mc_flags & MLY_CCB_MAPPED) == 0)
1762 1.1 ad panic("mly_ccb_unmap: not mapped");
1763 1.1 ad mc->mc_flags &= ~MLY_CCB_MAPPED;
1764 1.1 ad #endif
1765 1.1 ad
1766 1.1 ad if ((mc->mc_flags & MLY_CCB_DATAIN) != 0)
1767 1.1 ad flg = BUS_DMASYNC_POSTREAD;
1768 1.1 ad else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */
1769 1.1 ad flg = BUS_DMASYNC_POSTWRITE;
1770 1.1 ad
1771 1.1 ad bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg);
1772 1.1 ad bus_dmamap_unload(mly->mly_dmat, mc->mc_datamap);
1773 1.1 ad
1774 1.1 ad if (mc->mc_sgoff == -1)
1775 1.1 ad return;
1776 1.1 ad
1777 1.1 ad bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff,
1778 1.1 ad MLY_SGL_SIZE, BUS_DMASYNC_POSTWRITE);
1779 1.1 ad }
1780 1.1 ad
1781 1.1 ad /*
1782 1.1 ad * Adjust the size of each I/O before it passes to the SCSI layer.
1783 1.1 ad */
1784 1.1 ad static void
1785 1.1 ad mly_scsipi_minphys(struct buf *bp)
1786 1.1 ad {
1787 1.1 ad
1788 1.1 ad if (bp->b_bcount > MLY_MAX_XFER)
1789 1.1 ad bp->b_bcount = MLY_MAX_XFER;
1790 1.1 ad minphys(bp);
1791 1.1 ad }
1792 1.1 ad
1793 1.1 ad /*
1794 1.1 ad * Start a SCSI command.
1795 1.1 ad */
1796 1.1 ad static void
1797 1.1 ad mly_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
1798 1.1 ad void *arg)
1799 1.1 ad {
1800 1.1 ad struct mly_ccb *mc;
1801 1.1 ad struct mly_cmd_scsi_small *ss;
1802 1.1 ad struct scsipi_xfer *xs;
1803 1.1 ad struct scsipi_periph *periph;
1804 1.1 ad struct mly_softc *mly;
1805 1.1 ad struct mly_btl *btl;
1806 1.1 ad int s, tmp;
1807 1.1 ad
1808 1.1 ad mly = (void *)chan->chan_adapter->adapt_dev;
1809 1.1 ad
1810 1.1 ad switch (req) {
1811 1.1 ad case ADAPTER_REQ_RUN_XFER:
1812 1.1 ad xs = arg;
1813 1.1 ad periph = xs->xs_periph;
1814 1.1 ad btl = &mly->mly_btl[chan->chan_channel][periph->periph_target];
1815 1.1 ad s = splbio();
1816 1.1 ad tmp = btl->mb_flags;
1817 1.1 ad splx(s);
1818 1.1 ad
1819 1.1 ad /*
1820 1.1 ad * Check for I/O attempt to a protected or non-existant
1821 1.1 ad * device.
1822 1.1 ad */
1823 1.1 ad if ((tmp & MLY_BTL_PROTECTED) != 0) {
1824 1.1 ad xs->error = XS_SELTIMEOUT;
1825 1.1 ad scsipi_done(xs);
1826 1.1 ad break;
1827 1.1 ad }
1828 1.1 ad
1829 1.1 ad #ifdef DIAGNOSTIC
1830 1.1 ad /* XXX Increase if/when we support large SCSI commands. */
1831 1.1 ad if (xs->cmdlen > MLY_CMD_SCSI_SMALL_CDB) {
1832 1.37 cegger printf("%s: cmd too large\n", device_xname(&mly->mly_dv));
1833 1.1 ad xs->error = XS_DRIVER_STUFFUP;
1834 1.1 ad scsipi_done(xs);
1835 1.1 ad break;
1836 1.1 ad }
1837 1.1 ad #endif
1838 1.1 ad
1839 1.1 ad if (mly_ccb_alloc(mly, &mc)) {
1840 1.1 ad xs->error = XS_RESOURCE_SHORTAGE;
1841 1.1 ad scsipi_done(xs);
1842 1.1 ad break;
1843 1.1 ad }
1844 1.1 ad
1845 1.1 ad /* Build the command. */
1846 1.1 ad mc->mc_data = xs->data;
1847 1.1 ad mc->mc_length = xs->datalen;
1848 1.1 ad mc->mc_complete = mly_scsipi_complete;
1849 1.1 ad mc->mc_private = xs;
1850 1.1 ad
1851 1.1 ad /* Build the packet for the controller. */
1852 1.1 ad ss = &mc->mc_packet->scsi_small;
1853 1.1 ad ss->opcode = MDACMD_SCSI;
1854 1.1 ad #ifdef notdef
1855 1.1 ad /*
1856 1.1 ad * XXX FreeBSD does this, but it doesn't fix anything,
1857 1.1 ad * XXX and appears potentially harmful.
1858 1.1 ad */
1859 1.1 ad ss->command_control |= MLY_CMDCTL_DISABLE_DISCONNECT;
1860 1.1 ad #endif
1861 1.3 ad
1862 1.1 ad ss->data_size = htole32(xs->datalen);
1863 1.1 ad _lto3l(MLY_PHYADDR(0, chan->chan_channel,
1864 1.1 ad periph->periph_target, periph->periph_lun), ss->addr);
1865 1.1 ad
1866 1.1 ad if (xs->timeout < 60 * 1000)
1867 1.1 ad ss->timeout = xs->timeout / 1000 |
1868 1.1 ad MLY_TIMEOUT_SECONDS;
1869 1.1 ad else if (xs->timeout < 60 * 60 * 1000)
1870 1.1 ad ss->timeout = xs->timeout / (60 * 1000) |
1871 1.1 ad MLY_TIMEOUT_MINUTES;
1872 1.1 ad else
1873 1.1 ad ss->timeout = xs->timeout / (60 * 60 * 1000) |
1874 1.1 ad MLY_TIMEOUT_HOURS;
1875 1.1 ad
1876 1.1 ad ss->maximum_sense_size = sizeof(xs->sense);
1877 1.1 ad ss->cdb_length = xs->cmdlen;
1878 1.1 ad memcpy(ss->cdb, xs->cmd, xs->cmdlen);
1879 1.1 ad
1880 1.7 ad if (mc->mc_length != 0) {
1881 1.7 ad if ((xs->xs_control & XS_CTL_DATA_OUT) != 0)
1882 1.7 ad mc->mc_flags |= MLY_CCB_DATAOUT;
1883 1.7 ad else /* if ((xs->xs_control & XS_CTL_DATA_IN) != 0) */
1884 1.7 ad mc->mc_flags |= MLY_CCB_DATAIN;
1885 1.7 ad
1886 1.1 ad if (mly_ccb_map(mly, mc) != 0) {
1887 1.1 ad xs->error = XS_DRIVER_STUFFUP;
1888 1.1 ad mly_ccb_free(mly, mc);
1889 1.1 ad scsipi_done(xs);
1890 1.1 ad break;
1891 1.1 ad }
1892 1.7 ad }
1893 1.1 ad
1894 1.1 ad /*
1895 1.1 ad * Give the command to the controller.
1896 1.1 ad */
1897 1.1 ad if ((xs->xs_control & XS_CTL_POLL) != 0) {
1898 1.1 ad if (mly_ccb_poll(mly, mc, xs->timeout + 5000)) {
1899 1.1 ad xs->error = XS_REQUEUE;
1900 1.1 ad if (mc->mc_length != 0)
1901 1.1 ad mly_ccb_unmap(mly, mc);
1902 1.1 ad mly_ccb_free(mly, mc);
1903 1.1 ad scsipi_done(xs);
1904 1.1 ad }
1905 1.1 ad } else
1906 1.1 ad mly_ccb_enqueue(mly, mc);
1907 1.1 ad
1908 1.1 ad break;
1909 1.1 ad
1910 1.1 ad case ADAPTER_REQ_GROW_RESOURCES:
1911 1.1 ad /*
1912 1.1 ad * Not supported.
1913 1.1 ad */
1914 1.1 ad break;
1915 1.1 ad
1916 1.1 ad case ADAPTER_REQ_SET_XFER_MODE:
1917 1.1 ad /*
1918 1.1 ad * We can't change the transfer mode, but at least let
1919 1.1 ad * scsipi know what the adapter has negotiated.
1920 1.1 ad */
1921 1.1 ad mly_get_xfer_mode(mly, chan->chan_channel, arg);
1922 1.1 ad break;
1923 1.1 ad }
1924 1.1 ad }
1925 1.1 ad
1926 1.1 ad /*
1927 1.1 ad * Handle completion of a SCSI command.
1928 1.1 ad */
1929 1.1 ad static void
1930 1.1 ad mly_scsipi_complete(struct mly_softc *mly, struct mly_ccb *mc)
1931 1.1 ad {
1932 1.1 ad struct scsipi_xfer *xs;
1933 1.1 ad struct scsipi_channel *chan;
1934 1.1 ad struct scsipi_inquiry_data *inq;
1935 1.1 ad struct mly_btl *btl;
1936 1.1 ad int target, sl, s;
1937 1.1 ad const char *p;
1938 1.1 ad
1939 1.1 ad xs = mc->mc_private;
1940 1.1 ad xs->status = mc->mc_status;
1941 1.1 ad
1942 1.1 ad /*
1943 1.1 ad * XXX The `resid' value as returned by the controller appears to be
1944 1.1 ad * bogus, so we always set it to zero. Is it perhaps the transfer
1945 1.1 ad * count?
1946 1.1 ad */
1947 1.1 ad xs->resid = 0; /* mc->mc_resid; */
1948 1.1 ad
1949 1.1 ad if (mc->mc_length != 0)
1950 1.1 ad mly_ccb_unmap(mly, mc);
1951 1.1 ad
1952 1.1 ad switch (mc->mc_status) {
1953 1.1 ad case SCSI_OK:
1954 1.1 ad /*
1955 1.1 ad * In order to report logical device type and status, we
1956 1.1 ad * overwrite the result of the INQUIRY command to logical
1957 1.1 ad * devices.
1958 1.1 ad */
1959 1.1 ad if (xs->cmd->opcode == INQUIRY) {
1960 1.1 ad chan = xs->xs_periph->periph_channel;
1961 1.1 ad target = xs->xs_periph->periph_target;
1962 1.1 ad btl = &mly->mly_btl[chan->chan_channel][target];
1963 1.1 ad
1964 1.1 ad s = splbio();
1965 1.1 ad if ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) {
1966 1.1 ad inq = (struct scsipi_inquiry_data *)xs->data;
1967 1.1 ad mly_padstr(inq->vendor, "MYLEX", 8);
1968 1.1 ad p = mly_describe_code(mly_table_device_type,
1969 1.1 ad btl->mb_type);
1970 1.1 ad mly_padstr(inq->product, p, 16);
1971 1.1 ad p = mly_describe_code(mly_table_device_state,
1972 1.1 ad btl->mb_state);
1973 1.1 ad mly_padstr(inq->revision, p, 4);
1974 1.1 ad }
1975 1.1 ad splx(s);
1976 1.1 ad }
1977 1.1 ad
1978 1.1 ad xs->error = XS_NOERROR;
1979 1.1 ad break;
1980 1.1 ad
1981 1.1 ad case SCSI_CHECK:
1982 1.1 ad sl = mc->mc_sense;
1983 1.1 ad if (sl > sizeof(xs->sense.scsi_sense))
1984 1.1 ad sl = sizeof(xs->sense.scsi_sense);
1985 1.1 ad memcpy(&xs->sense.scsi_sense, mc->mc_packet, sl);
1986 1.1 ad xs->error = XS_SENSE;
1987 1.1 ad break;
1988 1.1 ad
1989 1.1 ad case SCSI_BUSY:
1990 1.1 ad case SCSI_QUEUE_FULL:
1991 1.1 ad xs->error = XS_BUSY;
1992 1.1 ad break;
1993 1.1 ad
1994 1.1 ad default:
1995 1.1 ad printf("%s: unknown SCSI status 0x%x\n",
1996 1.37 cegger device_xname(&mly->mly_dv), xs->status);
1997 1.1 ad xs->error = XS_DRIVER_STUFFUP;
1998 1.1 ad break;
1999 1.1 ad }
2000 1.1 ad
2001 1.1 ad mly_ccb_free(mly, mc);
2002 1.1 ad scsipi_done(xs);
2003 1.1 ad }
2004 1.1 ad
2005 1.1 ad /*
2006 1.1 ad * Notify scsipi about a target's transfer mode.
2007 1.1 ad */
2008 1.1 ad static void
2009 1.1 ad mly_get_xfer_mode(struct mly_softc *mly, int bus, struct scsipi_xfer_mode *xm)
2010 1.1 ad {
2011 1.1 ad struct mly_btl *btl;
2012 1.1 ad int s;
2013 1.1 ad
2014 1.1 ad btl = &mly->mly_btl[bus][xm->xm_target];
2015 1.1 ad xm->xm_mode = 0;
2016 1.1 ad
2017 1.1 ad s = splbio();
2018 1.1 ad
2019 1.23 perry if ((btl->mb_flags & MLY_BTL_PHYSICAL) != 0) {
2020 1.1 ad if (btl->mb_speed == 0) {
2021 1.1 ad xm->xm_period = 0;
2022 1.1 ad xm->xm_offset = 0;
2023 1.1 ad } else {
2024 1.1 ad xm->xm_period = 12; /* XXX */
2025 1.1 ad xm->xm_offset = 8; /* XXX */
2026 1.1 ad xm->xm_mode |= PERIPH_CAP_SYNC; /* XXX */
2027 1.1 ad }
2028 1.1 ad
2029 1.1 ad switch (btl->mb_width) {
2030 1.1 ad case 32:
2031 1.1 ad xm->xm_mode = PERIPH_CAP_WIDE32;
2032 1.1 ad break;
2033 1.1 ad case 16:
2034 1.1 ad xm->xm_mode = PERIPH_CAP_WIDE16;
2035 1.1 ad break;
2036 1.1 ad default:
2037 1.1 ad xm->xm_mode = 0;
2038 1.1 ad break;
2039 1.1 ad }
2040 1.1 ad } else /* ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) */ {
2041 1.1 ad xm->xm_mode = PERIPH_CAP_WIDE16 | PERIPH_CAP_SYNC;
2042 1.1 ad xm->xm_period = 12;
2043 1.1 ad xm->xm_offset = 8;
2044 1.1 ad }
2045 1.1 ad
2046 1.1 ad if ((btl->mb_flags & MLY_BTL_TQING) != 0)
2047 1.1 ad xm->xm_mode |= PERIPH_CAP_TQING;
2048 1.1 ad
2049 1.1 ad splx(s);
2050 1.1 ad
2051 1.1 ad scsipi_async_event(&mly->mly_chans[bus], ASYNC_EVENT_XFER_MODE, xm);
2052 1.1 ad }
2053 1.1 ad
2054 1.1 ad /*
2055 1.1 ad * ioctl hook; used here only to initiate low-level rescans.
2056 1.1 ad */
2057 1.1 ad static int
2058 1.34 christos mly_scsipi_ioctl(struct scsipi_channel *chan, u_long cmd, void *data,
2059 1.32 christos int flag, struct proc *p)
2060 1.1 ad {
2061 1.1 ad struct mly_softc *mly;
2062 1.1 ad int rv;
2063 1.23 perry
2064 1.1 ad mly = (struct mly_softc *)chan->chan_adapter->adapt_dev;
2065 1.23 perry
2066 1.1 ad switch (cmd) {
2067 1.1 ad case SCBUSIOLLSCAN:
2068 1.1 ad mly_scan_channel(mly, chan->chan_channel);
2069 1.1 ad rv = 0;
2070 1.1 ad break;
2071 1.1 ad default:
2072 1.1 ad rv = ENOTTY;
2073 1.1 ad break;
2074 1.1 ad }
2075 1.1 ad
2076 1.1 ad return (rv);
2077 1.1 ad }
2078 1.1 ad
2079 1.1 ad /*
2080 1.18 perry * Handshake with the firmware while the card is being initialized.
2081 1.1 ad */
2082 1.1 ad static int
2083 1.23 perry mly_fwhandshake(struct mly_softc *mly)
2084 1.1 ad {
2085 1.1 ad u_int8_t error, param0, param1;
2086 1.1 ad int spinup;
2087 1.1 ad
2088 1.1 ad spinup = 0;
2089 1.1 ad
2090 1.18 perry /* Set HM_STSACK and let the firmware initialize. */
2091 1.1 ad mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK);
2092 1.1 ad DELAY(1000); /* too short? */
2093 1.1 ad
2094 1.18 perry /* If HM_STSACK is still true, the controller is initializing. */
2095 1.1 ad if (!mly_idbr_true(mly, MLY_HM_STSACK))
2096 1.1 ad return (0);
2097 1.1 ad
2098 1.18 perry printf("%s: controller initialization started\n",
2099 1.37 cegger device_xname(&mly->mly_dv));
2100 1.1 ad
2101 1.1 ad /*
2102 1.18 perry * Spin waiting for initialization to finish, or for a message to be
2103 1.1 ad * delivered.
2104 1.1 ad */
2105 1.1 ad while (mly_idbr_true(mly, MLY_HM_STSACK)) {
2106 1.1 ad /* Check for a message */
2107 1.1 ad if (!mly_error_valid(mly))
2108 1.1 ad continue;
2109 1.1 ad
2110 1.1 ad error = mly_inb(mly, mly->mly_error_status) & ~MLY_MSG_EMPTY;
2111 1.1 ad param0 = mly_inb(mly, mly->mly_cmd_mailbox);
2112 1.1 ad param1 = mly_inb(mly, mly->mly_cmd_mailbox + 1);
2113 1.1 ad
2114 1.1 ad switch (error) {
2115 1.1 ad case MLY_MSG_SPINUP:
2116 1.1 ad if (!spinup) {
2117 1.1 ad printf("%s: drive spinup in progress\n",
2118 1.37 cegger device_xname(&mly->mly_dv));
2119 1.1 ad spinup = 1;
2120 1.1 ad }
2121 1.1 ad break;
2122 1.1 ad
2123 1.1 ad case MLY_MSG_RACE_RECOVERY_FAIL:
2124 1.1 ad printf("%s: mirror race recovery failed - \n",
2125 1.37 cegger device_xname(&mly->mly_dv));
2126 1.1 ad printf("%s: one or more drives offline\n",
2127 1.37 cegger device_xname(&mly->mly_dv));
2128 1.1 ad break;
2129 1.1 ad
2130 1.1 ad case MLY_MSG_RACE_IN_PROGRESS:
2131 1.1 ad printf("%s: mirror race recovery in progress\n",
2132 1.37 cegger device_xname(&mly->mly_dv));
2133 1.1 ad break;
2134 1.1 ad
2135 1.1 ad case MLY_MSG_RACE_ON_CRITICAL:
2136 1.1 ad printf("%s: mirror race recovery on critical drive\n",
2137 1.37 cegger device_xname(&mly->mly_dv));
2138 1.1 ad break;
2139 1.1 ad
2140 1.1 ad case MLY_MSG_PARITY_ERROR:
2141 1.1 ad printf("%s: FATAL MEMORY PARITY ERROR\n",
2142 1.37 cegger device_xname(&mly->mly_dv));
2143 1.1 ad return (ENXIO);
2144 1.1 ad
2145 1.1 ad default:
2146 1.18 perry printf("%s: unknown initialization code 0x%x\n",
2147 1.37 cegger device_xname(&mly->mly_dv), error);
2148 1.1 ad break;
2149 1.1 ad }
2150 1.1 ad }
2151 1.1 ad
2152 1.1 ad return (0);
2153 1.1 ad }
2154 1.1 ad
2155 1.1 ad /*
2156 1.1 ad * Space-fill a character string
2157 1.1 ad */
2158 1.1 ad static void
2159 1.1 ad mly_padstr(char *dst, const char *src, int len)
2160 1.1 ad {
2161 1.1 ad
2162 1.1 ad while (len-- > 0) {
2163 1.1 ad if (*src != '\0')
2164 1.1 ad *dst++ = *src++;
2165 1.1 ad else
2166 1.1 ad *dst++ = ' ';
2167 1.1 ad }
2168 1.1 ad }
2169 1.1 ad
2170 1.1 ad /*
2171 1.1 ad * Allocate DMA safe memory.
2172 1.1 ad */
2173 1.1 ad static int
2174 1.23 perry mly_dmamem_alloc(struct mly_softc *mly, int size, bus_dmamap_t *dmamap,
2175 1.34 christos void **kva, bus_addr_t *paddr, bus_dma_segment_t *seg)
2176 1.1 ad {
2177 1.1 ad int rseg, rv, state;
2178 1.1 ad
2179 1.1 ad state = 0;
2180 1.23 perry
2181 1.23 perry if ((rv = bus_dmamem_alloc(mly->mly_dmat, size, PAGE_SIZE, 0,
2182 1.1 ad seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
2183 1.37 cegger aprint_error_dev(&mly->mly_dv, "dmamem_alloc = %d\n", rv);
2184 1.1 ad goto bad;
2185 1.1 ad }
2186 1.1 ad
2187 1.1 ad state++;
2188 1.1 ad
2189 1.1 ad if ((rv = bus_dmamem_map(mly->mly_dmat, seg, 1, size, kva,
2190 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
2191 1.37 cegger aprint_error_dev(&mly->mly_dv, "dmamem_map = %d\n", rv);
2192 1.1 ad goto bad;
2193 1.1 ad }
2194 1.1 ad
2195 1.1 ad state++;
2196 1.1 ad
2197 1.23 perry if ((rv = bus_dmamap_create(mly->mly_dmat, size, size, 1, 0,
2198 1.1 ad BUS_DMA_NOWAIT, dmamap)) != 0) {
2199 1.37 cegger aprint_error_dev(&mly->mly_dv, "dmamap_create = %d\n", rv);
2200 1.1 ad goto bad;
2201 1.1 ad }
2202 1.1 ad
2203 1.1 ad state++;
2204 1.1 ad
2205 1.23 perry if ((rv = bus_dmamap_load(mly->mly_dmat, *dmamap, *kva, size,
2206 1.1 ad NULL, BUS_DMA_NOWAIT)) != 0) {
2207 1.37 cegger aprint_error_dev(&mly->mly_dv, "dmamap_load = %d\n", rv);
2208 1.1 ad goto bad;
2209 1.1 ad }
2210 1.1 ad
2211 1.1 ad *paddr = (*dmamap)->dm_segs[0].ds_addr;
2212 1.1 ad memset(*kva, 0, size);
2213 1.1 ad return (0);
2214 1.1 ad
2215 1.1 ad bad:
2216 1.1 ad if (state > 2)
2217 1.1 ad bus_dmamap_destroy(mly->mly_dmat, *dmamap);
2218 1.1 ad if (state > 1)
2219 1.1 ad bus_dmamem_unmap(mly->mly_dmat, *kva, size);
2220 1.1 ad if (state > 0)
2221 1.1 ad bus_dmamem_free(mly->mly_dmat, seg, 1);
2222 1.1 ad
2223 1.1 ad return (rv);
2224 1.1 ad }
2225 1.1 ad
2226 1.1 ad /*
2227 1.1 ad * Free DMA safe memory.
2228 1.1 ad */
2229 1.1 ad static void
2230 1.23 perry mly_dmamem_free(struct mly_softc *mly, int size, bus_dmamap_t dmamap,
2231 1.34 christos void *kva, bus_dma_segment_t *seg)
2232 1.1 ad {
2233 1.1 ad
2234 1.1 ad bus_dmamap_unload(mly->mly_dmat, dmamap);
2235 1.1 ad bus_dmamap_destroy(mly->mly_dmat, dmamap);
2236 1.1 ad bus_dmamem_unmap(mly->mly_dmat, kva, size);
2237 1.1 ad bus_dmamem_free(mly->mly_dmat, seg, 1);
2238 1.1 ad }
2239 1.1 ad
2240 1.1 ad
2241 1.1 ad /*
2242 1.1 ad * Accept an open operation on the control device.
2243 1.1 ad */
2244 1.1 ad int
2245 1.32 christos mlyopen(dev_t dev, int flag, int mode, struct lwp *l)
2246 1.1 ad {
2247 1.1 ad struct mly_softc *mly;
2248 1.1 ad
2249 1.39 tsutsui if ((mly = device_lookup_private(&mly_cd, minor(dev))) == NULL)
2250 1.1 ad return (ENXIO);
2251 1.1 ad if ((mly->mly_state & MLY_STATE_INITOK) == 0)
2252 1.1 ad return (ENXIO);
2253 1.1 ad if ((mly->mly_state & MLY_STATE_OPEN) != 0)
2254 1.1 ad return (EBUSY);
2255 1.1 ad
2256 1.1 ad mly->mly_state |= MLY_STATE_OPEN;
2257 1.1 ad return (0);
2258 1.1 ad }
2259 1.1 ad
2260 1.1 ad /*
2261 1.1 ad * Accept the last close on the control device.
2262 1.1 ad */
2263 1.1 ad int
2264 1.32 christos mlyclose(dev_t dev, int flag, int mode,
2265 1.32 christos struct lwp *l)
2266 1.1 ad {
2267 1.1 ad struct mly_softc *mly;
2268 1.1 ad
2269 1.39 tsutsui mly = device_lookup_private(&mly_cd, minor(dev));
2270 1.1 ad mly->mly_state &= ~MLY_STATE_OPEN;
2271 1.1 ad return (0);
2272 1.1 ad }
2273 1.1 ad
2274 1.1 ad /*
2275 1.1 ad * Handle control operations.
2276 1.1 ad */
2277 1.1 ad int
2278 1.34 christos mlyioctl(dev_t dev, u_long cmd, void *data, int flag,
2279 1.31 elad struct lwp *l)
2280 1.1 ad {
2281 1.1 ad struct mly_softc *mly;
2282 1.1 ad int rv;
2283 1.1 ad
2284 1.39 tsutsui mly = device_lookup_private(&mly_cd, minor(dev));
2285 1.1 ad
2286 1.1 ad switch (cmd) {
2287 1.1 ad case MLYIO_COMMAND:
2288 1.33 elad rv = kauth_authorize_device_passthru(l->l_cred, dev,
2289 1.33 elad KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data);
2290 1.31 elad if (rv)
2291 1.31 elad break;
2292 1.31 elad
2293 1.31 elad rv = mly_user_command(mly, (void *)data);
2294 1.1 ad break;
2295 1.1 ad case MLYIO_HEALTH:
2296 1.1 ad rv = mly_user_health(mly, (void *)data);
2297 1.1 ad break;
2298 1.1 ad default:
2299 1.1 ad rv = ENOTTY;
2300 1.1 ad break;
2301 1.1 ad }
2302 1.1 ad
2303 1.1 ad return (rv);
2304 1.1 ad }
2305 1.1 ad
2306 1.1 ad /*
2307 1.1 ad * Execute a command passed in from userspace.
2308 1.1 ad *
2309 1.1 ad * The control structure contains the actual command for the controller, as
2310 1.1 ad * well as the user-space data pointer and data size, and an optional sense
2311 1.1 ad * buffer size/pointer. On completion, the data size is adjusted to the
2312 1.1 ad * command residual, and the sense buffer size to the size of the returned
2313 1.1 ad * sense data.
2314 1.1 ad */
2315 1.1 ad static int
2316 1.1 ad mly_user_command(struct mly_softc *mly, struct mly_user_command *uc)
2317 1.1 ad {
2318 1.1 ad struct mly_ccb *mc;
2319 1.1 ad int rv, mapped;
2320 1.1 ad
2321 1.1 ad if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
2322 1.1 ad return (rv);
2323 1.1 ad
2324 1.1 ad mapped = 0;
2325 1.1 ad mc->mc_data = NULL;
2326 1.1 ad
2327 1.1 ad /*
2328 1.1 ad * Handle data size/direction.
2329 1.1 ad */
2330 1.1 ad if ((mc->mc_length = abs(uc->DataTransferLength)) != 0) {
2331 1.6 ad if (mc->mc_length > MAXPHYS) {
2332 1.6 ad rv = EINVAL;
2333 1.6 ad goto out;
2334 1.6 ad }
2335 1.6 ad
2336 1.1 ad mc->mc_data = malloc(mc->mc_length, M_DEVBUF, M_WAITOK);
2337 1.1 ad if (mc->mc_data == NULL) {
2338 1.1 ad rv = ENOMEM;
2339 1.1 ad goto out;
2340 1.1 ad }
2341 1.1 ad
2342 1.1 ad if (uc->DataTransferLength > 0) {
2343 1.1 ad mc->mc_flags |= MLY_CCB_DATAIN;
2344 1.1 ad memset(mc->mc_data, 0, mc->mc_length);
2345 1.1 ad }
2346 1.23 perry
2347 1.1 ad if (uc->DataTransferLength < 0) {
2348 1.1 ad mc->mc_flags |= MLY_CCB_DATAOUT;
2349 1.1 ad rv = copyin(uc->DataTransferBuffer, mc->mc_data,
2350 1.1 ad mc->mc_length);
2351 1.1 ad if (rv != 0)
2352 1.1 ad goto out;
2353 1.1 ad }
2354 1.1 ad
2355 1.1 ad if ((rv = mly_ccb_map(mly, mc)) != 0)
2356 1.1 ad goto out;
2357 1.1 ad mapped = 1;
2358 1.1 ad }
2359 1.1 ad
2360 1.1 ad /* Copy in the command and execute it. */
2361 1.1 ad memcpy(mc->mc_packet, &uc->CommandMailbox, sizeof(uc->CommandMailbox));
2362 1.1 ad
2363 1.1 ad if ((rv = mly_ccb_wait(mly, mc, 60000)) != 0)
2364 1.1 ad goto out;
2365 1.1 ad
2366 1.1 ad /* Return the data to userspace. */
2367 1.1 ad if (uc->DataTransferLength > 0) {
2368 1.1 ad rv = copyout(mc->mc_data, uc->DataTransferBuffer,
2369 1.1 ad mc->mc_length);
2370 1.1 ad if (rv != 0)
2371 1.1 ad goto out;
2372 1.1 ad }
2373 1.23 perry
2374 1.1 ad /* Return the sense buffer to userspace. */
2375 1.1 ad if (uc->RequestSenseLength > 0 && mc->mc_sense > 0) {
2376 1.23 perry rv = copyout(mc->mc_packet, uc->RequestSenseBuffer,
2377 1.1 ad min(uc->RequestSenseLength, mc->mc_sense));
2378 1.1 ad if (rv != 0)
2379 1.1 ad goto out;
2380 1.1 ad }
2381 1.1 ad
2382 1.1 ad /* Return command results to userspace (caller will copy out). */
2383 1.1 ad uc->DataTransferLength = mc->mc_resid;
2384 1.1 ad uc->RequestSenseLength = min(uc->RequestSenseLength, mc->mc_sense);
2385 1.1 ad uc->CommandStatus = mc->mc_status;
2386 1.1 ad rv = 0;
2387 1.1 ad
2388 1.1 ad out:
2389 1.1 ad if (mapped)
2390 1.1 ad mly_ccb_unmap(mly, mc);
2391 1.1 ad if (mc->mc_data != NULL)
2392 1.1 ad free(mc->mc_data, M_DEVBUF);
2393 1.25 christos mly_ccb_free(mly, mc);
2394 1.1 ad
2395 1.1 ad return (rv);
2396 1.1 ad }
2397 1.1 ad
2398 1.1 ad /*
2399 1.1 ad * Return health status to userspace. If the health change index in the
2400 1.1 ad * user structure does not match that currently exported by the controller,
2401 1.1 ad * we return the current status immediately. Otherwise, we block until
2402 1.1 ad * either interrupted or new status is delivered.
2403 1.1 ad */
2404 1.1 ad static int
2405 1.1 ad mly_user_health(struct mly_softc *mly, struct mly_user_health *uh)
2406 1.1 ad {
2407 1.1 ad struct mly_health_status mh;
2408 1.1 ad int rv, s;
2409 1.23 perry
2410 1.1 ad /* Fetch the current health status from userspace. */
2411 1.1 ad rv = copyin(uh->HealthStatusBuffer, &mh, sizeof(mh));
2412 1.1 ad if (rv != 0)
2413 1.1 ad return (rv);
2414 1.1 ad
2415 1.1 ad /* spin waiting for a status update */
2416 1.1 ad s = splbio();
2417 1.1 ad if (mly->mly_event_change == mh.change_counter)
2418 1.1 ad rv = tsleep(&mly->mly_event_change, PRIBIO | PCATCH,
2419 1.1 ad "mlyhealth", 0);
2420 1.1 ad splx(s);
2421 1.1 ad
2422 1.1 ad if (rv == 0) {
2423 1.1 ad /*
2424 1.1 ad * Copy the controller's health status buffer out (there is
2425 1.1 ad * a race here if it changes again).
2426 1.1 ad */
2427 1.1 ad rv = copyout(&mly->mly_mmbox->mmm_health.status,
2428 1.1 ad uh->HealthStatusBuffer, sizeof(uh->HealthStatusBuffer));
2429 1.1 ad }
2430 1.1 ad
2431 1.1 ad return (rv);
2432 1.1 ad }
2433