mly.c revision 1.2 1 /* $NetBSD: mly.c,v 1.2 2001/07/30 23:29:08 ad Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran, Thor Lancelot Simon, and Eric Haszlakiewicz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*-
40 * Copyright (c) 2000, 2001 Michael Smith
41 * Copyright (c) 2000 BSDi
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63 * SUCH DAMAGE.
64 *
65 * from FreeBSD: mly.c,v 1.8 2001/07/14 00:12:22 msmith Exp
66 */
67
68 /*
69 * Driver for the Mylex AcceleRAID and eXtremeRAID family with v6 firmware.
70 *
71 * TODO:
72 *
73 * o Make mly->mly_btl a hash, then MLY_BTL_RESCAN becomes a SIMPLEQ.
74 * o Handle FC and multiple LUNs.
75 * o Fix mmbox usage.
76 * o Fix transfer speed fudge.
77 */
78
79 #include <sys/param.h>
80 #include <sys/systm.h>
81 #include <sys/device.h>
82 #include <sys/kernel.h>
83 #include <sys/queue.h>
84 #include <sys/buf.h>
85 #include <sys/endian.h>
86 #include <sys/conf.h>
87 #include <sys/malloc.h>
88 #include <sys/ioctl.h>
89 #include <sys/scsiio.h>
90 #include <sys/kthread.h>
91
92 #include <uvm/uvm_extern.h>
93
94 #include <machine/bus.h>
95
96 #include <dev/scsipi/scsi_all.h>
97 #include <dev/scsipi/scsipi_all.h>
98 #include <dev/scsipi/scsiconf.h>
99
100 #include <dev/pci/pcireg.h>
101 #include <dev/pci/pcivar.h>
102 #include <dev/pci/pcidevs.h>
103
104 #include <dev/pci/mlyreg.h>
105 #include <dev/pci/mlyio.h>
106 #include <dev/pci/mlyvar.h>
107 #include <dev/pci/mly_tables.h>
108
109 static void mly_attach(struct device *, struct device *, void *);
110 static int mly_match(struct device *, struct cfdata *, void *);
111 static const struct mly_ident *mly_find_ident(struct pci_attach_args *);
112 static int mly_fwhandshake(struct mly_softc *);
113 static int mly_flush(struct mly_softc *);
114 static int mly_intr(void *);
115 static void mly_shutdown(void *);
116
117 static int mly_alloc_ccbs(struct mly_softc *);
118 static void mly_check_event(struct mly_softc *);
119 static void mly_complete_event(struct mly_softc *, struct mly_ccb *);
120 static void mly_complete_rescan(struct mly_softc *, struct mly_ccb *);
121 static int mly_dmamem_alloc(struct mly_softc *, int, bus_dmamap_t *,
122 caddr_t *, bus_addr_t *, bus_dma_segment_t *);
123 static void mly_dmamem_free(struct mly_softc *, int, bus_dmamap_t,
124 caddr_t, bus_dma_segment_t *);
125 static int mly_enable_mmbox(struct mly_softc *);
126 static void mly_fetch_event(struct mly_softc *);
127 static int mly_get_controllerinfo(struct mly_softc *);
128 static int mly_get_eventstatus(struct mly_softc *);
129 static int mly_ioctl(struct mly_softc *, struct mly_cmd_ioctl *,
130 void **, size_t, void *, size_t *);
131 static void mly_padstr(char *, const char *, int);
132 static void mly_process_event(struct mly_softc *, struct mly_event *);
133 static void mly_release_ccbs(struct mly_softc *);
134 static int mly_scan_btl(struct mly_softc *, int, int);
135 static void mly_scan_channel(struct mly_softc *, int);
136 static void mly_thread(void *);
137 static void mly_thread_create(void *);
138
139 static int mly_ccb_alloc(struct mly_softc *, struct mly_ccb **);
140 static void mly_ccb_complete(struct mly_softc *, struct mly_ccb *);
141 static void mly_ccb_enqueue(struct mly_softc *, struct mly_ccb *);
142 static void mly_ccb_free(struct mly_softc *, struct mly_ccb *);
143 static int mly_ccb_map(struct mly_softc *, struct mly_ccb *);
144 static int mly_ccb_poll(struct mly_softc *, struct mly_ccb *, int);
145 static int mly_ccb_submit(struct mly_softc *, struct mly_ccb *);
146 static void mly_ccb_unmap(struct mly_softc *, struct mly_ccb *);
147 static int mly_ccb_wait(struct mly_softc *, struct mly_ccb *, int);
148
149 static void mly_get_xfer_mode(struct mly_softc *, int,
150 struct scsipi_xfer_mode *);
151 static void mly_scsipi_complete(struct mly_softc *, struct mly_ccb *);
152 static int mly_scsipi_ioctl(struct scsipi_channel *, u_long, caddr_t,
153 int, struct proc *);
154 static void mly_scsipi_minphys(struct buf *);
155 static void mly_scsipi_request(struct scsipi_channel *,
156 scsipi_adapter_req_t, void *);
157
158 static int mly_user_command(struct mly_softc *, struct mly_user_command *);
159 static int mly_user_health(struct mly_softc *, struct mly_user_health *);
160
161 cdev_decl(mly);
162
163 extern struct cfdriver mly_cd;
164
165 struct cfattach mly_ca = {
166 sizeof(struct mly_softc), mly_match, mly_attach
167 };
168
169 struct mly_ident {
170 u_short vendor;
171 u_short product;
172 u_short subvendor;
173 u_short subproduct;
174 int hwif;
175 const char *desc;
176 } static const mly_ident[] = {
177 {
178 PCI_VENDOR_MYLEX,
179 PCI_PRODUCT_MYLEX_EXTREMERAID,
180 PCI_VENDOR_MYLEX,
181 0x0040,
182 MLY_HWIF_STRONGARM,
183 "eXtremeRAID 2000"
184 },
185 {
186 PCI_VENDOR_MYLEX,
187 PCI_PRODUCT_MYLEX_EXTREMERAID,
188 PCI_VENDOR_MYLEX,
189 0x0030,
190 MLY_HWIF_STRONGARM,
191 "eXtremeRAID 3000"
192 },
193 {
194 PCI_VENDOR_MYLEX,
195 PCI_PRODUCT_MYLEX_ACCELERAID,
196 PCI_VENDOR_MYLEX,
197 0x0050,
198 MLY_HWIF_I960RX,
199 "AcceleRAID 352"
200 },
201 {
202 PCI_VENDOR_MYLEX,
203 PCI_PRODUCT_MYLEX_ACCELERAID,
204 PCI_VENDOR_MYLEX,
205 0x0052,
206 MLY_HWIF_I960RX,
207 "AcceleRAID 170"
208 },
209 {
210 PCI_VENDOR_MYLEX,
211 PCI_PRODUCT_MYLEX_ACCELERAID,
212 PCI_VENDOR_MYLEX,
213 0x0054,
214 MLY_HWIF_I960RX,
215 "AcceleRAID 160"
216 },
217 };
218
219 static void *mly_sdh;
220
221 /*
222 * Try to find a `mly_ident' entry corresponding to this board.
223 */
224 static const struct mly_ident *
225 mly_find_ident(struct pci_attach_args *pa)
226 {
227 const struct mly_ident *mpi, *maxmpi;
228 pcireg_t reg;
229
230 mpi = mly_ident;
231 maxmpi = mpi + sizeof(mly_ident) / sizeof(mly_ident[0]);
232
233 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O)
234 return (NULL);
235
236 for (; mpi < maxmpi; mpi++) {
237 if (PCI_VENDOR(pa->pa_id) != mpi->vendor ||
238 PCI_PRODUCT(pa->pa_id) != mpi->product)
239 continue;
240
241 if (mpi->subvendor == 0x0000)
242 return (mpi);
243
244 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
245
246 if (PCI_VENDOR(reg) == mpi->subvendor &&
247 PCI_PRODUCT(reg) == mpi->subproduct)
248 return (mpi);
249 }
250
251 return (NULL);
252 }
253
254 /*
255 * Match a supported board.
256 */
257 static int
258 mly_match(struct device *parent, struct cfdata *cfdata, void *aux)
259 {
260
261 return (mly_find_ident(aux) != NULL);
262 }
263
264 /*
265 * Attach a supported board.
266 */
267 static void
268 mly_attach(struct device *parent, struct device *self, void *aux)
269 {
270 struct pci_attach_args *pa;
271 struct mly_softc *mly;
272 struct mly_ioctl_getcontrollerinfo *mi;
273 const struct mly_ident *ident;
274 pci_chipset_tag_t pc;
275 pci_intr_handle_t ih;
276 bus_space_handle_t memh, ioh;
277 bus_space_tag_t memt, iot;
278 pcireg_t reg;
279 const char *intrstr;
280 int ior, memr, i, rv, state;
281 struct scsipi_adapter *adapt;
282 struct scsipi_channel *chan;
283
284 mly = (struct mly_softc *)self;
285 pa = aux;
286 pc = pa->pa_pc;
287 ident = mly_find_ident(pa);
288 state = 0;
289
290 mly->mly_dmat = pa->pa_dmat;
291 mly->mly_hwif = ident->hwif;
292
293 printf(": Mylex %s\n", ident->desc);
294
295 /*
296 * Map the PCI register window.
297 */
298 memr = -1;
299 ior = -1;
300
301 for (i = 0x10; i <= 0x14; i += 4) {
302 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
303
304 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) {
305 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0)
306 ior = i;
307 } else {
308 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0)
309 memr = i;
310 }
311 }
312
313 if (memr != -1)
314 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0,
315 &memt, &memh, NULL, NULL))
316 memr = -1;
317 if (ior != -1)
318 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0,
319 &iot, &ioh, NULL, NULL))
320 ior = -1;
321
322 if (memr != -1) {
323 mly->mly_iot = memt;
324 mly->mly_ioh = memh;
325 } else if (ior != -1) {
326 mly->mly_iot = iot;
327 mly->mly_ioh = ioh;
328 } else {
329 printf("%s: can't map i/o or memory space\n", self->dv_xname);
330 return;
331 }
332
333 /*
334 * Enable the device.
335 */
336 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
337 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
338 reg | PCI_COMMAND_MASTER_ENABLE);
339
340 /*
341 * Map and establish the interrupt.
342 */
343 if (pci_intr_map(pa, &ih)) {
344 printf("%s: can't map interrupt\n", self->dv_xname);
345 return;
346 }
347 intrstr = pci_intr_string(pc, ih);
348 mly->mly_ih = pci_intr_establish(pc, ih, IPL_BIO, mly_intr, mly);
349 if (mly->mly_ih == NULL) {
350 printf("%s: can't establish interrupt", self->dv_xname);
351 if (intrstr != NULL)
352 printf(" at %s", intrstr);
353 printf("\n");
354 return;
355 }
356
357 if (intrstr != NULL)
358 printf("%s: interrupting at %s\n", mly->mly_dv.dv_xname,
359 intrstr);
360
361 /*
362 * Take care of interface-specific tasks.
363 */
364 switch (mly->mly_hwif) {
365 case MLY_HWIF_I960RX:
366 mly->mly_doorbell_true = 0x00;
367 mly->mly_cmd_mailbox = MLY_I960RX_COMMAND_MAILBOX;
368 mly->mly_status_mailbox = MLY_I960RX_STATUS_MAILBOX;
369 mly->mly_idbr = MLY_I960RX_IDBR;
370 mly->mly_odbr = MLY_I960RX_ODBR;
371 mly->mly_error_status = MLY_I960RX_ERROR_STATUS;
372 mly->mly_interrupt_status = MLY_I960RX_INTERRUPT_STATUS;
373 mly->mly_interrupt_mask = MLY_I960RX_INTERRUPT_MASK;
374 break;
375
376 case MLY_HWIF_STRONGARM:
377 mly->mly_doorbell_true = 0xff;
378 mly->mly_cmd_mailbox = MLY_STRONGARM_COMMAND_MAILBOX;
379 mly->mly_status_mailbox = MLY_STRONGARM_STATUS_MAILBOX;
380 mly->mly_idbr = MLY_STRONGARM_IDBR;
381 mly->mly_odbr = MLY_STRONGARM_ODBR;
382 mly->mly_error_status = MLY_STRONGARM_ERROR_STATUS;
383 mly->mly_interrupt_status = MLY_STRONGARM_INTERRUPT_STATUS;
384 mly->mly_interrupt_mask = MLY_STRONGARM_INTERRUPT_MASK;
385 break;
386 }
387
388 /*
389 * Allocate and map the scatter/gather lists.
390 */
391 rv = mly_dmamem_alloc(mly, MLY_SGL_SIZE * MLY_MAX_CCBS,
392 &mly->mly_sg_dmamap, (caddr_t *)&mly->mly_sg,
393 &mly->mly_sg_busaddr, &mly->mly_sg_seg);
394 if (rv) {
395 printf("%s: unable to allocate S/G maps\n",
396 mly->mly_dv.dv_xname);
397 goto bad;
398 }
399 state++;
400
401 /*
402 * Allocate and map the memory mailbox.
403 */
404 rv = mly_dmamem_alloc(mly, sizeof(struct mly_mmbox),
405 &mly->mly_mmbox_dmamap, (caddr_t *)&mly->mly_mmbox,
406 &mly->mly_mmbox_busaddr, &mly->mly_mmbox_seg);
407 if (rv) {
408 printf("%s: unable to allocate mailboxes\n",
409 mly->mly_dv.dv_xname);
410 goto bad;
411 }
412 state++;
413
414 /*
415 * Initialise per-controller queues.
416 */
417 SLIST_INIT(&mly->mly_ccb_free);
418 SIMPLEQ_INIT(&mly->mly_ccb_queue);
419
420 /*
421 * Disable interrupts before we start talking to the controller.
422 */
423 mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE);
424
425 /*
426 * Wait for the controller to come ready, handshaking with the
427 * firmware if required. This is typically only necessary on
428 * platforms where the controller BIOS does not run.
429 */
430 if (mly_fwhandshake(mly)) {
431 printf("%s: unable to bring controller online\n",
432 mly->mly_dv.dv_xname);
433 goto bad;
434 }
435
436 /*
437 * Allocate initial command buffers, obtain controller feature
438 * information, and then reallocate command buffers, since we'll
439 * know how many we want.
440 */
441 if (mly_alloc_ccbs(mly)) {
442 printf("%s: unable to allocate CCBs\n",
443 mly->mly_dv.dv_xname);
444 goto bad;
445 }
446 state++;
447 if (mly_get_controllerinfo(mly)) {
448 printf("%s: unable to retrieve controller info\n",
449 mly->mly_dv.dv_xname);
450 goto bad;
451 }
452 mly_release_ccbs(mly);
453 if (mly_alloc_ccbs(mly)) {
454 printf("%s: unable to allocate CCBs\n",
455 mly->mly_dv.dv_xname);
456 state--;
457 goto bad;
458 }
459
460 /*
461 * Get the current event counter for health purposes, populate the
462 * initial health status buffer.
463 */
464 if (mly_get_eventstatus(mly)) {
465 printf("%s: unable to retrieve event status\n",
466 mly->mly_dv.dv_xname);
467 goto bad;
468 }
469
470 /*
471 * Enable memory-mailbox mode.
472 */
473 if (mly_enable_mmbox(mly)) {
474 printf("%s: unable to enable memory mailbox\n",
475 mly->mly_dv.dv_xname);
476 goto bad;
477 }
478
479 /*
480 * Print a little information about the controller.
481 */
482 mi = mly->mly_controllerinfo;
483
484 printf("%s: %d physical channel%s, firmware %d.%02d-%d-%02d "
485 "(%02d%02d%02d%02d), %dMB RAM\n", mly->mly_dv.dv_xname,
486 mi->physical_channels_present,
487 (mi->physical_channels_present) > 1 ? "s" : "",
488 mi->fw_major, mi->fw_minor, mi->fw_turn, mi->fw_build,
489 mi->fw_century, mi->fw_year, mi->fw_month, mi->fw_day,
490 le16toh(mi->memory_size));
491
492 /*
493 * Register our `shutdownhook'.
494 */
495 if (mly_sdh == NULL)
496 shutdownhook_establish(mly_shutdown, NULL);
497
498 /*
499 * Clear any previous BTL information. For each bus that scsipi
500 * wants to scan, we'll receive the SCBUSIOLLSCAN ioctl and retrieve
501 * all BTL info at that point.
502 */
503 memset(&mly->mly_btl, 0, sizeof(mly->mly_btl));
504
505 mly->mly_nchans = mly->mly_controllerinfo->physical_channels_present +
506 mly->mly_controllerinfo->virtual_channels_present;
507
508 /*
509 * Attach to scsipi.
510 */
511 adapt = &mly->mly_adapt;
512 memset(adapt, 0, sizeof(*adapt));
513 adapt->adapt_dev = &mly->mly_dv;
514 adapt->adapt_nchannels = mly->mly_nchans;
515 adapt->adapt_openings = mly->mly_ncmds - MLY_CCBS_RESV;
516 adapt->adapt_max_periph = mly->mly_ncmds - MLY_CCBS_RESV;
517 adapt->adapt_request = mly_scsipi_request;
518 adapt->adapt_minphys = mly_scsipi_minphys;
519 adapt->adapt_ioctl = mly_scsipi_ioctl;
520
521 for (i = 0; i < mly->mly_nchans; i++) {
522 chan = &mly->mly_chans[i];
523 memset(chan, 0, sizeof(*chan));
524 chan->chan_adapter = adapt;
525 chan->chan_bustype = &scsi_bustype;
526 chan->chan_channel = i;
527 chan->chan_ntargets = MLY_MAX_TARGETS;
528 chan->chan_nluns = MLY_MAX_LUNS;
529 chan->chan_id = mly->mly_controllerparam->initiator_id;
530 chan->chan_flags = SCSIPI_CHAN_NOSETTLE;
531 config_found(&mly->mly_dv, chan, scsiprint);
532 }
533
534 /*
535 * Now enable interrupts...
536 */
537 mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE);
538
539 /*
540 * Finally, create our monitoring thread.
541 */
542 kthread_create(mly_thread_create, mly);
543
544 mly->mly_state |= MLY_STATE_INITOK;
545 return;
546
547 bad:
548 if (state > 2)
549 mly_release_ccbs(mly);
550 if (state > 1)
551 mly_dmamem_free(mly, sizeof(struct mly_mmbox),
552 mly->mly_mmbox_dmamap, (caddr_t)mly->mly_mmbox,
553 &mly->mly_mmbox_seg);
554 if (state > 0)
555 mly_dmamem_free(mly, MLY_SGL_SIZE * MLY_MAX_CCBS,
556 mly->mly_sg_dmamap, (caddr_t)mly->mly_sg,
557 &mly->mly_sg_seg);
558 }
559
560 /*
561 * Scan all possible devices on the specified channel.
562 */
563 static void
564 mly_scan_channel(struct mly_softc *mly, int bus)
565 {
566 int startbus, endbus, s, target;
567
568 if (bus == -1) {
569 startbus = 0;
570 endbus = mly->mly_nchans - 1;
571 } else {
572 startbus = bus;
573 endbus = bus;
574 }
575
576 for (bus = startbus; bus <= endbus; bus++)
577 for (target = 0; target < MLY_MAX_TARGETS; target++) {
578 s = splbio();
579 if (!mly_scan_btl(mly, bus, target)) {
580 tsleep(&mly->mly_btl[bus][target], PRIBIO,
581 "mlyscan", 0);
582 }
583 splx(s);
584 }
585 }
586
587 /*
588 * Shut down all configured `mly' devices.
589 */
590 static void
591 mly_shutdown(void *cookie)
592 {
593 struct mly_softc *mly;
594 int i;
595
596 for (i = 0; i < mly_cd.cd_ndevs; i++) {
597 if ((mly = device_lookup(&mly_cd, i)) == NULL)
598 continue;
599
600 if (mly_flush(mly))
601 printf("%s: unable to flush cache\n",
602 mly->mly_dv.dv_xname);
603 }
604 }
605
606 /*
607 * Fill in the mly_controllerinfo and mly_controllerparam fields in the
608 * softc.
609 */
610 static int
611 mly_get_controllerinfo(struct mly_softc *mly)
612 {
613 struct mly_cmd_ioctl mci;
614 int rv;
615
616 /*
617 * Build the getcontrollerinfo ioctl and send it.
618 */
619 memset(&mci, 0, sizeof(mci));
620 mci.sub_ioctl = MDACIOCTL_GETCONTROLLERINFO;
621 rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerinfo,
622 sizeof(*mly->mly_controllerinfo), NULL, NULL);
623 if (rv != 0)
624 return (rv);
625
626 /*
627 * Build the getcontrollerparameter ioctl and send it.
628 */
629 memset(&mci, 0, sizeof(mci));
630 mci.sub_ioctl = MDACIOCTL_GETCONTROLLERPARAMETER;
631 rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerparam,
632 sizeof(*mly->mly_controllerparam), NULL, NULL);
633
634 return (rv);
635 }
636
637 /*
638 * Rescan a device, possibly as a consequence of getting an event which
639 * suggests that it may have changed. Must be called with interrupts
640 * blocked.
641 */
642 static int
643 mly_scan_btl(struct mly_softc *mly, int bus, int target)
644 {
645 struct mly_ccb *mc;
646 struct mly_cmd_ioctl *mci;
647 int rv;
648
649 if (target == mly->mly_controllerparam->initiator_id) {
650 mly->mly_btl[bus][target].mb_flags = MLY_BTL_PROTECTED;
651 return (EIO);
652 }
653
654 /* Don't re-scan if a scan is already in progress. */
655 if ((mly->mly_btl[bus][target].mb_flags & MLY_BTL_SCANNING) != 0)
656 return (EBUSY);
657
658 /* Get a command. */
659 if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
660 return (rv);
661
662 /* Set up the data buffer. */
663 mc->mc_data = malloc(sizeof(union mly_devinfo),
664 M_DEVBUF, M_NOWAIT);
665 memset(mc->mc_data, 0, sizeof(union mly_devinfo));
666
667 mc->mc_flags |= MLY_CCB_DATAIN;
668 mc->mc_complete = mly_complete_rescan;
669
670 /*
671 * Build the ioctl.
672 */
673 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
674 mci->opcode = MDACMD_IOCTL;
675 mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
676 memset(&mci->param, 0, sizeof(mci->param));
677
678 if (MLY_BUS_IS_VIRTUAL(mly, bus)) {
679 mc->mc_length = sizeof(struct mly_ioctl_getlogdevinfovalid);
680 mci->data_size = htole32(mc->mc_length);
681 mci->sub_ioctl = MDACIOCTL_GETLOGDEVINFOVALID;
682 _lto3l(MLY_LOGADDR(0, MLY_LOGDEV_ID(mly, bus, target)),
683 mci->addr);
684 } else {
685 mc->mc_length = sizeof(struct mly_ioctl_getphysdevinfovalid);
686 mci->data_size = htole32(mc->mc_length);
687 mci->sub_ioctl = MDACIOCTL_GETPHYSDEVINFOVALID;
688 _lto3l(MLY_PHYADDR(0, bus, target, 0), mci->addr);
689 }
690
691 /*
692 * Dispatch the command.
693 */
694 if ((rv = mly_ccb_map(mly, mc)) != 0)
695 goto bad;
696 mly->mly_btl[bus][target].mb_flags |= MLY_BTL_SCANNING;
697 mly_ccb_enqueue(mly, mc);
698 return (0);
699
700 bad:
701 free(mc->mc_data, M_DEVBUF);
702 mly_ccb_free(mly, mc);
703 return(rv);
704 }
705
706 /*
707 * Handle the completion of a rescan operation.
708 */
709 static void
710 mly_complete_rescan(struct mly_softc *mly, struct mly_ccb *mc)
711 {
712 struct mly_ioctl_getlogdevinfovalid *ldi;
713 struct mly_ioctl_getphysdevinfovalid *pdi;
714 struct mly_cmd_ioctl *mci;
715 struct mly_btl btl, *btlp;
716 struct scsipi_xfer_mode xm;
717 int bus, target, rescan;
718 u_int tmp;
719
720 mly_ccb_unmap(mly, mc);
721
722 /*
723 * Recover the bus and target from the command. We need these even
724 * in the case where we don't have a useful response.
725 */
726 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
727 tmp = _3ltol(mci->addr);
728 rescan = 0;
729
730 if (mci->sub_ioctl == MDACIOCTL_GETLOGDEVINFOVALID) {
731 bus = MLY_LOGDEV_BUS(mly, MLY_LOGADDR_DEV(tmp));
732 target = MLY_LOGDEV_TARGET(mly, MLY_LOGADDR_DEV(tmp));
733 } else {
734 bus = MLY_PHYADDR_CHANNEL(tmp);
735 target = MLY_PHYADDR_TARGET(tmp);
736 }
737
738 /* XXX Validate bus/target? */
739 btlp = &mly->mly_btl[bus][target];
740
741 /* The default result is 'no device'. */
742 memset(&btl, 0, sizeof(btl));
743 btl.mb_flags = MLY_BTL_PROTECTED;
744
745 /* If the rescan completed OK, we have possibly-new BTL data. */
746 if (mc->mc_status != 0)
747 goto out;
748
749 if (mc->mc_length == sizeof(*ldi)) {
750 ldi = (struct mly_ioctl_getlogdevinfovalid *)mc->mc_data;
751 tmp = le32toh(ldi->logical_device_number);
752
753 if (MLY_LOGDEV_BUS(mly, tmp) != bus ||
754 MLY_LOGDEV_TARGET(mly, tmp) != target) {
755 #ifdef MLYDEBUG_OBNOXIOUS
756 printf("%s: WARNING: BTL rescan (logical) for %d:%d "
757 "returned data for %d:%d instead\n",
758 mly->mly_dv.dv_xname, bus, target,
759 MLY_LOGDEV_BUS(mly, tmp),
760 MLY_LOGDEV_TARGET(mly, tmp));
761 #endif
762 goto out;
763 }
764
765 btl.mb_flags = MLY_BTL_LOGICAL | MLY_BTL_TQING;
766 btl.mb_type = ldi->raid_level;
767 btl.mb_state = ldi->state;
768 } else if (mc->mc_length == sizeof(*pdi)) {
769 pdi = (struct mly_ioctl_getphysdevinfovalid *)mc->mc_data;
770
771 if (pdi->channel != bus || pdi->target != target) {
772 #ifdef MLYDEBUG_OBNOXIOUS
773 printf("%s: WARNING: BTL rescan (physical) for %d:%d "
774 " returned data for %d:%d instead\n",
775 mly->mly_dv.dv_xname,
776 bus, target, pdi->channel, pdi->target);
777 #endif
778 goto out;
779 }
780
781 btl.mb_flags = MLY_BTL_PHYSICAL;
782 btl.mb_type = MLY_DEVICE_TYPE_PHYSICAL;
783 btl.mb_state = pdi->state;
784 btl.mb_speed = pdi->speed;
785 btl.mb_width = pdi->width;
786
787 if (pdi->state != MLY_DEVICE_STATE_UNCONFIGURED)
788 btl.mb_flags |= MLY_BTL_PROTECTED;
789 if (pdi->command_tags != 0)
790 btl.mb_flags |= MLY_BTL_TQING;
791 } else {
792 printf("%s: BTL rescan result invalid\n", mly->mly_dv.dv_xname);
793 goto out;
794 }
795
796 /* Decide whether we need to rescan the device. */
797 if (btl.mb_flags != btlp->mb_flags ||
798 btl.mb_speed != btlp->mb_speed ||
799 btl.mb_width != btlp->mb_width)
800 rescan = 1;
801
802 out:
803 *btlp = btl;
804
805 if (rescan && (btl.mb_flags & MLY_BTL_PROTECTED) == 0) {
806 xm.xm_target = target;
807 mly_get_xfer_mode(mly, bus, &xm);
808 /* XXX SCSI mid-layer rescan goes here. */
809 }
810
811 /* Wake anybody waiting on the device to be rescanned. */
812 wakeup(btlp);
813
814 free(mc->mc_data, M_DEVBUF);
815 mly_ccb_free(mly, mc);
816 }
817
818 /*
819 * Get the current health status and set the 'next event' counter to suit.
820 */
821 static int
822 mly_get_eventstatus(struct mly_softc *mly)
823 {
824 struct mly_cmd_ioctl mci;
825 struct mly_health_status *mh;
826 int rv;
827
828 /* Build the gethealthstatus ioctl and send it. */
829 memset(&mci, 0, sizeof(mci));
830 mh = NULL;
831 mci.sub_ioctl = MDACIOCTL_GETHEALTHSTATUS;
832
833 rv = mly_ioctl(mly, &mci, (void **)&mh, sizeof(*mh), NULL, NULL);
834 if (rv)
835 return (rv);
836
837 /* Get the event counter. */
838 mly->mly_event_change = le32toh(mh->change_counter);
839 mly->mly_event_waiting = le32toh(mh->next_event);
840 mly->mly_event_counter = le32toh(mh->next_event);
841
842 /* Save the health status into the memory mailbox */
843 memcpy(&mly->mly_mmbox->mmm_health.status, mh, sizeof(*mh));
844
845 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
846 offsetof(struct mly_mmbox, mmm_health),
847 sizeof(mly->mly_mmbox->mmm_health),
848 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
849
850 free(mh, M_DEVBUF);
851 return (0);
852 }
853
854 /*
855 * Enable the memory mailbox mode.
856 */
857 static int
858 mly_enable_mmbox(struct mly_softc *mly)
859 {
860 struct mly_cmd_ioctl mci;
861 u_int8_t *sp;
862 u_int64_t tmp;
863 int rv;
864
865 /* Build the ioctl and send it. */
866 memset(&mci, 0, sizeof(mci));
867 mci.sub_ioctl = MDACIOCTL_SETMEMORYMAILBOX;
868
869 /* Set buffer addresses. */
870 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_command);
871 mci.param.setmemorymailbox.command_mailbox_physaddr = htole64(tmp);
872
873 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_status);
874 mci.param.setmemorymailbox.status_mailbox_physaddr = htole64(tmp);
875
876 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_health);
877 mci.param.setmemorymailbox.health_buffer_physaddr = htole64(tmp);
878
879 /* Set buffer sizes - abuse of data_size field is revolting. */
880 sp = (u_int8_t *)&mci.data_size;
881 sp[0] = (sizeof(union mly_cmd_packet) * MLY_MMBOX_COMMANDS) >> 10;
882 sp[1] = (sizeof(union mly_status_packet) * MLY_MMBOX_STATUS) >> 10;
883 mci.param.setmemorymailbox.health_buffer_size =
884 sizeof(union mly_health_region) >> 10;
885
886 rv = mly_ioctl(mly, &mci, NULL, 0, NULL, NULL);
887 if (rv)
888 return (rv);
889
890 mly->mly_state |= MLY_STATE_MMBOX_ACTIVE;
891 return (0);
892 }
893
894 /*
895 * Flush all pending I/O from the controller.
896 */
897 static int
898 mly_flush(struct mly_softc *mly)
899 {
900 struct mly_cmd_ioctl mci;
901
902 /* Build the ioctl */
903 memset(&mci, 0, sizeof(mci));
904 mci.sub_ioctl = MDACIOCTL_FLUSHDEVICEDATA;
905 mci.param.deviceoperation.operation_device =
906 MLY_OPDEVICE_PHYSICAL_CONTROLLER;
907
908 /* Pass it off to the controller */
909 return (mly_ioctl(mly, &mci, NULL, 0, NULL, NULL));
910 }
911
912 /*
913 * Perform an ioctl command.
914 *
915 * If (data) is not NULL, the command requires data transfer. If (*data) is
916 * NULL the command requires data transfer from the controller, and we will
917 * allocate a buffer for it. If (*data) is not NULL, the command requires
918 * data transfer to the controller.
919 */
920 static int
921 mly_ioctl(struct mly_softc *mly, struct mly_cmd_ioctl *ioctl, void **data,
922 size_t datasize, void *sense_buffer,
923 size_t *sense_length)
924 {
925 struct mly_ccb *mc;
926 struct mly_cmd_ioctl *mci;
927 u_int8_t status;
928 int rv;
929
930 mc = NULL;
931 if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
932 goto bad;
933
934 /*
935 * Copy the ioctl structure, but save some important fields and then
936 * fixup.
937 */
938 mci = &mc->mc_packet->ioctl;
939 ioctl->sense_buffer_address = htole64(mci->sense_buffer_address);
940 ioctl->maximum_sense_size = mci->maximum_sense_size;
941 *mci = *ioctl;
942 mci->opcode = MDACMD_IOCTL;
943 mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
944
945 /* Handle the data buffer. */
946 if (data != NULL) {
947 if (*data == NULL) {
948 /* Allocate data buffer */
949 mc->mc_data = malloc(datasize, M_DEVBUF, M_NOWAIT);
950 mc->mc_flags |= MLY_CCB_DATAIN;
951 } else {
952 mc->mc_data = *data;
953 mc->mc_flags |= MLY_CCB_DATAOUT;
954 }
955 mc->mc_length = datasize;
956 mc->mc_packet->generic.data_size = htole32(datasize);
957 }
958
959 /* Run the command. */
960 if (datasize > 0)
961 if ((rv = mly_ccb_map(mly, mc)) != 0)
962 goto bad;
963 rv = mly_ccb_poll(mly, mc, 30000);
964 if (datasize > 0)
965 mly_ccb_unmap(mly, mc);
966 if (rv != 0)
967 goto bad;
968
969 /* Clean up and return any data. */
970 status = mc->mc_status;
971
972 if (status != 0)
973 printf("mly_ioctl: command status %d\n", status);
974
975 if (mc->mc_sense > 0 && sense_buffer != NULL) {
976 memcpy(sense_buffer, mc->mc_packet, mc->mc_sense);
977 *sense_length = mc->mc_sense;
978 goto bad;
979 }
980
981 /* Should we return a data pointer? */
982 if (data != NULL && *data == NULL)
983 *data = mc->mc_data;
984
985 /* Command completed OK. */
986 rv = (status != 0 ? EIO : 0);
987
988 bad:
989 if (mc != NULL) {
990 /* Do we need to free a data buffer we allocated? */
991 if (rv != 0 && mc->mc_data != NULL && *data == NULL)
992 free(mc->mc_data, M_DEVBUF);
993 mly_ccb_free(mly, mc);
994 }
995
996 return (rv);
997 }
998
999 /*
1000 * Check for event(s) outstanding in the controller.
1001 */
1002 static void
1003 mly_check_event(struct mly_softc *mly)
1004 {
1005
1006 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1007 offsetof(struct mly_mmbox, mmm_health),
1008 sizeof(mly->mly_mmbox->mmm_health),
1009 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1010
1011 /*
1012 * The controller may have updated the health status information, so
1013 * check for it here. Note that the counters are all in host
1014 * memory, so this check is very cheap. Also note that we depend on
1015 * checking on completion
1016 */
1017 if (le32toh(mly->mly_mmbox->mmm_health.status.change_counter) !=
1018 mly->mly_event_change) {
1019 mly->mly_event_change =
1020 le32toh(mly->mly_mmbox->mmm_health.status.change_counter);
1021 mly->mly_event_waiting =
1022 le32toh(mly->mly_mmbox->mmm_health.status.next_event);
1023
1024 /* Wake up anyone that might be interested in this. */
1025 wakeup(&mly->mly_event_change);
1026 }
1027
1028 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1029 offsetof(struct mly_mmbox, mmm_health),
1030 sizeof(mly->mly_mmbox->mmm_health),
1031 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1032
1033 if (mly->mly_event_counter != mly->mly_event_waiting)
1034 mly_fetch_event(mly);
1035 }
1036
1037 /*
1038 * Fetch one event from the controller. If we fail due to resource
1039 * starvation, we'll be retried the next time a command completes.
1040 */
1041 static void
1042 mly_fetch_event(struct mly_softc *mly)
1043 {
1044 struct mly_ccb *mc;
1045 struct mly_cmd_ioctl *mci;
1046 int s;
1047 u_int32_t event;
1048
1049 /* Get a command. */
1050 if (mly_ccb_alloc(mly, &mc))
1051 return;
1052
1053 /* Set up the data buffer. */
1054 mc->mc_data = malloc(sizeof(struct mly_event), M_DEVBUF, M_NOWAIT);
1055 memset(mc->mc_data, 0, sizeof(struct mly_event));
1056
1057 mc->mc_length = sizeof(struct mly_event);
1058 mc->mc_flags |= MLY_CCB_DATAIN;
1059 mc->mc_complete = mly_complete_event;
1060
1061 /*
1062 * Get an event number to fetch. It's possible that we've raced
1063 * with another context for the last event, in which case there will
1064 * be no more events.
1065 */
1066 s = splbio();
1067 if (mly->mly_event_counter == mly->mly_event_waiting) {
1068 splx(s);
1069 free(mc->mc_data, M_DEVBUF);
1070 mly_ccb_free(mly, mc);
1071 return;
1072 }
1073 event = mly->mly_event_counter++;
1074 splx(s);
1075
1076 /*
1077 * Build the ioctl.
1078 *
1079 * At this point we are committed to sending this request, as it
1080 * will be the only one constructed for this particular event
1081 * number.
1082 */
1083 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl;
1084 mci->opcode = MDACMD_IOCTL;
1085 mci->data_size = htole32(sizeof(struct mly_event));
1086 _lto3l(MLY_PHYADDR(0, 0, (event >> 16) & 0xff, (event >> 24) & 0xff),
1087 mci->addr);
1088 mci->timeout = 30 | MLY_TIMEOUT_SECONDS;
1089 mci->sub_ioctl = MDACIOCTL_GETEVENT;
1090 mci->param.getevent.sequence_number_low = htole16(event & 0xffff);
1091
1092 /*
1093 * Submit the command.
1094 */
1095 if (mly_ccb_map(mly, mc) != 0)
1096 goto bad;
1097 mly_ccb_enqueue(mly, mc);
1098 return;
1099
1100 bad:
1101 printf("%s: couldn't fetch event %u\n", mly->mly_dv.dv_xname, event);
1102 free(mc->mc_data, M_DEVBUF);
1103 mly_ccb_free(mly, mc);
1104 }
1105
1106 /*
1107 * Handle the completion of an event poll.
1108 */
1109 static void
1110 mly_complete_event(struct mly_softc *mly, struct mly_ccb *mc)
1111 {
1112 struct mly_event *me;
1113
1114 me = (struct mly_event *)mc->mc_data;
1115 mly_ccb_unmap(mly, mc);
1116 mly_ccb_free(mly, mc);
1117
1118 /* If the event was successfully fetched, process it. */
1119 if (mc->mc_status == SCSI_OK)
1120 mly_process_event(mly, me);
1121 else
1122 printf("%s: unable to fetch event; status = 0x%x\n",
1123 mly->mly_dv.dv_xname, mc->mc_status);
1124
1125 free(me, M_DEVBUF);
1126
1127 /* Check for another event. */
1128 mly_check_event(mly);
1129 }
1130
1131 /*
1132 * Process a controller event. Called with interupts blocked (i.e., at
1133 * interrupt time).
1134 */
1135 static void
1136 mly_process_event(struct mly_softc *mly, struct mly_event *me)
1137 {
1138 struct scsipi_sense_data *ssd;
1139 int bus, target, event, class, action;
1140 const char *fp, *tp;
1141
1142 ssd = (struct scsipi_sense_data *)&me->sense[0];
1143
1144 /*
1145 * Errors can be reported using vendor-unique sense data. In this
1146 * case, the event code will be 0x1c (Request sense data present),
1147 * the sense key will be 0x09 (vendor specific), the MSB of the ASC
1148 * will be set, and the actual event code will be a 16-bit value
1149 * comprised of the ASCQ (low byte) and low seven bits of the ASC
1150 * (low seven bits of the high byte).
1151 */
1152 if (le32toh(me->code) == 0x1c &&
1153 (ssd->flags & SSD_KEY) == SKEY_VENDOR_UNIQUE &&
1154 (ssd->add_sense_code & 0x80) != 0) {
1155 event = ((int)(ssd->add_sense_code & ~0x80) << 8) +
1156 ssd->add_sense_code_qual;
1157 } else
1158 event = le32toh(me->code);
1159
1160 /* Look up event, get codes. */
1161 fp = mly_describe_code(mly_table_event, event);
1162
1163 /* Quiet event? */
1164 class = fp[0];
1165 #ifdef notyet
1166 if (isupper(class) && bootverbose)
1167 class = tolower(class);
1168 #endif
1169
1170 /* Get action code, text string. */
1171 action = fp[1];
1172 tp = fp + 3;
1173
1174 /*
1175 * Print some information about the event.
1176 *
1177 * This code uses a table derived from the corresponding portion of
1178 * the Linux driver, and thus the parser is very similar.
1179 */
1180 switch (class) {
1181 case 'p':
1182 /*
1183 * Error on physical drive.
1184 */
1185 printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname,
1186 me->channel, me->target, tp);
1187 if (action == 'r')
1188 mly->mly_btl[me->channel][me->target].mb_flags |=
1189 MLY_BTL_RESCAN;
1190 break;
1191
1192 case 'l':
1193 case 'm':
1194 /*
1195 * Error on logical unit, or message about logical unit.
1196 *
1197 * XXX Splitting me->lun as we do in the following can't possibly
1198 * be correct. Where should we get this value?
1199 */
1200 bus = MLY_LOGDEV_BUS(mly, me->lun);
1201 target = MLY_LOGDEV_TARGET(mly, me->lun);
1202 if (action == 'r')
1203 mly->mly_btl[bus][target].mb_flags |= MLY_BTL_RESCAN;
1204 break;
1205
1206 case 's':
1207 /*
1208 * Report of sense data.
1209 */
1210 if (((ssd->flags & SSD_KEY) == SKEY_NO_SENSE ||
1211 (ssd->flags & SSD_KEY) == SKEY_NOT_READY) &&
1212 ssd->add_sense_code == 0x04 &&
1213 (ssd->add_sense_code_qual == 0x01 ||
1214 ssd->add_sense_code_qual == 0x02)) {
1215 /* Ignore NO_SENSE or NOT_READY in one case */
1216 break;
1217 }
1218
1219 /*
1220 * XXX Should translate this if SCSIVERBOSE.
1221 */
1222 printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname,
1223 me->channel, me->target, tp);
1224 printf("%s: sense key %d asc %02x ascq %02x\n",
1225 mly->mly_dv.dv_xname, ssd->flags & SSD_KEY,
1226 ssd->add_sense_code, ssd->add_sense_code_qual);
1227 printf("%s: info %x%x%x%x csi %x%x%x%x\n",
1228 mly->mly_dv.dv_xname, ssd->info[0], ssd->info[1],
1229 ssd->info[2], ssd->info[3], ssd->cmd_spec_info[0],
1230 ssd->cmd_spec_info[1], ssd->cmd_spec_info[2],
1231 ssd->cmd_spec_info[3]);
1232 if (action == 'r')
1233 mly->mly_btl[me->channel][me->target].mb_flags |=
1234 MLY_BTL_RESCAN;
1235 break;
1236
1237 case 'e':
1238 printf("%s: ", mly->mly_dv.dv_xname);
1239 printf(tp, me->target, me->lun);
1240 break;
1241
1242 case 'c':
1243 printf("%s: controller %s\n", mly->mly_dv.dv_xname, tp);
1244 break;
1245
1246 case '?':
1247 printf("%s: %s - %d\n", mly->mly_dv.dv_xname, tp, event);
1248 break;
1249
1250 default:
1251 /* Probably a 'noisy' event being ignored. */
1252 break;
1253 }
1254 }
1255
1256 /*
1257 * Create the monitoring thread. Called after the standard kernel threads
1258 * have been created.
1259 */
1260 static void
1261 mly_thread_create(void *cookie)
1262 {
1263 struct mly_softc *mly;
1264 int rv;
1265
1266 mly = cookie;
1267
1268 rv = kthread_create1(mly_thread, mly, &mly->mly_thread, "%s",
1269 mly->mly_dv.dv_xname);
1270 if (rv != 0)
1271 printf("%s: unable to create thread (%d)\n",
1272 mly->mly_dv.dv_xname, rv);
1273 }
1274
1275 /*
1276 * Perform periodic activities.
1277 */
1278 static void
1279 mly_thread(void *cookie)
1280 {
1281 struct mly_softc *mly;
1282 struct mly_btl *btl;
1283 int s, bus, target, done;
1284
1285 mly = (struct mly_softc *)cookie;
1286
1287 for (;;) {
1288 /* Check for new events. */
1289 mly_check_event(mly);
1290
1291 /* Re-scan up to 1 device. */
1292 s = splbio();
1293 for (bus = 0; bus < mly->mly_nchans && !done; bus++) {
1294 for (target = 0; target < MLY_MAX_TARGETS; target++) {
1295 /* Perform device rescan? */
1296 btl = &mly->mly_btl[bus][target];
1297 if ((btl->mb_flags & MLY_BTL_RESCAN) != 0) {
1298 btl->mb_flags ^= MLY_BTL_RESCAN;
1299 mly_scan_btl(mly, bus, target);
1300 done = 1;
1301 break;
1302 }
1303 }
1304 }
1305 splx(s);
1306
1307 /* Sleep for N seconds. */
1308 tsleep(mly_thread, PWAIT, "mlyzzz",
1309 hz * MLY_PERIODIC_INTERVAL);
1310 }
1311 }
1312
1313 /*
1314 * Submit a command to the controller and poll on completion. Return
1315 * non-zero on timeout.
1316 */
1317 static int
1318 mly_ccb_poll(struct mly_softc *mly, struct mly_ccb *mc, int timo)
1319 {
1320 int rv;
1321
1322 if ((rv = mly_ccb_submit(mly, mc)) != 0)
1323 return (rv);
1324
1325 for (timo *= 10; timo != 0; timo--) {
1326 if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0)
1327 break;
1328 mly_intr(mly);
1329 DELAY(100);
1330 }
1331
1332 return (timo == 0);
1333 }
1334
1335 /*
1336 * Submit a command to the controller and sleep on completion. Return
1337 * non-zero on timeout.
1338 */
1339 static int
1340 mly_ccb_wait(struct mly_softc *mly, struct mly_ccb *mc, int timo)
1341 {
1342 int rv, s;
1343
1344 mly_ccb_enqueue(mly, mc);
1345
1346 s = splbio();
1347 if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0) {
1348 splx(s);
1349 return (0);
1350 }
1351 rv = tsleep(mc, PRIBIO, "mlywccb", timo * hz / 1000);
1352 splx(s);
1353
1354 return (rv);
1355 }
1356
1357 /*
1358 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in
1359 * the order that they were enqueued and try to submit their command blocks
1360 * to the controller for execution.
1361 */
1362 void
1363 mly_ccb_enqueue(struct mly_softc *mly, struct mly_ccb *mc)
1364 {
1365 int s;
1366
1367 s = splbio();
1368
1369 if (mc != NULL)
1370 SIMPLEQ_INSERT_TAIL(&mly->mly_ccb_queue, mc, mc_link.simpleq);
1371
1372 while ((mc = SIMPLEQ_FIRST(&mly->mly_ccb_queue)) != NULL) {
1373 if (mly_ccb_submit(mly, mc))
1374 break;
1375 SIMPLEQ_REMOVE_HEAD(&mly->mly_ccb_queue, mc, mc_link.simpleq);
1376 }
1377
1378 splx(s);
1379 }
1380
1381 /*
1382 * Deliver a command to the controller.
1383 */
1384 static int
1385 mly_ccb_submit(struct mly_softc *mly, struct mly_ccb *mc)
1386 {
1387 union mly_cmd_packet *pkt;
1388 int s, off;
1389
1390 mc->mc_packet->generic.command_id = htole16(mc->mc_slot);
1391
1392 bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap,
1393 mc->mc_packetphys - mly->mly_pkt_busaddr,
1394 sizeof(union mly_cmd_packet),
1395 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1396
1397 s = splbio();
1398
1399 /*
1400 * Do we have to use the hardware mailbox?
1401 */
1402 if ((mly->mly_state & MLY_STATE_MMBOX_ACTIVE) == 0) {
1403 /*
1404 * Check to see if the controller is ready for us.
1405 */
1406 if (mly_idbr_true(mly, MLY_HM_CMDSENT)) {
1407 splx(s);
1408 return (EBUSY);
1409 }
1410
1411 /*
1412 * It's ready, send the command.
1413 */
1414 mly_outl(mly, mly->mly_cmd_mailbox,
1415 (u_int64_t)mc->mc_packetphys & 0xffffffff);
1416 mly_outl(mly, mly->mly_cmd_mailbox + 4,
1417 (u_int64_t)mc->mc_packetphys >> 32);
1418 mly_outb(mly, mly->mly_idbr, MLY_HM_CMDSENT);
1419 } else {
1420 pkt = &mly->mly_mmbox->mmm_command[mly->mly_mmbox_cmd_idx];
1421 off = (caddr_t)pkt - (caddr_t)mly->mly_mmbox;
1422
1423 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1424 off, sizeof(mly->mly_mmbox->mmm_command[0]),
1425 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1426
1427 /* Check to see if the next index is free yet. */
1428 if (pkt->mmbox.flag != 0) {
1429 splx(s);
1430 return (EBUSY);
1431 }
1432
1433 /* Copy in new command */
1434 memcpy(pkt->mmbox.data, mc->mc_packet->mmbox.data,
1435 sizeof(pkt->mmbox.data));
1436
1437 /* Copy flag last. */
1438 pkt->mmbox.flag = mc->mc_packet->mmbox.flag;
1439
1440 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1441 off, sizeof(mly->mly_mmbox->mmm_command[0]),
1442 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1443
1444 /* Signal controller and update index. */
1445 mly_outb(mly, mly->mly_idbr, MLY_AM_CMDSENT);
1446 mly->mly_mmbox_cmd_idx =
1447 (mly->mly_mmbox_cmd_idx + 1) % MLY_MMBOX_COMMANDS;
1448 }
1449
1450 splx(s);
1451 return (0);
1452 }
1453
1454 /*
1455 * Pick up completed commands from the controller and handle accordingly.
1456 */
1457 int
1458 mly_intr(void *cookie)
1459 {
1460 struct mly_ccb *mc;
1461 union mly_status_packet *sp;
1462 u_int16_t slot;
1463 int forus, off;
1464 struct mly_softc *mly;
1465
1466 mly = cookie;
1467 forus = 0;
1468
1469 /*
1470 * Pick up hardware-mailbox commands.
1471 */
1472 if (mly_odbr_true(mly, MLY_HM_STSREADY)) {
1473 slot = mly_inw(mly, mly->mly_status_mailbox);
1474
1475 if (slot < MLY_SLOT_MAX) {
1476 mc = mly->mly_ccbs + (slot - MLY_SLOT_START);
1477 mc->mc_status =
1478 mly_inb(mly, mly->mly_status_mailbox + 2);
1479 mc->mc_sense =
1480 mly_inb(mly, mly->mly_status_mailbox + 3);
1481 mc->mc_resid =
1482 mly_inl(mly, mly->mly_status_mailbox + 4);
1483
1484 mly_ccb_complete(mly, mc);
1485 } else {
1486 /* Slot 0xffff may mean "extremely bogus command". */
1487 printf("%s: got HM completion for illegal slot %u\n",
1488 mly->mly_dv.dv_xname, slot);
1489 }
1490
1491 /* Unconditionally acknowledge status. */
1492 mly_outb(mly, mly->mly_odbr, MLY_HM_STSREADY);
1493 mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK);
1494 forus = 1;
1495 }
1496
1497 /*
1498 * Pick up memory-mailbox commands.
1499 */
1500 if (mly_odbr_true(mly, MLY_AM_STSREADY)) {
1501 for (;;) {
1502 sp = &mly->mly_mmbox->mmm_status[mly->mly_mmbox_sts_idx];
1503 off = (caddr_t)sp - (caddr_t)mly->mly_mmbox;
1504
1505 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap,
1506 off, sizeof(mly->mly_mmbox->mmm_command[0]),
1507 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1508
1509 /* Check for more status. */
1510 if (sp->mmbox.flag == 0)
1511 break;
1512
1513 /* Get slot number. */
1514 slot = le16toh(sp->status.command_id);
1515 if (slot < MLY_SLOT_MAX) {
1516 mc = mly->mly_ccbs + (slot - MLY_SLOT_START);
1517 mc->mc_status = sp->status.status;
1518 mc->mc_sense = sp->status.sense_length;
1519 mc->mc_resid = le32toh(sp->status.residue);
1520 mly_ccb_complete(mly, mc);
1521 } else {
1522 /*
1523 * Slot 0xffff may mean "extremely bogus
1524 * command".
1525 */
1526 printf("%s: got AM completion for illegal "
1527 "slot %u at %d\n", mly->mly_dv.dv_xname,
1528 slot, mly->mly_mmbox_sts_idx);
1529 }
1530
1531 /* Clear and move to next index. */
1532 sp->mmbox.flag = 0;
1533 mly->mly_mmbox_sts_idx =
1534 (mly->mly_mmbox_sts_idx + 1) % MLY_MMBOX_STATUS;
1535 }
1536
1537 /* Acknowledge that we have collected status value(s). */
1538 mly_outb(mly, mly->mly_odbr, MLY_AM_STSREADY);
1539 forus = 1;
1540 }
1541
1542 /*
1543 * Run the queue.
1544 */
1545 if (forus && SIMPLEQ_FIRST(&mly->mly_ccb_queue) != NULL)
1546 mly_ccb_enqueue(mly, NULL);
1547
1548 return (forus);
1549 }
1550
1551 /*
1552 * Process completed commands
1553 */
1554 static void
1555 mly_ccb_complete(struct mly_softc *mly, struct mly_ccb *mc)
1556 {
1557 void (*complete)(struct mly_softc *, struct mly_ccb *);
1558
1559 bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap,
1560 mc->mc_packetphys - mly->mly_pkt_busaddr,
1561 sizeof(union mly_cmd_packet),
1562 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1563
1564 complete = mc->mc_complete;
1565 mc->mc_flags |= MLY_CCB_COMPLETE;
1566
1567 /*
1568 * Call completion handler or wake up sleeping consumer.
1569 */
1570 if (complete != NULL)
1571 (*complete)(mly, mc);
1572 else
1573 wakeup(mc);
1574 }
1575
1576 /*
1577 * Allocate a command.
1578 */
1579 int
1580 mly_ccb_alloc(struct mly_softc *mly, struct mly_ccb **mcp)
1581 {
1582 struct mly_ccb *mc;
1583 int s;
1584
1585 s = splbio();
1586 mc = SLIST_FIRST(&mly->mly_ccb_free);
1587 if (mc != NULL)
1588 SLIST_REMOVE_HEAD(&mly->mly_ccb_free, mc_link.slist);
1589 splx(s);
1590
1591 *mcp = mc;
1592 return (mc == NULL ? EAGAIN : 0);
1593 }
1594
1595 /*
1596 * Release a command back to the freelist.
1597 */
1598 void
1599 mly_ccb_free(struct mly_softc *mly, struct mly_ccb *mc)
1600 {
1601 int s;
1602
1603 /*
1604 * Fill in parts of the command that may cause confusion if a
1605 * consumer doesn't when we are later allocated.
1606 */
1607 mc->mc_data = NULL;
1608 mc->mc_flags = 0;
1609 mc->mc_complete = NULL;
1610 mc->mc_private = NULL;
1611
1612 /*
1613 * By default, we set up to overwrite the command packet with sense
1614 * information.
1615 */
1616 mc->mc_packet->generic.command_control = 0;
1617 mc->mc_packet->generic.sense_buffer_address =
1618 htole64(mc->mc_packetphys);
1619 mc->mc_packet->generic.maximum_sense_size =
1620 sizeof(union mly_cmd_packet);
1621
1622 s = splbio();
1623 SLIST_INSERT_HEAD(&mly->mly_ccb_free, mc, mc_link.slist);
1624 splx(s);
1625 }
1626
1627 /*
1628 * Allocate and initialise command and packet structures.
1629 *
1630 * If the controller supports fewer than MLY_MAX_CCBS commands, limit our
1631 * allocation to that number. If we don't yet know how many commands the
1632 * controller supports, allocate a very small set (suitable for initialisation
1633 * purposes only).
1634 */
1635 static int
1636 mly_alloc_ccbs(struct mly_softc *mly)
1637 {
1638 struct mly_ccb *mc;
1639 int i, rv;
1640
1641 if (mly->mly_controllerinfo == NULL)
1642 mly->mly_ncmds = MLY_CCBS_RESV;
1643 else {
1644 i = le16toh(mly->mly_controllerinfo->maximum_parallel_commands);
1645 mly->mly_ncmds = min(MLY_MAX_CCBS, i);
1646 }
1647
1648 /*
1649 * Allocate enough space for all the command packets in one chunk
1650 * and map them permanently into controller-visible space.
1651 */
1652 rv = mly_dmamem_alloc(mly,
1653 mly->mly_ncmds * sizeof(union mly_cmd_packet),
1654 &mly->mly_pkt_dmamap, (caddr_t *)&mly->mly_pkt,
1655 &mly->mly_pkt_busaddr, &mly->mly_pkt_seg);
1656 if (rv)
1657 return (rv);
1658
1659 mly->mly_ccbs = malloc(sizeof(struct mly_ccb) * mly->mly_ncmds,
1660 M_DEVBUF, M_NOWAIT);
1661 memset(mly->mly_ccbs, 0, sizeof(struct mly_ccb) * mly->mly_ncmds);
1662
1663 for (i = 0; i < mly->mly_ncmds; i++) {
1664 mc = mly->mly_ccbs + i;
1665 mc->mc_slot = MLY_SLOT_START + i;
1666 mc->mc_packet = mly->mly_pkt + i;
1667 mc->mc_packetphys = mly->mly_pkt_busaddr +
1668 (i * sizeof(union mly_cmd_packet));
1669
1670 rv = bus_dmamap_create(mly->mly_dmat, MLY_MAX_XFER,
1671 MLY_MAX_SEGS, MLY_MAX_XFER, 0,
1672 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
1673 &mc->mc_datamap);
1674 if (rv) {
1675 mly_release_ccbs(mly);
1676 return (rv);
1677 }
1678
1679 mly_ccb_free(mly, mc);
1680 }
1681
1682 return (0);
1683 }
1684
1685 /*
1686 * Free all the storage held by commands.
1687 *
1688 * Must be called with all commands on the free list.
1689 */
1690 static void
1691 mly_release_ccbs(struct mly_softc *mly)
1692 {
1693 struct mly_ccb *mc;
1694
1695 /* Throw away command buffer DMA maps. */
1696 while (mly_ccb_alloc(mly, &mc) == 0)
1697 bus_dmamap_destroy(mly->mly_dmat, mc->mc_datamap);
1698
1699 /* Release CCB storage. */
1700 free(mly->mly_ccbs, M_DEVBUF);
1701
1702 /* Release the packet storage. */
1703 mly_dmamem_free(mly, mly->mly_ncmds * sizeof(union mly_cmd_packet),
1704 mly->mly_pkt_dmamap, (caddr_t)mly->mly_pkt, &mly->mly_pkt_seg);
1705 }
1706
1707 /*
1708 * Map a command into controller-visible space.
1709 */
1710 static int
1711 mly_ccb_map(struct mly_softc *mly, struct mly_ccb *mc)
1712 {
1713 struct mly_cmd_generic *gen;
1714 struct mly_sg_entry *sg;
1715 bus_dma_segment_t *ds;
1716 int flg, nseg, rv;
1717
1718 #ifdef DIAGNOSTIC
1719 /* Don't map more than once. */
1720 if ((mc->mc_flags & MLY_CCB_MAPPED) != 0)
1721 panic("mly_ccb_map: already mapped");
1722 mc->mc_flags |= MLY_CCB_MAPPED;
1723
1724 /* Does the command have a data buffer? */
1725 if (mc->mc_data == NULL)
1726 panic("mly_ccb_map: no data buffer");
1727 #endif
1728
1729 rv = bus_dmamap_load(mly->mly_dmat, mc->mc_datamap, mc->mc_data,
1730 mc->mc_length, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
1731 ((mc->mc_flags & MLY_CCB_DATAIN) != 0 ?
1732 BUS_DMA_READ : BUS_DMA_WRITE));
1733 if (rv != 0)
1734 return (rv);
1735
1736 gen = &mc->mc_packet->generic;
1737
1738 /*
1739 * Can we use the transfer structure directly?
1740 */
1741 if ((nseg = mc->mc_datamap->dm_nsegs) <= 2) {
1742 mc->mc_sgoff = -1;
1743 sg = &gen->transfer.direct.sg[0];
1744 } else {
1745 mc->mc_sgoff = (mc->mc_slot - MLY_SLOT_START) *
1746 MLY_MAX_SEGS;
1747 sg = mly->mly_sg + mc->mc_sgoff;
1748 gen->command_control |= MLY_CMDCTL_EXTENDED_SG_TABLE;
1749 gen->transfer.indirect.entries[0] = htole16(nseg);
1750 gen->transfer.indirect.table_physaddr[0] =
1751 htole64(mly->mly_sg_busaddr +
1752 (mc->mc_sgoff * sizeof(struct mly_sg_entry)));
1753 }
1754
1755 /*
1756 * Fill the S/G table.
1757 */
1758 for (ds = mc->mc_datamap->dm_segs; nseg != 0; nseg--, sg++, ds++) {
1759 sg->physaddr = htole64(ds->ds_addr);
1760 sg->length = htole64(ds->ds_len);
1761 }
1762
1763 /*
1764 * Sync up the data map.
1765 */
1766 if ((mc->mc_flags & MLY_CCB_DATAIN) != 0)
1767 flg = BUS_DMASYNC_PREREAD;
1768 else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */ {
1769 gen->command_control |= MLY_CMDCTL_DATA_DIRECTION;
1770 flg = BUS_DMASYNC_PREWRITE;
1771 }
1772
1773 bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg);
1774
1775 /*
1776 * Sync up the chained S/G table, if we're using one.
1777 */
1778 if (mc->mc_sgoff == -1)
1779 return (0);
1780
1781 bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff,
1782 MLY_SGL_SIZE, BUS_DMASYNC_PREWRITE);
1783
1784 return (0);
1785 }
1786
1787 /*
1788 * Unmap a command from controller-visible space.
1789 */
1790 static void
1791 mly_ccb_unmap(struct mly_softc *mly, struct mly_ccb *mc)
1792 {
1793 int flg;
1794
1795 #ifdef DIAGNOSTIC
1796 if ((mc->mc_flags & MLY_CCB_MAPPED) == 0)
1797 panic("mly_ccb_unmap: not mapped");
1798 mc->mc_flags &= ~MLY_CCB_MAPPED;
1799 #endif
1800
1801 if ((mc->mc_flags & MLY_CCB_DATAIN) != 0)
1802 flg = BUS_DMASYNC_POSTREAD;
1803 else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */
1804 flg = BUS_DMASYNC_POSTWRITE;
1805
1806 bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg);
1807 bus_dmamap_unload(mly->mly_dmat, mc->mc_datamap);
1808
1809 if (mc->mc_sgoff == -1)
1810 return;
1811
1812 bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff,
1813 MLY_SGL_SIZE, BUS_DMASYNC_POSTWRITE);
1814 }
1815
1816 /*
1817 * Adjust the size of each I/O before it passes to the SCSI layer.
1818 */
1819 static void
1820 mly_scsipi_minphys(struct buf *bp)
1821 {
1822
1823 if (bp->b_bcount > MLY_MAX_XFER)
1824 bp->b_bcount = MLY_MAX_XFER;
1825 minphys(bp);
1826 }
1827
1828 /*
1829 * Start a SCSI command.
1830 */
1831 static void
1832 mly_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
1833 void *arg)
1834 {
1835 struct mly_ccb *mc;
1836 struct mly_cmd_scsi_small *ss;
1837 struct scsipi_xfer *xs;
1838 struct scsipi_periph *periph;
1839 struct mly_softc *mly;
1840 struct mly_btl *btl;
1841 int s, tmp;
1842
1843 mly = (void *)chan->chan_adapter->adapt_dev;
1844
1845 switch (req) {
1846 case ADAPTER_REQ_RUN_XFER:
1847 xs = arg;
1848 periph = xs->xs_periph;
1849 btl = &mly->mly_btl[chan->chan_channel][periph->periph_target];
1850 s = splbio();
1851 tmp = btl->mb_flags;
1852 splx(s);
1853
1854 /*
1855 * Check for I/O attempt to a protected or non-existant
1856 * device.
1857 */
1858 if ((tmp & MLY_BTL_PROTECTED) != 0) {
1859 xs->error = XS_SELTIMEOUT;
1860 scsipi_done(xs);
1861 break;
1862 }
1863
1864 #ifdef DIAGNOSTIC
1865 /* XXX Increase if/when we support large SCSI commands. */
1866 if (xs->cmdlen > MLY_CMD_SCSI_SMALL_CDB) {
1867 printf("%s: cmd too large\n", mly->mly_dv.dv_xname);
1868 xs->error = XS_DRIVER_STUFFUP;
1869 scsipi_done(xs);
1870 break;
1871 }
1872 #endif
1873
1874 if (mly_ccb_alloc(mly, &mc)) {
1875 xs->error = XS_RESOURCE_SHORTAGE;
1876 scsipi_done(xs);
1877 break;
1878 }
1879
1880 /* Build the command. */
1881 mc->mc_data = xs->data;
1882 mc->mc_length = xs->datalen;
1883 mc->mc_complete = mly_scsipi_complete;
1884 mc->mc_private = xs;
1885
1886 /* Build the packet for the controller. */
1887 ss = &mc->mc_packet->scsi_small;
1888 ss->opcode = MDACMD_SCSI;
1889 #ifdef notdef
1890 /*
1891 * XXX FreeBSD does this, but it doesn't fix anything,
1892 * XXX and appears potentially harmful.
1893 */
1894 ss->command_control |= MLY_CMDCTL_DISABLE_DISCONNECT;
1895 #endif
1896 if ((xs->xs_control & XS_CTL_DATA_OUT) != 0)
1897 mc->mc_flags |= MLY_CCB_DATAOUT;
1898 else if ((xs->xs_control & XS_CTL_DATA_IN) != 0)
1899 mc->mc_flags |= MLY_CCB_DATAIN;
1900
1901 ss->data_size = htole32(xs->datalen);
1902 _lto3l(MLY_PHYADDR(0, chan->chan_channel,
1903 periph->periph_target, periph->periph_lun), ss->addr);
1904
1905 if (xs->timeout < 60 * 1000)
1906 ss->timeout = xs->timeout / 1000 |
1907 MLY_TIMEOUT_SECONDS;
1908 else if (xs->timeout < 60 * 60 * 1000)
1909 ss->timeout = xs->timeout / (60 * 1000) |
1910 MLY_TIMEOUT_MINUTES;
1911 else
1912 ss->timeout = xs->timeout / (60 * 60 * 1000) |
1913 MLY_TIMEOUT_HOURS;
1914
1915 ss->maximum_sense_size = sizeof(xs->sense);
1916 ss->cdb_length = xs->cmdlen;
1917 memcpy(ss->cdb, xs->cmd, xs->cmdlen);
1918
1919 if (mc->mc_length != 0)
1920 if (mly_ccb_map(mly, mc) != 0) {
1921 xs->error = XS_DRIVER_STUFFUP;
1922 mly_ccb_free(mly, mc);
1923 scsipi_done(xs);
1924 break;
1925 }
1926
1927 /*
1928 * Give the command to the controller.
1929 */
1930 if ((xs->xs_control & XS_CTL_POLL) != 0) {
1931 if (mly_ccb_poll(mly, mc, xs->timeout + 5000)) {
1932 xs->error = XS_REQUEUE;
1933 if (mc->mc_length != 0)
1934 mly_ccb_unmap(mly, mc);
1935 mly_ccb_free(mly, mc);
1936 scsipi_done(xs);
1937 }
1938 } else
1939 mly_ccb_enqueue(mly, mc);
1940
1941 break;
1942
1943 case ADAPTER_REQ_GROW_RESOURCES:
1944 /*
1945 * Not supported.
1946 */
1947 break;
1948
1949 case ADAPTER_REQ_SET_XFER_MODE:
1950 /*
1951 * We can't change the transfer mode, but at least let
1952 * scsipi know what the adapter has negotiated.
1953 */
1954 mly_get_xfer_mode(mly, chan->chan_channel, arg);
1955 break;
1956 }
1957 }
1958
1959 /*
1960 * Handle completion of a SCSI command.
1961 */
1962 static void
1963 mly_scsipi_complete(struct mly_softc *mly, struct mly_ccb *mc)
1964 {
1965 struct scsipi_xfer *xs;
1966 struct scsipi_channel *chan;
1967 struct scsipi_inquiry_data *inq;
1968 struct mly_btl *btl;
1969 int target, sl, s;
1970 const char *p;
1971
1972 xs = mc->mc_private;
1973 xs->status = mc->mc_status;
1974
1975 /*
1976 * XXX The `resid' value as returned by the controller appears to be
1977 * bogus, so we always set it to zero. Is it perhaps the transfer
1978 * count?
1979 */
1980 xs->resid = 0; /* mc->mc_resid; */
1981
1982 if (mc->mc_length != 0)
1983 mly_ccb_unmap(mly, mc);
1984
1985 switch (mc->mc_status) {
1986 case SCSI_OK:
1987 /*
1988 * In order to report logical device type and status, we
1989 * overwrite the result of the INQUIRY command to logical
1990 * devices.
1991 */
1992 if (xs->cmd->opcode == INQUIRY) {
1993 chan = xs->xs_periph->periph_channel;
1994 target = xs->xs_periph->periph_target;
1995 btl = &mly->mly_btl[chan->chan_channel][target];
1996
1997 s = splbio();
1998 if ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) {
1999 inq = (struct scsipi_inquiry_data *)xs->data;
2000 mly_padstr(inq->vendor, "MYLEX", 8);
2001 p = mly_describe_code(mly_table_device_type,
2002 btl->mb_type);
2003 mly_padstr(inq->product, p, 16);
2004 p = mly_describe_code(mly_table_device_state,
2005 btl->mb_state);
2006 mly_padstr(inq->revision, p, 4);
2007 }
2008 splx(s);
2009 }
2010
2011 xs->error = XS_NOERROR;
2012 break;
2013
2014 case SCSI_CHECK:
2015 sl = mc->mc_sense;
2016 if (sl > sizeof(xs->sense.scsi_sense))
2017 sl = sizeof(xs->sense.scsi_sense);
2018 memcpy(&xs->sense.scsi_sense, mc->mc_packet, sl);
2019 xs->error = XS_SENSE;
2020 break;
2021
2022 case SCSI_BUSY:
2023 case SCSI_QUEUE_FULL:
2024 xs->error = XS_BUSY;
2025 break;
2026
2027 default:
2028 printf("%s: unknown SCSI status 0x%x\n",
2029 mly->mly_dv.dv_xname, xs->status);
2030 xs->error = XS_DRIVER_STUFFUP;
2031 break;
2032 }
2033
2034 mly_ccb_free(mly, mc);
2035 scsipi_done(xs);
2036 }
2037
2038 /*
2039 * Notify scsipi about a target's transfer mode.
2040 */
2041 static void
2042 mly_get_xfer_mode(struct mly_softc *mly, int bus, struct scsipi_xfer_mode *xm)
2043 {
2044 struct mly_btl *btl;
2045 int s;
2046
2047 btl = &mly->mly_btl[bus][xm->xm_target];
2048 xm->xm_mode = 0;
2049
2050 s = splbio();
2051
2052 if ((btl->mb_flags & MLY_BTL_PHYSICAL) != 0) {
2053 if (btl->mb_speed == 0) {
2054 xm->xm_period = 0;
2055 xm->xm_offset = 0;
2056 } else {
2057 xm->xm_period = 12; /* XXX */
2058 xm->xm_offset = 8; /* XXX */
2059 xm->xm_mode |= PERIPH_CAP_SYNC; /* XXX */
2060 }
2061
2062 switch (btl->mb_width) {
2063 case 32:
2064 xm->xm_mode = PERIPH_CAP_WIDE32;
2065 break;
2066 case 16:
2067 xm->xm_mode = PERIPH_CAP_WIDE16;
2068 break;
2069 default:
2070 xm->xm_mode = 0;
2071 break;
2072 }
2073 } else /* ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) */ {
2074 xm->xm_mode = PERIPH_CAP_WIDE16 | PERIPH_CAP_SYNC;
2075 xm->xm_period = 12;
2076 xm->xm_offset = 8;
2077 }
2078
2079 if ((btl->mb_flags & MLY_BTL_TQING) != 0)
2080 xm->xm_mode |= PERIPH_CAP_TQING;
2081
2082 splx(s);
2083
2084 scsipi_async_event(&mly->mly_chans[bus], ASYNC_EVENT_XFER_MODE, xm);
2085 }
2086
2087 /*
2088 * ioctl hook; used here only to initiate low-level rescans.
2089 */
2090 static int
2091 mly_scsipi_ioctl(struct scsipi_channel *chan, u_long cmd, caddr_t data,
2092 int flag, struct proc *p)
2093 {
2094 struct mly_softc *mly;
2095 int rv;
2096
2097 mly = (struct mly_softc *)chan->chan_adapter->adapt_dev;
2098
2099 switch (cmd) {
2100 case SCBUSIOLLSCAN:
2101 mly_scan_channel(mly, chan->chan_channel);
2102 rv = 0;
2103 break;
2104 default:
2105 rv = ENOTTY;
2106 break;
2107 }
2108
2109 return (rv);
2110 }
2111
2112 /*
2113 * Handshake with the firmware while the card is being initialised.
2114 */
2115 static int
2116 mly_fwhandshake(struct mly_softc *mly)
2117 {
2118 u_int8_t error, param0, param1;
2119 int spinup;
2120
2121 spinup = 0;
2122
2123 /* Set HM_STSACK and let the firmware initialise. */
2124 mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK);
2125 DELAY(1000); /* too short? */
2126
2127 /* If HM_STSACK is still true, the controller is initialising. */
2128 if (!mly_idbr_true(mly, MLY_HM_STSACK))
2129 return (0);
2130
2131 printf("%s: controller initialisation started\n",
2132 mly->mly_dv.dv_xname);
2133
2134 /*
2135 * Spin waiting for initialisation to finish, or for a message to be
2136 * delivered.
2137 */
2138 while (mly_idbr_true(mly, MLY_HM_STSACK)) {
2139 /* Check for a message */
2140 if (!mly_error_valid(mly))
2141 continue;
2142
2143 error = mly_inb(mly, mly->mly_error_status) & ~MLY_MSG_EMPTY;
2144 param0 = mly_inb(mly, mly->mly_cmd_mailbox);
2145 param1 = mly_inb(mly, mly->mly_cmd_mailbox + 1);
2146
2147 switch (error) {
2148 case MLY_MSG_SPINUP:
2149 if (!spinup) {
2150 printf("%s: drive spinup in progress\n",
2151 mly->mly_dv.dv_xname);
2152 spinup = 1;
2153 }
2154 break;
2155
2156 case MLY_MSG_RACE_RECOVERY_FAIL:
2157 printf("%s: mirror race recovery failed - \n",
2158 mly->mly_dv.dv_xname);
2159 printf("%s: one or more drives offline\n",
2160 mly->mly_dv.dv_xname);
2161 break;
2162
2163 case MLY_MSG_RACE_IN_PROGRESS:
2164 printf("%s: mirror race recovery in progress\n",
2165 mly->mly_dv.dv_xname);
2166 break;
2167
2168 case MLY_MSG_RACE_ON_CRITICAL:
2169 printf("%s: mirror race recovery on critical drive\n",
2170 mly->mly_dv.dv_xname);
2171 break;
2172
2173 case MLY_MSG_PARITY_ERROR:
2174 printf("%s: FATAL MEMORY PARITY ERROR\n",
2175 mly->mly_dv.dv_xname);
2176 return (ENXIO);
2177
2178 default:
2179 printf("%s: unknown initialisation code 0x%x\n",
2180 mly->mly_dv.dv_xname, error);
2181 break;
2182 }
2183 }
2184
2185 return (0);
2186 }
2187
2188 /*
2189 * Space-fill a character string
2190 */
2191 static void
2192 mly_padstr(char *dst, const char *src, int len)
2193 {
2194
2195 while (len-- > 0) {
2196 if (*src != '\0')
2197 *dst++ = *src++;
2198 else
2199 *dst++ = ' ';
2200 }
2201 }
2202
2203 /*
2204 * Allocate DMA safe memory.
2205 */
2206 static int
2207 mly_dmamem_alloc(struct mly_softc *mly, int size, bus_dmamap_t *dmamap,
2208 caddr_t *kva, bus_addr_t *paddr, bus_dma_segment_t *seg)
2209 {
2210 int rseg, rv, state;
2211
2212 state = 0;
2213
2214 if ((rv = bus_dmamem_alloc(mly->mly_dmat, size, NBPG, 0,
2215 seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
2216 printf("%s: dmamem_alloc = %d\n", mly->mly_dv.dv_xname, rv);
2217 goto bad;
2218 }
2219
2220 state++;
2221
2222 if ((rv = bus_dmamem_map(mly->mly_dmat, seg, 1, size, kva,
2223 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
2224 printf("%s: dmamem_map = %d\n", mly->mly_dv.dv_xname, rv);
2225 goto bad;
2226 }
2227
2228 state++;
2229
2230 if ((rv = bus_dmamap_create(mly->mly_dmat, size, size, 1, 0,
2231 BUS_DMA_NOWAIT, dmamap)) != 0) {
2232 printf("%s: dmamap_create = %d\n", mly->mly_dv.dv_xname, rv);
2233 goto bad;
2234 }
2235
2236 state++;
2237
2238 if ((rv = bus_dmamap_load(mly->mly_dmat, *dmamap, *kva, size,
2239 NULL, BUS_DMA_NOWAIT)) != 0) {
2240 printf("%s: dmamap_load = %d\n", mly->mly_dv.dv_xname, rv);
2241 goto bad;
2242 }
2243
2244 *paddr = (*dmamap)->dm_segs[0].ds_addr;
2245 memset(*kva, 0, size);
2246 return (0);
2247
2248 bad:
2249 if (state > 2)
2250 bus_dmamap_destroy(mly->mly_dmat, *dmamap);
2251 if (state > 1)
2252 bus_dmamem_unmap(mly->mly_dmat, *kva, size);
2253 if (state > 0)
2254 bus_dmamem_free(mly->mly_dmat, seg, 1);
2255
2256 return (rv);
2257 }
2258
2259 /*
2260 * Free DMA safe memory.
2261 */
2262 static void
2263 mly_dmamem_free(struct mly_softc *mly, int size, bus_dmamap_t dmamap,
2264 caddr_t kva, bus_dma_segment_t *seg)
2265 {
2266
2267 bus_dmamap_unload(mly->mly_dmat, dmamap);
2268 bus_dmamap_destroy(mly->mly_dmat, dmamap);
2269 bus_dmamem_unmap(mly->mly_dmat, kva, size);
2270 bus_dmamem_free(mly->mly_dmat, seg, 1);
2271 }
2272
2273
2274 /*
2275 * Accept an open operation on the control device.
2276 */
2277 int
2278 mlyopen(dev_t dev, int flag, int mode, struct proc *p)
2279 {
2280 struct mly_softc *mly;
2281
2282 if ((mly = device_lookup(&mly_cd, minor(dev))) == NULL)
2283 return (ENXIO);
2284 if ((mly->mly_state & MLY_STATE_INITOK) == 0)
2285 return (ENXIO);
2286 if ((mly->mly_state & MLY_STATE_OPEN) != 0)
2287 return (EBUSY);
2288
2289 mly->mly_state |= MLY_STATE_OPEN;
2290 return (0);
2291 }
2292
2293 /*
2294 * Accept the last close on the control device.
2295 */
2296 int
2297 mlyclose(dev_t dev, int flag, int mode, struct proc *p)
2298 {
2299 struct mly_softc *mly;
2300
2301 mly = device_lookup(&mly_cd, minor(dev));
2302 mly->mly_state &= ~MLY_STATE_OPEN;
2303 return (0);
2304 }
2305
2306 /*
2307 * Handle control operations.
2308 */
2309 int
2310 mlyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
2311 {
2312 struct mly_softc *mly;
2313 int rv;
2314
2315 if (securelevel >= 2)
2316 return (EPERM);
2317
2318 mly = device_lookup(&mly_cd, minor(dev));
2319
2320 switch (cmd) {
2321 case MLYIO_COMMAND:
2322 rv = mly_user_command(mly, (void *)data);
2323 break;
2324 case MLYIO_HEALTH:
2325 rv = mly_user_health(mly, (void *)data);
2326 break;
2327 default:
2328 rv = ENOTTY;
2329 break;
2330 }
2331
2332 return (rv);
2333 }
2334
2335 /*
2336 * Execute a command passed in from userspace.
2337 *
2338 * The control structure contains the actual command for the controller, as
2339 * well as the user-space data pointer and data size, and an optional sense
2340 * buffer size/pointer. On completion, the data size is adjusted to the
2341 * command residual, and the sense buffer size to the size of the returned
2342 * sense data.
2343 */
2344 static int
2345 mly_user_command(struct mly_softc *mly, struct mly_user_command *uc)
2346 {
2347 struct mly_ccb *mc;
2348 int rv, mapped;
2349
2350 if ((rv = mly_ccb_alloc(mly, &mc)) != 0)
2351 return (rv);
2352
2353 mapped = 0;
2354 mc->mc_data = NULL;
2355
2356 /*
2357 * Handle data size/direction.
2358 */
2359 if ((mc->mc_length = abs(uc->DataTransferLength)) != 0) {
2360 mc->mc_data = malloc(mc->mc_length, M_DEVBUF, M_WAITOK);
2361 if (mc->mc_data == NULL) {
2362 rv = ENOMEM;
2363 goto out;
2364 }
2365
2366 if (uc->DataTransferLength > 0) {
2367 mc->mc_flags |= MLY_CCB_DATAIN;
2368 memset(mc->mc_data, 0, mc->mc_length);
2369 }
2370
2371 if (uc->DataTransferLength < 0) {
2372 mc->mc_flags |= MLY_CCB_DATAOUT;
2373 rv = copyin(uc->DataTransferBuffer, mc->mc_data,
2374 mc->mc_length);
2375 if (rv != 0)
2376 goto out;
2377 }
2378
2379 if ((rv = mly_ccb_map(mly, mc)) != 0)
2380 goto out;
2381 mapped = 1;
2382 }
2383
2384 /* Copy in the command and execute it. */
2385 memcpy(mc->mc_packet, &uc->CommandMailbox, sizeof(uc->CommandMailbox));
2386
2387 if ((rv = mly_ccb_wait(mly, mc, 60000)) != 0)
2388 goto out;
2389
2390 /* Return the data to userspace. */
2391 if (uc->DataTransferLength > 0) {
2392 rv = copyout(mc->mc_data, uc->DataTransferBuffer,
2393 mc->mc_length);
2394 if (rv != 0)
2395 goto out;
2396 }
2397
2398 /* Return the sense buffer to userspace. */
2399 if (uc->RequestSenseLength > 0 && mc->mc_sense > 0) {
2400 rv = copyout(mc->mc_packet, uc->RequestSenseBuffer,
2401 min(uc->RequestSenseLength, mc->mc_sense));
2402 if (rv != 0)
2403 goto out;
2404 }
2405
2406 /* Return command results to userspace (caller will copy out). */
2407 uc->DataTransferLength = mc->mc_resid;
2408 uc->RequestSenseLength = min(uc->RequestSenseLength, mc->mc_sense);
2409 uc->CommandStatus = mc->mc_status;
2410 rv = 0;
2411
2412 out:
2413 if (mapped)
2414 mly_ccb_unmap(mly, mc);
2415 if (mc->mc_data != NULL)
2416 free(mc->mc_data, M_DEVBUF);
2417 if (mc != NULL)
2418 mly_ccb_free(mly, mc);
2419
2420 return (rv);
2421 }
2422
2423 /*
2424 * Return health status to userspace. If the health change index in the
2425 * user structure does not match that currently exported by the controller,
2426 * we return the current status immediately. Otherwise, we block until
2427 * either interrupted or new status is delivered.
2428 */
2429 static int
2430 mly_user_health(struct mly_softc *mly, struct mly_user_health *uh)
2431 {
2432 struct mly_health_status mh;
2433 int rv, s;
2434
2435 /* Fetch the current health status from userspace. */
2436 rv = copyin(uh->HealthStatusBuffer, &mh, sizeof(mh));
2437 if (rv != 0)
2438 return (rv);
2439
2440 /* spin waiting for a status update */
2441 s = splbio();
2442 if (mly->mly_event_change == mh.change_counter)
2443 rv = tsleep(&mly->mly_event_change, PRIBIO | PCATCH,
2444 "mlyhealth", 0);
2445 splx(s);
2446
2447 if (rv == 0) {
2448 /*
2449 * Copy the controller's health status buffer out (there is
2450 * a race here if it changes again).
2451 */
2452 rv = copyout(&mly->mly_mmbox->mmm_health.status,
2453 uh->HealthStatusBuffer, sizeof(uh->HealthStatusBuffer));
2454 }
2455
2456 return (rv);
2457 }
2458