mly.c revision 1.32
1 /* $NetBSD: mly.c,v 1.32 2006/11/16 01:33:09 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran, Thor Lancelot Simon, and Eric Haszlakiewicz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000, 2001 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: mly.c,v 1.8 2001/07/14 00:12:22 msmith Exp 66 */ 67 68 /* 69 * Driver for the Mylex AcceleRAID and eXtremeRAID family with v6 firmware. 70 * 71 * TODO: 72 * 73 * o Make mly->mly_btl a hash, then MLY_BTL_RESCAN becomes a SIMPLEQ. 74 * o Handle FC and multiple LUNs. 75 * o Fix mmbox usage. 76 * o Fix transfer speed fudge. 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: mly.c,v 1.32 2006/11/16 01:33:09 christos Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/device.h> 85 #include <sys/kernel.h> 86 #include <sys/queue.h> 87 #include <sys/buf.h> 88 #include <sys/endian.h> 89 #include <sys/conf.h> 90 #include <sys/malloc.h> 91 #include <sys/ioctl.h> 92 #include <sys/scsiio.h> 93 #include <sys/kthread.h> 94 #include <sys/kauth.h> 95 96 #include <uvm/uvm_extern.h> 97 98 #include <machine/bus.h> 99 100 #include <dev/scsipi/scsi_all.h> 101 #include <dev/scsipi/scsipi_all.h> 102 #include <dev/scsipi/scsiconf.h> 103 104 #include <dev/pci/pcireg.h> 105 #include <dev/pci/pcivar.h> 106 #include <dev/pci/pcidevs.h> 107 108 #include <dev/pci/mlyreg.h> 109 #include <dev/pci/mlyio.h> 110 #include <dev/pci/mlyvar.h> 111 #include <dev/pci/mly_tables.h> 112 113 static void mly_attach(struct device *, struct device *, void *); 114 static int mly_match(struct device *, struct cfdata *, void *); 115 static const struct mly_ident *mly_find_ident(struct pci_attach_args *); 116 static int mly_fwhandshake(struct mly_softc *); 117 static int mly_flush(struct mly_softc *); 118 static int mly_intr(void *); 119 static void mly_shutdown(void *); 120 121 static int mly_alloc_ccbs(struct mly_softc *); 122 static void mly_check_event(struct mly_softc *); 123 static void mly_complete_event(struct mly_softc *, struct mly_ccb *); 124 static void mly_complete_rescan(struct mly_softc *, struct mly_ccb *); 125 static int mly_dmamem_alloc(struct mly_softc *, int, bus_dmamap_t *, 126 caddr_t *, bus_addr_t *, bus_dma_segment_t *); 127 static void mly_dmamem_free(struct mly_softc *, int, bus_dmamap_t, 128 caddr_t, bus_dma_segment_t *); 129 static int mly_enable_mmbox(struct mly_softc *); 130 static void mly_fetch_event(struct mly_softc *); 131 static int mly_get_controllerinfo(struct mly_softc *); 132 static int mly_get_eventstatus(struct mly_softc *); 133 static int mly_ioctl(struct mly_softc *, struct mly_cmd_ioctl *, 134 void **, size_t, void *, size_t *); 135 static void mly_padstr(char *, const char *, int); 136 static void mly_process_event(struct mly_softc *, struct mly_event *); 137 static void mly_release_ccbs(struct mly_softc *); 138 static int mly_scan_btl(struct mly_softc *, int, int); 139 static void mly_scan_channel(struct mly_softc *, int); 140 static void mly_thread(void *); 141 static void mly_thread_create(void *); 142 143 static int mly_ccb_alloc(struct mly_softc *, struct mly_ccb **); 144 static void mly_ccb_complete(struct mly_softc *, struct mly_ccb *); 145 static void mly_ccb_enqueue(struct mly_softc *, struct mly_ccb *); 146 static void mly_ccb_free(struct mly_softc *, struct mly_ccb *); 147 static int mly_ccb_map(struct mly_softc *, struct mly_ccb *); 148 static int mly_ccb_poll(struct mly_softc *, struct mly_ccb *, int); 149 static int mly_ccb_submit(struct mly_softc *, struct mly_ccb *); 150 static void mly_ccb_unmap(struct mly_softc *, struct mly_ccb *); 151 static int mly_ccb_wait(struct mly_softc *, struct mly_ccb *, int); 152 153 static void mly_get_xfer_mode(struct mly_softc *, int, 154 struct scsipi_xfer_mode *); 155 static void mly_scsipi_complete(struct mly_softc *, struct mly_ccb *); 156 static int mly_scsipi_ioctl(struct scsipi_channel *, u_long, caddr_t, 157 int, struct proc *); 158 static void mly_scsipi_minphys(struct buf *); 159 static void mly_scsipi_request(struct scsipi_channel *, 160 scsipi_adapter_req_t, void *); 161 162 static int mly_user_command(struct mly_softc *, struct mly_user_command *); 163 static int mly_user_health(struct mly_softc *, struct mly_user_health *); 164 165 extern struct cfdriver mly_cd; 166 167 CFATTACH_DECL(mly, sizeof(struct mly_softc), 168 mly_match, mly_attach, NULL, NULL); 169 170 dev_type_open(mlyopen); 171 dev_type_close(mlyclose); 172 dev_type_ioctl(mlyioctl); 173 174 const struct cdevsw mly_cdevsw = { 175 mlyopen, mlyclose, noread, nowrite, mlyioctl, 176 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 177 }; 178 179 static struct mly_ident { 180 u_short vendor; 181 u_short product; 182 u_short subvendor; 183 u_short subproduct; 184 int hwif; 185 const char *desc; 186 } const mly_ident[] = { 187 { 188 PCI_VENDOR_MYLEX, 189 PCI_PRODUCT_MYLEX_EXTREMERAID, 190 PCI_VENDOR_MYLEX, 191 0x0040, 192 MLY_HWIF_STRONGARM, 193 "eXtremeRAID 2000" 194 }, 195 { 196 PCI_VENDOR_MYLEX, 197 PCI_PRODUCT_MYLEX_EXTREMERAID, 198 PCI_VENDOR_MYLEX, 199 0x0030, 200 MLY_HWIF_STRONGARM, 201 "eXtremeRAID 3000" 202 }, 203 { 204 PCI_VENDOR_MYLEX, 205 PCI_PRODUCT_MYLEX_ACCELERAID, 206 PCI_VENDOR_MYLEX, 207 0x0050, 208 MLY_HWIF_I960RX, 209 "AcceleRAID 352" 210 }, 211 { 212 PCI_VENDOR_MYLEX, 213 PCI_PRODUCT_MYLEX_ACCELERAID, 214 PCI_VENDOR_MYLEX, 215 0x0052, 216 MLY_HWIF_I960RX, 217 "AcceleRAID 170" 218 }, 219 { 220 PCI_VENDOR_MYLEX, 221 PCI_PRODUCT_MYLEX_ACCELERAID, 222 PCI_VENDOR_MYLEX, 223 0x0054, 224 MLY_HWIF_I960RX, 225 "AcceleRAID 160" 226 }, 227 }; 228 229 static void *mly_sdh; 230 231 /* 232 * Try to find a `mly_ident' entry corresponding to this board. 233 */ 234 static const struct mly_ident * 235 mly_find_ident(struct pci_attach_args *pa) 236 { 237 const struct mly_ident *mpi, *maxmpi; 238 pcireg_t reg; 239 240 mpi = mly_ident; 241 maxmpi = mpi + sizeof(mly_ident) / sizeof(mly_ident[0]); 242 243 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O) 244 return (NULL); 245 246 for (; mpi < maxmpi; mpi++) { 247 if (PCI_VENDOR(pa->pa_id) != mpi->vendor || 248 PCI_PRODUCT(pa->pa_id) != mpi->product) 249 continue; 250 251 if (mpi->subvendor == 0x0000) 252 return (mpi); 253 254 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 255 256 if (PCI_VENDOR(reg) == mpi->subvendor && 257 PCI_PRODUCT(reg) == mpi->subproduct) 258 return (mpi); 259 } 260 261 return (NULL); 262 } 263 264 /* 265 * Match a supported board. 266 */ 267 static int 268 mly_match(struct device *parent, struct cfdata *cfdata, 269 void *aux) 270 { 271 272 return (mly_find_ident(aux) != NULL); 273 } 274 275 /* 276 * Attach a supported board. 277 */ 278 static void 279 mly_attach(struct device *parent, struct device *self, void *aux) 280 { 281 struct pci_attach_args *pa; 282 struct mly_softc *mly; 283 struct mly_ioctl_getcontrollerinfo *mi; 284 const struct mly_ident *ident; 285 pci_chipset_tag_t pc; 286 pci_intr_handle_t ih; 287 bus_space_handle_t memh, ioh; 288 bus_space_tag_t memt, iot; 289 pcireg_t reg; 290 const char *intrstr; 291 int ior, memr, i, rv, state; 292 struct scsipi_adapter *adapt; 293 struct scsipi_channel *chan; 294 295 mly = (struct mly_softc *)self; 296 pa = aux; 297 pc = pa->pa_pc; 298 ident = mly_find_ident(pa); 299 state = 0; 300 301 mly->mly_dmat = pa->pa_dmat; 302 mly->mly_hwif = ident->hwif; 303 304 printf(": Mylex %s\n", ident->desc); 305 306 /* 307 * Map the PCI register window. 308 */ 309 memr = -1; 310 ior = -1; 311 312 for (i = 0x10; i <= 0x14; i += 4) { 313 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 314 315 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 316 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 317 ior = i; 318 } else { 319 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 320 memr = i; 321 } 322 } 323 324 if (memr != -1) 325 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 326 &memt, &memh, NULL, NULL)) 327 memr = -1; 328 if (ior != -1) 329 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 330 &iot, &ioh, NULL, NULL)) 331 ior = -1; 332 333 if (memr != -1) { 334 mly->mly_iot = memt; 335 mly->mly_ioh = memh; 336 } else if (ior != -1) { 337 mly->mly_iot = iot; 338 mly->mly_ioh = ioh; 339 } else { 340 printf("%s: can't map i/o or memory space\n", self->dv_xname); 341 return; 342 } 343 344 /* 345 * Enable the device. 346 */ 347 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 348 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 349 reg | PCI_COMMAND_MASTER_ENABLE); 350 351 /* 352 * Map and establish the interrupt. 353 */ 354 if (pci_intr_map(pa, &ih)) { 355 printf("%s: can't map interrupt\n", self->dv_xname); 356 return; 357 } 358 intrstr = pci_intr_string(pc, ih); 359 mly->mly_ih = pci_intr_establish(pc, ih, IPL_BIO, mly_intr, mly); 360 if (mly->mly_ih == NULL) { 361 printf("%s: can't establish interrupt", self->dv_xname); 362 if (intrstr != NULL) 363 printf(" at %s", intrstr); 364 printf("\n"); 365 return; 366 } 367 368 if (intrstr != NULL) 369 printf("%s: interrupting at %s\n", mly->mly_dv.dv_xname, 370 intrstr); 371 372 /* 373 * Take care of interface-specific tasks. 374 */ 375 switch (mly->mly_hwif) { 376 case MLY_HWIF_I960RX: 377 mly->mly_doorbell_true = 0x00; 378 mly->mly_cmd_mailbox = MLY_I960RX_COMMAND_MAILBOX; 379 mly->mly_status_mailbox = MLY_I960RX_STATUS_MAILBOX; 380 mly->mly_idbr = MLY_I960RX_IDBR; 381 mly->mly_odbr = MLY_I960RX_ODBR; 382 mly->mly_error_status = MLY_I960RX_ERROR_STATUS; 383 mly->mly_interrupt_status = MLY_I960RX_INTERRUPT_STATUS; 384 mly->mly_interrupt_mask = MLY_I960RX_INTERRUPT_MASK; 385 break; 386 387 case MLY_HWIF_STRONGARM: 388 mly->mly_doorbell_true = 0xff; 389 mly->mly_cmd_mailbox = MLY_STRONGARM_COMMAND_MAILBOX; 390 mly->mly_status_mailbox = MLY_STRONGARM_STATUS_MAILBOX; 391 mly->mly_idbr = MLY_STRONGARM_IDBR; 392 mly->mly_odbr = MLY_STRONGARM_ODBR; 393 mly->mly_error_status = MLY_STRONGARM_ERROR_STATUS; 394 mly->mly_interrupt_status = MLY_STRONGARM_INTERRUPT_STATUS; 395 mly->mly_interrupt_mask = MLY_STRONGARM_INTERRUPT_MASK; 396 break; 397 } 398 399 /* 400 * Allocate and map the scatter/gather lists. 401 */ 402 rv = mly_dmamem_alloc(mly, MLY_SGL_SIZE * MLY_MAX_CCBS, 403 &mly->mly_sg_dmamap, (caddr_t *)&mly->mly_sg, 404 &mly->mly_sg_busaddr, &mly->mly_sg_seg); 405 if (rv) { 406 printf("%s: unable to allocate S/G maps\n", 407 mly->mly_dv.dv_xname); 408 goto bad; 409 } 410 state++; 411 412 /* 413 * Allocate and map the memory mailbox. 414 */ 415 rv = mly_dmamem_alloc(mly, sizeof(struct mly_mmbox), 416 &mly->mly_mmbox_dmamap, (caddr_t *)&mly->mly_mmbox, 417 &mly->mly_mmbox_busaddr, &mly->mly_mmbox_seg); 418 if (rv) { 419 printf("%s: unable to allocate mailboxes\n", 420 mly->mly_dv.dv_xname); 421 goto bad; 422 } 423 state++; 424 425 /* 426 * Initialise per-controller queues. 427 */ 428 SLIST_INIT(&mly->mly_ccb_free); 429 SIMPLEQ_INIT(&mly->mly_ccb_queue); 430 431 /* 432 * Disable interrupts before we start talking to the controller. 433 */ 434 mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE); 435 436 /* 437 * Wait for the controller to come ready, handshaking with the 438 * firmware if required. This is typically only necessary on 439 * platforms where the controller BIOS does not run. 440 */ 441 if (mly_fwhandshake(mly)) { 442 printf("%s: unable to bring controller online\n", 443 mly->mly_dv.dv_xname); 444 goto bad; 445 } 446 447 /* 448 * Allocate initial command buffers, obtain controller feature 449 * information, and then reallocate command buffers, since we'll 450 * know how many we want. 451 */ 452 if (mly_alloc_ccbs(mly)) { 453 printf("%s: unable to allocate CCBs\n", 454 mly->mly_dv.dv_xname); 455 goto bad; 456 } 457 state++; 458 if (mly_get_controllerinfo(mly)) { 459 printf("%s: unable to retrieve controller info\n", 460 mly->mly_dv.dv_xname); 461 goto bad; 462 } 463 mly_release_ccbs(mly); 464 if (mly_alloc_ccbs(mly)) { 465 printf("%s: unable to allocate CCBs\n", 466 mly->mly_dv.dv_xname); 467 state--; 468 goto bad; 469 } 470 471 /* 472 * Get the current event counter for health purposes, populate the 473 * initial health status buffer. 474 */ 475 if (mly_get_eventstatus(mly)) { 476 printf("%s: unable to retrieve event status\n", 477 mly->mly_dv.dv_xname); 478 goto bad; 479 } 480 481 /* 482 * Enable memory-mailbox mode. 483 */ 484 if (mly_enable_mmbox(mly)) { 485 printf("%s: unable to enable memory mailbox\n", 486 mly->mly_dv.dv_xname); 487 goto bad; 488 } 489 490 /* 491 * Print a little information about the controller. 492 */ 493 mi = mly->mly_controllerinfo; 494 495 printf("%s: %d physical channel%s, firmware %d.%02d-%d-%02d " 496 "(%02d%02d%02d%02d), %dMB RAM\n", mly->mly_dv.dv_xname, 497 mi->physical_channels_present, 498 (mi->physical_channels_present) > 1 ? "s" : "", 499 mi->fw_major, mi->fw_minor, mi->fw_turn, mi->fw_build, 500 mi->fw_century, mi->fw_year, mi->fw_month, mi->fw_day, 501 le16toh(mi->memory_size)); 502 503 /* 504 * Register our `shutdownhook'. 505 */ 506 if (mly_sdh == NULL) 507 shutdownhook_establish(mly_shutdown, NULL); 508 509 /* 510 * Clear any previous BTL information. For each bus that scsipi 511 * wants to scan, we'll receive the SCBUSIOLLSCAN ioctl and retrieve 512 * all BTL info at that point. 513 */ 514 memset(&mly->mly_btl, 0, sizeof(mly->mly_btl)); 515 516 mly->mly_nchans = mly->mly_controllerinfo->physical_channels_present + 517 mly->mly_controllerinfo->virtual_channels_present; 518 519 /* 520 * Attach to scsipi. 521 */ 522 adapt = &mly->mly_adapt; 523 memset(adapt, 0, sizeof(*adapt)); 524 adapt->adapt_dev = &mly->mly_dv; 525 adapt->adapt_nchannels = mly->mly_nchans; 526 adapt->adapt_openings = mly->mly_ncmds - MLY_CCBS_RESV; 527 adapt->adapt_max_periph = mly->mly_ncmds - MLY_CCBS_RESV; 528 adapt->adapt_request = mly_scsipi_request; 529 adapt->adapt_minphys = mly_scsipi_minphys; 530 adapt->adapt_ioctl = mly_scsipi_ioctl; 531 532 for (i = 0; i < mly->mly_nchans; i++) { 533 chan = &mly->mly_chans[i]; 534 memset(chan, 0, sizeof(*chan)); 535 chan->chan_adapter = adapt; 536 chan->chan_bustype = &scsi_bustype; 537 chan->chan_channel = i; 538 chan->chan_ntargets = MLY_MAX_TARGETS; 539 chan->chan_nluns = MLY_MAX_LUNS; 540 chan->chan_id = mly->mly_controllerparam->initiator_id; 541 chan->chan_flags = SCSIPI_CHAN_NOSETTLE; 542 config_found(&mly->mly_dv, chan, scsiprint); 543 } 544 545 /* 546 * Now enable interrupts... 547 */ 548 mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE); 549 550 /* 551 * Finally, create our monitoring thread. 552 */ 553 kthread_create(mly_thread_create, mly); 554 555 mly->mly_state |= MLY_STATE_INITOK; 556 return; 557 558 bad: 559 if (state > 2) 560 mly_release_ccbs(mly); 561 if (state > 1) 562 mly_dmamem_free(mly, sizeof(struct mly_mmbox), 563 mly->mly_mmbox_dmamap, (caddr_t)mly->mly_mmbox, 564 &mly->mly_mmbox_seg); 565 if (state > 0) 566 mly_dmamem_free(mly, MLY_SGL_SIZE * MLY_MAX_CCBS, 567 mly->mly_sg_dmamap, (caddr_t)mly->mly_sg, 568 &mly->mly_sg_seg); 569 } 570 571 /* 572 * Scan all possible devices on the specified channel. 573 */ 574 static void 575 mly_scan_channel(struct mly_softc *mly, int bus) 576 { 577 int s, target; 578 579 for (target = 0; target < MLY_MAX_TARGETS; target++) { 580 s = splbio(); 581 if (!mly_scan_btl(mly, bus, target)) { 582 tsleep(&mly->mly_btl[bus][target], PRIBIO, "mlyscan", 583 0); 584 } 585 splx(s); 586 } 587 } 588 589 /* 590 * Shut down all configured `mly' devices. 591 */ 592 static void 593 mly_shutdown(void *cookie) 594 { 595 struct mly_softc *mly; 596 int i; 597 598 for (i = 0; i < mly_cd.cd_ndevs; i++) { 599 if ((mly = device_lookup(&mly_cd, i)) == NULL) 600 continue; 601 602 if (mly_flush(mly)) 603 printf("%s: unable to flush cache\n", 604 mly->mly_dv.dv_xname); 605 } 606 } 607 608 /* 609 * Fill in the mly_controllerinfo and mly_controllerparam fields in the 610 * softc. 611 */ 612 static int 613 mly_get_controllerinfo(struct mly_softc *mly) 614 { 615 struct mly_cmd_ioctl mci; 616 int rv; 617 618 /* 619 * Build the getcontrollerinfo ioctl and send it. 620 */ 621 memset(&mci, 0, sizeof(mci)); 622 mci.sub_ioctl = MDACIOCTL_GETCONTROLLERINFO; 623 rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerinfo, 624 sizeof(*mly->mly_controllerinfo), NULL, NULL); 625 if (rv != 0) 626 return (rv); 627 628 /* 629 * Build the getcontrollerparameter ioctl and send it. 630 */ 631 memset(&mci, 0, sizeof(mci)); 632 mci.sub_ioctl = MDACIOCTL_GETCONTROLLERPARAMETER; 633 rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerparam, 634 sizeof(*mly->mly_controllerparam), NULL, NULL); 635 636 return (rv); 637 } 638 639 /* 640 * Rescan a device, possibly as a consequence of getting an event which 641 * suggests that it may have changed. Must be called with interrupts 642 * blocked. 643 */ 644 static int 645 mly_scan_btl(struct mly_softc *mly, int bus, int target) 646 { 647 struct mly_ccb *mc; 648 struct mly_cmd_ioctl *mci; 649 int rv; 650 651 if (target == mly->mly_controllerparam->initiator_id) { 652 mly->mly_btl[bus][target].mb_flags = MLY_BTL_PROTECTED; 653 return (EIO); 654 } 655 656 /* Don't re-scan if a scan is already in progress. */ 657 if ((mly->mly_btl[bus][target].mb_flags & MLY_BTL_SCANNING) != 0) 658 return (EBUSY); 659 660 /* Get a command. */ 661 if ((rv = mly_ccb_alloc(mly, &mc)) != 0) 662 return (rv); 663 664 /* Set up the data buffer. */ 665 mc->mc_data = malloc(sizeof(union mly_devinfo), 666 M_DEVBUF, M_NOWAIT|M_ZERO); 667 668 mc->mc_flags |= MLY_CCB_DATAIN; 669 mc->mc_complete = mly_complete_rescan; 670 671 /* 672 * Build the ioctl. 673 */ 674 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl; 675 mci->opcode = MDACMD_IOCTL; 676 mci->timeout = 30 | MLY_TIMEOUT_SECONDS; 677 memset(&mci->param, 0, sizeof(mci->param)); 678 679 if (MLY_BUS_IS_VIRTUAL(mly, bus)) { 680 mc->mc_length = sizeof(struct mly_ioctl_getlogdevinfovalid); 681 mci->data_size = htole32(mc->mc_length); 682 mci->sub_ioctl = MDACIOCTL_GETLOGDEVINFOVALID; 683 _lto3l(MLY_LOGADDR(0, MLY_LOGDEV_ID(mly, bus, target)), 684 mci->addr); 685 } else { 686 mc->mc_length = sizeof(struct mly_ioctl_getphysdevinfovalid); 687 mci->data_size = htole32(mc->mc_length); 688 mci->sub_ioctl = MDACIOCTL_GETPHYSDEVINFOVALID; 689 _lto3l(MLY_PHYADDR(0, bus, target, 0), mci->addr); 690 } 691 692 /* 693 * Dispatch the command. 694 */ 695 if ((rv = mly_ccb_map(mly, mc)) != 0) { 696 free(mc->mc_data, M_DEVBUF); 697 mly_ccb_free(mly, mc); 698 return(rv); 699 } 700 701 mly->mly_btl[bus][target].mb_flags |= MLY_BTL_SCANNING; 702 mly_ccb_enqueue(mly, mc); 703 return (0); 704 } 705 706 /* 707 * Handle the completion of a rescan operation. 708 */ 709 static void 710 mly_complete_rescan(struct mly_softc *mly, struct mly_ccb *mc) 711 { 712 struct mly_ioctl_getlogdevinfovalid *ldi; 713 struct mly_ioctl_getphysdevinfovalid *pdi; 714 struct mly_cmd_ioctl *mci; 715 struct mly_btl btl, *btlp; 716 struct scsipi_xfer_mode xm; 717 int bus, target, rescan; 718 u_int tmp; 719 720 mly_ccb_unmap(mly, mc); 721 722 /* 723 * Recover the bus and target from the command. We need these even 724 * in the case where we don't have a useful response. 725 */ 726 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl; 727 tmp = _3ltol(mci->addr); 728 rescan = 0; 729 730 if (mci->sub_ioctl == MDACIOCTL_GETLOGDEVINFOVALID) { 731 bus = MLY_LOGDEV_BUS(mly, MLY_LOGADDR_DEV(tmp)); 732 target = MLY_LOGDEV_TARGET(mly, MLY_LOGADDR_DEV(tmp)); 733 } else { 734 bus = MLY_PHYADDR_CHANNEL(tmp); 735 target = MLY_PHYADDR_TARGET(tmp); 736 } 737 738 btlp = &mly->mly_btl[bus][target]; 739 740 /* The default result is 'no device'. */ 741 memset(&btl, 0, sizeof(btl)); 742 btl.mb_flags = MLY_BTL_PROTECTED; 743 744 /* If the rescan completed OK, we have possibly-new BTL data. */ 745 if (mc->mc_status != 0) 746 goto out; 747 748 if (mc->mc_length == sizeof(*ldi)) { 749 ldi = (struct mly_ioctl_getlogdevinfovalid *)mc->mc_data; 750 tmp = le32toh(ldi->logical_device_number); 751 752 if (MLY_LOGDEV_BUS(mly, tmp) != bus || 753 MLY_LOGDEV_TARGET(mly, tmp) != target) { 754 #ifdef MLYDEBUG 755 printf("%s: WARNING: BTL rescan (logical) for %d:%d " 756 "returned data for %d:%d instead\n", 757 mly->mly_dv.dv_xname, bus, target, 758 MLY_LOGDEV_BUS(mly, tmp), 759 MLY_LOGDEV_TARGET(mly, tmp)); 760 #endif 761 goto out; 762 } 763 764 btl.mb_flags = MLY_BTL_LOGICAL | MLY_BTL_TQING; 765 btl.mb_type = ldi->raid_level; 766 btl.mb_state = ldi->state; 767 } else if (mc->mc_length == sizeof(*pdi)) { 768 pdi = (struct mly_ioctl_getphysdevinfovalid *)mc->mc_data; 769 770 if (pdi->channel != bus || pdi->target != target) { 771 #ifdef MLYDEBUG 772 printf("%s: WARNING: BTL rescan (physical) for %d:%d " 773 " returned data for %d:%d instead\n", 774 mly->mly_dv.dv_xname, 775 bus, target, pdi->channel, pdi->target); 776 #endif 777 goto out; 778 } 779 780 btl.mb_flags = MLY_BTL_PHYSICAL; 781 btl.mb_type = MLY_DEVICE_TYPE_PHYSICAL; 782 btl.mb_state = pdi->state; 783 btl.mb_speed = pdi->speed; 784 btl.mb_width = pdi->width; 785 786 if (pdi->state != MLY_DEVICE_STATE_UNCONFIGURED) 787 btl.mb_flags |= MLY_BTL_PROTECTED; 788 if (pdi->command_tags != 0) 789 btl.mb_flags |= MLY_BTL_TQING; 790 } else { 791 printf("%s: BTL rescan result invalid\n", mly->mly_dv.dv_xname); 792 goto out; 793 } 794 795 /* Decide whether we need to rescan the device. */ 796 if (btl.mb_flags != btlp->mb_flags || 797 btl.mb_speed != btlp->mb_speed || 798 btl.mb_width != btlp->mb_width) 799 rescan = 1; 800 801 out: 802 *btlp = btl; 803 804 if (rescan && (btl.mb_flags & MLY_BTL_PROTECTED) == 0) { 805 xm.xm_target = target; 806 mly_get_xfer_mode(mly, bus, &xm); 807 /* XXX SCSI mid-layer rescan goes here. */ 808 } 809 810 /* Wake anybody waiting on the device to be rescanned. */ 811 wakeup(btlp); 812 813 free(mc->mc_data, M_DEVBUF); 814 mly_ccb_free(mly, mc); 815 } 816 817 /* 818 * Get the current health status and set the 'next event' counter to suit. 819 */ 820 static int 821 mly_get_eventstatus(struct mly_softc *mly) 822 { 823 struct mly_cmd_ioctl mci; 824 struct mly_health_status *mh; 825 int rv; 826 827 /* Build the gethealthstatus ioctl and send it. */ 828 memset(&mci, 0, sizeof(mci)); 829 mh = NULL; 830 mci.sub_ioctl = MDACIOCTL_GETHEALTHSTATUS; 831 832 rv = mly_ioctl(mly, &mci, (void *)&mh, sizeof(*mh), NULL, NULL); 833 if (rv) 834 return (rv); 835 836 /* Get the event counter. */ 837 mly->mly_event_change = le32toh(mh->change_counter); 838 mly->mly_event_waiting = le32toh(mh->next_event); 839 mly->mly_event_counter = le32toh(mh->next_event); 840 841 /* Save the health status into the memory mailbox */ 842 memcpy(&mly->mly_mmbox->mmm_health.status, mh, sizeof(*mh)); 843 844 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 845 offsetof(struct mly_mmbox, mmm_health), 846 sizeof(mly->mly_mmbox->mmm_health), 847 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 848 849 free(mh, M_DEVBUF); 850 return (0); 851 } 852 853 /* 854 * Enable memory mailbox mode. 855 */ 856 static int 857 mly_enable_mmbox(struct mly_softc *mly) 858 { 859 struct mly_cmd_ioctl mci; 860 u_int8_t *sp; 861 u_int64_t tmp; 862 int rv; 863 864 /* Build the ioctl and send it. */ 865 memset(&mci, 0, sizeof(mci)); 866 mci.sub_ioctl = MDACIOCTL_SETMEMORYMAILBOX; 867 868 /* Set buffer addresses. */ 869 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_command); 870 mci.param.setmemorymailbox.command_mailbox_physaddr = htole64(tmp); 871 872 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_status); 873 mci.param.setmemorymailbox.status_mailbox_physaddr = htole64(tmp); 874 875 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_health); 876 mci.param.setmemorymailbox.health_buffer_physaddr = htole64(tmp); 877 878 /* Set buffer sizes - abuse of data_size field is revolting. */ 879 sp = (u_int8_t *)&mci.data_size; 880 sp[0] = (sizeof(union mly_cmd_packet) * MLY_MMBOX_COMMANDS) >> 10; 881 sp[1] = (sizeof(union mly_status_packet) * MLY_MMBOX_STATUS) >> 10; 882 mci.param.setmemorymailbox.health_buffer_size = 883 sizeof(union mly_health_region) >> 10; 884 885 rv = mly_ioctl(mly, &mci, NULL, 0, NULL, NULL); 886 if (rv) 887 return (rv); 888 889 mly->mly_state |= MLY_STATE_MMBOX_ACTIVE; 890 return (0); 891 } 892 893 /* 894 * Flush all pending I/O from the controller. 895 */ 896 static int 897 mly_flush(struct mly_softc *mly) 898 { 899 struct mly_cmd_ioctl mci; 900 901 /* Build the ioctl */ 902 memset(&mci, 0, sizeof(mci)); 903 mci.sub_ioctl = MDACIOCTL_FLUSHDEVICEDATA; 904 mci.param.deviceoperation.operation_device = 905 MLY_OPDEVICE_PHYSICAL_CONTROLLER; 906 907 /* Pass it off to the controller */ 908 return (mly_ioctl(mly, &mci, NULL, 0, NULL, NULL)); 909 } 910 911 /* 912 * Perform an ioctl command. 913 * 914 * If (data) is not NULL, the command requires data transfer to the 915 * controller. If (*data) is NULL the command requires data transfer from 916 * the controller, and we will allocate a buffer for it. 917 */ 918 static int 919 mly_ioctl(struct mly_softc *mly, struct mly_cmd_ioctl *ioctl, void **data, 920 size_t datasize, void *sense_buffer, 921 size_t *sense_length) 922 { 923 struct mly_ccb *mc; 924 struct mly_cmd_ioctl *mci; 925 u_int8_t status; 926 int rv; 927 928 mc = NULL; 929 if ((rv = mly_ccb_alloc(mly, &mc)) != 0) 930 goto bad; 931 932 /* 933 * Copy the ioctl structure, but save some important fields and then 934 * fixup. 935 */ 936 mci = &mc->mc_packet->ioctl; 937 ioctl->sense_buffer_address = htole64(mci->sense_buffer_address); 938 ioctl->maximum_sense_size = mci->maximum_sense_size; 939 *mci = *ioctl; 940 mci->opcode = MDACMD_IOCTL; 941 mci->timeout = 30 | MLY_TIMEOUT_SECONDS; 942 943 /* Handle the data buffer. */ 944 if (data != NULL) { 945 if (*data == NULL) { 946 /* Allocate data buffer */ 947 mc->mc_data = malloc(datasize, M_DEVBUF, M_NOWAIT); 948 mc->mc_flags |= MLY_CCB_DATAIN; 949 } else { 950 mc->mc_data = *data; 951 mc->mc_flags |= MLY_CCB_DATAOUT; 952 } 953 mc->mc_length = datasize; 954 mc->mc_packet->generic.data_size = htole32(datasize); 955 } 956 957 /* Run the command. */ 958 if (datasize > 0) 959 if ((rv = mly_ccb_map(mly, mc)) != 0) 960 goto bad; 961 rv = mly_ccb_poll(mly, mc, 30000); 962 if (datasize > 0) 963 mly_ccb_unmap(mly, mc); 964 if (rv != 0) 965 goto bad; 966 967 /* Clean up and return any data. */ 968 status = mc->mc_status; 969 970 if (status != 0) 971 printf("mly_ioctl: command status %d\n", status); 972 973 if (mc->mc_sense > 0 && sense_buffer != NULL) { 974 memcpy(sense_buffer, mc->mc_packet, mc->mc_sense); 975 *sense_length = mc->mc_sense; 976 goto bad; 977 } 978 979 /* Should we return a data pointer? */ 980 if (data != NULL && *data == NULL) 981 *data = mc->mc_data; 982 983 /* Command completed OK. */ 984 rv = (status != 0 ? EIO : 0); 985 986 bad: 987 if (mc != NULL) { 988 /* Do we need to free a data buffer we allocated? */ 989 if (rv != 0 && mc->mc_data != NULL && 990 (data == NULL || *data == NULL)) 991 free(mc->mc_data, M_DEVBUF); 992 mly_ccb_free(mly, mc); 993 } 994 995 return (rv); 996 } 997 998 /* 999 * Check for event(s) outstanding in the controller. 1000 */ 1001 static void 1002 mly_check_event(struct mly_softc *mly) 1003 { 1004 1005 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1006 offsetof(struct mly_mmbox, mmm_health), 1007 sizeof(mly->mly_mmbox->mmm_health), 1008 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1009 1010 /* 1011 * The controller may have updated the health status information, so 1012 * check for it here. Note that the counters are all in host 1013 * memory, so this check is very cheap. Also note that we depend on 1014 * checking on completion 1015 */ 1016 if (le32toh(mly->mly_mmbox->mmm_health.status.change_counter) != 1017 mly->mly_event_change) { 1018 mly->mly_event_change = 1019 le32toh(mly->mly_mmbox->mmm_health.status.change_counter); 1020 mly->mly_event_waiting = 1021 le32toh(mly->mly_mmbox->mmm_health.status.next_event); 1022 1023 /* Wake up anyone that might be interested in this. */ 1024 wakeup(&mly->mly_event_change); 1025 } 1026 1027 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1028 offsetof(struct mly_mmbox, mmm_health), 1029 sizeof(mly->mly_mmbox->mmm_health), 1030 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1031 1032 if (mly->mly_event_counter != mly->mly_event_waiting) 1033 mly_fetch_event(mly); 1034 } 1035 1036 /* 1037 * Fetch one event from the controller. If we fail due to resource 1038 * starvation, we'll be retried the next time a command completes. 1039 */ 1040 static void 1041 mly_fetch_event(struct mly_softc *mly) 1042 { 1043 struct mly_ccb *mc; 1044 struct mly_cmd_ioctl *mci; 1045 int s; 1046 u_int32_t event; 1047 1048 /* Get a command. */ 1049 if (mly_ccb_alloc(mly, &mc)) 1050 return; 1051 1052 /* Set up the data buffer. */ 1053 mc->mc_data = malloc(sizeof(struct mly_event), M_DEVBUF, 1054 M_NOWAIT|M_ZERO); 1055 1056 mc->mc_length = sizeof(struct mly_event); 1057 mc->mc_flags |= MLY_CCB_DATAIN; 1058 mc->mc_complete = mly_complete_event; 1059 1060 /* 1061 * Get an event number to fetch. It's possible that we've raced 1062 * with another context for the last event, in which case there will 1063 * be no more events. 1064 */ 1065 s = splbio(); 1066 if (mly->mly_event_counter == mly->mly_event_waiting) { 1067 splx(s); 1068 free(mc->mc_data, M_DEVBUF); 1069 mly_ccb_free(mly, mc); 1070 return; 1071 } 1072 event = mly->mly_event_counter++; 1073 splx(s); 1074 1075 /* 1076 * Build the ioctl. 1077 * 1078 * At this point we are committed to sending this request, as it 1079 * will be the only one constructed for this particular event 1080 * number. 1081 */ 1082 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl; 1083 mci->opcode = MDACMD_IOCTL; 1084 mci->data_size = htole32(sizeof(struct mly_event)); 1085 _lto3l(MLY_PHYADDR(0, 0, (event >> 16) & 0xff, (event >> 24) & 0xff), 1086 mci->addr); 1087 mci->timeout = 30 | MLY_TIMEOUT_SECONDS; 1088 mci->sub_ioctl = MDACIOCTL_GETEVENT; 1089 mci->param.getevent.sequence_number_low = htole16(event & 0xffff); 1090 1091 /* 1092 * Submit the command. 1093 */ 1094 if (mly_ccb_map(mly, mc) != 0) 1095 goto bad; 1096 mly_ccb_enqueue(mly, mc); 1097 return; 1098 1099 bad: 1100 printf("%s: couldn't fetch event %u\n", mly->mly_dv.dv_xname, event); 1101 free(mc->mc_data, M_DEVBUF); 1102 mly_ccb_free(mly, mc); 1103 } 1104 1105 /* 1106 * Handle the completion of an event poll. 1107 */ 1108 static void 1109 mly_complete_event(struct mly_softc *mly, struct mly_ccb *mc) 1110 { 1111 struct mly_event *me; 1112 1113 me = (struct mly_event *)mc->mc_data; 1114 mly_ccb_unmap(mly, mc); 1115 mly_ccb_free(mly, mc); 1116 1117 /* If the event was successfully fetched, process it. */ 1118 if (mc->mc_status == SCSI_OK) 1119 mly_process_event(mly, me); 1120 else 1121 printf("%s: unable to fetch event; status = 0x%x\n", 1122 mly->mly_dv.dv_xname, mc->mc_status); 1123 1124 free(me, M_DEVBUF); 1125 1126 /* Check for another event. */ 1127 mly_check_event(mly); 1128 } 1129 1130 /* 1131 * Process a controller event. Called with interrupts blocked (i.e., at 1132 * interrupt time). 1133 */ 1134 static void 1135 mly_process_event(struct mly_softc *mly, struct mly_event *me) 1136 { 1137 struct scsi_sense_data *ssd; 1138 int bus, target, event, class, action; 1139 const char *fp, *tp; 1140 1141 ssd = (struct scsi_sense_data *)&me->sense[0]; 1142 1143 /* 1144 * Errors can be reported using vendor-unique sense data. In this 1145 * case, the event code will be 0x1c (Request sense data present), 1146 * the sense key will be 0x09 (vendor specific), the MSB of the ASC 1147 * will be set, and the actual event code will be a 16-bit value 1148 * comprised of the ASCQ (low byte) and low seven bits of the ASC 1149 * (low seven bits of the high byte). 1150 */ 1151 if (le32toh(me->code) == 0x1c && 1152 SSD_SENSE_KEY(ssd->flags) == SKEY_VENDOR_SPECIFIC && 1153 (ssd->asc & 0x80) != 0) { 1154 event = ((int)(ssd->asc & ~0x80) << 8) + 1155 ssd->ascq; 1156 } else 1157 event = le32toh(me->code); 1158 1159 /* Look up event, get codes. */ 1160 fp = mly_describe_code(mly_table_event, event); 1161 1162 /* Quiet event? */ 1163 class = fp[0]; 1164 #ifdef notyet 1165 if (isupper(class) && bootverbose) 1166 class = tolower(class); 1167 #endif 1168 1169 /* Get action code, text string. */ 1170 action = fp[1]; 1171 tp = fp + 3; 1172 1173 /* 1174 * Print some information about the event. 1175 * 1176 * This code uses a table derived from the corresponding portion of 1177 * the Linux driver, and thus the parser is very similar. 1178 */ 1179 switch (class) { 1180 case 'p': 1181 /* 1182 * Error on physical drive. 1183 */ 1184 printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname, 1185 me->channel, me->target, tp); 1186 if (action == 'r') 1187 mly->mly_btl[me->channel][me->target].mb_flags |= 1188 MLY_BTL_RESCAN; 1189 break; 1190 1191 case 'l': 1192 case 'm': 1193 /* 1194 * Error on logical unit, or message about logical unit. 1195 */ 1196 bus = MLY_LOGDEV_BUS(mly, me->lun); 1197 target = MLY_LOGDEV_TARGET(mly, me->lun); 1198 printf("%s: logical device %d:%d %s\n", mly->mly_dv.dv_xname, 1199 bus, target, tp); 1200 if (action == 'r') 1201 mly->mly_btl[bus][target].mb_flags |= MLY_BTL_RESCAN; 1202 break; 1203 1204 case 's': 1205 /* 1206 * Report of sense data. 1207 */ 1208 if ((SSD_SENSE_KEY(ssd->flags) == SKEY_NO_SENSE || 1209 SSD_SENSE_KEY(ssd->flags) == SKEY_NOT_READY) && 1210 ssd->asc == 0x04 && 1211 (ssd->ascq == 0x01 || 1212 ssd->ascq == 0x02)) { 1213 /* Ignore NO_SENSE or NOT_READY in one case */ 1214 break; 1215 } 1216 1217 /* 1218 * XXX Should translate this if SCSIVERBOSE. 1219 */ 1220 printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname, 1221 me->channel, me->target, tp); 1222 printf("%s: sense key %d asc %02x ascq %02x\n", 1223 mly->mly_dv.dv_xname, SSD_SENSE_KEY(ssd->flags), 1224 ssd->asc, ssd->ascq); 1225 printf("%s: info %x%x%x%x csi %x%x%x%x\n", 1226 mly->mly_dv.dv_xname, ssd->info[0], ssd->info[1], 1227 ssd->info[2], ssd->info[3], ssd->csi[0], 1228 ssd->csi[1], ssd->csi[2], 1229 ssd->csi[3]); 1230 if (action == 'r') 1231 mly->mly_btl[me->channel][me->target].mb_flags |= 1232 MLY_BTL_RESCAN; 1233 break; 1234 1235 case 'e': 1236 printf("%s: ", mly->mly_dv.dv_xname); 1237 printf(tp, me->target, me->lun); 1238 break; 1239 1240 case 'c': 1241 printf("%s: controller %s\n", mly->mly_dv.dv_xname, tp); 1242 break; 1243 1244 case '?': 1245 printf("%s: %s - %d\n", mly->mly_dv.dv_xname, tp, event); 1246 break; 1247 1248 default: 1249 /* Probably a 'noisy' event being ignored. */ 1250 break; 1251 } 1252 } 1253 1254 /* 1255 * Create the monitoring thread. Called after the standard kernel threads 1256 * have been created. 1257 */ 1258 static void 1259 mly_thread_create(void *cookie) 1260 { 1261 struct mly_softc *mly; 1262 int rv; 1263 1264 mly = cookie; 1265 1266 rv = kthread_create1(mly_thread, mly, &mly->mly_thread, "%s", 1267 mly->mly_dv.dv_xname); 1268 if (rv != 0) 1269 printf("%s: unable to create thread (%d)\n", 1270 mly->mly_dv.dv_xname, rv); 1271 } 1272 1273 /* 1274 * Perform periodic activities. 1275 */ 1276 static void 1277 mly_thread(void *cookie) 1278 { 1279 struct mly_softc *mly; 1280 struct mly_btl *btl; 1281 int s, bus, target, done; 1282 1283 mly = (struct mly_softc *)cookie; 1284 1285 for (;;) { 1286 /* Check for new events. */ 1287 mly_check_event(mly); 1288 1289 /* Re-scan up to 1 device. */ 1290 s = splbio(); 1291 done = 0; 1292 for (bus = 0; bus < mly->mly_nchans && !done; bus++) { 1293 for (target = 0; target < MLY_MAX_TARGETS; target++) { 1294 /* Perform device rescan? */ 1295 btl = &mly->mly_btl[bus][target]; 1296 if ((btl->mb_flags & MLY_BTL_RESCAN) != 0) { 1297 btl->mb_flags ^= MLY_BTL_RESCAN; 1298 mly_scan_btl(mly, bus, target); 1299 done = 1; 1300 break; 1301 } 1302 } 1303 } 1304 splx(s); 1305 1306 /* Sleep for N seconds. */ 1307 tsleep(mly_thread, PWAIT, "mlyzzz", 1308 hz * MLY_PERIODIC_INTERVAL); 1309 } 1310 } 1311 1312 /* 1313 * Submit a command to the controller and poll on completion. Return 1314 * non-zero on timeout. 1315 */ 1316 static int 1317 mly_ccb_poll(struct mly_softc *mly, struct mly_ccb *mc, int timo) 1318 { 1319 int rv; 1320 1321 if ((rv = mly_ccb_submit(mly, mc)) != 0) 1322 return (rv); 1323 1324 for (timo *= 10; timo != 0; timo--) { 1325 if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0) 1326 break; 1327 mly_intr(mly); 1328 DELAY(100); 1329 } 1330 1331 return (timo == 0); 1332 } 1333 1334 /* 1335 * Submit a command to the controller and sleep on completion. Return 1336 * non-zero on timeout. 1337 */ 1338 static int 1339 mly_ccb_wait(struct mly_softc *mly, struct mly_ccb *mc, int timo) 1340 { 1341 int rv, s; 1342 1343 mly_ccb_enqueue(mly, mc); 1344 1345 s = splbio(); 1346 if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0) { 1347 splx(s); 1348 return (0); 1349 } 1350 rv = tsleep(mc, PRIBIO, "mlywccb", timo * hz / 1000); 1351 splx(s); 1352 1353 return (rv); 1354 } 1355 1356 /* 1357 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1358 * the order that they were enqueued and try to submit their command blocks 1359 * to the controller for execution. 1360 */ 1361 void 1362 mly_ccb_enqueue(struct mly_softc *mly, struct mly_ccb *mc) 1363 { 1364 int s; 1365 1366 s = splbio(); 1367 1368 if (mc != NULL) 1369 SIMPLEQ_INSERT_TAIL(&mly->mly_ccb_queue, mc, mc_link.simpleq); 1370 1371 while ((mc = SIMPLEQ_FIRST(&mly->mly_ccb_queue)) != NULL) { 1372 if (mly_ccb_submit(mly, mc)) 1373 break; 1374 SIMPLEQ_REMOVE_HEAD(&mly->mly_ccb_queue, mc_link.simpleq); 1375 } 1376 1377 splx(s); 1378 } 1379 1380 /* 1381 * Deliver a command to the controller. 1382 */ 1383 static int 1384 mly_ccb_submit(struct mly_softc *mly, struct mly_ccb *mc) 1385 { 1386 union mly_cmd_packet *pkt; 1387 int s, off; 1388 1389 mc->mc_packet->generic.command_id = htole16(mc->mc_slot); 1390 1391 bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap, 1392 mc->mc_packetphys - mly->mly_pkt_busaddr, 1393 sizeof(union mly_cmd_packet), 1394 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1395 1396 s = splbio(); 1397 1398 /* 1399 * Do we have to use the hardware mailbox? 1400 */ 1401 if ((mly->mly_state & MLY_STATE_MMBOX_ACTIVE) == 0) { 1402 /* 1403 * Check to see if the controller is ready for us. 1404 */ 1405 if (mly_idbr_true(mly, MLY_HM_CMDSENT)) { 1406 splx(s); 1407 return (EBUSY); 1408 } 1409 1410 /* 1411 * It's ready, send the command. 1412 */ 1413 mly_outl(mly, mly->mly_cmd_mailbox, 1414 (u_int64_t)mc->mc_packetphys & 0xffffffff); 1415 mly_outl(mly, mly->mly_cmd_mailbox + 4, 1416 (u_int64_t)mc->mc_packetphys >> 32); 1417 mly_outb(mly, mly->mly_idbr, MLY_HM_CMDSENT); 1418 } else { 1419 pkt = &mly->mly_mmbox->mmm_command[mly->mly_mmbox_cmd_idx]; 1420 off = (caddr_t)pkt - (caddr_t)mly->mly_mmbox; 1421 1422 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1423 off, sizeof(mly->mly_mmbox->mmm_command[0]), 1424 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1425 1426 /* Check to see if the next index is free yet. */ 1427 if (pkt->mmbox.flag != 0) { 1428 splx(s); 1429 return (EBUSY); 1430 } 1431 1432 /* Copy in new command */ 1433 memcpy(pkt->mmbox.data, mc->mc_packet->mmbox.data, 1434 sizeof(pkt->mmbox.data)); 1435 1436 /* Copy flag last. */ 1437 pkt->mmbox.flag = mc->mc_packet->mmbox.flag; 1438 1439 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1440 off, sizeof(mly->mly_mmbox->mmm_command[0]), 1441 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1442 1443 /* Signal controller and update index. */ 1444 mly_outb(mly, mly->mly_idbr, MLY_AM_CMDSENT); 1445 mly->mly_mmbox_cmd_idx = 1446 (mly->mly_mmbox_cmd_idx + 1) % MLY_MMBOX_COMMANDS; 1447 } 1448 1449 splx(s); 1450 return (0); 1451 } 1452 1453 /* 1454 * Pick up completed commands from the controller and handle accordingly. 1455 */ 1456 int 1457 mly_intr(void *cookie) 1458 { 1459 struct mly_ccb *mc; 1460 union mly_status_packet *sp; 1461 u_int16_t slot; 1462 int forus, off; 1463 struct mly_softc *mly; 1464 1465 mly = cookie; 1466 forus = 0; 1467 1468 /* 1469 * Pick up hardware-mailbox commands. 1470 */ 1471 if (mly_odbr_true(mly, MLY_HM_STSREADY)) { 1472 slot = mly_inw(mly, mly->mly_status_mailbox); 1473 1474 if (slot < MLY_SLOT_MAX) { 1475 mc = mly->mly_ccbs + (slot - MLY_SLOT_START); 1476 mc->mc_status = 1477 mly_inb(mly, mly->mly_status_mailbox + 2); 1478 mc->mc_sense = 1479 mly_inb(mly, mly->mly_status_mailbox + 3); 1480 mc->mc_resid = 1481 mly_inl(mly, mly->mly_status_mailbox + 4); 1482 1483 mly_ccb_complete(mly, mc); 1484 } else { 1485 /* Slot 0xffff may mean "extremely bogus command". */ 1486 printf("%s: got HM completion for illegal slot %u\n", 1487 mly->mly_dv.dv_xname, slot); 1488 } 1489 1490 /* Unconditionally acknowledge status. */ 1491 mly_outb(mly, mly->mly_odbr, MLY_HM_STSREADY); 1492 mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK); 1493 forus = 1; 1494 } 1495 1496 /* 1497 * Pick up memory-mailbox commands. 1498 */ 1499 if (mly_odbr_true(mly, MLY_AM_STSREADY)) { 1500 for (;;) { 1501 sp = &mly->mly_mmbox->mmm_status[mly->mly_mmbox_sts_idx]; 1502 off = (caddr_t)sp - (caddr_t)mly->mly_mmbox; 1503 1504 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1505 off, sizeof(mly->mly_mmbox->mmm_command[0]), 1506 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1507 1508 /* Check for more status. */ 1509 if (sp->mmbox.flag == 0) 1510 break; 1511 1512 /* Get slot number. */ 1513 slot = le16toh(sp->status.command_id); 1514 if (slot < MLY_SLOT_MAX) { 1515 mc = mly->mly_ccbs + (slot - MLY_SLOT_START); 1516 mc->mc_status = sp->status.status; 1517 mc->mc_sense = sp->status.sense_length; 1518 mc->mc_resid = le32toh(sp->status.residue); 1519 mly_ccb_complete(mly, mc); 1520 } else { 1521 /* 1522 * Slot 0xffff may mean "extremely bogus 1523 * command". 1524 */ 1525 printf("%s: got AM completion for illegal " 1526 "slot %u at %d\n", mly->mly_dv.dv_xname, 1527 slot, mly->mly_mmbox_sts_idx); 1528 } 1529 1530 /* Clear and move to next index. */ 1531 sp->mmbox.flag = 0; 1532 mly->mly_mmbox_sts_idx = 1533 (mly->mly_mmbox_sts_idx + 1) % MLY_MMBOX_STATUS; 1534 } 1535 1536 /* Acknowledge that we have collected status value(s). */ 1537 mly_outb(mly, mly->mly_odbr, MLY_AM_STSREADY); 1538 forus = 1; 1539 } 1540 1541 /* 1542 * Run the queue. 1543 */ 1544 if (forus && ! SIMPLEQ_EMPTY(&mly->mly_ccb_queue)) 1545 mly_ccb_enqueue(mly, NULL); 1546 1547 return (forus); 1548 } 1549 1550 /* 1551 * Process completed commands 1552 */ 1553 static void 1554 mly_ccb_complete(struct mly_softc *mly, struct mly_ccb *mc) 1555 { 1556 void (*complete)(struct mly_softc *, struct mly_ccb *); 1557 1558 bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap, 1559 mc->mc_packetphys - mly->mly_pkt_busaddr, 1560 sizeof(union mly_cmd_packet), 1561 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1562 1563 complete = mc->mc_complete; 1564 mc->mc_flags |= MLY_CCB_COMPLETE; 1565 1566 /* 1567 * Call completion handler or wake up sleeping consumer. 1568 */ 1569 if (complete != NULL) 1570 (*complete)(mly, mc); 1571 else 1572 wakeup(mc); 1573 } 1574 1575 /* 1576 * Allocate a command. 1577 */ 1578 int 1579 mly_ccb_alloc(struct mly_softc *mly, struct mly_ccb **mcp) 1580 { 1581 struct mly_ccb *mc; 1582 int s; 1583 1584 s = splbio(); 1585 mc = SLIST_FIRST(&mly->mly_ccb_free); 1586 if (mc != NULL) 1587 SLIST_REMOVE_HEAD(&mly->mly_ccb_free, mc_link.slist); 1588 splx(s); 1589 1590 *mcp = mc; 1591 return (mc == NULL ? EAGAIN : 0); 1592 } 1593 1594 /* 1595 * Release a command back to the freelist. 1596 */ 1597 void 1598 mly_ccb_free(struct mly_softc *mly, struct mly_ccb *mc) 1599 { 1600 int s; 1601 1602 /* 1603 * Fill in parts of the command that may cause confusion if a 1604 * consumer doesn't when we are later allocated. 1605 */ 1606 mc->mc_data = NULL; 1607 mc->mc_flags = 0; 1608 mc->mc_complete = NULL; 1609 mc->mc_private = NULL; 1610 mc->mc_packet->generic.command_control = 0; 1611 1612 /* 1613 * By default, we set up to overwrite the command packet with sense 1614 * information. 1615 */ 1616 mc->mc_packet->generic.sense_buffer_address = 1617 htole64(mc->mc_packetphys); 1618 mc->mc_packet->generic.maximum_sense_size = 1619 sizeof(union mly_cmd_packet); 1620 1621 s = splbio(); 1622 SLIST_INSERT_HEAD(&mly->mly_ccb_free, mc, mc_link.slist); 1623 splx(s); 1624 } 1625 1626 /* 1627 * Allocate and initialize command and packet structures. 1628 * 1629 * If the controller supports fewer than MLY_MAX_CCBS commands, limit our 1630 * allocation to that number. If we don't yet know how many commands the 1631 * controller supports, allocate a very small set (suitable for initialization 1632 * purposes only). 1633 */ 1634 static int 1635 mly_alloc_ccbs(struct mly_softc *mly) 1636 { 1637 struct mly_ccb *mc; 1638 int i, rv; 1639 1640 if (mly->mly_controllerinfo == NULL) 1641 mly->mly_ncmds = MLY_CCBS_RESV; 1642 else { 1643 i = le16toh(mly->mly_controllerinfo->maximum_parallel_commands); 1644 mly->mly_ncmds = min(MLY_MAX_CCBS, i); 1645 } 1646 1647 /* 1648 * Allocate enough space for all the command packets in one chunk 1649 * and map them permanently into controller-visible space. 1650 */ 1651 rv = mly_dmamem_alloc(mly, 1652 mly->mly_ncmds * sizeof(union mly_cmd_packet), 1653 &mly->mly_pkt_dmamap, (caddr_t *)&mly->mly_pkt, 1654 &mly->mly_pkt_busaddr, &mly->mly_pkt_seg); 1655 if (rv) 1656 return (rv); 1657 1658 mly->mly_ccbs = malloc(sizeof(struct mly_ccb) * mly->mly_ncmds, 1659 M_DEVBUF, M_NOWAIT|M_ZERO); 1660 1661 for (i = 0; i < mly->mly_ncmds; i++) { 1662 mc = mly->mly_ccbs + i; 1663 mc->mc_slot = MLY_SLOT_START + i; 1664 mc->mc_packet = mly->mly_pkt + i; 1665 mc->mc_packetphys = mly->mly_pkt_busaddr + 1666 (i * sizeof(union mly_cmd_packet)); 1667 1668 rv = bus_dmamap_create(mly->mly_dmat, MLY_MAX_XFER, 1669 MLY_MAX_SEGS, MLY_MAX_XFER, 0, 1670 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1671 &mc->mc_datamap); 1672 if (rv) { 1673 mly_release_ccbs(mly); 1674 return (rv); 1675 } 1676 1677 mly_ccb_free(mly, mc); 1678 } 1679 1680 return (0); 1681 } 1682 1683 /* 1684 * Free all the storage held by commands. 1685 * 1686 * Must be called with all commands on the free list. 1687 */ 1688 static void 1689 mly_release_ccbs(struct mly_softc *mly) 1690 { 1691 struct mly_ccb *mc; 1692 1693 /* Throw away command buffer DMA maps. */ 1694 while (mly_ccb_alloc(mly, &mc) == 0) 1695 bus_dmamap_destroy(mly->mly_dmat, mc->mc_datamap); 1696 1697 /* Release CCB storage. */ 1698 free(mly->mly_ccbs, M_DEVBUF); 1699 1700 /* Release the packet storage. */ 1701 mly_dmamem_free(mly, mly->mly_ncmds * sizeof(union mly_cmd_packet), 1702 mly->mly_pkt_dmamap, (caddr_t)mly->mly_pkt, &mly->mly_pkt_seg); 1703 } 1704 1705 /* 1706 * Map a command into controller-visible space. 1707 */ 1708 static int 1709 mly_ccb_map(struct mly_softc *mly, struct mly_ccb *mc) 1710 { 1711 struct mly_cmd_generic *gen; 1712 struct mly_sg_entry *sg; 1713 bus_dma_segment_t *ds; 1714 int flg, nseg, rv; 1715 1716 #ifdef DIAGNOSTIC 1717 /* Don't map more than once. */ 1718 if ((mc->mc_flags & MLY_CCB_MAPPED) != 0) 1719 panic("mly_ccb_map: already mapped"); 1720 mc->mc_flags |= MLY_CCB_MAPPED; 1721 1722 /* Does the command have a data buffer? */ 1723 if (mc->mc_data == NULL) 1724 panic("mly_ccb_map: no data buffer"); 1725 #endif 1726 1727 rv = bus_dmamap_load(mly->mly_dmat, mc->mc_datamap, mc->mc_data, 1728 mc->mc_length, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1729 ((mc->mc_flags & MLY_CCB_DATAIN) != 0 ? 1730 BUS_DMA_READ : BUS_DMA_WRITE)); 1731 if (rv != 0) 1732 return (rv); 1733 1734 gen = &mc->mc_packet->generic; 1735 1736 /* 1737 * Can we use the transfer structure directly? 1738 */ 1739 if ((nseg = mc->mc_datamap->dm_nsegs) <= 2) { 1740 mc->mc_sgoff = -1; 1741 sg = &gen->transfer.direct.sg[0]; 1742 } else { 1743 mc->mc_sgoff = (mc->mc_slot - MLY_SLOT_START) * 1744 MLY_MAX_SEGS; 1745 sg = mly->mly_sg + mc->mc_sgoff; 1746 gen->command_control |= MLY_CMDCTL_EXTENDED_SG_TABLE; 1747 gen->transfer.indirect.entries[0] = htole16(nseg); 1748 gen->transfer.indirect.table_physaddr[0] = 1749 htole64(mly->mly_sg_busaddr + 1750 (mc->mc_sgoff * sizeof(struct mly_sg_entry))); 1751 } 1752 1753 /* 1754 * Fill the S/G table. 1755 */ 1756 for (ds = mc->mc_datamap->dm_segs; nseg != 0; nseg--, sg++, ds++) { 1757 sg->physaddr = htole64(ds->ds_addr); 1758 sg->length = htole64(ds->ds_len); 1759 } 1760 1761 /* 1762 * Sync up the data map. 1763 */ 1764 if ((mc->mc_flags & MLY_CCB_DATAIN) != 0) 1765 flg = BUS_DMASYNC_PREREAD; 1766 else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */ { 1767 gen->command_control |= MLY_CMDCTL_DATA_DIRECTION; 1768 flg = BUS_DMASYNC_PREWRITE; 1769 } 1770 1771 bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg); 1772 1773 /* 1774 * Sync up the chained S/G table, if we're using one. 1775 */ 1776 if (mc->mc_sgoff == -1) 1777 return (0); 1778 1779 bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff, 1780 MLY_SGL_SIZE, BUS_DMASYNC_PREWRITE); 1781 1782 return (0); 1783 } 1784 1785 /* 1786 * Unmap a command from controller-visible space. 1787 */ 1788 static void 1789 mly_ccb_unmap(struct mly_softc *mly, struct mly_ccb *mc) 1790 { 1791 int flg; 1792 1793 #ifdef DIAGNOSTIC 1794 if ((mc->mc_flags & MLY_CCB_MAPPED) == 0) 1795 panic("mly_ccb_unmap: not mapped"); 1796 mc->mc_flags &= ~MLY_CCB_MAPPED; 1797 #endif 1798 1799 if ((mc->mc_flags & MLY_CCB_DATAIN) != 0) 1800 flg = BUS_DMASYNC_POSTREAD; 1801 else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */ 1802 flg = BUS_DMASYNC_POSTWRITE; 1803 1804 bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg); 1805 bus_dmamap_unload(mly->mly_dmat, mc->mc_datamap); 1806 1807 if (mc->mc_sgoff == -1) 1808 return; 1809 1810 bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff, 1811 MLY_SGL_SIZE, BUS_DMASYNC_POSTWRITE); 1812 } 1813 1814 /* 1815 * Adjust the size of each I/O before it passes to the SCSI layer. 1816 */ 1817 static void 1818 mly_scsipi_minphys(struct buf *bp) 1819 { 1820 1821 if (bp->b_bcount > MLY_MAX_XFER) 1822 bp->b_bcount = MLY_MAX_XFER; 1823 minphys(bp); 1824 } 1825 1826 /* 1827 * Start a SCSI command. 1828 */ 1829 static void 1830 mly_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 1831 void *arg) 1832 { 1833 struct mly_ccb *mc; 1834 struct mly_cmd_scsi_small *ss; 1835 struct scsipi_xfer *xs; 1836 struct scsipi_periph *periph; 1837 struct mly_softc *mly; 1838 struct mly_btl *btl; 1839 int s, tmp; 1840 1841 mly = (void *)chan->chan_adapter->adapt_dev; 1842 1843 switch (req) { 1844 case ADAPTER_REQ_RUN_XFER: 1845 xs = arg; 1846 periph = xs->xs_periph; 1847 btl = &mly->mly_btl[chan->chan_channel][periph->periph_target]; 1848 s = splbio(); 1849 tmp = btl->mb_flags; 1850 splx(s); 1851 1852 /* 1853 * Check for I/O attempt to a protected or non-existant 1854 * device. 1855 */ 1856 if ((tmp & MLY_BTL_PROTECTED) != 0) { 1857 xs->error = XS_SELTIMEOUT; 1858 scsipi_done(xs); 1859 break; 1860 } 1861 1862 #ifdef DIAGNOSTIC 1863 /* XXX Increase if/when we support large SCSI commands. */ 1864 if (xs->cmdlen > MLY_CMD_SCSI_SMALL_CDB) { 1865 printf("%s: cmd too large\n", mly->mly_dv.dv_xname); 1866 xs->error = XS_DRIVER_STUFFUP; 1867 scsipi_done(xs); 1868 break; 1869 } 1870 #endif 1871 1872 if (mly_ccb_alloc(mly, &mc)) { 1873 xs->error = XS_RESOURCE_SHORTAGE; 1874 scsipi_done(xs); 1875 break; 1876 } 1877 1878 /* Build the command. */ 1879 mc->mc_data = xs->data; 1880 mc->mc_length = xs->datalen; 1881 mc->mc_complete = mly_scsipi_complete; 1882 mc->mc_private = xs; 1883 1884 /* Build the packet for the controller. */ 1885 ss = &mc->mc_packet->scsi_small; 1886 ss->opcode = MDACMD_SCSI; 1887 #ifdef notdef 1888 /* 1889 * XXX FreeBSD does this, but it doesn't fix anything, 1890 * XXX and appears potentially harmful. 1891 */ 1892 ss->command_control |= MLY_CMDCTL_DISABLE_DISCONNECT; 1893 #endif 1894 1895 ss->data_size = htole32(xs->datalen); 1896 _lto3l(MLY_PHYADDR(0, chan->chan_channel, 1897 periph->periph_target, periph->periph_lun), ss->addr); 1898 1899 if (xs->timeout < 60 * 1000) 1900 ss->timeout = xs->timeout / 1000 | 1901 MLY_TIMEOUT_SECONDS; 1902 else if (xs->timeout < 60 * 60 * 1000) 1903 ss->timeout = xs->timeout / (60 * 1000) | 1904 MLY_TIMEOUT_MINUTES; 1905 else 1906 ss->timeout = xs->timeout / (60 * 60 * 1000) | 1907 MLY_TIMEOUT_HOURS; 1908 1909 ss->maximum_sense_size = sizeof(xs->sense); 1910 ss->cdb_length = xs->cmdlen; 1911 memcpy(ss->cdb, xs->cmd, xs->cmdlen); 1912 1913 if (mc->mc_length != 0) { 1914 if ((xs->xs_control & XS_CTL_DATA_OUT) != 0) 1915 mc->mc_flags |= MLY_CCB_DATAOUT; 1916 else /* if ((xs->xs_control & XS_CTL_DATA_IN) != 0) */ 1917 mc->mc_flags |= MLY_CCB_DATAIN; 1918 1919 if (mly_ccb_map(mly, mc) != 0) { 1920 xs->error = XS_DRIVER_STUFFUP; 1921 mly_ccb_free(mly, mc); 1922 scsipi_done(xs); 1923 break; 1924 } 1925 } 1926 1927 /* 1928 * Give the command to the controller. 1929 */ 1930 if ((xs->xs_control & XS_CTL_POLL) != 0) { 1931 if (mly_ccb_poll(mly, mc, xs->timeout + 5000)) { 1932 xs->error = XS_REQUEUE; 1933 if (mc->mc_length != 0) 1934 mly_ccb_unmap(mly, mc); 1935 mly_ccb_free(mly, mc); 1936 scsipi_done(xs); 1937 } 1938 } else 1939 mly_ccb_enqueue(mly, mc); 1940 1941 break; 1942 1943 case ADAPTER_REQ_GROW_RESOURCES: 1944 /* 1945 * Not supported. 1946 */ 1947 break; 1948 1949 case ADAPTER_REQ_SET_XFER_MODE: 1950 /* 1951 * We can't change the transfer mode, but at least let 1952 * scsipi know what the adapter has negotiated. 1953 */ 1954 mly_get_xfer_mode(mly, chan->chan_channel, arg); 1955 break; 1956 } 1957 } 1958 1959 /* 1960 * Handle completion of a SCSI command. 1961 */ 1962 static void 1963 mly_scsipi_complete(struct mly_softc *mly, struct mly_ccb *mc) 1964 { 1965 struct scsipi_xfer *xs; 1966 struct scsipi_channel *chan; 1967 struct scsipi_inquiry_data *inq; 1968 struct mly_btl *btl; 1969 int target, sl, s; 1970 const char *p; 1971 1972 xs = mc->mc_private; 1973 xs->status = mc->mc_status; 1974 1975 /* 1976 * XXX The `resid' value as returned by the controller appears to be 1977 * bogus, so we always set it to zero. Is it perhaps the transfer 1978 * count? 1979 */ 1980 xs->resid = 0; /* mc->mc_resid; */ 1981 1982 if (mc->mc_length != 0) 1983 mly_ccb_unmap(mly, mc); 1984 1985 switch (mc->mc_status) { 1986 case SCSI_OK: 1987 /* 1988 * In order to report logical device type and status, we 1989 * overwrite the result of the INQUIRY command to logical 1990 * devices. 1991 */ 1992 if (xs->cmd->opcode == INQUIRY) { 1993 chan = xs->xs_periph->periph_channel; 1994 target = xs->xs_periph->periph_target; 1995 btl = &mly->mly_btl[chan->chan_channel][target]; 1996 1997 s = splbio(); 1998 if ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) { 1999 inq = (struct scsipi_inquiry_data *)xs->data; 2000 mly_padstr(inq->vendor, "MYLEX", 8); 2001 p = mly_describe_code(mly_table_device_type, 2002 btl->mb_type); 2003 mly_padstr(inq->product, p, 16); 2004 p = mly_describe_code(mly_table_device_state, 2005 btl->mb_state); 2006 mly_padstr(inq->revision, p, 4); 2007 } 2008 splx(s); 2009 } 2010 2011 xs->error = XS_NOERROR; 2012 break; 2013 2014 case SCSI_CHECK: 2015 sl = mc->mc_sense; 2016 if (sl > sizeof(xs->sense.scsi_sense)) 2017 sl = sizeof(xs->sense.scsi_sense); 2018 memcpy(&xs->sense.scsi_sense, mc->mc_packet, sl); 2019 xs->error = XS_SENSE; 2020 break; 2021 2022 case SCSI_BUSY: 2023 case SCSI_QUEUE_FULL: 2024 xs->error = XS_BUSY; 2025 break; 2026 2027 default: 2028 printf("%s: unknown SCSI status 0x%x\n", 2029 mly->mly_dv.dv_xname, xs->status); 2030 xs->error = XS_DRIVER_STUFFUP; 2031 break; 2032 } 2033 2034 mly_ccb_free(mly, mc); 2035 scsipi_done(xs); 2036 } 2037 2038 /* 2039 * Notify scsipi about a target's transfer mode. 2040 */ 2041 static void 2042 mly_get_xfer_mode(struct mly_softc *mly, int bus, struct scsipi_xfer_mode *xm) 2043 { 2044 struct mly_btl *btl; 2045 int s; 2046 2047 btl = &mly->mly_btl[bus][xm->xm_target]; 2048 xm->xm_mode = 0; 2049 2050 s = splbio(); 2051 2052 if ((btl->mb_flags & MLY_BTL_PHYSICAL) != 0) { 2053 if (btl->mb_speed == 0) { 2054 xm->xm_period = 0; 2055 xm->xm_offset = 0; 2056 } else { 2057 xm->xm_period = 12; /* XXX */ 2058 xm->xm_offset = 8; /* XXX */ 2059 xm->xm_mode |= PERIPH_CAP_SYNC; /* XXX */ 2060 } 2061 2062 switch (btl->mb_width) { 2063 case 32: 2064 xm->xm_mode = PERIPH_CAP_WIDE32; 2065 break; 2066 case 16: 2067 xm->xm_mode = PERIPH_CAP_WIDE16; 2068 break; 2069 default: 2070 xm->xm_mode = 0; 2071 break; 2072 } 2073 } else /* ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) */ { 2074 xm->xm_mode = PERIPH_CAP_WIDE16 | PERIPH_CAP_SYNC; 2075 xm->xm_period = 12; 2076 xm->xm_offset = 8; 2077 } 2078 2079 if ((btl->mb_flags & MLY_BTL_TQING) != 0) 2080 xm->xm_mode |= PERIPH_CAP_TQING; 2081 2082 splx(s); 2083 2084 scsipi_async_event(&mly->mly_chans[bus], ASYNC_EVENT_XFER_MODE, xm); 2085 } 2086 2087 /* 2088 * ioctl hook; used here only to initiate low-level rescans. 2089 */ 2090 static int 2091 mly_scsipi_ioctl(struct scsipi_channel *chan, u_long cmd, caddr_t data, 2092 int flag, struct proc *p) 2093 { 2094 struct mly_softc *mly; 2095 int rv; 2096 2097 mly = (struct mly_softc *)chan->chan_adapter->adapt_dev; 2098 2099 switch (cmd) { 2100 case SCBUSIOLLSCAN: 2101 mly_scan_channel(mly, chan->chan_channel); 2102 rv = 0; 2103 break; 2104 default: 2105 rv = ENOTTY; 2106 break; 2107 } 2108 2109 return (rv); 2110 } 2111 2112 /* 2113 * Handshake with the firmware while the card is being initialized. 2114 */ 2115 static int 2116 mly_fwhandshake(struct mly_softc *mly) 2117 { 2118 u_int8_t error, param0, param1; 2119 int spinup; 2120 2121 spinup = 0; 2122 2123 /* Set HM_STSACK and let the firmware initialize. */ 2124 mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK); 2125 DELAY(1000); /* too short? */ 2126 2127 /* If HM_STSACK is still true, the controller is initializing. */ 2128 if (!mly_idbr_true(mly, MLY_HM_STSACK)) 2129 return (0); 2130 2131 printf("%s: controller initialization started\n", 2132 mly->mly_dv.dv_xname); 2133 2134 /* 2135 * Spin waiting for initialization to finish, or for a message to be 2136 * delivered. 2137 */ 2138 while (mly_idbr_true(mly, MLY_HM_STSACK)) { 2139 /* Check for a message */ 2140 if (!mly_error_valid(mly)) 2141 continue; 2142 2143 error = mly_inb(mly, mly->mly_error_status) & ~MLY_MSG_EMPTY; 2144 param0 = mly_inb(mly, mly->mly_cmd_mailbox); 2145 param1 = mly_inb(mly, mly->mly_cmd_mailbox + 1); 2146 2147 switch (error) { 2148 case MLY_MSG_SPINUP: 2149 if (!spinup) { 2150 printf("%s: drive spinup in progress\n", 2151 mly->mly_dv.dv_xname); 2152 spinup = 1; 2153 } 2154 break; 2155 2156 case MLY_MSG_RACE_RECOVERY_FAIL: 2157 printf("%s: mirror race recovery failed - \n", 2158 mly->mly_dv.dv_xname); 2159 printf("%s: one or more drives offline\n", 2160 mly->mly_dv.dv_xname); 2161 break; 2162 2163 case MLY_MSG_RACE_IN_PROGRESS: 2164 printf("%s: mirror race recovery in progress\n", 2165 mly->mly_dv.dv_xname); 2166 break; 2167 2168 case MLY_MSG_RACE_ON_CRITICAL: 2169 printf("%s: mirror race recovery on critical drive\n", 2170 mly->mly_dv.dv_xname); 2171 break; 2172 2173 case MLY_MSG_PARITY_ERROR: 2174 printf("%s: FATAL MEMORY PARITY ERROR\n", 2175 mly->mly_dv.dv_xname); 2176 return (ENXIO); 2177 2178 default: 2179 printf("%s: unknown initialization code 0x%x\n", 2180 mly->mly_dv.dv_xname, error); 2181 break; 2182 } 2183 } 2184 2185 return (0); 2186 } 2187 2188 /* 2189 * Space-fill a character string 2190 */ 2191 static void 2192 mly_padstr(char *dst, const char *src, int len) 2193 { 2194 2195 while (len-- > 0) { 2196 if (*src != '\0') 2197 *dst++ = *src++; 2198 else 2199 *dst++ = ' '; 2200 } 2201 } 2202 2203 /* 2204 * Allocate DMA safe memory. 2205 */ 2206 static int 2207 mly_dmamem_alloc(struct mly_softc *mly, int size, bus_dmamap_t *dmamap, 2208 caddr_t *kva, bus_addr_t *paddr, bus_dma_segment_t *seg) 2209 { 2210 int rseg, rv, state; 2211 2212 state = 0; 2213 2214 if ((rv = bus_dmamem_alloc(mly->mly_dmat, size, PAGE_SIZE, 0, 2215 seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 2216 printf("%s: dmamem_alloc = %d\n", mly->mly_dv.dv_xname, rv); 2217 goto bad; 2218 } 2219 2220 state++; 2221 2222 if ((rv = bus_dmamem_map(mly->mly_dmat, seg, 1, size, kva, 2223 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 2224 printf("%s: dmamem_map = %d\n", mly->mly_dv.dv_xname, rv); 2225 goto bad; 2226 } 2227 2228 state++; 2229 2230 if ((rv = bus_dmamap_create(mly->mly_dmat, size, size, 1, 0, 2231 BUS_DMA_NOWAIT, dmamap)) != 0) { 2232 printf("%s: dmamap_create = %d\n", mly->mly_dv.dv_xname, rv); 2233 goto bad; 2234 } 2235 2236 state++; 2237 2238 if ((rv = bus_dmamap_load(mly->mly_dmat, *dmamap, *kva, size, 2239 NULL, BUS_DMA_NOWAIT)) != 0) { 2240 printf("%s: dmamap_load = %d\n", mly->mly_dv.dv_xname, rv); 2241 goto bad; 2242 } 2243 2244 *paddr = (*dmamap)->dm_segs[0].ds_addr; 2245 memset(*kva, 0, size); 2246 return (0); 2247 2248 bad: 2249 if (state > 2) 2250 bus_dmamap_destroy(mly->mly_dmat, *dmamap); 2251 if (state > 1) 2252 bus_dmamem_unmap(mly->mly_dmat, *kva, size); 2253 if (state > 0) 2254 bus_dmamem_free(mly->mly_dmat, seg, 1); 2255 2256 return (rv); 2257 } 2258 2259 /* 2260 * Free DMA safe memory. 2261 */ 2262 static void 2263 mly_dmamem_free(struct mly_softc *mly, int size, bus_dmamap_t dmamap, 2264 caddr_t kva, bus_dma_segment_t *seg) 2265 { 2266 2267 bus_dmamap_unload(mly->mly_dmat, dmamap); 2268 bus_dmamap_destroy(mly->mly_dmat, dmamap); 2269 bus_dmamem_unmap(mly->mly_dmat, kva, size); 2270 bus_dmamem_free(mly->mly_dmat, seg, 1); 2271 } 2272 2273 2274 /* 2275 * Accept an open operation on the control device. 2276 */ 2277 int 2278 mlyopen(dev_t dev, int flag, int mode, struct lwp *l) 2279 { 2280 struct mly_softc *mly; 2281 2282 if ((mly = device_lookup(&mly_cd, minor(dev))) == NULL) 2283 return (ENXIO); 2284 if ((mly->mly_state & MLY_STATE_INITOK) == 0) 2285 return (ENXIO); 2286 if ((mly->mly_state & MLY_STATE_OPEN) != 0) 2287 return (EBUSY); 2288 2289 mly->mly_state |= MLY_STATE_OPEN; 2290 return (0); 2291 } 2292 2293 /* 2294 * Accept the last close on the control device. 2295 */ 2296 int 2297 mlyclose(dev_t dev, int flag, int mode, 2298 struct lwp *l) 2299 { 2300 struct mly_softc *mly; 2301 2302 mly = device_lookup(&mly_cd, minor(dev)); 2303 mly->mly_state &= ~MLY_STATE_OPEN; 2304 return (0); 2305 } 2306 2307 /* 2308 * Handle control operations. 2309 */ 2310 int 2311 mlyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, 2312 struct lwp *l) 2313 { 2314 struct mly_softc *mly; 2315 int rv; 2316 2317 mly = device_lookup(&mly_cd, minor(dev)); 2318 2319 switch (cmd) { 2320 case MLYIO_COMMAND: 2321 rv = kauth_authorize_device_passthru(l->l_cred, dev, data); 2322 if (rv) 2323 break; 2324 2325 rv = mly_user_command(mly, (void *)data); 2326 break; 2327 case MLYIO_HEALTH: 2328 rv = mly_user_health(mly, (void *)data); 2329 break; 2330 default: 2331 rv = ENOTTY; 2332 break; 2333 } 2334 2335 return (rv); 2336 } 2337 2338 /* 2339 * Execute a command passed in from userspace. 2340 * 2341 * The control structure contains the actual command for the controller, as 2342 * well as the user-space data pointer and data size, and an optional sense 2343 * buffer size/pointer. On completion, the data size is adjusted to the 2344 * command residual, and the sense buffer size to the size of the returned 2345 * sense data. 2346 */ 2347 static int 2348 mly_user_command(struct mly_softc *mly, struct mly_user_command *uc) 2349 { 2350 struct mly_ccb *mc; 2351 int rv, mapped; 2352 2353 if ((rv = mly_ccb_alloc(mly, &mc)) != 0) 2354 return (rv); 2355 2356 mapped = 0; 2357 mc->mc_data = NULL; 2358 2359 /* 2360 * Handle data size/direction. 2361 */ 2362 if ((mc->mc_length = abs(uc->DataTransferLength)) != 0) { 2363 if (mc->mc_length > MAXPHYS) { 2364 rv = EINVAL; 2365 goto out; 2366 } 2367 2368 mc->mc_data = malloc(mc->mc_length, M_DEVBUF, M_WAITOK); 2369 if (mc->mc_data == NULL) { 2370 rv = ENOMEM; 2371 goto out; 2372 } 2373 2374 if (uc->DataTransferLength > 0) { 2375 mc->mc_flags |= MLY_CCB_DATAIN; 2376 memset(mc->mc_data, 0, mc->mc_length); 2377 } 2378 2379 if (uc->DataTransferLength < 0) { 2380 mc->mc_flags |= MLY_CCB_DATAOUT; 2381 rv = copyin(uc->DataTransferBuffer, mc->mc_data, 2382 mc->mc_length); 2383 if (rv != 0) 2384 goto out; 2385 } 2386 2387 if ((rv = mly_ccb_map(mly, mc)) != 0) 2388 goto out; 2389 mapped = 1; 2390 } 2391 2392 /* Copy in the command and execute it. */ 2393 memcpy(mc->mc_packet, &uc->CommandMailbox, sizeof(uc->CommandMailbox)); 2394 2395 if ((rv = mly_ccb_wait(mly, mc, 60000)) != 0) 2396 goto out; 2397 2398 /* Return the data to userspace. */ 2399 if (uc->DataTransferLength > 0) { 2400 rv = copyout(mc->mc_data, uc->DataTransferBuffer, 2401 mc->mc_length); 2402 if (rv != 0) 2403 goto out; 2404 } 2405 2406 /* Return the sense buffer to userspace. */ 2407 if (uc->RequestSenseLength > 0 && mc->mc_sense > 0) { 2408 rv = copyout(mc->mc_packet, uc->RequestSenseBuffer, 2409 min(uc->RequestSenseLength, mc->mc_sense)); 2410 if (rv != 0) 2411 goto out; 2412 } 2413 2414 /* Return command results to userspace (caller will copy out). */ 2415 uc->DataTransferLength = mc->mc_resid; 2416 uc->RequestSenseLength = min(uc->RequestSenseLength, mc->mc_sense); 2417 uc->CommandStatus = mc->mc_status; 2418 rv = 0; 2419 2420 out: 2421 if (mapped) 2422 mly_ccb_unmap(mly, mc); 2423 if (mc->mc_data != NULL) 2424 free(mc->mc_data, M_DEVBUF); 2425 mly_ccb_free(mly, mc); 2426 2427 return (rv); 2428 } 2429 2430 /* 2431 * Return health status to userspace. If the health change index in the 2432 * user structure does not match that currently exported by the controller, 2433 * we return the current status immediately. Otherwise, we block until 2434 * either interrupted or new status is delivered. 2435 */ 2436 static int 2437 mly_user_health(struct mly_softc *mly, struct mly_user_health *uh) 2438 { 2439 struct mly_health_status mh; 2440 int rv, s; 2441 2442 /* Fetch the current health status from userspace. */ 2443 rv = copyin(uh->HealthStatusBuffer, &mh, sizeof(mh)); 2444 if (rv != 0) 2445 return (rv); 2446 2447 /* spin waiting for a status update */ 2448 s = splbio(); 2449 if (mly->mly_event_change == mh.change_counter) 2450 rv = tsleep(&mly->mly_event_change, PRIBIO | PCATCH, 2451 "mlyhealth", 0); 2452 splx(s); 2453 2454 if (rv == 0) { 2455 /* 2456 * Copy the controller's health status buffer out (there is 2457 * a race here if it changes again). 2458 */ 2459 rv = copyout(&mly->mly_mmbox->mmm_health.status, 2460 uh->HealthStatusBuffer, sizeof(uh->HealthStatusBuffer)); 2461 } 2462 2463 return (rv); 2464 } 2465
Indexes created Tue Sep 23 14:10:03 GMT 2025