mly.c revision 1.4
1 /* $NetBSD: mly.c,v 1.4 2001/07/30 23:49:51 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran, Thor Lancelot Simon, and Eric Haszlakiewicz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000, 2001 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: mly.c,v 1.8 2001/07/14 00:12:22 msmith Exp 66 */ 67 68 /* 69 * Driver for the Mylex AcceleRAID and eXtremeRAID family with v6 firmware. 70 * 71 * TODO: 72 * 73 * o Make mly->mly_btl a hash, then MLY_BTL_RESCAN becomes a SIMPLEQ. 74 * o Handle FC and multiple LUNs. 75 * o Fix mmbox usage. 76 * o Fix transfer speed fudge. 77 */ 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/device.h> 82 #include <sys/kernel.h> 83 #include <sys/queue.h> 84 #include <sys/buf.h> 85 #include <sys/endian.h> 86 #include <sys/conf.h> 87 #include <sys/malloc.h> 88 #include <sys/ioctl.h> 89 #include <sys/scsiio.h> 90 #include <sys/kthread.h> 91 92 #include <uvm/uvm_extern.h> 93 94 #include <machine/bus.h> 95 96 #include <dev/scsipi/scsi_all.h> 97 #include <dev/scsipi/scsipi_all.h> 98 #include <dev/scsipi/scsiconf.h> 99 100 #include <dev/pci/pcireg.h> 101 #include <dev/pci/pcivar.h> 102 #include <dev/pci/pcidevs.h> 103 104 #include <dev/pci/mlyreg.h> 105 #include <dev/pci/mlyio.h> 106 #include <dev/pci/mlyvar.h> 107 #include <dev/pci/mly_tables.h> 108 109 static void mly_attach(struct device *, struct device *, void *); 110 static int mly_match(struct device *, struct cfdata *, void *); 111 static const struct mly_ident *mly_find_ident(struct pci_attach_args *); 112 static int mly_fwhandshake(struct mly_softc *); 113 static int mly_flush(struct mly_softc *); 114 static int mly_intr(void *); 115 static void mly_shutdown(void *); 116 117 static int mly_alloc_ccbs(struct mly_softc *); 118 static void mly_check_event(struct mly_softc *); 119 static void mly_complete_event(struct mly_softc *, struct mly_ccb *); 120 static void mly_complete_rescan(struct mly_softc *, struct mly_ccb *); 121 static int mly_dmamem_alloc(struct mly_softc *, int, bus_dmamap_t *, 122 caddr_t *, bus_addr_t *, bus_dma_segment_t *); 123 static void mly_dmamem_free(struct mly_softc *, int, bus_dmamap_t, 124 caddr_t, bus_dma_segment_t *); 125 static int mly_enable_mmbox(struct mly_softc *); 126 static void mly_fetch_event(struct mly_softc *); 127 static int mly_get_controllerinfo(struct mly_softc *); 128 static int mly_get_eventstatus(struct mly_softc *); 129 static int mly_ioctl(struct mly_softc *, struct mly_cmd_ioctl *, 130 void **, size_t, void *, size_t *); 131 static void mly_padstr(char *, const char *, int); 132 static void mly_process_event(struct mly_softc *, struct mly_event *); 133 static void mly_release_ccbs(struct mly_softc *); 134 static int mly_scan_btl(struct mly_softc *, int, int); 135 static void mly_scan_channel(struct mly_softc *, int); 136 static void mly_thread(void *); 137 static void mly_thread_create(void *); 138 139 static int mly_ccb_alloc(struct mly_softc *, struct mly_ccb **); 140 static void mly_ccb_complete(struct mly_softc *, struct mly_ccb *); 141 static void mly_ccb_enqueue(struct mly_softc *, struct mly_ccb *); 142 static void mly_ccb_free(struct mly_softc *, struct mly_ccb *); 143 static int mly_ccb_map(struct mly_softc *, struct mly_ccb *); 144 static int mly_ccb_poll(struct mly_softc *, struct mly_ccb *, int); 145 static int mly_ccb_submit(struct mly_softc *, struct mly_ccb *); 146 static void mly_ccb_unmap(struct mly_softc *, struct mly_ccb *); 147 static int mly_ccb_wait(struct mly_softc *, struct mly_ccb *, int); 148 149 static void mly_get_xfer_mode(struct mly_softc *, int, 150 struct scsipi_xfer_mode *); 151 static void mly_scsipi_complete(struct mly_softc *, struct mly_ccb *); 152 static int mly_scsipi_ioctl(struct scsipi_channel *, u_long, caddr_t, 153 int, struct proc *); 154 static void mly_scsipi_minphys(struct buf *); 155 static void mly_scsipi_request(struct scsipi_channel *, 156 scsipi_adapter_req_t, void *); 157 158 static int mly_user_command(struct mly_softc *, struct mly_user_command *); 159 static int mly_user_health(struct mly_softc *, struct mly_user_health *); 160 161 cdev_decl(mly); 162 163 extern struct cfdriver mly_cd; 164 165 struct cfattach mly_ca = { 166 sizeof(struct mly_softc), mly_match, mly_attach 167 }; 168 169 struct mly_ident { 170 u_short vendor; 171 u_short product; 172 u_short subvendor; 173 u_short subproduct; 174 int hwif; 175 const char *desc; 176 } static const mly_ident[] = { 177 { 178 PCI_VENDOR_MYLEX, 179 PCI_PRODUCT_MYLEX_EXTREMERAID, 180 PCI_VENDOR_MYLEX, 181 0x0040, 182 MLY_HWIF_STRONGARM, 183 "eXtremeRAID 2000" 184 }, 185 { 186 PCI_VENDOR_MYLEX, 187 PCI_PRODUCT_MYLEX_EXTREMERAID, 188 PCI_VENDOR_MYLEX, 189 0x0030, 190 MLY_HWIF_STRONGARM, 191 "eXtremeRAID 3000" 192 }, 193 { 194 PCI_VENDOR_MYLEX, 195 PCI_PRODUCT_MYLEX_ACCELERAID, 196 PCI_VENDOR_MYLEX, 197 0x0050, 198 MLY_HWIF_I960RX, 199 "AcceleRAID 352" 200 }, 201 { 202 PCI_VENDOR_MYLEX, 203 PCI_PRODUCT_MYLEX_ACCELERAID, 204 PCI_VENDOR_MYLEX, 205 0x0052, 206 MLY_HWIF_I960RX, 207 "AcceleRAID 170" 208 }, 209 { 210 PCI_VENDOR_MYLEX, 211 PCI_PRODUCT_MYLEX_ACCELERAID, 212 PCI_VENDOR_MYLEX, 213 0x0054, 214 MLY_HWIF_I960RX, 215 "AcceleRAID 160" 216 }, 217 }; 218 219 static void *mly_sdh; 220 221 /* 222 * Try to find a `mly_ident' entry corresponding to this board. 223 */ 224 static const struct mly_ident * 225 mly_find_ident(struct pci_attach_args *pa) 226 { 227 const struct mly_ident *mpi, *maxmpi; 228 pcireg_t reg; 229 230 mpi = mly_ident; 231 maxmpi = mpi + sizeof(mly_ident) / sizeof(mly_ident[0]); 232 233 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O) 234 return (NULL); 235 236 for (; mpi < maxmpi; mpi++) { 237 if (PCI_VENDOR(pa->pa_id) != mpi->vendor || 238 PCI_PRODUCT(pa->pa_id) != mpi->product) 239 continue; 240 241 if (mpi->subvendor == 0x0000) 242 return (mpi); 243 244 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 245 246 if (PCI_VENDOR(reg) == mpi->subvendor && 247 PCI_PRODUCT(reg) == mpi->subproduct) 248 return (mpi); 249 } 250 251 return (NULL); 252 } 253 254 /* 255 * Match a supported board. 256 */ 257 static int 258 mly_match(struct device *parent, struct cfdata *cfdata, void *aux) 259 { 260 261 return (mly_find_ident(aux) != NULL); 262 } 263 264 /* 265 * Attach a supported board. 266 */ 267 static void 268 mly_attach(struct device *parent, struct device *self, void *aux) 269 { 270 struct pci_attach_args *pa; 271 struct mly_softc *mly; 272 struct mly_ioctl_getcontrollerinfo *mi; 273 const struct mly_ident *ident; 274 pci_chipset_tag_t pc; 275 pci_intr_handle_t ih; 276 bus_space_handle_t memh, ioh; 277 bus_space_tag_t memt, iot; 278 pcireg_t reg; 279 const char *intrstr; 280 int ior, memr, i, rv, state; 281 struct scsipi_adapter *adapt; 282 struct scsipi_channel *chan; 283 284 mly = (struct mly_softc *)self; 285 pa = aux; 286 pc = pa->pa_pc; 287 ident = mly_find_ident(pa); 288 state = 0; 289 290 mly->mly_dmat = pa->pa_dmat; 291 mly->mly_hwif = ident->hwif; 292 293 printf(": Mylex %s\n", ident->desc); 294 295 /* 296 * Map the PCI register window. 297 */ 298 memr = -1; 299 ior = -1; 300 301 for (i = 0x10; i <= 0x14; i += 4) { 302 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 303 304 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 305 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 306 ior = i; 307 } else { 308 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 309 memr = i; 310 } 311 } 312 313 if (memr != -1) 314 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 315 &memt, &memh, NULL, NULL)) 316 memr = -1; 317 if (ior != -1) 318 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 319 &iot, &ioh, NULL, NULL)) 320 ior = -1; 321 322 if (memr != -1) { 323 mly->mly_iot = memt; 324 mly->mly_ioh = memh; 325 } else if (ior != -1) { 326 mly->mly_iot = iot; 327 mly->mly_ioh = ioh; 328 } else { 329 printf("%s: can't map i/o or memory space\n", self->dv_xname); 330 return; 331 } 332 333 /* 334 * Enable the device. 335 */ 336 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 337 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 338 reg | PCI_COMMAND_MASTER_ENABLE); 339 340 /* 341 * Map and establish the interrupt. 342 */ 343 if (pci_intr_map(pa, &ih)) { 344 printf("%s: can't map interrupt\n", self->dv_xname); 345 return; 346 } 347 intrstr = pci_intr_string(pc, ih); 348 mly->mly_ih = pci_intr_establish(pc, ih, IPL_BIO, mly_intr, mly); 349 if (mly->mly_ih == NULL) { 350 printf("%s: can't establish interrupt", self->dv_xname); 351 if (intrstr != NULL) 352 printf(" at %s", intrstr); 353 printf("\n"); 354 return; 355 } 356 357 if (intrstr != NULL) 358 printf("%s: interrupting at %s\n", mly->mly_dv.dv_xname, 359 intrstr); 360 361 /* 362 * Take care of interface-specific tasks. 363 */ 364 switch (mly->mly_hwif) { 365 case MLY_HWIF_I960RX: 366 mly->mly_doorbell_true = 0x00; 367 mly->mly_cmd_mailbox = MLY_I960RX_COMMAND_MAILBOX; 368 mly->mly_status_mailbox = MLY_I960RX_STATUS_MAILBOX; 369 mly->mly_idbr = MLY_I960RX_IDBR; 370 mly->mly_odbr = MLY_I960RX_ODBR; 371 mly->mly_error_status = MLY_I960RX_ERROR_STATUS; 372 mly->mly_interrupt_status = MLY_I960RX_INTERRUPT_STATUS; 373 mly->mly_interrupt_mask = MLY_I960RX_INTERRUPT_MASK; 374 break; 375 376 case MLY_HWIF_STRONGARM: 377 mly->mly_doorbell_true = 0xff; 378 mly->mly_cmd_mailbox = MLY_STRONGARM_COMMAND_MAILBOX; 379 mly->mly_status_mailbox = MLY_STRONGARM_STATUS_MAILBOX; 380 mly->mly_idbr = MLY_STRONGARM_IDBR; 381 mly->mly_odbr = MLY_STRONGARM_ODBR; 382 mly->mly_error_status = MLY_STRONGARM_ERROR_STATUS; 383 mly->mly_interrupt_status = MLY_STRONGARM_INTERRUPT_STATUS; 384 mly->mly_interrupt_mask = MLY_STRONGARM_INTERRUPT_MASK; 385 break; 386 } 387 388 /* 389 * Allocate and map the scatter/gather lists. 390 */ 391 rv = mly_dmamem_alloc(mly, MLY_SGL_SIZE * MLY_MAX_CCBS, 392 &mly->mly_sg_dmamap, (caddr_t *)&mly->mly_sg, 393 &mly->mly_sg_busaddr, &mly->mly_sg_seg); 394 if (rv) { 395 printf("%s: unable to allocate S/G maps\n", 396 mly->mly_dv.dv_xname); 397 goto bad; 398 } 399 state++; 400 401 /* 402 * Allocate and map the memory mailbox. 403 */ 404 rv = mly_dmamem_alloc(mly, sizeof(struct mly_mmbox), 405 &mly->mly_mmbox_dmamap, (caddr_t *)&mly->mly_mmbox, 406 &mly->mly_mmbox_busaddr, &mly->mly_mmbox_seg); 407 if (rv) { 408 printf("%s: unable to allocate mailboxes\n", 409 mly->mly_dv.dv_xname); 410 goto bad; 411 } 412 state++; 413 414 /* 415 * Initialise per-controller queues. 416 */ 417 SLIST_INIT(&mly->mly_ccb_free); 418 SIMPLEQ_INIT(&mly->mly_ccb_queue); 419 420 /* 421 * Disable interrupts before we start talking to the controller. 422 */ 423 mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE); 424 425 /* 426 * Wait for the controller to come ready, handshaking with the 427 * firmware if required. This is typically only necessary on 428 * platforms where the controller BIOS does not run. 429 */ 430 if (mly_fwhandshake(mly)) { 431 printf("%s: unable to bring controller online\n", 432 mly->mly_dv.dv_xname); 433 goto bad; 434 } 435 436 /* 437 * Allocate initial command buffers, obtain controller feature 438 * information, and then reallocate command buffers, since we'll 439 * know how many we want. 440 */ 441 if (mly_alloc_ccbs(mly)) { 442 printf("%s: unable to allocate CCBs\n", 443 mly->mly_dv.dv_xname); 444 goto bad; 445 } 446 state++; 447 if (mly_get_controllerinfo(mly)) { 448 printf("%s: unable to retrieve controller info\n", 449 mly->mly_dv.dv_xname); 450 goto bad; 451 } 452 mly_release_ccbs(mly); 453 if (mly_alloc_ccbs(mly)) { 454 printf("%s: unable to allocate CCBs\n", 455 mly->mly_dv.dv_xname); 456 state--; 457 goto bad; 458 } 459 460 /* 461 * Get the current event counter for health purposes, populate the 462 * initial health status buffer. 463 */ 464 if (mly_get_eventstatus(mly)) { 465 printf("%s: unable to retrieve event status\n", 466 mly->mly_dv.dv_xname); 467 goto bad; 468 } 469 470 /* 471 * Enable memory-mailbox mode. 472 */ 473 if (mly_enable_mmbox(mly)) { 474 printf("%s: unable to enable memory mailbox\n", 475 mly->mly_dv.dv_xname); 476 goto bad; 477 } 478 479 /* 480 * Print a little information about the controller. 481 */ 482 mi = mly->mly_controllerinfo; 483 484 printf("%s: %d physical channel%s, firmware %d.%02d-%d-%02d " 485 "(%02d%02d%02d%02d), %dMB RAM\n", mly->mly_dv.dv_xname, 486 mi->physical_channels_present, 487 (mi->physical_channels_present) > 1 ? "s" : "", 488 mi->fw_major, mi->fw_minor, mi->fw_turn, mi->fw_build, 489 mi->fw_century, mi->fw_year, mi->fw_month, mi->fw_day, 490 le16toh(mi->memory_size)); 491 492 /* 493 * Register our `shutdownhook'. 494 */ 495 if (mly_sdh == NULL) 496 shutdownhook_establish(mly_shutdown, NULL); 497 498 /* 499 * Clear any previous BTL information. For each bus that scsipi 500 * wants to scan, we'll receive the SCBUSIOLLSCAN ioctl and retrieve 501 * all BTL info at that point. 502 */ 503 memset(&mly->mly_btl, 0, sizeof(mly->mly_btl)); 504 505 mly->mly_nchans = mly->mly_controllerinfo->physical_channels_present + 506 mly->mly_controllerinfo->virtual_channels_present; 507 508 /* 509 * Attach to scsipi. 510 */ 511 adapt = &mly->mly_adapt; 512 memset(adapt, 0, sizeof(*adapt)); 513 adapt->adapt_dev = &mly->mly_dv; 514 adapt->adapt_nchannels = mly->mly_nchans; 515 adapt->adapt_openings = mly->mly_ncmds - MLY_CCBS_RESV; 516 adapt->adapt_max_periph = mly->mly_ncmds - MLY_CCBS_RESV; 517 adapt->adapt_request = mly_scsipi_request; 518 adapt->adapt_minphys = mly_scsipi_minphys; 519 adapt->adapt_ioctl = mly_scsipi_ioctl; 520 521 for (i = 0; i < mly->mly_nchans; i++) { 522 chan = &mly->mly_chans[i]; 523 memset(chan, 0, sizeof(*chan)); 524 chan->chan_adapter = adapt; 525 chan->chan_bustype = &scsi_bustype; 526 chan->chan_channel = i; 527 chan->chan_ntargets = MLY_MAX_TARGETS; 528 chan->chan_nluns = MLY_MAX_LUNS; 529 chan->chan_id = mly->mly_controllerparam->initiator_id; 530 chan->chan_flags = SCSIPI_CHAN_NOSETTLE; 531 config_found(&mly->mly_dv, chan, scsiprint); 532 } 533 534 /* 535 * Now enable interrupts... 536 */ 537 mly_outb(mly, mly->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE); 538 539 /* 540 * Finally, create our monitoring thread. 541 */ 542 kthread_create(mly_thread_create, mly); 543 544 mly->mly_state |= MLY_STATE_INITOK; 545 return; 546 547 bad: 548 if (state > 2) 549 mly_release_ccbs(mly); 550 if (state > 1) 551 mly_dmamem_free(mly, sizeof(struct mly_mmbox), 552 mly->mly_mmbox_dmamap, (caddr_t)mly->mly_mmbox, 553 &mly->mly_mmbox_seg); 554 if (state > 0) 555 mly_dmamem_free(mly, MLY_SGL_SIZE * MLY_MAX_CCBS, 556 mly->mly_sg_dmamap, (caddr_t)mly->mly_sg, 557 &mly->mly_sg_seg); 558 } 559 560 /* 561 * Scan all possible devices on the specified channel. 562 */ 563 static void 564 mly_scan_channel(struct mly_softc *mly, int bus) 565 { 566 int s, target; 567 568 for (target = 0; target < MLY_MAX_TARGETS; target++) { 569 s = splbio(); 570 if (!mly_scan_btl(mly, bus, target)) { 571 tsleep(&mly->mly_btl[bus][target], PRIBIO, "mlyscan", 572 0); 573 } 574 splx(s); 575 } 576 } 577 578 /* 579 * Shut down all configured `mly' devices. 580 */ 581 static void 582 mly_shutdown(void *cookie) 583 { 584 struct mly_softc *mly; 585 int i; 586 587 for (i = 0; i < mly_cd.cd_ndevs; i++) { 588 if ((mly = device_lookup(&mly_cd, i)) == NULL) 589 continue; 590 591 if (mly_flush(mly)) 592 printf("%s: unable to flush cache\n", 593 mly->mly_dv.dv_xname); 594 } 595 } 596 597 /* 598 * Fill in the mly_controllerinfo and mly_controllerparam fields in the 599 * softc. 600 */ 601 static int 602 mly_get_controllerinfo(struct mly_softc *mly) 603 { 604 struct mly_cmd_ioctl mci; 605 int rv; 606 607 /* 608 * Build the getcontrollerinfo ioctl and send it. 609 */ 610 memset(&mci, 0, sizeof(mci)); 611 mci.sub_ioctl = MDACIOCTL_GETCONTROLLERINFO; 612 rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerinfo, 613 sizeof(*mly->mly_controllerinfo), NULL, NULL); 614 if (rv != 0) 615 return (rv); 616 617 /* 618 * Build the getcontrollerparameter ioctl and send it. 619 */ 620 memset(&mci, 0, sizeof(mci)); 621 mci.sub_ioctl = MDACIOCTL_GETCONTROLLERPARAMETER; 622 rv = mly_ioctl(mly, &mci, (void **)&mly->mly_controllerparam, 623 sizeof(*mly->mly_controllerparam), NULL, NULL); 624 625 return (rv); 626 } 627 628 /* 629 * Rescan a device, possibly as a consequence of getting an event which 630 * suggests that it may have changed. Must be called with interrupts 631 * blocked. 632 */ 633 static int 634 mly_scan_btl(struct mly_softc *mly, int bus, int target) 635 { 636 struct mly_ccb *mc; 637 struct mly_cmd_ioctl *mci; 638 int rv; 639 640 if (target == mly->mly_controllerparam->initiator_id) { 641 mly->mly_btl[bus][target].mb_flags = MLY_BTL_PROTECTED; 642 return (EIO); 643 } 644 645 /* Don't re-scan if a scan is already in progress. */ 646 if ((mly->mly_btl[bus][target].mb_flags & MLY_BTL_SCANNING) != 0) 647 return (EBUSY); 648 649 /* Get a command. */ 650 if ((rv = mly_ccb_alloc(mly, &mc)) != 0) 651 return (rv); 652 653 /* Set up the data buffer. */ 654 mc->mc_data = malloc(sizeof(union mly_devinfo), 655 M_DEVBUF, M_NOWAIT); 656 memset(mc->mc_data, 0, sizeof(union mly_devinfo)); 657 658 mc->mc_flags |= MLY_CCB_DATAIN; 659 mc->mc_complete = mly_complete_rescan; 660 661 /* 662 * Build the ioctl. 663 */ 664 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl; 665 mci->opcode = MDACMD_IOCTL; 666 mci->timeout = 30 | MLY_TIMEOUT_SECONDS; 667 memset(&mci->param, 0, sizeof(mci->param)); 668 669 if (MLY_BUS_IS_VIRTUAL(mly, bus)) { 670 mc->mc_length = sizeof(struct mly_ioctl_getlogdevinfovalid); 671 mci->data_size = htole32(mc->mc_length); 672 mci->sub_ioctl = MDACIOCTL_GETLOGDEVINFOVALID; 673 _lto3l(MLY_LOGADDR(0, MLY_LOGDEV_ID(mly, bus, target)), 674 mci->addr); 675 } else { 676 mc->mc_length = sizeof(struct mly_ioctl_getphysdevinfovalid); 677 mci->data_size = htole32(mc->mc_length); 678 mci->sub_ioctl = MDACIOCTL_GETPHYSDEVINFOVALID; 679 _lto3l(MLY_PHYADDR(0, bus, target, 0), mci->addr); 680 } 681 682 /* 683 * Dispatch the command. 684 */ 685 if ((rv = mly_ccb_map(mly, mc)) != 0) { 686 free(mc->mc_data, M_DEVBUF); 687 mly_ccb_free(mly, mc); 688 return(rv); 689 } 690 691 mly->mly_btl[bus][target].mb_flags |= MLY_BTL_SCANNING; 692 mly_ccb_enqueue(mly, mc); 693 return (0); 694 } 695 696 /* 697 * Handle the completion of a rescan operation. 698 */ 699 static void 700 mly_complete_rescan(struct mly_softc *mly, struct mly_ccb *mc) 701 { 702 struct mly_ioctl_getlogdevinfovalid *ldi; 703 struct mly_ioctl_getphysdevinfovalid *pdi; 704 struct mly_cmd_ioctl *mci; 705 struct mly_btl btl, *btlp; 706 struct scsipi_xfer_mode xm; 707 int bus, target, rescan; 708 u_int tmp; 709 710 mly_ccb_unmap(mly, mc); 711 712 /* 713 * Recover the bus and target from the command. We need these even 714 * in the case where we don't have a useful response. 715 */ 716 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl; 717 tmp = _3ltol(mci->addr); 718 rescan = 0; 719 720 if (mci->sub_ioctl == MDACIOCTL_GETLOGDEVINFOVALID) { 721 bus = MLY_LOGDEV_BUS(mly, MLY_LOGADDR_DEV(tmp)); 722 target = MLY_LOGDEV_TARGET(mly, MLY_LOGADDR_DEV(tmp)); 723 } else { 724 bus = MLY_PHYADDR_CHANNEL(tmp); 725 target = MLY_PHYADDR_TARGET(tmp); 726 } 727 728 btlp = &mly->mly_btl[bus][target]; 729 730 /* The default result is 'no device'. */ 731 memset(&btl, 0, sizeof(btl)); 732 btl.mb_flags = MLY_BTL_PROTECTED; 733 734 /* If the rescan completed OK, we have possibly-new BTL data. */ 735 if (mc->mc_status != 0) 736 goto out; 737 738 if (mc->mc_length == sizeof(*ldi)) { 739 ldi = (struct mly_ioctl_getlogdevinfovalid *)mc->mc_data; 740 tmp = le32toh(ldi->logical_device_number); 741 742 if (MLY_LOGDEV_BUS(mly, tmp) != bus || 743 MLY_LOGDEV_TARGET(mly, tmp) != target) { 744 #ifdef MLYDEBUG 745 printf("%s: WARNING: BTL rescan (logical) for %d:%d " 746 "returned data for %d:%d instead\n", 747 mly->mly_dv.dv_xname, bus, target, 748 MLY_LOGDEV_BUS(mly, tmp), 749 MLY_LOGDEV_TARGET(mly, tmp)); 750 #endif 751 goto out; 752 } 753 754 btl.mb_flags = MLY_BTL_LOGICAL | MLY_BTL_TQING; 755 btl.mb_type = ldi->raid_level; 756 btl.mb_state = ldi->state; 757 } else if (mc->mc_length == sizeof(*pdi)) { 758 pdi = (struct mly_ioctl_getphysdevinfovalid *)mc->mc_data; 759 760 if (pdi->channel != bus || pdi->target != target) { 761 #ifdef MLYDEBUG 762 printf("%s: WARNING: BTL rescan (physical) for %d:%d " 763 " returned data for %d:%d instead\n", 764 mly->mly_dv.dv_xname, 765 bus, target, pdi->channel, pdi->target); 766 #endif 767 goto out; 768 } 769 770 btl.mb_flags = MLY_BTL_PHYSICAL; 771 btl.mb_type = MLY_DEVICE_TYPE_PHYSICAL; 772 btl.mb_state = pdi->state; 773 btl.mb_speed = pdi->speed; 774 btl.mb_width = pdi->width; 775 776 if (pdi->state != MLY_DEVICE_STATE_UNCONFIGURED) 777 btl.mb_flags |= MLY_BTL_PROTECTED; 778 if (pdi->command_tags != 0) 779 btl.mb_flags |= MLY_BTL_TQING; 780 } else { 781 printf("%s: BTL rescan result invalid\n", mly->mly_dv.dv_xname); 782 goto out; 783 } 784 785 /* Decide whether we need to rescan the device. */ 786 if (btl.mb_flags != btlp->mb_flags || 787 btl.mb_speed != btlp->mb_speed || 788 btl.mb_width != btlp->mb_width) 789 rescan = 1; 790 791 out: 792 *btlp = btl; 793 794 if (rescan && (btl.mb_flags & MLY_BTL_PROTECTED) == 0) { 795 xm.xm_target = target; 796 mly_get_xfer_mode(mly, bus, &xm); 797 /* XXX SCSI mid-layer rescan goes here. */ 798 } 799 800 /* Wake anybody waiting on the device to be rescanned. */ 801 wakeup(btlp); 802 803 free(mc->mc_data, M_DEVBUF); 804 mly_ccb_free(mly, mc); 805 } 806 807 /* 808 * Get the current health status and set the 'next event' counter to suit. 809 */ 810 static int 811 mly_get_eventstatus(struct mly_softc *mly) 812 { 813 struct mly_cmd_ioctl mci; 814 struct mly_health_status *mh; 815 int rv; 816 817 /* Build the gethealthstatus ioctl and send it. */ 818 memset(&mci, 0, sizeof(mci)); 819 mh = NULL; 820 mci.sub_ioctl = MDACIOCTL_GETHEALTHSTATUS; 821 822 rv = mly_ioctl(mly, &mci, (void **)&mh, sizeof(*mh), NULL, NULL); 823 if (rv) 824 return (rv); 825 826 /* Get the event counter. */ 827 mly->mly_event_change = le32toh(mh->change_counter); 828 mly->mly_event_waiting = le32toh(mh->next_event); 829 mly->mly_event_counter = le32toh(mh->next_event); 830 831 /* Save the health status into the memory mailbox */ 832 memcpy(&mly->mly_mmbox->mmm_health.status, mh, sizeof(*mh)); 833 834 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 835 offsetof(struct mly_mmbox, mmm_health), 836 sizeof(mly->mly_mmbox->mmm_health), 837 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 838 839 free(mh, M_DEVBUF); 840 return (0); 841 } 842 843 /* 844 * Enable memory mailbox mode. 845 */ 846 static int 847 mly_enable_mmbox(struct mly_softc *mly) 848 { 849 struct mly_cmd_ioctl mci; 850 u_int8_t *sp; 851 u_int64_t tmp; 852 int rv; 853 854 /* Build the ioctl and send it. */ 855 memset(&mci, 0, sizeof(mci)); 856 mci.sub_ioctl = MDACIOCTL_SETMEMORYMAILBOX; 857 858 /* Set buffer addresses. */ 859 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_command); 860 mci.param.setmemorymailbox.command_mailbox_physaddr = htole64(tmp); 861 862 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_status); 863 mci.param.setmemorymailbox.status_mailbox_physaddr = htole64(tmp); 864 865 tmp = mly->mly_mmbox_busaddr + offsetof(struct mly_mmbox, mmm_health); 866 mci.param.setmemorymailbox.health_buffer_physaddr = htole64(tmp); 867 868 /* Set buffer sizes - abuse of data_size field is revolting. */ 869 sp = (u_int8_t *)&mci.data_size; 870 sp[0] = (sizeof(union mly_cmd_packet) * MLY_MMBOX_COMMANDS) >> 10; 871 sp[1] = (sizeof(union mly_status_packet) * MLY_MMBOX_STATUS) >> 10; 872 mci.param.setmemorymailbox.health_buffer_size = 873 sizeof(union mly_health_region) >> 10; 874 875 rv = mly_ioctl(mly, &mci, NULL, 0, NULL, NULL); 876 if (rv) 877 return (rv); 878 879 mly->mly_state |= MLY_STATE_MMBOX_ACTIVE; 880 return (0); 881 } 882 883 /* 884 * Flush all pending I/O from the controller. 885 */ 886 static int 887 mly_flush(struct mly_softc *mly) 888 { 889 struct mly_cmd_ioctl mci; 890 891 /* Build the ioctl */ 892 memset(&mci, 0, sizeof(mci)); 893 mci.sub_ioctl = MDACIOCTL_FLUSHDEVICEDATA; 894 mci.param.deviceoperation.operation_device = 895 MLY_OPDEVICE_PHYSICAL_CONTROLLER; 896 897 /* Pass it off to the controller */ 898 return (mly_ioctl(mly, &mci, NULL, 0, NULL, NULL)); 899 } 900 901 /* 902 * Perform an ioctl command. 903 * 904 * If (data) is not NULL, the command requires data transfer to the 905 * controller. If (*data) is NULL the command requires data transfer from 906 * the controller, and we will allocate a buffer for it. 907 */ 908 static int 909 mly_ioctl(struct mly_softc *mly, struct mly_cmd_ioctl *ioctl, void **data, 910 size_t datasize, void *sense_buffer, 911 size_t *sense_length) 912 { 913 struct mly_ccb *mc; 914 struct mly_cmd_ioctl *mci; 915 u_int8_t status; 916 int rv; 917 918 mc = NULL; 919 if ((rv = mly_ccb_alloc(mly, &mc)) != 0) 920 goto bad; 921 922 /* 923 * Copy the ioctl structure, but save some important fields and then 924 * fixup. 925 */ 926 mci = &mc->mc_packet->ioctl; 927 ioctl->sense_buffer_address = htole64(mci->sense_buffer_address); 928 ioctl->maximum_sense_size = mci->maximum_sense_size; 929 *mci = *ioctl; 930 mci->opcode = MDACMD_IOCTL; 931 mci->timeout = 30 | MLY_TIMEOUT_SECONDS; 932 933 /* Handle the data buffer. */ 934 if (data != NULL) { 935 if (*data == NULL) { 936 /* Allocate data buffer */ 937 mc->mc_data = malloc(datasize, M_DEVBUF, M_NOWAIT); 938 mc->mc_flags |= MLY_CCB_DATAIN; 939 } else { 940 mc->mc_data = *data; 941 mc->mc_flags |= MLY_CCB_DATAOUT; 942 } 943 mc->mc_length = datasize; 944 mc->mc_packet->generic.data_size = htole32(datasize); 945 } 946 947 /* Run the command. */ 948 if (datasize > 0) 949 if ((rv = mly_ccb_map(mly, mc)) != 0) 950 goto bad; 951 rv = mly_ccb_poll(mly, mc, 30000); 952 if (datasize > 0) 953 mly_ccb_unmap(mly, mc); 954 if (rv != 0) 955 goto bad; 956 957 /* Clean up and return any data. */ 958 status = mc->mc_status; 959 960 if (status != 0) 961 printf("mly_ioctl: command status %d\n", status); 962 963 if (mc->mc_sense > 0 && sense_buffer != NULL) { 964 memcpy(sense_buffer, mc->mc_packet, mc->mc_sense); 965 *sense_length = mc->mc_sense; 966 goto bad; 967 } 968 969 /* Should we return a data pointer? */ 970 if (data != NULL && *data == NULL) 971 *data = mc->mc_data; 972 973 /* Command completed OK. */ 974 rv = (status != 0 ? EIO : 0); 975 976 bad: 977 if (mc != NULL) { 978 /* Do we need to free a data buffer we allocated? */ 979 if (rv != 0 && mc->mc_data != NULL && *data == NULL) 980 free(mc->mc_data, M_DEVBUF); 981 mly_ccb_free(mly, mc); 982 } 983 984 return (rv); 985 } 986 987 /* 988 * Check for event(s) outstanding in the controller. 989 */ 990 static void 991 mly_check_event(struct mly_softc *mly) 992 { 993 994 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 995 offsetof(struct mly_mmbox, mmm_health), 996 sizeof(mly->mly_mmbox->mmm_health), 997 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 998 999 /* 1000 * The controller may have updated the health status information, so 1001 * check for it here. Note that the counters are all in host 1002 * memory, so this check is very cheap. Also note that we depend on 1003 * checking on completion 1004 */ 1005 if (le32toh(mly->mly_mmbox->mmm_health.status.change_counter) != 1006 mly->mly_event_change) { 1007 mly->mly_event_change = 1008 le32toh(mly->mly_mmbox->mmm_health.status.change_counter); 1009 mly->mly_event_waiting = 1010 le32toh(mly->mly_mmbox->mmm_health.status.next_event); 1011 1012 /* Wake up anyone that might be interested in this. */ 1013 wakeup(&mly->mly_event_change); 1014 } 1015 1016 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1017 offsetof(struct mly_mmbox, mmm_health), 1018 sizeof(mly->mly_mmbox->mmm_health), 1019 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1020 1021 if (mly->mly_event_counter != mly->mly_event_waiting) 1022 mly_fetch_event(mly); 1023 } 1024 1025 /* 1026 * Fetch one event from the controller. If we fail due to resource 1027 * starvation, we'll be retried the next time a command completes. 1028 */ 1029 static void 1030 mly_fetch_event(struct mly_softc *mly) 1031 { 1032 struct mly_ccb *mc; 1033 struct mly_cmd_ioctl *mci; 1034 int s; 1035 u_int32_t event; 1036 1037 /* Get a command. */ 1038 if (mly_ccb_alloc(mly, &mc)) 1039 return; 1040 1041 /* Set up the data buffer. */ 1042 mc->mc_data = malloc(sizeof(struct mly_event), M_DEVBUF, M_NOWAIT); 1043 memset(mc->mc_data, 0, sizeof(struct mly_event)); 1044 1045 mc->mc_length = sizeof(struct mly_event); 1046 mc->mc_flags |= MLY_CCB_DATAIN; 1047 mc->mc_complete = mly_complete_event; 1048 1049 /* 1050 * Get an event number to fetch. It's possible that we've raced 1051 * with another context for the last event, in which case there will 1052 * be no more events. 1053 */ 1054 s = splbio(); 1055 if (mly->mly_event_counter == mly->mly_event_waiting) { 1056 splx(s); 1057 free(mc->mc_data, M_DEVBUF); 1058 mly_ccb_free(mly, mc); 1059 return; 1060 } 1061 event = mly->mly_event_counter++; 1062 splx(s); 1063 1064 /* 1065 * Build the ioctl. 1066 * 1067 * At this point we are committed to sending this request, as it 1068 * will be the only one constructed for this particular event 1069 * number. 1070 */ 1071 mci = (struct mly_cmd_ioctl *)&mc->mc_packet->ioctl; 1072 mci->opcode = MDACMD_IOCTL; 1073 mci->data_size = htole32(sizeof(struct mly_event)); 1074 _lto3l(MLY_PHYADDR(0, 0, (event >> 16) & 0xff, (event >> 24) & 0xff), 1075 mci->addr); 1076 mci->timeout = 30 | MLY_TIMEOUT_SECONDS; 1077 mci->sub_ioctl = MDACIOCTL_GETEVENT; 1078 mci->param.getevent.sequence_number_low = htole16(event & 0xffff); 1079 1080 /* 1081 * Submit the command. 1082 */ 1083 if (mly_ccb_map(mly, mc) != 0) 1084 goto bad; 1085 mly_ccb_enqueue(mly, mc); 1086 return; 1087 1088 bad: 1089 printf("%s: couldn't fetch event %u\n", mly->mly_dv.dv_xname, event); 1090 free(mc->mc_data, M_DEVBUF); 1091 mly_ccb_free(mly, mc); 1092 } 1093 1094 /* 1095 * Handle the completion of an event poll. 1096 */ 1097 static void 1098 mly_complete_event(struct mly_softc *mly, struct mly_ccb *mc) 1099 { 1100 struct mly_event *me; 1101 1102 me = (struct mly_event *)mc->mc_data; 1103 mly_ccb_unmap(mly, mc); 1104 mly_ccb_free(mly, mc); 1105 1106 /* If the event was successfully fetched, process it. */ 1107 if (mc->mc_status == SCSI_OK) 1108 mly_process_event(mly, me); 1109 else 1110 printf("%s: unable to fetch event; status = 0x%x\n", 1111 mly->mly_dv.dv_xname, mc->mc_status); 1112 1113 free(me, M_DEVBUF); 1114 1115 /* Check for another event. */ 1116 mly_check_event(mly); 1117 } 1118 1119 /* 1120 * Process a controller event. Called with interupts blocked (i.e., at 1121 * interrupt time). 1122 */ 1123 static void 1124 mly_process_event(struct mly_softc *mly, struct mly_event *me) 1125 { 1126 struct scsipi_sense_data *ssd; 1127 int bus, target, event, class, action; 1128 const char *fp, *tp; 1129 1130 ssd = (struct scsipi_sense_data *)&me->sense[0]; 1131 1132 /* 1133 * Errors can be reported using vendor-unique sense data. In this 1134 * case, the event code will be 0x1c (Request sense data present), 1135 * the sense key will be 0x09 (vendor specific), the MSB of the ASC 1136 * will be set, and the actual event code will be a 16-bit value 1137 * comprised of the ASCQ (low byte) and low seven bits of the ASC 1138 * (low seven bits of the high byte). 1139 */ 1140 if (le32toh(me->code) == 0x1c && 1141 (ssd->flags & SSD_KEY) == SKEY_VENDOR_UNIQUE && 1142 (ssd->add_sense_code & 0x80) != 0) { 1143 event = ((int)(ssd->add_sense_code & ~0x80) << 8) + 1144 ssd->add_sense_code_qual; 1145 } else 1146 event = le32toh(me->code); 1147 1148 /* Look up event, get codes. */ 1149 fp = mly_describe_code(mly_table_event, event); 1150 1151 /* Quiet event? */ 1152 class = fp[0]; 1153 #ifdef notyet 1154 if (isupper(class) && bootverbose) 1155 class = tolower(class); 1156 #endif 1157 1158 /* Get action code, text string. */ 1159 action = fp[1]; 1160 tp = fp + 3; 1161 1162 /* 1163 * Print some information about the event. 1164 * 1165 * This code uses a table derived from the corresponding portion of 1166 * the Linux driver, and thus the parser is very similar. 1167 */ 1168 switch (class) { 1169 case 'p': 1170 /* 1171 * Error on physical drive. 1172 */ 1173 printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname, 1174 me->channel, me->target, tp); 1175 if (action == 'r') 1176 mly->mly_btl[me->channel][me->target].mb_flags |= 1177 MLY_BTL_RESCAN; 1178 break; 1179 1180 case 'l': 1181 case 'm': 1182 /* 1183 * Error on logical unit, or message about logical unit. 1184 */ 1185 bus = MLY_LOGDEV_BUS(mly, me->lun); 1186 target = MLY_LOGDEV_TARGET(mly, me->lun); 1187 printf("%s: logical device %d:%d %s\n", mly->mly_dv.dv_xname, 1188 bus, target, tp); 1189 if (action == 'r') 1190 mly->mly_btl[bus][target].mb_flags |= MLY_BTL_RESCAN; 1191 break; 1192 1193 case 's': 1194 /* 1195 * Report of sense data. 1196 */ 1197 if (((ssd->flags & SSD_KEY) == SKEY_NO_SENSE || 1198 (ssd->flags & SSD_KEY) == SKEY_NOT_READY) && 1199 ssd->add_sense_code == 0x04 && 1200 (ssd->add_sense_code_qual == 0x01 || 1201 ssd->add_sense_code_qual == 0x02)) { 1202 /* Ignore NO_SENSE or NOT_READY in one case */ 1203 break; 1204 } 1205 1206 /* 1207 * XXX Should translate this if SCSIVERBOSE. 1208 */ 1209 printf("%s: physical device %d:%d %s\n", mly->mly_dv.dv_xname, 1210 me->channel, me->target, tp); 1211 printf("%s: sense key %d asc %02x ascq %02x\n", 1212 mly->mly_dv.dv_xname, ssd->flags & SSD_KEY, 1213 ssd->add_sense_code, ssd->add_sense_code_qual); 1214 printf("%s: info %x%x%x%x csi %x%x%x%x\n", 1215 mly->mly_dv.dv_xname, ssd->info[0], ssd->info[1], 1216 ssd->info[2], ssd->info[3], ssd->cmd_spec_info[0], 1217 ssd->cmd_spec_info[1], ssd->cmd_spec_info[2], 1218 ssd->cmd_spec_info[3]); 1219 if (action == 'r') 1220 mly->mly_btl[me->channel][me->target].mb_flags |= 1221 MLY_BTL_RESCAN; 1222 break; 1223 1224 case 'e': 1225 printf("%s: ", mly->mly_dv.dv_xname); 1226 printf(tp, me->target, me->lun); 1227 break; 1228 1229 case 'c': 1230 printf("%s: controller %s\n", mly->mly_dv.dv_xname, tp); 1231 break; 1232 1233 case '?': 1234 printf("%s: %s - %d\n", mly->mly_dv.dv_xname, tp, event); 1235 break; 1236 1237 default: 1238 /* Probably a 'noisy' event being ignored. */ 1239 break; 1240 } 1241 } 1242 1243 /* 1244 * Create the monitoring thread. Called after the standard kernel threads 1245 * have been created. 1246 */ 1247 static void 1248 mly_thread_create(void *cookie) 1249 { 1250 struct mly_softc *mly; 1251 int rv; 1252 1253 mly = cookie; 1254 1255 rv = kthread_create1(mly_thread, mly, &mly->mly_thread, "%s", 1256 mly->mly_dv.dv_xname); 1257 if (rv != 0) 1258 printf("%s: unable to create thread (%d)\n", 1259 mly->mly_dv.dv_xname, rv); 1260 } 1261 1262 /* 1263 * Perform periodic activities. 1264 */ 1265 static void 1266 mly_thread(void *cookie) 1267 { 1268 struct mly_softc *mly; 1269 struct mly_btl *btl; 1270 int s, bus, target, done; 1271 1272 mly = (struct mly_softc *)cookie; 1273 1274 for (;;) { 1275 /* Check for new events. */ 1276 mly_check_event(mly); 1277 1278 /* Re-scan up to 1 device. */ 1279 s = splbio(); 1280 for (bus = 0; bus < mly->mly_nchans && !done; bus++) { 1281 for (target = 0; target < MLY_MAX_TARGETS; target++) { 1282 /* Perform device rescan? */ 1283 btl = &mly->mly_btl[bus][target]; 1284 if ((btl->mb_flags & MLY_BTL_RESCAN) != 0) { 1285 btl->mb_flags ^= MLY_BTL_RESCAN; 1286 mly_scan_btl(mly, bus, target); 1287 done = 1; 1288 break; 1289 } 1290 } 1291 } 1292 splx(s); 1293 1294 /* Sleep for N seconds. */ 1295 tsleep(mly_thread, PWAIT, "mlyzzz", 1296 hz * MLY_PERIODIC_INTERVAL); 1297 } 1298 } 1299 1300 /* 1301 * Submit a command to the controller and poll on completion. Return 1302 * non-zero on timeout. 1303 */ 1304 static int 1305 mly_ccb_poll(struct mly_softc *mly, struct mly_ccb *mc, int timo) 1306 { 1307 int rv; 1308 1309 if ((rv = mly_ccb_submit(mly, mc)) != 0) 1310 return (rv); 1311 1312 for (timo *= 10; timo != 0; timo--) { 1313 if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0) 1314 break; 1315 mly_intr(mly); 1316 DELAY(100); 1317 } 1318 1319 return (timo == 0); 1320 } 1321 1322 /* 1323 * Submit a command to the controller and sleep on completion. Return 1324 * non-zero on timeout. 1325 */ 1326 static int 1327 mly_ccb_wait(struct mly_softc *mly, struct mly_ccb *mc, int timo) 1328 { 1329 int rv, s; 1330 1331 mly_ccb_enqueue(mly, mc); 1332 1333 s = splbio(); 1334 if ((mc->mc_flags & MLY_CCB_COMPLETE) != 0) { 1335 splx(s); 1336 return (0); 1337 } 1338 rv = tsleep(mc, PRIBIO, "mlywccb", timo * hz / 1000); 1339 splx(s); 1340 1341 return (rv); 1342 } 1343 1344 /* 1345 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1346 * the order that they were enqueued and try to submit their command blocks 1347 * to the controller for execution. 1348 */ 1349 void 1350 mly_ccb_enqueue(struct mly_softc *mly, struct mly_ccb *mc) 1351 { 1352 int s; 1353 1354 s = splbio(); 1355 1356 if (mc != NULL) 1357 SIMPLEQ_INSERT_TAIL(&mly->mly_ccb_queue, mc, mc_link.simpleq); 1358 1359 while ((mc = SIMPLEQ_FIRST(&mly->mly_ccb_queue)) != NULL) { 1360 if (mly_ccb_submit(mly, mc)) 1361 break; 1362 SIMPLEQ_REMOVE_HEAD(&mly->mly_ccb_queue, mc, mc_link.simpleq); 1363 } 1364 1365 splx(s); 1366 } 1367 1368 /* 1369 * Deliver a command to the controller. 1370 */ 1371 static int 1372 mly_ccb_submit(struct mly_softc *mly, struct mly_ccb *mc) 1373 { 1374 union mly_cmd_packet *pkt; 1375 int s, off; 1376 1377 mc->mc_packet->generic.command_id = htole16(mc->mc_slot); 1378 1379 bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap, 1380 mc->mc_packetphys - mly->mly_pkt_busaddr, 1381 sizeof(union mly_cmd_packet), 1382 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1383 1384 s = splbio(); 1385 1386 /* 1387 * Do we have to use the hardware mailbox? 1388 */ 1389 if ((mly->mly_state & MLY_STATE_MMBOX_ACTIVE) == 0) { 1390 /* 1391 * Check to see if the controller is ready for us. 1392 */ 1393 if (mly_idbr_true(mly, MLY_HM_CMDSENT)) { 1394 splx(s); 1395 return (EBUSY); 1396 } 1397 1398 /* 1399 * It's ready, send the command. 1400 */ 1401 mly_outl(mly, mly->mly_cmd_mailbox, 1402 (u_int64_t)mc->mc_packetphys & 0xffffffff); 1403 mly_outl(mly, mly->mly_cmd_mailbox + 4, 1404 (u_int64_t)mc->mc_packetphys >> 32); 1405 mly_outb(mly, mly->mly_idbr, MLY_HM_CMDSENT); 1406 } else { 1407 pkt = &mly->mly_mmbox->mmm_command[mly->mly_mmbox_cmd_idx]; 1408 off = (caddr_t)pkt - (caddr_t)mly->mly_mmbox; 1409 1410 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1411 off, sizeof(mly->mly_mmbox->mmm_command[0]), 1412 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1413 1414 /* Check to see if the next index is free yet. */ 1415 if (pkt->mmbox.flag != 0) { 1416 splx(s); 1417 return (EBUSY); 1418 } 1419 1420 /* Copy in new command */ 1421 memcpy(pkt->mmbox.data, mc->mc_packet->mmbox.data, 1422 sizeof(pkt->mmbox.data)); 1423 1424 /* Copy flag last. */ 1425 pkt->mmbox.flag = mc->mc_packet->mmbox.flag; 1426 1427 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1428 off, sizeof(mly->mly_mmbox->mmm_command[0]), 1429 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1430 1431 /* Signal controller and update index. */ 1432 mly_outb(mly, mly->mly_idbr, MLY_AM_CMDSENT); 1433 mly->mly_mmbox_cmd_idx = 1434 (mly->mly_mmbox_cmd_idx + 1) % MLY_MMBOX_COMMANDS; 1435 } 1436 1437 splx(s); 1438 return (0); 1439 } 1440 1441 /* 1442 * Pick up completed commands from the controller and handle accordingly. 1443 */ 1444 int 1445 mly_intr(void *cookie) 1446 { 1447 struct mly_ccb *mc; 1448 union mly_status_packet *sp; 1449 u_int16_t slot; 1450 int forus, off; 1451 struct mly_softc *mly; 1452 1453 mly = cookie; 1454 forus = 0; 1455 1456 /* 1457 * Pick up hardware-mailbox commands. 1458 */ 1459 if (mly_odbr_true(mly, MLY_HM_STSREADY)) { 1460 slot = mly_inw(mly, mly->mly_status_mailbox); 1461 1462 if (slot < MLY_SLOT_MAX) { 1463 mc = mly->mly_ccbs + (slot - MLY_SLOT_START); 1464 mc->mc_status = 1465 mly_inb(mly, mly->mly_status_mailbox + 2); 1466 mc->mc_sense = 1467 mly_inb(mly, mly->mly_status_mailbox + 3); 1468 mc->mc_resid = 1469 mly_inl(mly, mly->mly_status_mailbox + 4); 1470 1471 mly_ccb_complete(mly, mc); 1472 } else { 1473 /* Slot 0xffff may mean "extremely bogus command". */ 1474 printf("%s: got HM completion for illegal slot %u\n", 1475 mly->mly_dv.dv_xname, slot); 1476 } 1477 1478 /* Unconditionally acknowledge status. */ 1479 mly_outb(mly, mly->mly_odbr, MLY_HM_STSREADY); 1480 mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK); 1481 forus = 1; 1482 } 1483 1484 /* 1485 * Pick up memory-mailbox commands. 1486 */ 1487 if (mly_odbr_true(mly, MLY_AM_STSREADY)) { 1488 for (;;) { 1489 sp = &mly->mly_mmbox->mmm_status[mly->mly_mmbox_sts_idx]; 1490 off = (caddr_t)sp - (caddr_t)mly->mly_mmbox; 1491 1492 bus_dmamap_sync(mly->mly_dmat, mly->mly_mmbox_dmamap, 1493 off, sizeof(mly->mly_mmbox->mmm_command[0]), 1494 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1495 1496 /* Check for more status. */ 1497 if (sp->mmbox.flag == 0) 1498 break; 1499 1500 /* Get slot number. */ 1501 slot = le16toh(sp->status.command_id); 1502 if (slot < MLY_SLOT_MAX) { 1503 mc = mly->mly_ccbs + (slot - MLY_SLOT_START); 1504 mc->mc_status = sp->status.status; 1505 mc->mc_sense = sp->status.sense_length; 1506 mc->mc_resid = le32toh(sp->status.residue); 1507 mly_ccb_complete(mly, mc); 1508 } else { 1509 /* 1510 * Slot 0xffff may mean "extremely bogus 1511 * command". 1512 */ 1513 printf("%s: got AM completion for illegal " 1514 "slot %u at %d\n", mly->mly_dv.dv_xname, 1515 slot, mly->mly_mmbox_sts_idx); 1516 } 1517 1518 /* Clear and move to next index. */ 1519 sp->mmbox.flag = 0; 1520 mly->mly_mmbox_sts_idx = 1521 (mly->mly_mmbox_sts_idx + 1) % MLY_MMBOX_STATUS; 1522 } 1523 1524 /* Acknowledge that we have collected status value(s). */ 1525 mly_outb(mly, mly->mly_odbr, MLY_AM_STSREADY); 1526 forus = 1; 1527 } 1528 1529 /* 1530 * Run the queue. 1531 */ 1532 if (forus && SIMPLEQ_FIRST(&mly->mly_ccb_queue) != NULL) 1533 mly_ccb_enqueue(mly, NULL); 1534 1535 return (forus); 1536 } 1537 1538 /* 1539 * Process completed commands 1540 */ 1541 static void 1542 mly_ccb_complete(struct mly_softc *mly, struct mly_ccb *mc) 1543 { 1544 void (*complete)(struct mly_softc *, struct mly_ccb *); 1545 1546 bus_dmamap_sync(mly->mly_dmat, mly->mly_pkt_dmamap, 1547 mc->mc_packetphys - mly->mly_pkt_busaddr, 1548 sizeof(union mly_cmd_packet), 1549 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1550 1551 complete = mc->mc_complete; 1552 mc->mc_flags |= MLY_CCB_COMPLETE; 1553 1554 /* 1555 * Call completion handler or wake up sleeping consumer. 1556 */ 1557 if (complete != NULL) 1558 (*complete)(mly, mc); 1559 else 1560 wakeup(mc); 1561 } 1562 1563 /* 1564 * Allocate a command. 1565 */ 1566 int 1567 mly_ccb_alloc(struct mly_softc *mly, struct mly_ccb **mcp) 1568 { 1569 struct mly_ccb *mc; 1570 int s; 1571 1572 s = splbio(); 1573 mc = SLIST_FIRST(&mly->mly_ccb_free); 1574 if (mc != NULL) 1575 SLIST_REMOVE_HEAD(&mly->mly_ccb_free, mc_link.slist); 1576 splx(s); 1577 1578 *mcp = mc; 1579 return (mc == NULL ? EAGAIN : 0); 1580 } 1581 1582 /* 1583 * Release a command back to the freelist. 1584 */ 1585 void 1586 mly_ccb_free(struct mly_softc *mly, struct mly_ccb *mc) 1587 { 1588 int s; 1589 1590 /* 1591 * Fill in parts of the command that may cause confusion if a 1592 * consumer doesn't when we are later allocated. 1593 */ 1594 mc->mc_data = NULL; 1595 mc->mc_flags = 0; 1596 mc->mc_complete = NULL; 1597 mc->mc_private = NULL; 1598 mc->mc_packet->generic.command_control = 0; 1599 1600 /* 1601 * By default, we set up to overwrite the command packet with sense 1602 * information. 1603 */ 1604 mc->mc_packet->generic.sense_buffer_address = 1605 htole64(mc->mc_packetphys); 1606 mc->mc_packet->generic.maximum_sense_size = 1607 sizeof(union mly_cmd_packet); 1608 1609 s = splbio(); 1610 SLIST_INSERT_HEAD(&mly->mly_ccb_free, mc, mc_link.slist); 1611 splx(s); 1612 } 1613 1614 /* 1615 * Allocate and initialise command and packet structures. 1616 * 1617 * If the controller supports fewer than MLY_MAX_CCBS commands, limit our 1618 * allocation to that number. If we don't yet know how many commands the 1619 * controller supports, allocate a very small set (suitable for initialisation 1620 * purposes only). 1621 */ 1622 static int 1623 mly_alloc_ccbs(struct mly_softc *mly) 1624 { 1625 struct mly_ccb *mc; 1626 int i, rv; 1627 1628 if (mly->mly_controllerinfo == NULL) 1629 mly->mly_ncmds = MLY_CCBS_RESV; 1630 else { 1631 i = le16toh(mly->mly_controllerinfo->maximum_parallel_commands); 1632 mly->mly_ncmds = min(MLY_MAX_CCBS, i); 1633 } 1634 1635 /* 1636 * Allocate enough space for all the command packets in one chunk 1637 * and map them permanently into controller-visible space. 1638 */ 1639 rv = mly_dmamem_alloc(mly, 1640 mly->mly_ncmds * sizeof(union mly_cmd_packet), 1641 &mly->mly_pkt_dmamap, (caddr_t *)&mly->mly_pkt, 1642 &mly->mly_pkt_busaddr, &mly->mly_pkt_seg); 1643 if (rv) 1644 return (rv); 1645 1646 mly->mly_ccbs = malloc(sizeof(struct mly_ccb) * mly->mly_ncmds, 1647 M_DEVBUF, M_NOWAIT); 1648 memset(mly->mly_ccbs, 0, sizeof(struct mly_ccb) * mly->mly_ncmds); 1649 1650 for (i = 0; i < mly->mly_ncmds; i++) { 1651 mc = mly->mly_ccbs + i; 1652 mc->mc_slot = MLY_SLOT_START + i; 1653 mc->mc_packet = mly->mly_pkt + i; 1654 mc->mc_packetphys = mly->mly_pkt_busaddr + 1655 (i * sizeof(union mly_cmd_packet)); 1656 1657 rv = bus_dmamap_create(mly->mly_dmat, MLY_MAX_XFER, 1658 MLY_MAX_SEGS, MLY_MAX_XFER, 0, 1659 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1660 &mc->mc_datamap); 1661 if (rv) { 1662 mly_release_ccbs(mly); 1663 return (rv); 1664 } 1665 1666 mly_ccb_free(mly, mc); 1667 } 1668 1669 return (0); 1670 } 1671 1672 /* 1673 * Free all the storage held by commands. 1674 * 1675 * Must be called with all commands on the free list. 1676 */ 1677 static void 1678 mly_release_ccbs(struct mly_softc *mly) 1679 { 1680 struct mly_ccb *mc; 1681 1682 /* Throw away command buffer DMA maps. */ 1683 while (mly_ccb_alloc(mly, &mc) == 0) 1684 bus_dmamap_destroy(mly->mly_dmat, mc->mc_datamap); 1685 1686 /* Release CCB storage. */ 1687 free(mly->mly_ccbs, M_DEVBUF); 1688 1689 /* Release the packet storage. */ 1690 mly_dmamem_free(mly, mly->mly_ncmds * sizeof(union mly_cmd_packet), 1691 mly->mly_pkt_dmamap, (caddr_t)mly->mly_pkt, &mly->mly_pkt_seg); 1692 } 1693 1694 /* 1695 * Map a command into controller-visible space. 1696 */ 1697 static int 1698 mly_ccb_map(struct mly_softc *mly, struct mly_ccb *mc) 1699 { 1700 struct mly_cmd_generic *gen; 1701 struct mly_sg_entry *sg; 1702 bus_dma_segment_t *ds; 1703 int flg, nseg, rv; 1704 1705 #ifdef DIAGNOSTIC 1706 /* Don't map more than once. */ 1707 if ((mc->mc_flags & MLY_CCB_MAPPED) != 0) 1708 panic("mly_ccb_map: already mapped"); 1709 mc->mc_flags |= MLY_CCB_MAPPED; 1710 1711 /* Does the command have a data buffer? */ 1712 if (mc->mc_data == NULL) 1713 panic("mly_ccb_map: no data buffer"); 1714 #endif 1715 1716 rv = bus_dmamap_load(mly->mly_dmat, mc->mc_datamap, mc->mc_data, 1717 mc->mc_length, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1718 ((mc->mc_flags & MLY_CCB_DATAIN) != 0 ? 1719 BUS_DMA_READ : BUS_DMA_WRITE)); 1720 if (rv != 0) 1721 return (rv); 1722 1723 gen = &mc->mc_packet->generic; 1724 1725 /* 1726 * Can we use the transfer structure directly? 1727 */ 1728 if ((nseg = mc->mc_datamap->dm_nsegs) <= 2) { 1729 mc->mc_sgoff = -1; 1730 sg = &gen->transfer.direct.sg[0]; 1731 } else { 1732 mc->mc_sgoff = (mc->mc_slot - MLY_SLOT_START) * 1733 MLY_MAX_SEGS; 1734 sg = mly->mly_sg + mc->mc_sgoff; 1735 gen->command_control |= MLY_CMDCTL_EXTENDED_SG_TABLE; 1736 gen->transfer.indirect.entries[0] = htole16(nseg); 1737 gen->transfer.indirect.table_physaddr[0] = 1738 htole64(mly->mly_sg_busaddr + 1739 (mc->mc_sgoff * sizeof(struct mly_sg_entry))); 1740 } 1741 1742 /* 1743 * Fill the S/G table. 1744 */ 1745 for (ds = mc->mc_datamap->dm_segs; nseg != 0; nseg--, sg++, ds++) { 1746 sg->physaddr = htole64(ds->ds_addr); 1747 sg->length = htole64(ds->ds_len); 1748 } 1749 1750 /* 1751 * Sync up the data map. 1752 */ 1753 if ((mc->mc_flags & MLY_CCB_DATAIN) != 0) 1754 flg = BUS_DMASYNC_PREREAD; 1755 else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */ { 1756 gen->command_control |= MLY_CMDCTL_DATA_DIRECTION; 1757 flg = BUS_DMASYNC_PREWRITE; 1758 } 1759 1760 bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg); 1761 1762 /* 1763 * Sync up the chained S/G table, if we're using one. 1764 */ 1765 if (mc->mc_sgoff == -1) 1766 return (0); 1767 1768 bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff, 1769 MLY_SGL_SIZE, BUS_DMASYNC_PREWRITE); 1770 1771 return (0); 1772 } 1773 1774 /* 1775 * Unmap a command from controller-visible space. 1776 */ 1777 static void 1778 mly_ccb_unmap(struct mly_softc *mly, struct mly_ccb *mc) 1779 { 1780 int flg; 1781 1782 #ifdef DIAGNOSTIC 1783 if ((mc->mc_flags & MLY_CCB_MAPPED) == 0) 1784 panic("mly_ccb_unmap: not mapped"); 1785 mc->mc_flags &= ~MLY_CCB_MAPPED; 1786 #endif 1787 1788 if ((mc->mc_flags & MLY_CCB_DATAIN) != 0) 1789 flg = BUS_DMASYNC_POSTREAD; 1790 else /* if ((mc->mc_flags & MLY_CCB_DATAOUT) != 0) */ 1791 flg = BUS_DMASYNC_POSTWRITE; 1792 1793 bus_dmamap_sync(mly->mly_dmat, mc->mc_datamap, 0, mc->mc_length, flg); 1794 bus_dmamap_unload(mly->mly_dmat, mc->mc_datamap); 1795 1796 if (mc->mc_sgoff == -1) 1797 return; 1798 1799 bus_dmamap_sync(mly->mly_dmat, mly->mly_sg_dmamap, mc->mc_sgoff, 1800 MLY_SGL_SIZE, BUS_DMASYNC_POSTWRITE); 1801 } 1802 1803 /* 1804 * Adjust the size of each I/O before it passes to the SCSI layer. 1805 */ 1806 static void 1807 mly_scsipi_minphys(struct buf *bp) 1808 { 1809 1810 if (bp->b_bcount > MLY_MAX_XFER) 1811 bp->b_bcount = MLY_MAX_XFER; 1812 minphys(bp); 1813 } 1814 1815 /* 1816 * Start a SCSI command. 1817 */ 1818 static void 1819 mly_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 1820 void *arg) 1821 { 1822 struct mly_ccb *mc; 1823 struct mly_cmd_scsi_small *ss; 1824 struct scsipi_xfer *xs; 1825 struct scsipi_periph *periph; 1826 struct mly_softc *mly; 1827 struct mly_btl *btl; 1828 int s, tmp; 1829 1830 mly = (void *)chan->chan_adapter->adapt_dev; 1831 1832 switch (req) { 1833 case ADAPTER_REQ_RUN_XFER: 1834 xs = arg; 1835 periph = xs->xs_periph; 1836 btl = &mly->mly_btl[chan->chan_channel][periph->periph_target]; 1837 s = splbio(); 1838 tmp = btl->mb_flags; 1839 splx(s); 1840 1841 /* 1842 * Check for I/O attempt to a protected or non-existant 1843 * device. 1844 */ 1845 if ((tmp & MLY_BTL_PROTECTED) != 0) { 1846 xs->error = XS_SELTIMEOUT; 1847 scsipi_done(xs); 1848 break; 1849 } 1850 1851 #ifdef DIAGNOSTIC 1852 /* XXX Increase if/when we support large SCSI commands. */ 1853 if (xs->cmdlen > MLY_CMD_SCSI_SMALL_CDB) { 1854 printf("%s: cmd too large\n", mly->mly_dv.dv_xname); 1855 xs->error = XS_DRIVER_STUFFUP; 1856 scsipi_done(xs); 1857 break; 1858 } 1859 #endif 1860 1861 if (mly_ccb_alloc(mly, &mc)) { 1862 xs->error = XS_RESOURCE_SHORTAGE; 1863 scsipi_done(xs); 1864 break; 1865 } 1866 1867 /* Build the command. */ 1868 mc->mc_data = xs->data; 1869 mc->mc_length = xs->datalen; 1870 mc->mc_complete = mly_scsipi_complete; 1871 mc->mc_private = xs; 1872 1873 /* Build the packet for the controller. */ 1874 ss = &mc->mc_packet->scsi_small; 1875 ss->opcode = MDACMD_SCSI; 1876 #ifdef notdef 1877 /* 1878 * XXX FreeBSD does this, but it doesn't fix anything, 1879 * XXX and appears potentially harmful. 1880 */ 1881 ss->command_control |= MLY_CMDCTL_DISABLE_DISCONNECT; 1882 #endif 1883 1884 if ((xs->xs_control & XS_CTL_DATA_OUT) != 0) 1885 mc->mc_flags |= MLY_CCB_DATAOUT; 1886 else if ((xs->xs_control & XS_CTL_DATA_IN) != 0) 1887 mc->mc_flags |= MLY_CCB_DATAIN; 1888 1889 ss->data_size = htole32(xs->datalen); 1890 _lto3l(MLY_PHYADDR(0, chan->chan_channel, 1891 periph->periph_target, periph->periph_lun), ss->addr); 1892 1893 if (xs->timeout < 60 * 1000) 1894 ss->timeout = xs->timeout / 1000 | 1895 MLY_TIMEOUT_SECONDS; 1896 else if (xs->timeout < 60 * 60 * 1000) 1897 ss->timeout = xs->timeout / (60 * 1000) | 1898 MLY_TIMEOUT_MINUTES; 1899 else 1900 ss->timeout = xs->timeout / (60 * 60 * 1000) | 1901 MLY_TIMEOUT_HOURS; 1902 1903 ss->maximum_sense_size = sizeof(xs->sense); 1904 ss->cdb_length = xs->cmdlen; 1905 memcpy(ss->cdb, xs->cmd, xs->cmdlen); 1906 1907 if (mc->mc_length != 0) 1908 if (mly_ccb_map(mly, mc) != 0) { 1909 xs->error = XS_DRIVER_STUFFUP; 1910 mly_ccb_free(mly, mc); 1911 scsipi_done(xs); 1912 break; 1913 } 1914 1915 /* 1916 * Give the command to the controller. 1917 */ 1918 if ((xs->xs_control & XS_CTL_POLL) != 0) { 1919 if (mly_ccb_poll(mly, mc, xs->timeout + 5000)) { 1920 xs->error = XS_REQUEUE; 1921 if (mc->mc_length != 0) 1922 mly_ccb_unmap(mly, mc); 1923 mly_ccb_free(mly, mc); 1924 scsipi_done(xs); 1925 } 1926 } else 1927 mly_ccb_enqueue(mly, mc); 1928 1929 break; 1930 1931 case ADAPTER_REQ_GROW_RESOURCES: 1932 /* 1933 * Not supported. 1934 */ 1935 break; 1936 1937 case ADAPTER_REQ_SET_XFER_MODE: 1938 /* 1939 * We can't change the transfer mode, but at least let 1940 * scsipi know what the adapter has negotiated. 1941 */ 1942 mly_get_xfer_mode(mly, chan->chan_channel, arg); 1943 break; 1944 } 1945 } 1946 1947 /* 1948 * Handle completion of a SCSI command. 1949 */ 1950 static void 1951 mly_scsipi_complete(struct mly_softc *mly, struct mly_ccb *mc) 1952 { 1953 struct scsipi_xfer *xs; 1954 struct scsipi_channel *chan; 1955 struct scsipi_inquiry_data *inq; 1956 struct mly_btl *btl; 1957 int target, sl, s; 1958 const char *p; 1959 1960 xs = mc->mc_private; 1961 xs->status = mc->mc_status; 1962 1963 /* 1964 * XXX The `resid' value as returned by the controller appears to be 1965 * bogus, so we always set it to zero. Is it perhaps the transfer 1966 * count? 1967 */ 1968 xs->resid = 0; /* mc->mc_resid; */ 1969 1970 if (mc->mc_length != 0) 1971 mly_ccb_unmap(mly, mc); 1972 1973 switch (mc->mc_status) { 1974 case SCSI_OK: 1975 /* 1976 * In order to report logical device type and status, we 1977 * overwrite the result of the INQUIRY command to logical 1978 * devices. 1979 */ 1980 if (xs->cmd->opcode == INQUIRY) { 1981 chan = xs->xs_periph->periph_channel; 1982 target = xs->xs_periph->periph_target; 1983 btl = &mly->mly_btl[chan->chan_channel][target]; 1984 1985 s = splbio(); 1986 if ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) { 1987 inq = (struct scsipi_inquiry_data *)xs->data; 1988 mly_padstr(inq->vendor, "MYLEX", 8); 1989 p = mly_describe_code(mly_table_device_type, 1990 btl->mb_type); 1991 mly_padstr(inq->product, p, 16); 1992 p = mly_describe_code(mly_table_device_state, 1993 btl->mb_state); 1994 mly_padstr(inq->revision, p, 4); 1995 } 1996 splx(s); 1997 } 1998 1999 xs->error = XS_NOERROR; 2000 break; 2001 2002 case SCSI_CHECK: 2003 sl = mc->mc_sense; 2004 if (sl > sizeof(xs->sense.scsi_sense)) 2005 sl = sizeof(xs->sense.scsi_sense); 2006 memcpy(&xs->sense.scsi_sense, mc->mc_packet, sl); 2007 xs->error = XS_SENSE; 2008 break; 2009 2010 case SCSI_BUSY: 2011 case SCSI_QUEUE_FULL: 2012 xs->error = XS_BUSY; 2013 break; 2014 2015 default: 2016 printf("%s: unknown SCSI status 0x%x\n", 2017 mly->mly_dv.dv_xname, xs->status); 2018 xs->error = XS_DRIVER_STUFFUP; 2019 break; 2020 } 2021 2022 mly_ccb_free(mly, mc); 2023 scsipi_done(xs); 2024 } 2025 2026 /* 2027 * Notify scsipi about a target's transfer mode. 2028 */ 2029 static void 2030 mly_get_xfer_mode(struct mly_softc *mly, int bus, struct scsipi_xfer_mode *xm) 2031 { 2032 struct mly_btl *btl; 2033 int s; 2034 2035 btl = &mly->mly_btl[bus][xm->xm_target]; 2036 xm->xm_mode = 0; 2037 2038 s = splbio(); 2039 2040 if ((btl->mb_flags & MLY_BTL_PHYSICAL) != 0) { 2041 if (btl->mb_speed == 0) { 2042 xm->xm_period = 0; 2043 xm->xm_offset = 0; 2044 } else { 2045 xm->xm_period = 12; /* XXX */ 2046 xm->xm_offset = 8; /* XXX */ 2047 xm->xm_mode |= PERIPH_CAP_SYNC; /* XXX */ 2048 } 2049 2050 switch (btl->mb_width) { 2051 case 32: 2052 xm->xm_mode = PERIPH_CAP_WIDE32; 2053 break; 2054 case 16: 2055 xm->xm_mode = PERIPH_CAP_WIDE16; 2056 break; 2057 default: 2058 xm->xm_mode = 0; 2059 break; 2060 } 2061 } else /* ((btl->mb_flags & MLY_BTL_LOGICAL) != 0) */ { 2062 xm->xm_mode = PERIPH_CAP_WIDE16 | PERIPH_CAP_SYNC; 2063 xm->xm_period = 12; 2064 xm->xm_offset = 8; 2065 } 2066 2067 if ((btl->mb_flags & MLY_BTL_TQING) != 0) 2068 xm->xm_mode |= PERIPH_CAP_TQING; 2069 2070 splx(s); 2071 2072 scsipi_async_event(&mly->mly_chans[bus], ASYNC_EVENT_XFER_MODE, xm); 2073 } 2074 2075 /* 2076 * ioctl hook; used here only to initiate low-level rescans. 2077 */ 2078 static int 2079 mly_scsipi_ioctl(struct scsipi_channel *chan, u_long cmd, caddr_t data, 2080 int flag, struct proc *p) 2081 { 2082 struct mly_softc *mly; 2083 int rv; 2084 2085 mly = (struct mly_softc *)chan->chan_adapter->adapt_dev; 2086 2087 switch (cmd) { 2088 case SCBUSIOLLSCAN: 2089 mly_scan_channel(mly, chan->chan_channel); 2090 rv = 0; 2091 break; 2092 default: 2093 rv = ENOTTY; 2094 break; 2095 } 2096 2097 return (rv); 2098 } 2099 2100 /* 2101 * Handshake with the firmware while the card is being initialised. 2102 */ 2103 static int 2104 mly_fwhandshake(struct mly_softc *mly) 2105 { 2106 u_int8_t error, param0, param1; 2107 int spinup; 2108 2109 spinup = 0; 2110 2111 /* Set HM_STSACK and let the firmware initialise. */ 2112 mly_outb(mly, mly->mly_idbr, MLY_HM_STSACK); 2113 DELAY(1000); /* too short? */ 2114 2115 /* If HM_STSACK is still true, the controller is initialising. */ 2116 if (!mly_idbr_true(mly, MLY_HM_STSACK)) 2117 return (0); 2118 2119 printf("%s: controller initialisation started\n", 2120 mly->mly_dv.dv_xname); 2121 2122 /* 2123 * Spin waiting for initialisation to finish, or for a message to be 2124 * delivered. 2125 */ 2126 while (mly_idbr_true(mly, MLY_HM_STSACK)) { 2127 /* Check for a message */ 2128 if (!mly_error_valid(mly)) 2129 continue; 2130 2131 error = mly_inb(mly, mly->mly_error_status) & ~MLY_MSG_EMPTY; 2132 param0 = mly_inb(mly, mly->mly_cmd_mailbox); 2133 param1 = mly_inb(mly, mly->mly_cmd_mailbox + 1); 2134 2135 switch (error) { 2136 case MLY_MSG_SPINUP: 2137 if (!spinup) { 2138 printf("%s: drive spinup in progress\n", 2139 mly->mly_dv.dv_xname); 2140 spinup = 1; 2141 } 2142 break; 2143 2144 case MLY_MSG_RACE_RECOVERY_FAIL: 2145 printf("%s: mirror race recovery failed - \n", 2146 mly->mly_dv.dv_xname); 2147 printf("%s: one or more drives offline\n", 2148 mly->mly_dv.dv_xname); 2149 break; 2150 2151 case MLY_MSG_RACE_IN_PROGRESS: 2152 printf("%s: mirror race recovery in progress\n", 2153 mly->mly_dv.dv_xname); 2154 break; 2155 2156 case MLY_MSG_RACE_ON_CRITICAL: 2157 printf("%s: mirror race recovery on critical drive\n", 2158 mly->mly_dv.dv_xname); 2159 break; 2160 2161 case MLY_MSG_PARITY_ERROR: 2162 printf("%s: FATAL MEMORY PARITY ERROR\n", 2163 mly->mly_dv.dv_xname); 2164 return (ENXIO); 2165 2166 default: 2167 printf("%s: unknown initialisation code 0x%x\n", 2168 mly->mly_dv.dv_xname, error); 2169 break; 2170 } 2171 } 2172 2173 return (0); 2174 } 2175 2176 /* 2177 * Space-fill a character string 2178 */ 2179 static void 2180 mly_padstr(char *dst, const char *src, int len) 2181 { 2182 2183 while (len-- > 0) { 2184 if (*src != '\0') 2185 *dst++ = *src++; 2186 else 2187 *dst++ = ' '; 2188 } 2189 } 2190 2191 /* 2192 * Allocate DMA safe memory. 2193 */ 2194 static int 2195 mly_dmamem_alloc(struct mly_softc *mly, int size, bus_dmamap_t *dmamap, 2196 caddr_t *kva, bus_addr_t *paddr, bus_dma_segment_t *seg) 2197 { 2198 int rseg, rv, state; 2199 2200 state = 0; 2201 2202 if ((rv = bus_dmamem_alloc(mly->mly_dmat, size, NBPG, 0, 2203 seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 2204 printf("%s: dmamem_alloc = %d\n", mly->mly_dv.dv_xname, rv); 2205 goto bad; 2206 } 2207 2208 state++; 2209 2210 if ((rv = bus_dmamem_map(mly->mly_dmat, seg, 1, size, kva, 2211 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 2212 printf("%s: dmamem_map = %d\n", mly->mly_dv.dv_xname, rv); 2213 goto bad; 2214 } 2215 2216 state++; 2217 2218 if ((rv = bus_dmamap_create(mly->mly_dmat, size, size, 1, 0, 2219 BUS_DMA_NOWAIT, dmamap)) != 0) { 2220 printf("%s: dmamap_create = %d\n", mly->mly_dv.dv_xname, rv); 2221 goto bad; 2222 } 2223 2224 state++; 2225 2226 if ((rv = bus_dmamap_load(mly->mly_dmat, *dmamap, *kva, size, 2227 NULL, BUS_DMA_NOWAIT)) != 0) { 2228 printf("%s: dmamap_load = %d\n", mly->mly_dv.dv_xname, rv); 2229 goto bad; 2230 } 2231 2232 *paddr = (*dmamap)->dm_segs[0].ds_addr; 2233 memset(*kva, 0, size); 2234 return (0); 2235 2236 bad: 2237 if (state > 2) 2238 bus_dmamap_destroy(mly->mly_dmat, *dmamap); 2239 if (state > 1) 2240 bus_dmamem_unmap(mly->mly_dmat, *kva, size); 2241 if (state > 0) 2242 bus_dmamem_free(mly->mly_dmat, seg, 1); 2243 2244 return (rv); 2245 } 2246 2247 /* 2248 * Free DMA safe memory. 2249 */ 2250 static void 2251 mly_dmamem_free(struct mly_softc *mly, int size, bus_dmamap_t dmamap, 2252 caddr_t kva, bus_dma_segment_t *seg) 2253 { 2254 2255 bus_dmamap_unload(mly->mly_dmat, dmamap); 2256 bus_dmamap_destroy(mly->mly_dmat, dmamap); 2257 bus_dmamem_unmap(mly->mly_dmat, kva, size); 2258 bus_dmamem_free(mly->mly_dmat, seg, 1); 2259 } 2260 2261 2262 /* 2263 * Accept an open operation on the control device. 2264 */ 2265 int 2266 mlyopen(dev_t dev, int flag, int mode, struct proc *p) 2267 { 2268 struct mly_softc *mly; 2269 2270 if ((mly = device_lookup(&mly_cd, minor(dev))) == NULL) 2271 return (ENXIO); 2272 if ((mly->mly_state & MLY_STATE_INITOK) == 0) 2273 return (ENXIO); 2274 if ((mly->mly_state & MLY_STATE_OPEN) != 0) 2275 return (EBUSY); 2276 2277 mly->mly_state |= MLY_STATE_OPEN; 2278 return (0); 2279 } 2280 2281 /* 2282 * Accept the last close on the control device. 2283 */ 2284 int 2285 mlyclose(dev_t dev, int flag, int mode, struct proc *p) 2286 { 2287 struct mly_softc *mly; 2288 2289 mly = device_lookup(&mly_cd, minor(dev)); 2290 mly->mly_state &= ~MLY_STATE_OPEN; 2291 return (0); 2292 } 2293 2294 /* 2295 * Handle control operations. 2296 */ 2297 int 2298 mlyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 2299 { 2300 struct mly_softc *mly; 2301 int rv; 2302 2303 if (securelevel >= 2) 2304 return (EPERM); 2305 2306 mly = device_lookup(&mly_cd, minor(dev)); 2307 2308 switch (cmd) { 2309 case MLYIO_COMMAND: 2310 rv = mly_user_command(mly, (void *)data); 2311 break; 2312 case MLYIO_HEALTH: 2313 rv = mly_user_health(mly, (void *)data); 2314 break; 2315 default: 2316 rv = ENOTTY; 2317 break; 2318 } 2319 2320 return (rv); 2321 } 2322 2323 /* 2324 * Execute a command passed in from userspace. 2325 * 2326 * The control structure contains the actual command for the controller, as 2327 * well as the user-space data pointer and data size, and an optional sense 2328 * buffer size/pointer. On completion, the data size is adjusted to the 2329 * command residual, and the sense buffer size to the size of the returned 2330 * sense data. 2331 */ 2332 static int 2333 mly_user_command(struct mly_softc *mly, struct mly_user_command *uc) 2334 { 2335 struct mly_ccb *mc; 2336 int rv, mapped; 2337 2338 if ((rv = mly_ccb_alloc(mly, &mc)) != 0) 2339 return (rv); 2340 2341 mapped = 0; 2342 mc->mc_data = NULL; 2343 2344 /* 2345 * Handle data size/direction. 2346 */ 2347 if ((mc->mc_length = abs(uc->DataTransferLength)) != 0) { 2348 mc->mc_data = malloc(mc->mc_length, M_DEVBUF, M_WAITOK); 2349 if (mc->mc_data == NULL) { 2350 rv = ENOMEM; 2351 goto out; 2352 } 2353 2354 if (uc->DataTransferLength > 0) { 2355 mc->mc_flags |= MLY_CCB_DATAIN; 2356 memset(mc->mc_data, 0, mc->mc_length); 2357 } 2358 2359 if (uc->DataTransferLength < 0) { 2360 mc->mc_flags |= MLY_CCB_DATAOUT; 2361 rv = copyin(uc->DataTransferBuffer, mc->mc_data, 2362 mc->mc_length); 2363 if (rv != 0) 2364 goto out; 2365 } 2366 2367 if ((rv = mly_ccb_map(mly, mc)) != 0) 2368 goto out; 2369 mapped = 1; 2370 } 2371 2372 /* Copy in the command and execute it. */ 2373 memcpy(mc->mc_packet, &uc->CommandMailbox, sizeof(uc->CommandMailbox)); 2374 2375 if ((rv = mly_ccb_wait(mly, mc, 60000)) != 0) 2376 goto out; 2377 2378 /* Return the data to userspace. */ 2379 if (uc->DataTransferLength > 0) { 2380 rv = copyout(mc->mc_data, uc->DataTransferBuffer, 2381 mc->mc_length); 2382 if (rv != 0) 2383 goto out; 2384 } 2385 2386 /* Return the sense buffer to userspace. */ 2387 if (uc->RequestSenseLength > 0 && mc->mc_sense > 0) { 2388 rv = copyout(mc->mc_packet, uc->RequestSenseBuffer, 2389 min(uc->RequestSenseLength, mc->mc_sense)); 2390 if (rv != 0) 2391 goto out; 2392 } 2393 2394 /* Return command results to userspace (caller will copy out). */ 2395 uc->DataTransferLength = mc->mc_resid; 2396 uc->RequestSenseLength = min(uc->RequestSenseLength, mc->mc_sense); 2397 uc->CommandStatus = mc->mc_status; 2398 rv = 0; 2399 2400 out: 2401 if (mapped) 2402 mly_ccb_unmap(mly, mc); 2403 if (mc->mc_data != NULL) 2404 free(mc->mc_data, M_DEVBUF); 2405 if (mc != NULL) 2406 mly_ccb_free(mly, mc); 2407 2408 return (rv); 2409 } 2410 2411 /* 2412 * Return health status to userspace. If the health change index in the 2413 * user structure does not match that currently exported by the controller, 2414 * we return the current status immediately. Otherwise, we block until 2415 * either interrupted or new status is delivered. 2416 */ 2417 static int 2418 mly_user_health(struct mly_softc *mly, struct mly_user_health *uh) 2419 { 2420 struct mly_health_status mh; 2421 int rv, s; 2422 2423 /* Fetch the current health status from userspace. */ 2424 rv = copyin(uh->HealthStatusBuffer, &mh, sizeof(mh)); 2425 if (rv != 0) 2426 return (rv); 2427 2428 /* spin waiting for a status update */ 2429 s = splbio(); 2430 if (mly->mly_event_change == mh.change_counter) 2431 rv = tsleep(&mly->mly_event_change, PRIBIO | PCATCH, 2432 "mlyhealth", 0); 2433 splx(s); 2434 2435 if (rv == 0) { 2436 /* 2437 * Copy the controller's health status buffer out (there is 2438 * a race here if it changes again). 2439 */ 2440 rv = copyout(&mly->mly_mmbox->mmm_health.status, 2441 uh->HealthStatusBuffer, sizeof(uh->HealthStatusBuffer)); 2442 } 2443 2444 return (rv); 2445 } 2446
Indexes created Mon Sep 22 13:09:51 GMT 2025