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nfsmb.c revision 1.13
      1 /*	$NetBSD: nfsmb.c,v 1.13 2008/05/25 20:51:22 cegger Exp $	*/
      2 /*
      3  * Copyright (c) 2007 KIYOHARA Takashi
      4  * All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     25  * POSSIBILITY OF SUCH DAMAGE.
     26  *
     27  */
     28 #include <sys/cdefs.h>
     29 __KERNEL_RCSID(0, "$NetBSD: nfsmb.c,v 1.13 2008/05/25 20:51:22 cegger Exp $");
     30 
     31 #include <sys/param.h>
     32 #include <sys/device.h>
     33 #include <sys/errno.h>
     34 #include <sys/kernel.h>
     35 #include <sys/rwlock.h>
     36 #include <sys/proc.h>
     37 
     38 #include <sys/bus.h>
     39 
     40 #include <dev/i2c/i2cvar.h>
     41 
     42 #include <dev/pci/pcivar.h>
     43 #include <dev/pci/pcireg.h>
     44 #include <dev/pci/pcidevs.h>
     45 
     46 #include <dev/pci/nfsmbreg.h>
     47 
     48 
     49 struct nfsmbc_attach_args {
     50 	int nfsmb_num;
     51 	bus_space_tag_t nfsmb_iot;
     52 	int nfsmb_addr;
     53 };
     54 
     55 struct nfsmb_softc;
     56 struct nfsmbc_softc {
     57 	device_t sc_dev;
     58 
     59 	pci_chipset_tag_t sc_pc;
     60 	pcitag_t sc_tag;
     61 	struct pci_attach_args *sc_pa;
     62 
     63 	bus_space_tag_t sc_iot;
     64 	struct device *sc_nfsmb[2];
     65 };
     66 
     67 struct nfsmb_softc {
     68 	device_t sc_dev;
     69 	int sc_num;
     70 	struct device *sc_nfsmbc;
     71 
     72 	bus_space_tag_t sc_iot;
     73 	bus_space_handle_t sc_ioh;
     74 
     75 	struct i2c_controller sc_i2c;	/* i2c controller info */
     76 	krwlock_t sc_rwlock;
     77 };
     78 
     79 
     80 static int nfsmbc_match(device_t, struct cfdata *, void *);
     81 static void nfsmbc_attach(device_t, device_t, void *);
     82 static int nfsmbc_print(void *, const char *);
     83 
     84 static int nfsmb_match(device_t, struct cfdata *, void *);
     85 static void nfsmb_attach(device_t, device_t, void *);
     86 static int nfsmb_acquire_bus(void *, int);
     87 static void nfsmb_release_bus(void *, int);
     88 static int nfsmb_exec(
     89     void *, i2c_op_t, i2c_addr_t, const void *, size_t, void *, size_t, int);
     90 static int nfsmb_check_done(struct nfsmb_softc *);
     91 static int
     92     nfsmb_send_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
     93 static int nfsmb_write_1(
     94     struct nfsmb_softc *, uint8_t, uint8_t, i2c_addr_t, i2c_op_t, int);
     95 static int nfsmb_write_2(
     96     struct nfsmb_softc *, uint8_t, uint16_t, i2c_addr_t, i2c_op_t, int);
     97 static int nfsmb_receive_1(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
     98 static int
     99     nfsmb_read_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
    100 static int
    101     nfsmb_read_2(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
    102 
    103 
    104 CFATTACH_DECL_NEW(nfsmbc, sizeof(struct nfsmbc_softc),
    105     nfsmbc_match, nfsmbc_attach, NULL, NULL);
    106 
    107 static int
    108 nfsmbc_match(device_t parent, struct cfdata *match, void *aux)
    109 {
    110 	struct pci_attach_args *pa = aux;
    111 
    112 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
    113 		switch (PCI_PRODUCT(pa->pa_id)) {
    114 		case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
    115 		case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
    116 		case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
    117 		case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
    118 		case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
    119 		case PCI_PRODUCT_NVIDIA_NFORCE430_SMBUS:
    120 		case PCI_PRODUCT_NVIDIA_MCP04_SMBUS:
    121 		case PCI_PRODUCT_NVIDIA_MCP55_SMB:
    122 		case PCI_PRODUCT_NVIDIA_MCP61_SMB:
    123 		case PCI_PRODUCT_NVIDIA_MCP65_SMB:
    124 		case PCI_PRODUCT_NVIDIA_MCP67_SMB:
    125 		case PCI_PRODUCT_NVIDIA_MCP73_SMB:
    126 			return 1;
    127 		}
    128 	}
    129 
    130 	return 0;
    131 }
    132 
    133 static void
    134 nfsmbc_attach(device_t parent, device_t self, void *aux)
    135 {
    136 	struct nfsmbc_softc *sc = device_private(self);
    137 	struct pci_attach_args *pa = aux;
    138 	struct nfsmbc_attach_args nfsmbca;
    139 	pcireg_t reg;
    140 	int baseregs[2];
    141 	char devinfo[256];
    142 
    143 	aprint_naive("\n");
    144 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    145 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
    146 	    PCI_REVISION(pa->pa_class));
    147 
    148 	sc->sc_dev = self;
    149 	sc->sc_pc = pa->pa_pc;
    150 	sc->sc_tag = pa->pa_tag;
    151 	sc->sc_pa = pa;
    152 	sc->sc_iot = pa->pa_iot;
    153 
    154 	nfsmbca.nfsmb_iot = sc->sc_iot;
    155 
    156 	switch (PCI_PRODUCT(pa->pa_id)) {
    157 	case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
    158 	case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
    159 	case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
    160 	case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
    161 	case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
    162 		baseregs[0] = NFORCE_OLD_SMB1;
    163 		baseregs[1] = NFORCE_OLD_SMB2;
    164 		break;
    165 	default:
    166 		baseregs[0] = NFORCE_SMB1;
    167 		baseregs[1] = NFORCE_SMB2;
    168 		break;
    169 	}
    170 
    171 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, baseregs[0]);
    172 	nfsmbca.nfsmb_num = 1;
    173 	nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
    174 	sc->sc_nfsmb[0] = config_found(sc->sc_dev, &nfsmbca, nfsmbc_print);
    175 
    176 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, baseregs[1]);
    177 	nfsmbca.nfsmb_num = 2;
    178 	nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
    179 	sc->sc_nfsmb[1] = config_found(sc->sc_dev, &nfsmbca, nfsmbc_print);
    180 
    181 	if (!pmf_device_register(self, NULL, NULL))
    182 		aprint_error_dev(self, "couldn't establish power handler\n");
    183 }
    184 
    185 static int
    186 nfsmbc_print(void *aux, const char *pnp)
    187 {
    188 	struct nfsmbc_attach_args *nfsmbcap = aux;
    189 
    190 	if (pnp)
    191 		aprint_normal("nfsmb SMBus %d at %s",
    192 		    nfsmbcap->nfsmb_num, pnp);
    193 	else
    194 		aprint_normal(" SMBus %d", nfsmbcap->nfsmb_num);
    195 	return UNCONF;
    196 }
    197 
    198 
    199 CFATTACH_DECL_NEW(nfsmb, sizeof(struct nfsmb_softc),
    200     nfsmb_match, nfsmb_attach, NULL, NULL);
    201 
    202 static int
    203 nfsmb_match(device_t parent, struct cfdata *match, void *aux)
    204 {
    205 	struct nfsmbc_attach_args *nfsmbcap = aux;
    206 
    207 	if (nfsmbcap->nfsmb_num == 1 || nfsmbcap->nfsmb_num == 2)
    208 		return 1;
    209 	return 0;
    210 }
    211 
    212 static void
    213 nfsmb_attach(device_t parent, device_t self, void *aux)
    214 {
    215 	struct nfsmb_softc *sc = device_private(self);
    216 	struct nfsmbc_attach_args *nfsmbcap = aux;
    217 	struct i2cbus_attach_args iba;
    218 
    219 	aprint_naive("\n");
    220 	aprint_normal("\n");
    221 
    222 	sc->sc_dev = self;
    223 	sc->sc_nfsmbc = parent;
    224 	sc->sc_num = nfsmbcap->nfsmb_num;
    225 	sc->sc_iot = nfsmbcap->nfsmb_iot;
    226 
    227 	/* register with iic */
    228 	sc->sc_i2c.ic_cookie = sc;
    229 	sc->sc_i2c.ic_acquire_bus = nfsmb_acquire_bus;
    230 	sc->sc_i2c.ic_release_bus = nfsmb_release_bus;
    231 	sc->sc_i2c.ic_send_start = NULL;
    232 	sc->sc_i2c.ic_send_stop = NULL;
    233 	sc->sc_i2c.ic_initiate_xfer = NULL;
    234 	sc->sc_i2c.ic_read_byte = NULL;
    235 	sc->sc_i2c.ic_write_byte = NULL;
    236 	sc->sc_i2c.ic_exec = nfsmb_exec;
    237 
    238 	rw_init(&sc->sc_rwlock);
    239 
    240 	if (bus_space_map(sc->sc_iot, nfsmbcap->nfsmb_addr, NFORCE_SMBSIZE, 0,
    241 	    &sc->sc_ioh) != 0) {
    242 		aprint_error_dev(self, "failed to map SMBus space\n");
    243 		return;
    244 	}
    245 
    246 	iba.iba_type = I2C_TYPE_SMBUS;
    247 	iba.iba_tag = &sc->sc_i2c;
    248 	(void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
    249 
    250 	if (!pmf_device_register(self, NULL, NULL))
    251 		aprint_error_dev(self, "couldn't establish power handler\n");
    252 }
    253 
    254 static int
    255 nfsmb_acquire_bus(void *cookie, int flags)
    256 {
    257 	struct nfsmb_softc *sc = cookie;
    258 
    259 	rw_enter(&sc->sc_rwlock, RW_WRITER);
    260 	return 0;
    261 }
    262 
    263 static void
    264 nfsmb_release_bus(void *cookie, int flags)
    265 {
    266 	struct nfsmb_softc *sc = cookie;
    267 
    268 	rw_exit(&sc->sc_rwlock);
    269 }
    270 
    271 static int
    272 nfsmb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
    273 	   size_t cmdlen, void *vbuf, size_t buflen, int flags)
    274 {
    275 	struct nfsmb_softc *sc  = (struct nfsmb_softc *)cookie;
    276 	uint8_t *p = vbuf;
    277 	int rv;
    278 
    279 	if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
    280 		rv = nfsmb_receive_1(sc, addr, op, flags);
    281 		if (rv == -1)
    282 			return -1;
    283 		*p = (uint8_t)rv;
    284 		return 0;
    285 	}
    286 
    287 	if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
    288 		rv = nfsmb_read_1(sc, *(const uint8_t*)cmd, addr, op, flags);
    289 		if (rv == -1)
    290 			return -1;
    291 		*p = (uint8_t)rv;
    292 		return 0;
    293 	}
    294 
    295 	if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
    296 		rv = nfsmb_read_2(sc, *(const uint8_t*)cmd, addr, op, flags);
    297 		if (rv == -1)
    298 			return -1;
    299 		*p = (uint8_t)rv;
    300 		return 0;
    301 	}
    302 
    303 	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
    304 		return nfsmb_send_1(sc, *(uint8_t*)vbuf, addr, op, flags);
    305 
    306 	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1))
    307 		return nfsmb_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf,
    308 		    addr, op, flags);
    309 
    310 	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2))
    311 		return nfsmb_write_2(sc,
    312 		    *(const uint8_t*)cmd, *((uint16_t *)vbuf), addr, op, flags);
    313 
    314 	return -1;
    315 }
    316 
    317 static int
    318 nfsmb_check_done(struct nfsmb_softc *sc)
    319 {
    320 	int us;
    321 	uint8_t stat;
    322 
    323 	us = 10 * 1000;	/* XXXX: wait maximum 10 msec */
    324 	do {
    325 		delay(10);
    326 		us -= 10;
    327 		if (us <= 0)
    328 			return -1;
    329 	} while (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
    330 	    NFORCE_SMB_PROTOCOL) != 0);
    331 
    332 	stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
    333 	if ((stat & NFORCE_SMB_STATUS_DONE) &&
    334 	    !(stat & NFORCE_SMB_STATUS_STATUS))
    335 		return 0;
    336 	return -1;
    337 }
    338 
    339 /* ARGSUSED */
    340 static int
    341 nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,
    342 	     int flags)
    343 {
    344 	uint8_t data;
    345 
    346 	/* store cmd */
    347 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);
    348 
    349 	/* write smbus slave address to register */
    350 	data = addr << 1;
    351 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
    352 
    353 	/* write smbus protocol to register */
    354 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
    355 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
    356 
    357 	return nfsmb_check_done(sc);
    358 }
    359 
    360 /* ARGSUSED */
    361 static int
    362 nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,
    363 	      i2c_op_t op, int flags)
    364 {
    365 	uint8_t data;
    366 
    367 	/* store cmd */
    368 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
    369 
    370 	/* store data */
    371 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);
    372 
    373 	/* write smbus slave address to register */
    374 	data = addr << 1;
    375 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
    376 
    377 	/* write smbus protocol to register */
    378 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
    379 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
    380 
    381 	return nfsmb_check_done(sc);
    382 }
    383 
    384 static int
    385 nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,
    386 	      i2c_addr_t addr, i2c_op_t op, int flags)
    387 {
    388 	uint8_t data, low, high;
    389 
    390 	/* store cmd */
    391 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
    392 
    393 	/* store data */
    394 	low = val;
    395 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, low);
    396 	high = val >> 8;
    397 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, high);
    398 
    399 	/* write smbus slave address to register */
    400 	data = addr << 1;
    401 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
    402 
    403 	/* write smbus protocol to register */
    404 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
    405 	if (flags & I2C_F_PEC)
    406 		data |= NFORCE_SMB_PROTOCOL_PEC;
    407 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
    408 
    409 	return nfsmb_check_done(sc);
    410 }
    411 
    412 /* ARGSUSED */
    413 static int
    414 nfsmb_receive_1(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
    415 {
    416 	uint8_t data;
    417 
    418 	/* write smbus slave address to register */
    419 	data = addr << 1;
    420 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
    421 
    422 	/* write smbus protocol to register */
    423 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
    424 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
    425 
    426 	/* check for errors */
    427 	if (nfsmb_check_done(sc) < 0)
    428 		return -1;
    429 
    430 	/* read data */
    431 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
    432 }
    433 
    434 /* ARGSUSED */
    435 static int
    436 nfsmb_read_1(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
    437 	     int flags)
    438 {
    439 	uint8_t data;
    440 
    441 	/* store cmd */
    442 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
    443 
    444 	/* write smbus slave address to register */
    445 	data = addr << 1;
    446 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
    447 
    448 	/* write smbus protocol to register */
    449 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
    450 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
    451 
    452 	/* check for errors */
    453 	if (nfsmb_check_done(sc) < 0)
    454 		return -1;
    455 
    456 	/* read data */
    457 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
    458 }
    459 
    460 static int
    461 nfsmb_read_2(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
    462 	     int flags)
    463 {
    464 	uint8_t data, low, high;
    465 
    466 	/* store cmd */
    467 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
    468 
    469 	/* write smbus slave address to register */
    470 	data = addr << 1;
    471 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
    472 
    473 	/* write smbus protocol to register */
    474 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
    475 	if (flags & I2C_F_PEC)
    476 		data |= NFORCE_SMB_PROTOCOL_PEC;
    477 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
    478 
    479 	/* check for errors */
    480 	if (nfsmb_check_done(sc) < 0)
    481 		return -1;
    482 
    483 	/* read data */
    484 	low = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
    485 	high = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
    486 	return low | high << 8;
    487 }
    488