nfsmb.c revision 1.8 1 /* $NetBSD: nfsmb.c,v 1.8 2007/11/14 12:12:27 xtraeme Exp $ */
2 /*
3 * Copyright (c) 2007 KIYOHARA Takashi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 *
27 */
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: nfsmb.c,v 1.8 2007/11/14 12:12:27 xtraeme Exp $");
30
31 #include <sys/param.h>
32 #include <sys/device.h>
33 #include <sys/errno.h>
34 #include <sys/kernel.h>
35 #include <sys/rwlock.h>
36 #include <sys/proc.h>
37
38 #include <sys/bus.h>
39
40 #include <dev/i2c/i2cvar.h>
41
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcidevs.h>
45
46 #include <dev/pci/nfsmbreg.h>
47
48
49 struct nfsmbc_attach_args {
50 int nfsmb_num;
51 bus_space_tag_t nfsmb_iot;
52 int nfsmb_addr;
53 };
54
55 struct nfsmb_softc;
56 struct nfsmbc_softc {
57 struct device sc_dev;
58
59 pci_chipset_tag_t sc_pc;
60 pcitag_t sc_tag;
61 struct pci_attach_args *sc_pa;
62
63 bus_space_tag_t sc_iot;
64 struct device *sc_nfsmb[2];
65 };
66
67 struct nfsmb_softc {
68 struct device sc_dev;
69 int sc_num;
70 struct device *sc_nfsmbc;
71
72 bus_space_tag_t sc_iot;
73 bus_space_handle_t sc_ioh;
74
75 struct i2c_controller sc_i2c; /* i2c controller info */
76 krwlock_t sc_rwlock;
77 };
78
79
80 static int nfsmbc_match(struct device *, struct cfdata *, void *);
81 static void nfsmbc_attach(struct device *, struct device *, void *);
82 static int nfsmbc_print(void *, const char *);
83
84 static int nfsmb_match(struct device *, struct cfdata *, void *);
85 static void nfsmb_attach(struct device *, struct device *, void *);
86 static int nfsmb_acquire_bus(void *, int);
87 static void nfsmb_release_bus(void *, int);
88 static int nfsmb_exec(
89 void *, i2c_op_t, i2c_addr_t, const void *, size_t, void *, size_t, int);
90 static int nfsmb_check_done(struct nfsmb_softc *);
91 static int
92 nfsmb_send_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
93 static int nfsmb_write_1(
94 struct nfsmb_softc *, uint8_t, uint8_t, i2c_addr_t, i2c_op_t, int);
95 static int nfsmb_write_2(
96 struct nfsmb_softc *, uint8_t, uint16_t, i2c_addr_t, i2c_op_t, int);
97 static int nfsmb_receive_1(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
98 static int
99 nfsmb_read_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
100 static int
101 nfsmb_read_2(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
102
103
104 CFATTACH_DECL(nfsmbc, sizeof(struct nfsmbc_softc),
105 nfsmbc_match, nfsmbc_attach, NULL, NULL);
106
107 static int
108 nfsmbc_match(struct device *parent, struct cfdata *match, void *aux)
109 {
110 struct pci_attach_args *pa = aux;
111
112 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
113 switch (PCI_PRODUCT(pa->pa_id)) {
114 case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
115 case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
116 case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
117 case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
118 case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
119 case PCI_PRODUCT_NVIDIA_NFORCE430_SMBUS:
120 case PCI_PRODUCT_NVIDIA_MCP04_SMBUS:
121 case PCI_PRODUCT_NVIDIA_MCP55_SMB:
122 case PCI_PRODUCT_NVIDIA_MCP61_SMB:
123 case PCI_PRODUCT_NVIDIA_MCP65_SMB:
124 case PCI_PRODUCT_NVIDIA_MCP67_SMB:
125 return 1;
126 }
127 }
128
129 return 0;
130 }
131
132 static void
133 nfsmbc_attach(struct device *parent, struct device *self, void *aux)
134 {
135 struct nfsmbc_softc *sc = (struct nfsmbc_softc *) self;
136 struct pci_attach_args *pa = aux;
137 struct nfsmbc_attach_args nfsmbca;
138 pcireg_t reg;
139 char devinfo[256];
140
141 aprint_naive("\n");
142 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
143 aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
144 PCI_REVISION(pa->pa_class));
145
146 sc->sc_pc = pa->pa_pc;
147 sc->sc_tag = pa->pa_tag;
148 sc->sc_pa = pa;
149 sc->sc_iot = pa->pa_iot;
150
151 nfsmbca.nfsmb_iot = sc->sc_iot;
152
153 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB1);
154 nfsmbca.nfsmb_num = 1;
155 nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
156 sc->sc_nfsmb[0] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
157
158 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB2);
159 nfsmbca.nfsmb_num = 2;
160 nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
161 sc->sc_nfsmb[1] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
162 }
163
164 static int
165 nfsmbc_print(void *aux, const char *pnp)
166 {
167 struct nfsmbc_attach_args *nfsmbcap = aux;
168
169 if (pnp)
170 aprint_normal("nfsmb SMBus %d at %s",
171 nfsmbcap->nfsmb_num, pnp);
172 else
173 aprint_normal(" SMBus %d", nfsmbcap->nfsmb_num);
174 return UNCONF;
175 }
176
177
178 CFATTACH_DECL(nfsmb, sizeof(struct nfsmb_softc),
179 nfsmb_match, nfsmb_attach, NULL, NULL);
180
181 static int
182 nfsmb_match(struct device *parent, struct cfdata *match, void *aux)
183 {
184 struct nfsmbc_attach_args *nfsmbcap = aux;
185
186 if (nfsmbcap->nfsmb_num == 1 || nfsmbcap->nfsmb_num == 2)
187 return 1;
188 return 0;
189 }
190
191 static void
192 nfsmb_attach(struct device *parent, struct device *self, void *aux)
193 {
194 struct nfsmb_softc *sc = (struct nfsmb_softc *) self;
195 struct nfsmbc_attach_args *nfsmbcap = aux;
196 struct i2cbus_attach_args iba;
197
198 aprint_naive("\n");
199 aprint_normal("\n");
200
201 sc->sc_nfsmbc = parent;
202 sc->sc_num = nfsmbcap->nfsmb_num;
203 sc->sc_iot = nfsmbcap->nfsmb_iot;
204
205 /* register with iic */
206 sc->sc_i2c.ic_cookie = sc;
207 sc->sc_i2c.ic_acquire_bus = nfsmb_acquire_bus;
208 sc->sc_i2c.ic_release_bus = nfsmb_release_bus;
209 sc->sc_i2c.ic_send_start = NULL;
210 sc->sc_i2c.ic_send_stop = NULL;
211 sc->sc_i2c.ic_initiate_xfer = NULL;
212 sc->sc_i2c.ic_read_byte = NULL;
213 sc->sc_i2c.ic_write_byte = NULL;
214 sc->sc_i2c.ic_exec = nfsmb_exec;
215
216 rw_init(&sc->sc_rwlock);
217
218 if (bus_space_map(sc->sc_iot, nfsmbcap->nfsmb_addr, NFORCE_SMBSIZE, 0,
219 &sc->sc_ioh) != 0) {
220 aprint_error("%s: failed to map SMBus space\n",
221 sc->sc_dev.dv_xname);
222 return;
223 }
224
225 iba.iba_type = I2C_TYPE_SMBUS;
226 iba.iba_tag = &sc->sc_i2c;
227 (void) config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print);
228 }
229
230 static int
231 nfsmb_acquire_bus(void *cookie, int flags)
232 {
233 struct nfsmb_softc *sc = cookie;
234
235 rw_enter(&sc->sc_rwlock, RW_WRITER);
236 return 0;
237 }
238
239 static void
240 nfsmb_release_bus(void *cookie, int flags)
241 {
242 struct nfsmb_softc *sc = cookie;
243
244 rw_exit(&sc->sc_rwlock);
245 }
246
247 static int
248 nfsmb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
249 size_t cmdlen, void *vbuf, size_t buflen, int flags)
250 {
251 struct nfsmb_softc *sc = (struct nfsmb_softc *)cookie;
252 uint8_t *p = vbuf;
253 int rv;
254
255 if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
256 rv = nfsmb_receive_1(sc, addr, op, flags);
257 if (rv == -1)
258 return -1;
259 *p = (uint8_t)rv;
260 return 0;
261 }
262
263 if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
264 rv = nfsmb_read_1(sc, *(const uint8_t*)cmd, addr, op, flags);
265 if (rv == -1)
266 return -1;
267 *p = (uint8_t)rv;
268 return 0;
269 }
270
271 if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
272 rv = nfsmb_read_2(sc, *(const uint8_t*)cmd, addr, op, flags);
273 if (rv == -1)
274 return -1;
275 *p = (uint8_t)rv;
276 return 0;
277 }
278
279 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
280 return nfsmb_send_1(sc, *(uint8_t*)vbuf, addr, op, flags);
281
282 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1))
283 return nfsmb_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf,
284 addr, op, flags);
285
286 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2))
287 return nfsmb_write_2(sc,
288 *(const uint8_t*)cmd, *((uint16_t *)vbuf), addr, op, flags);
289
290 return -1;
291 }
292
293 static int
294 nfsmb_check_done(struct nfsmb_softc *sc)
295 {
296 int us;
297 uint8_t stat;
298
299 us = 10 * 1000; /* XXXX: wait maximum 10 msec */
300 do {
301 delay(10);
302 us -= 10;
303 if (us <= 0)
304 return -1;
305 } while (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
306 NFORCE_SMB_PROTOCOL) != 0);
307
308 stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
309 if ((stat & NFORCE_SMB_STATUS_DONE) &&
310 !(stat & NFORCE_SMB_STATUS_STATUS))
311 return 0;
312 return -1;
313 }
314
315 /* ARGSUSED */
316 static int
317 nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,
318 int flags)
319 {
320 uint8_t data;
321
322 /* store cmd */
323 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);
324
325 /* write smbus slave address to register */
326 data = addr << 1;
327 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
328
329 /* write smbus protocol to register */
330 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
331 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
332
333 return nfsmb_check_done(sc);
334 }
335
336 /* ARGSUSED */
337 static int
338 nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,
339 i2c_op_t op, int flags)
340 {
341 uint8_t data;
342
343 /* store cmd */
344 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
345
346 /* store data */
347 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);
348
349 /* write smbus slave address to register */
350 data = addr << 1;
351 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
352
353 /* write smbus protocol to register */
354 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
355 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
356
357 return nfsmb_check_done(sc);
358 }
359
360 static int
361 nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,
362 i2c_addr_t addr, i2c_op_t op, int flags)
363 {
364 uint8_t data, low, high;
365
366 /* store cmd */
367 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
368
369 /* store data */
370 low = val;
371 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, low);
372 high = val >> 8;
373 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, high);
374
375 /* write smbus slave address to register */
376 data = addr << 1;
377 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
378
379 /* write smbus protocol to register */
380 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
381 if (flags & I2C_F_PEC)
382 data |= NFORCE_SMB_PROTOCOL_PEC;
383 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
384
385 return nfsmb_check_done(sc);
386 }
387
388 /* ARGSUSED */
389 static int
390 nfsmb_receive_1(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
391 {
392 uint8_t data;
393
394 /* write smbus slave address to register */
395 data = addr << 1;
396 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
397
398 /* write smbus protocol to register */
399 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
400 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
401
402 /* check for errors */
403 if (nfsmb_check_done(sc) < 0)
404 return -1;
405
406 /* read data */
407 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
408 }
409
410 /* ARGSUSED */
411 static int
412 nfsmb_read_1(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
413 int flags)
414 {
415 uint8_t data;
416
417 /* store cmd */
418 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
419
420 /* write smbus slave address to register */
421 data = addr << 1;
422 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
423
424 /* write smbus protocol to register */
425 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
426 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
427
428 /* check for errors */
429 if (nfsmb_check_done(sc) < 0)
430 return -1;
431
432 /* read data */
433 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
434 }
435
436 static int
437 nfsmb_read_2(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
438 int flags)
439 {
440 uint8_t data, low, high;
441
442 /* store cmd */
443 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
444
445 /* write smbus slave address to register */
446 data = addr << 1;
447 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
448
449 /* write smbus protocol to register */
450 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
451 if (flags & I2C_F_PEC)
452 data |= NFORCE_SMB_PROTOCOL_PEC;
453 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
454
455 /* check for errors */
456 if (nfsmb_check_done(sc) < 0)
457 return -1;
458
459 /* read data */
460 low = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
461 high = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
462 return low | high << 8;
463 }
464