nfsmb.c revision 1.9 1 /* $NetBSD: nfsmb.c,v 1.9 2007/11/14 12:42:20 xtraeme Exp $ */
2 /*
3 * Copyright (c) 2007 KIYOHARA Takashi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 *
27 */
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: nfsmb.c,v 1.9 2007/11/14 12:42:20 xtraeme Exp $");
30
31 #include <sys/param.h>
32 #include <sys/device.h>
33 #include <sys/errno.h>
34 #include <sys/kernel.h>
35 #include <sys/rwlock.h>
36 #include <sys/proc.h>
37
38 #include <sys/bus.h>
39
40 #include <dev/i2c/i2cvar.h>
41
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcidevs.h>
45
46 #include <dev/pci/nfsmbreg.h>
47
48
49 struct nfsmbc_attach_args {
50 int nfsmb_num;
51 bus_space_tag_t nfsmb_iot;
52 int nfsmb_addr;
53 };
54
55 struct nfsmb_softc;
56 struct nfsmbc_softc {
57 struct device sc_dev;
58
59 pci_chipset_tag_t sc_pc;
60 pcitag_t sc_tag;
61 struct pci_attach_args *sc_pa;
62
63 bus_space_tag_t sc_iot;
64 struct device *sc_nfsmb[2];
65 };
66
67 struct nfsmb_softc {
68 struct device sc_dev;
69 int sc_num;
70 struct device *sc_nfsmbc;
71
72 bus_space_tag_t sc_iot;
73 bus_space_handle_t sc_ioh;
74
75 struct i2c_controller sc_i2c; /* i2c controller info */
76 krwlock_t sc_rwlock;
77 };
78
79
80 static int nfsmbc_match(struct device *, struct cfdata *, void *);
81 static void nfsmbc_attach(struct device *, struct device *, void *);
82 static int nfsmbc_print(void *, const char *);
83
84 static int nfsmb_match(struct device *, struct cfdata *, void *);
85 static void nfsmb_attach(struct device *, struct device *, void *);
86 static int nfsmb_acquire_bus(void *, int);
87 static void nfsmb_release_bus(void *, int);
88 static int nfsmb_exec(
89 void *, i2c_op_t, i2c_addr_t, const void *, size_t, void *, size_t, int);
90 static int nfsmb_check_done(struct nfsmb_softc *);
91 static int
92 nfsmb_send_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
93 static int nfsmb_write_1(
94 struct nfsmb_softc *, uint8_t, uint8_t, i2c_addr_t, i2c_op_t, int);
95 static int nfsmb_write_2(
96 struct nfsmb_softc *, uint8_t, uint16_t, i2c_addr_t, i2c_op_t, int);
97 static int nfsmb_receive_1(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
98 static int
99 nfsmb_read_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
100 static int
101 nfsmb_read_2(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
102
103
104 CFATTACH_DECL(nfsmbc, sizeof(struct nfsmbc_softc),
105 nfsmbc_match, nfsmbc_attach, NULL, NULL);
106
107 static int
108 nfsmbc_match(struct device *parent, struct cfdata *match, void *aux)
109 {
110 struct pci_attach_args *pa = aux;
111
112 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
113 switch (PCI_PRODUCT(pa->pa_id)) {
114 case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
115 case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
116 case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
117 case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
118 case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
119 case PCI_PRODUCT_NVIDIA_NFORCE430_SMBUS:
120 case PCI_PRODUCT_NVIDIA_MCP04_SMBUS:
121 case PCI_PRODUCT_NVIDIA_MCP55_SMB:
122 case PCI_PRODUCT_NVIDIA_MCP61_SMB:
123 case PCI_PRODUCT_NVIDIA_MCP65_SMB:
124 case PCI_PRODUCT_NVIDIA_MCP67_SMB:
125 case PCI_PRODUCT_NVIDIA_MCP73_SMB:
126 return 1;
127 }
128 }
129
130 return 0;
131 }
132
133 static void
134 nfsmbc_attach(struct device *parent, struct device *self, void *aux)
135 {
136 struct nfsmbc_softc *sc = (struct nfsmbc_softc *) self;
137 struct pci_attach_args *pa = aux;
138 struct nfsmbc_attach_args nfsmbca;
139 pcireg_t reg;
140 char devinfo[256];
141
142 aprint_naive("\n");
143 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
144 aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
145 PCI_REVISION(pa->pa_class));
146
147 sc->sc_pc = pa->pa_pc;
148 sc->sc_tag = pa->pa_tag;
149 sc->sc_pa = pa;
150 sc->sc_iot = pa->pa_iot;
151
152 nfsmbca.nfsmb_iot = sc->sc_iot;
153
154 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB1);
155 nfsmbca.nfsmb_num = 1;
156 nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
157 sc->sc_nfsmb[0] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
158
159 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFORCE_SMB2);
160 nfsmbca.nfsmb_num = 2;
161 nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
162 sc->sc_nfsmb[1] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
163 }
164
165 static int
166 nfsmbc_print(void *aux, const char *pnp)
167 {
168 struct nfsmbc_attach_args *nfsmbcap = aux;
169
170 if (pnp)
171 aprint_normal("nfsmb SMBus %d at %s",
172 nfsmbcap->nfsmb_num, pnp);
173 else
174 aprint_normal(" SMBus %d", nfsmbcap->nfsmb_num);
175 return UNCONF;
176 }
177
178
179 CFATTACH_DECL(nfsmb, sizeof(struct nfsmb_softc),
180 nfsmb_match, nfsmb_attach, NULL, NULL);
181
182 static int
183 nfsmb_match(struct device *parent, struct cfdata *match, void *aux)
184 {
185 struct nfsmbc_attach_args *nfsmbcap = aux;
186
187 if (nfsmbcap->nfsmb_num == 1 || nfsmbcap->nfsmb_num == 2)
188 return 1;
189 return 0;
190 }
191
192 static void
193 nfsmb_attach(struct device *parent, struct device *self, void *aux)
194 {
195 struct nfsmb_softc *sc = (struct nfsmb_softc *) self;
196 struct nfsmbc_attach_args *nfsmbcap = aux;
197 struct i2cbus_attach_args iba;
198
199 aprint_naive("\n");
200 aprint_normal("\n");
201
202 sc->sc_nfsmbc = parent;
203 sc->sc_num = nfsmbcap->nfsmb_num;
204 sc->sc_iot = nfsmbcap->nfsmb_iot;
205
206 /* register with iic */
207 sc->sc_i2c.ic_cookie = sc;
208 sc->sc_i2c.ic_acquire_bus = nfsmb_acquire_bus;
209 sc->sc_i2c.ic_release_bus = nfsmb_release_bus;
210 sc->sc_i2c.ic_send_start = NULL;
211 sc->sc_i2c.ic_send_stop = NULL;
212 sc->sc_i2c.ic_initiate_xfer = NULL;
213 sc->sc_i2c.ic_read_byte = NULL;
214 sc->sc_i2c.ic_write_byte = NULL;
215 sc->sc_i2c.ic_exec = nfsmb_exec;
216
217 rw_init(&sc->sc_rwlock);
218
219 if (bus_space_map(sc->sc_iot, nfsmbcap->nfsmb_addr, NFORCE_SMBSIZE, 0,
220 &sc->sc_ioh) != 0) {
221 aprint_error("%s: failed to map SMBus space\n",
222 sc->sc_dev.dv_xname);
223 return;
224 }
225
226 iba.iba_type = I2C_TYPE_SMBUS;
227 iba.iba_tag = &sc->sc_i2c;
228 (void) config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print);
229 }
230
231 static int
232 nfsmb_acquire_bus(void *cookie, int flags)
233 {
234 struct nfsmb_softc *sc = cookie;
235
236 rw_enter(&sc->sc_rwlock, RW_WRITER);
237 return 0;
238 }
239
240 static void
241 nfsmb_release_bus(void *cookie, int flags)
242 {
243 struct nfsmb_softc *sc = cookie;
244
245 rw_exit(&sc->sc_rwlock);
246 }
247
248 static int
249 nfsmb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
250 size_t cmdlen, void *vbuf, size_t buflen, int flags)
251 {
252 struct nfsmb_softc *sc = (struct nfsmb_softc *)cookie;
253 uint8_t *p = vbuf;
254 int rv;
255
256 if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
257 rv = nfsmb_receive_1(sc, addr, op, flags);
258 if (rv == -1)
259 return -1;
260 *p = (uint8_t)rv;
261 return 0;
262 }
263
264 if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
265 rv = nfsmb_read_1(sc, *(const uint8_t*)cmd, addr, op, flags);
266 if (rv == -1)
267 return -1;
268 *p = (uint8_t)rv;
269 return 0;
270 }
271
272 if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
273 rv = nfsmb_read_2(sc, *(const uint8_t*)cmd, addr, op, flags);
274 if (rv == -1)
275 return -1;
276 *p = (uint8_t)rv;
277 return 0;
278 }
279
280 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
281 return nfsmb_send_1(sc, *(uint8_t*)vbuf, addr, op, flags);
282
283 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1))
284 return nfsmb_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf,
285 addr, op, flags);
286
287 if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2))
288 return nfsmb_write_2(sc,
289 *(const uint8_t*)cmd, *((uint16_t *)vbuf), addr, op, flags);
290
291 return -1;
292 }
293
294 static int
295 nfsmb_check_done(struct nfsmb_softc *sc)
296 {
297 int us;
298 uint8_t stat;
299
300 us = 10 * 1000; /* XXXX: wait maximum 10 msec */
301 do {
302 delay(10);
303 us -= 10;
304 if (us <= 0)
305 return -1;
306 } while (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
307 NFORCE_SMB_PROTOCOL) != 0);
308
309 stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
310 if ((stat & NFORCE_SMB_STATUS_DONE) &&
311 !(stat & NFORCE_SMB_STATUS_STATUS))
312 return 0;
313 return -1;
314 }
315
316 /* ARGSUSED */
317 static int
318 nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,
319 int flags)
320 {
321 uint8_t data;
322
323 /* store cmd */
324 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);
325
326 /* write smbus slave address to register */
327 data = addr << 1;
328 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
329
330 /* write smbus protocol to register */
331 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
332 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
333
334 return nfsmb_check_done(sc);
335 }
336
337 /* ARGSUSED */
338 static int
339 nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,
340 i2c_op_t op, int flags)
341 {
342 uint8_t data;
343
344 /* store cmd */
345 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
346
347 /* store data */
348 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);
349
350 /* write smbus slave address to register */
351 data = addr << 1;
352 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
353
354 /* write smbus protocol to register */
355 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
356 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
357
358 return nfsmb_check_done(sc);
359 }
360
361 static int
362 nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,
363 i2c_addr_t addr, i2c_op_t op, int flags)
364 {
365 uint8_t data, low, high;
366
367 /* store cmd */
368 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
369
370 /* store data */
371 low = val;
372 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, low);
373 high = val >> 8;
374 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, high);
375
376 /* write smbus slave address to register */
377 data = addr << 1;
378 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
379
380 /* write smbus protocol to register */
381 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
382 if (flags & I2C_F_PEC)
383 data |= NFORCE_SMB_PROTOCOL_PEC;
384 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
385
386 return nfsmb_check_done(sc);
387 }
388
389 /* ARGSUSED */
390 static int
391 nfsmb_receive_1(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
392 {
393 uint8_t data;
394
395 /* write smbus slave address to register */
396 data = addr << 1;
397 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
398
399 /* write smbus protocol to register */
400 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
401 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
402
403 /* check for errors */
404 if (nfsmb_check_done(sc) < 0)
405 return -1;
406
407 /* read data */
408 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
409 }
410
411 /* ARGSUSED */
412 static int
413 nfsmb_read_1(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
414 int flags)
415 {
416 uint8_t data;
417
418 /* store cmd */
419 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
420
421 /* write smbus slave address to register */
422 data = addr << 1;
423 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
424
425 /* write smbus protocol to register */
426 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
427 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
428
429 /* check for errors */
430 if (nfsmb_check_done(sc) < 0)
431 return -1;
432
433 /* read data */
434 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
435 }
436
437 static int
438 nfsmb_read_2(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
439 int flags)
440 {
441 uint8_t data, low, high;
442
443 /* store cmd */
444 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
445
446 /* write smbus slave address to register */
447 data = addr << 1;
448 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
449
450 /* write smbus protocol to register */
451 data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
452 if (flags & I2C_F_PEC)
453 data |= NFORCE_SMB_PROTOCOL_PEC;
454 bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
455
456 /* check for errors */
457 if (nfsmb_check_done(sc) < 0)
458 return -1;
459
460 /* read data */
461 low = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
462 high = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
463 return low | high << 8;
464 }
465