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pccbb.c revision 1.182.2.1
      1  1.182.2.1       jym /*	$NetBSD: pccbb.c,v 1.182.2.1 2009/05/13 17:20:27 jym Exp $	*/
      2        1.2      haya 
      3        1.1      haya /*
      4       1.21      haya  * Copyright (c) 1998, 1999 and 2000
      5       1.21      haya  *      HAYAKAWA Koichi.  All rights reserved.
      6        1.1      haya  *
      7        1.1      haya  * Redistribution and use in source and binary forms, with or without
      8        1.1      haya  * modification, are permitted provided that the following conditions
      9        1.1      haya  * are met:
     10        1.1      haya  * 1. Redistributions of source code must retain the above copyright
     11        1.1      haya  *    notice, this list of conditions and the following disclaimer.
     12        1.1      haya  * 2. Redistributions in binary form must reproduce the above copyright
     13        1.1      haya  *    notice, this list of conditions and the following disclaimer in the
     14        1.1      haya  *    documentation and/or other materials provided with the distribution.
     15        1.1      haya  * 3. All advertising materials mentioning features or use of this software
     16        1.1      haya  *    must display the following acknowledgement:
     17        1.1      haya  *	This product includes software developed by HAYAKAWA Koichi.
     18        1.1      haya  * 4. The name of the author may not be used to endorse or promote products
     19        1.1      haya  *    derived from this software without specific prior written permission.
     20        1.1      haya  *
     21        1.1      haya  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22        1.1      haya  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23        1.1      haya  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24        1.1      haya  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25        1.1      haya  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26        1.1      haya  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27        1.1      haya  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28        1.1      haya  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29        1.1      haya  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30        1.1      haya  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31        1.1      haya  */
     32       1.71     lukem 
     33       1.71     lukem #include <sys/cdefs.h>
     34  1.182.2.1       jym __KERNEL_RCSID(0, "$NetBSD: pccbb.c,v 1.182.2.1 2009/05/13 17:20:27 jym Exp $");
     35        1.1      haya 
     36        1.1      haya /*
     37        1.1      haya #define CBB_DEBUG
     38        1.1      haya #define SHOW_REGS
     39        1.1      haya */
     40        1.1      haya 
     41        1.1      haya #include <sys/param.h>
     42        1.1      haya #include <sys/systm.h>
     43        1.1      haya #include <sys/kernel.h>
     44        1.1      haya #include <sys/errno.h>
     45        1.1      haya #include <sys/ioctl.h>
     46       1.54  augustss #include <sys/reboot.h>		/* for bootverbose */
     47        1.1      haya #include <sys/syslog.h>
     48        1.1      haya #include <sys/device.h>
     49        1.1      haya #include <sys/malloc.h>
     50       1.55      haya #include <sys/proc.h>
     51        1.1      haya 
     52      1.148        ad #include <sys/intr.h>
     53      1.148        ad #include <sys/bus.h>
     54        1.1      haya 
     55        1.1      haya #include <dev/pci/pcivar.h>
     56        1.1      haya #include <dev/pci/pcireg.h>
     57        1.1      haya #include <dev/pci/pcidevs.h>
     58        1.1      haya 
     59        1.1      haya #include <dev/pci/pccbbreg.h>
     60        1.1      haya 
     61        1.1      haya #include <dev/cardbus/cardslotvar.h>
     62        1.1      haya 
     63        1.1      haya #include <dev/cardbus/cardbusvar.h>
     64        1.1      haya 
     65        1.1      haya #include <dev/pcmcia/pcmciareg.h>
     66        1.1      haya #include <dev/pcmcia/pcmciavar.h>
     67        1.1      haya 
     68        1.1      haya #include <dev/ic/i82365reg.h>
     69        1.1      haya #include <dev/pci/pccbbvar.h>
     70        1.1      haya 
     71        1.1      haya #ifndef __NetBSD_Version__
     72        1.1      haya struct cfdriver cbb_cd = {
     73       1.22    chopps 	NULL, "cbb", DV_DULL
     74        1.1      haya };
     75        1.1      haya #endif
     76        1.1      haya 
     77       1.73  christos #ifdef CBB_DEBUG
     78        1.1      haya #define DPRINTF(x) printf x
     79        1.1      haya #define STATIC
     80        1.1      haya #else
     81        1.1      haya #define DPRINTF(x)
     82        1.1      haya #define STATIC static
     83        1.1      haya #endif
     84        1.1      haya 
     85      1.151    dyoung int pccbb_burstup = 1;
     86      1.151    dyoung 
     87       1.55      haya /*
     88      1.142    dyoung  * delay_ms() is wait in milliseconds.  It should be used instead
     89      1.140    dyoung  * of delay() if you want to wait more than 1 ms.
     90       1.55      haya  */
     91      1.142    dyoung static inline void
     92      1.142    dyoung delay_ms(int millis, void *param)
     93      1.142    dyoung {
     94      1.142    dyoung 	if (cold)
     95      1.142    dyoung 		delay(millis * 1000);
     96      1.142    dyoung 	else
     97      1.142    dyoung 		tsleep(param, PWAIT, "pccbb", MAX(2, hz * millis / 1000));
     98      1.142    dyoung }
     99       1.55      haya 
    100  1.182.2.1       jym int pcicbbmatch(device_t, cfdata_t, void *);
    101      1.162    dyoung void pccbbattach(device_t, device_t, void *);
    102      1.158    dyoung int pccbbdetach(device_t, int);
    103      1.116     perry int pccbbintr(void *);
    104      1.116     perry static void pci113x_insert(void *);
    105      1.116     perry static int pccbbintr_function(struct pccbb_softc *);
    106        1.1      haya 
    107      1.116     perry static int pccbb_detect_card(struct pccbb_softc *);
    108        1.1      haya 
    109      1.173  drochner static void pccbb_pcmcia_write(struct pccbb_softc *, int, u_int8_t);
    110      1.173  drochner static u_int8_t pccbb_pcmcia_read(struct pccbb_softc *, int);
    111      1.177  drochner #define Pcic_read(sc, reg) pccbb_pcmcia_read((sc), (reg))
    112      1.177  drochner #define Pcic_write(sc, reg, val) pccbb_pcmcia_write((sc), (reg), (val))
    113        1.1      haya 
    114      1.116     perry STATIC int cb_reset(struct pccbb_softc *);
    115      1.116     perry STATIC int cb_detect_voltage(struct pccbb_softc *);
    116      1.116     perry STATIC int cbbprint(void *, const char *);
    117      1.116     perry 
    118      1.116     perry static int cb_chipset(u_int32_t, int *);
    119      1.116     perry STATIC void pccbb_pcmcia_attach_setup(struct pccbb_softc *,
    120      1.116     perry     struct pcmciabus_attach_args *);
    121        1.1      haya 
    122      1.116     perry STATIC int pccbb_ctrl(cardbus_chipset_tag_t, int);
    123      1.160    dyoung STATIC int pccbb_power(struct pccbb_softc *sc, int);
    124      1.160    dyoung STATIC int pccbb_power_ct(cardbus_chipset_tag_t, int);
    125      1.116     perry STATIC int pccbb_cardenable(struct pccbb_softc * sc, int function);
    126        1.1      haya #if !rbus
    127      1.116     perry static int pccbb_io_open(cardbus_chipset_tag_t, int, u_int32_t, u_int32_t);
    128      1.116     perry static int pccbb_io_close(cardbus_chipset_tag_t, int);
    129      1.116     perry static int pccbb_mem_open(cardbus_chipset_tag_t, int, u_int32_t, u_int32_t);
    130      1.116     perry static int pccbb_mem_close(cardbus_chipset_tag_t, int);
    131        1.1      haya #endif /* !rbus */
    132      1.171  drochner static void *pccbb_intr_establish(struct pccbb_softc *,
    133      1.171  drochner     cardbus_intr_line_t irq, int level, int (*ih) (void *), void *sc);
    134      1.116     perry static void pccbb_intr_disestablish(struct pccbb_softc *, void *ih);
    135      1.116     perry 
    136      1.171  drochner static void *pccbb_cb_intr_establish(cardbus_chipset_tag_t,
    137      1.171  drochner     cardbus_intr_line_t irq, int level, int (*ih) (void *), void *sc);
    138      1.116     perry static void pccbb_cb_intr_disestablish(cardbus_chipset_tag_t ct, void *ih);
    139      1.116     perry 
    140      1.125  drochner static cardbustag_t pccbb_make_tag(cardbus_chipset_tag_t, int, int);
    141      1.116     perry static void pccbb_free_tag(cardbus_chipset_tag_t, cardbustag_t);
    142      1.116     perry static cardbusreg_t pccbb_conf_read(cardbus_chipset_tag_t, cardbustag_t, int);
    143      1.116     perry static void pccbb_conf_write(cardbus_chipset_tag_t, cardbustag_t, int,
    144      1.116     perry     cardbusreg_t);
    145      1.116     perry static void pccbb_chipinit(struct pccbb_softc *);
    146      1.165    dyoung static void pccbb_intrinit(struct pccbb_softc *);
    147      1.116     perry 
    148      1.116     perry STATIC int pccbb_pcmcia_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
    149      1.116     perry     struct pcmcia_mem_handle *);
    150      1.116     perry STATIC void pccbb_pcmcia_mem_free(pcmcia_chipset_handle_t,
    151      1.116     perry     struct pcmcia_mem_handle *);
    152      1.116     perry STATIC int pccbb_pcmcia_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t,
    153  1.182.2.1       jym     bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *);
    154      1.116     perry STATIC void pccbb_pcmcia_mem_unmap(pcmcia_chipset_handle_t, int);
    155      1.116     perry STATIC int pccbb_pcmcia_io_alloc(pcmcia_chipset_handle_t, bus_addr_t,
    156      1.116     perry     bus_size_t, bus_size_t, struct pcmcia_io_handle *);
    157      1.116     perry STATIC void pccbb_pcmcia_io_free(pcmcia_chipset_handle_t,
    158      1.116     perry     struct pcmcia_io_handle *);
    159      1.116     perry STATIC int pccbb_pcmcia_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
    160      1.116     perry     bus_size_t, struct pcmcia_io_handle *, int *);
    161      1.116     perry STATIC void pccbb_pcmcia_io_unmap(pcmcia_chipset_handle_t, int);
    162      1.116     perry STATIC void *pccbb_pcmcia_intr_establish(pcmcia_chipset_handle_t,
    163      1.116     perry     struct pcmcia_function *, int, int (*)(void *), void *);
    164      1.116     perry STATIC void pccbb_pcmcia_intr_disestablish(pcmcia_chipset_handle_t, void *);
    165      1.116     perry STATIC void pccbb_pcmcia_socket_enable(pcmcia_chipset_handle_t);
    166      1.116     perry STATIC void pccbb_pcmcia_socket_disable(pcmcia_chipset_handle_t);
    167      1.116     perry STATIC void pccbb_pcmcia_socket_settype(pcmcia_chipset_handle_t, int);
    168      1.116     perry STATIC int pccbb_pcmcia_card_detect(pcmcia_chipset_handle_t pch);
    169      1.116     perry 
    170      1.176  drochner static int pccbb_pcmcia_wait_ready(struct pccbb_softc *);
    171      1.176  drochner static void pccbb_pcmcia_delay(struct pccbb_softc *, int, const char *);
    172      1.116     perry 
    173      1.176  drochner static void pccbb_pcmcia_do_io_map(struct pccbb_softc *, int);
    174      1.176  drochner static void pccbb_pcmcia_do_mem_map(struct pccbb_softc *, int);
    175        1.1      haya 
    176       1.32     enami /* bus-space allocation and deallocation functions */
    177        1.1      haya #if rbus
    178        1.1      haya 
    179      1.116     perry static int pccbb_rbus_cb_space_alloc(cardbus_chipset_tag_t, rbus_tag_t,
    180       1.22    chopps     bus_addr_t addr, bus_size_t size, bus_addr_t mask, bus_size_t align,
    181      1.116     perry     int flags, bus_addr_t * addrp, bus_space_handle_t * bshp);
    182      1.116     perry static int pccbb_rbus_cb_space_free(cardbus_chipset_tag_t, rbus_tag_t,
    183      1.116     perry     bus_space_handle_t, bus_size_t);
    184        1.1      haya 
    185        1.1      haya #endif /* rbus */
    186        1.1      haya 
    187        1.1      haya #if rbus
    188        1.1      haya 
    189      1.116     perry static int pccbb_open_win(struct pccbb_softc *, bus_space_tag_t,
    190      1.116     perry     bus_addr_t, bus_size_t, bus_space_handle_t, int flags);
    191      1.116     perry static int pccbb_close_win(struct pccbb_softc *, bus_space_tag_t,
    192      1.116     perry     bus_space_handle_t, bus_size_t);
    193      1.116     perry static int pccbb_winlist_insert(struct pccbb_win_chain_head *, bus_addr_t,
    194      1.116     perry     bus_size_t, bus_space_handle_t, int);
    195      1.116     perry static int pccbb_winlist_delete(struct pccbb_win_chain_head *,
    196      1.116     perry     bus_space_handle_t, bus_size_t);
    197      1.116     perry static void pccbb_winset(bus_addr_t align, struct pccbb_softc *,
    198      1.116     perry     bus_space_tag_t);
    199        1.1      haya void pccbb_winlist_show(struct pccbb_win_chain *);
    200        1.1      haya 
    201        1.1      haya #endif /* rbus */
    202        1.1      haya 
    203        1.1      haya /* for config_defer */
    204      1.162    dyoung static void pccbb_pci_callback(device_t);
    205        1.1      haya 
    206      1.166    dyoung static bool pccbb_suspend(device_t PMF_FN_PROTO);
    207      1.166    dyoung static bool pccbb_resume(device_t PMF_FN_PROTO);
    208      1.156  jmcneill 
    209        1.1      haya #if defined SHOW_REGS
    210      1.116     perry static void cb_show_regs(pci_chipset_tag_t pc, pcitag_t tag,
    211      1.116     perry     bus_space_tag_t memt, bus_space_handle_t memh);
    212        1.1      haya #endif
    213        1.1      haya 
    214  1.182.2.1       jym CFATTACH_DECL3_NEW(cbb_pci, sizeof(struct pccbb_softc),
    215  1.182.2.1       jym     pcicbbmatch, pccbbattach, pccbbdetach, NULL, NULL, NULL,
    216  1.182.2.1       jym     DVF_DETACH_SHUTDOWN);
    217        1.1      haya 
    218      1.174  drochner static const struct pcmcia_chip_functions pccbb_pcmcia_funcs = {
    219       1.22    chopps 	pccbb_pcmcia_mem_alloc,
    220       1.22    chopps 	pccbb_pcmcia_mem_free,
    221       1.22    chopps 	pccbb_pcmcia_mem_map,
    222       1.22    chopps 	pccbb_pcmcia_mem_unmap,
    223       1.22    chopps 	pccbb_pcmcia_io_alloc,
    224       1.22    chopps 	pccbb_pcmcia_io_free,
    225       1.22    chopps 	pccbb_pcmcia_io_map,
    226       1.22    chopps 	pccbb_pcmcia_io_unmap,
    227       1.22    chopps 	pccbb_pcmcia_intr_establish,
    228       1.22    chopps 	pccbb_pcmcia_intr_disestablish,
    229       1.22    chopps 	pccbb_pcmcia_socket_enable,
    230       1.22    chopps 	pccbb_pcmcia_socket_disable,
    231      1.101   mycroft 	pccbb_pcmcia_socket_settype,
    232       1.22    chopps 	pccbb_pcmcia_card_detect
    233        1.1      haya };
    234        1.1      haya 
    235        1.1      haya #if rbus
    236      1.174  drochner static const struct cardbus_functions pccbb_funcs = {
    237       1.22    chopps 	pccbb_rbus_cb_space_alloc,
    238       1.22    chopps 	pccbb_rbus_cb_space_free,
    239       1.26      haya 	pccbb_cb_intr_establish,
    240       1.26      haya 	pccbb_cb_intr_disestablish,
    241       1.22    chopps 	pccbb_ctrl,
    242      1.160    dyoung 	pccbb_power_ct,
    243       1.22    chopps 	pccbb_make_tag,
    244       1.22    chopps 	pccbb_free_tag,
    245       1.22    chopps 	pccbb_conf_read,
    246       1.22    chopps 	pccbb_conf_write,
    247        1.1      haya };
    248        1.1      haya #else
    249      1.174  drochner static const struct cardbus_functions pccbb_funcs = {
    250       1.22    chopps 	pccbb_ctrl,
    251      1.160    dyoung 	pccbb_power_ct,
    252       1.22    chopps 	pccbb_mem_open,
    253       1.22    chopps 	pccbb_mem_close,
    254       1.22    chopps 	pccbb_io_open,
    255       1.22    chopps 	pccbb_io_close,
    256       1.26      haya 	pccbb_cb_intr_establish,
    257       1.26      haya 	pccbb_cb_intr_disestablish,
    258       1.22    chopps 	pccbb_make_tag,
    259       1.22    chopps 	pccbb_conf_read,
    260       1.22    chopps 	pccbb_conf_write,
    261        1.1      haya };
    262        1.1      haya #endif
    263        1.1      haya 
    264        1.1      haya int
    265  1.182.2.1       jym pcicbbmatch(device_t parent, cfdata_t match, void *aux)
    266        1.1      haya {
    267       1.22    chopps 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
    268        1.1      haya 
    269       1.22    chopps 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
    270       1.22    chopps 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_CARDBUS &&
    271       1.22    chopps 	    PCI_INTERFACE(pa->pa_class) == 0) {
    272       1.22    chopps 		return 1;
    273       1.22    chopps 	}
    274        1.1      haya 
    275       1.22    chopps 	return 0;
    276        1.1      haya }
    277        1.1      haya 
    278        1.1      haya #define MAKEID(vendor, prod) (((vendor) << PCI_VENDOR_SHIFT) \
    279        1.1      haya                               | ((prod) << PCI_PRODUCT_SHIFT))
    280        1.1      haya 
    281       1.60  jdolecek const struct yenta_chipinfo {
    282       1.22    chopps 	pcireg_t yc_id;		       /* vendor tag | product tag */
    283       1.22    chopps 	int yc_chiptype;
    284       1.22    chopps 	int yc_flags;
    285        1.1      haya } yc_chipsets[] = {
    286       1.22    chopps 	/* Texas Instruments chips */
    287       1.22    chopps 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1130), CB_TI113X,
    288       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    289       1.22    chopps 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1131), CB_TI113X,
    290       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    291       1.96  nakayama 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1250), CB_TI125X,
    292       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    293       1.22    chopps 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1220), CB_TI12XX,
    294       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    295       1.22    chopps 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1221), CB_TI12XX,
    296       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    297       1.22    chopps 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1225), CB_TI12XX,
    298       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    299       1.96  nakayama 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251), CB_TI125X,
    300       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    301       1.96  nakayama 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251B), CB_TI125X,
    302       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    303       1.22    chopps 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1211), CB_TI12XX,
    304       1.64     soren 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    305       1.64     soren 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1410), CB_TI12XX,
    306       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    307      1.151    dyoung 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1420), CB_TI1420,
    308       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    309       1.96  nakayama 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1450), CB_TI125X,
    310       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    311       1.22    chopps 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1451), CB_TI12XX,
    312       1.84    martin 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    313       1.99        he 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1520), CB_TI12XX,
    314       1.99        he 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    315       1.84    martin 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4410YENTA), CB_TI12XX,
    316       1.22    chopps 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    317       1.99        he 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4520YENTA), CB_TI12XX,
    318       1.99        he 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    319      1.180  christos 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7420YENTA), CB_TI12XX,
    320      1.180  christos 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
    321       1.22    chopps 
    322       1.22    chopps 	/* Ricoh chips */
    323       1.22    chopps 	{ MAKEID(PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C475), CB_RX5C47X,
    324       1.22    chopps 	    PCCBB_PCMCIA_MEM_32},
    325       1.22    chopps 	{ MAKEID(PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_RL5C476), CB_RX5C47X,
    326       1.22    chopps 	    PCCBB_PCMCIA_MEM_32},
    327       1.22    chopps 	{ MAKEID(PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C477), CB_RX5C47X,
    328       1.22    chopps 	    PCCBB_PCMCIA_MEM_32},
    329       1.22    chopps 	{ MAKEID(PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C478), CB_RX5C47X,
    330       1.22    chopps 	    PCCBB_PCMCIA_MEM_32},
    331       1.22    chopps 	{ MAKEID(PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C465), CB_RX5C46X,
    332       1.22    chopps 	    PCCBB_PCMCIA_MEM_32},
    333       1.22    chopps 	{ MAKEID(PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C466), CB_RX5C46X,
    334       1.22    chopps 	    PCCBB_PCMCIA_MEM_32},
    335       1.22    chopps 
    336       1.22    chopps 	/* Toshiba products */
    337       1.22    chopps 	{ MAKEID(PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC95),
    338       1.22    chopps 	    CB_TOPIC95, PCCBB_PCMCIA_MEM_32},
    339       1.22    chopps 	{ MAKEID(PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC95B),
    340       1.22    chopps 	    CB_TOPIC95B, PCCBB_PCMCIA_MEM_32},
    341       1.22    chopps 	{ MAKEID(PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC97),
    342       1.22    chopps 	    CB_TOPIC97, PCCBB_PCMCIA_MEM_32},
    343       1.22    chopps 	{ MAKEID(PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC100),
    344       1.22    chopps 	    CB_TOPIC97, PCCBB_PCMCIA_MEM_32},
    345       1.22    chopps 
    346       1.22    chopps 	/* Cirrus Logic products */
    347       1.22    chopps 	{ MAKEID(PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_PD6832),
    348       1.22    chopps 	    CB_CIRRUS, PCCBB_PCMCIA_MEM_32},
    349       1.22    chopps 	{ MAKEID(PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_PD6833),
    350       1.22    chopps 	    CB_CIRRUS, PCCBB_PCMCIA_MEM_32},
    351        1.1      haya 
    352      1.169    dyoung 	/* O2 Micro products */
    353      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6729),
    354      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    355      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6730),
    356      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    357      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6832),
    358      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    359      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6836),
    360      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    361      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6872),
    362      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    363      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6922),
    364      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    365      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6933),
    366      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    367      1.169    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6972),
    368      1.169    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    369      1.179    dyoung 	{ MAKEID(PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_7223),
    370      1.179    dyoung 	  CB_O2MICRO, PCCBB_PCMCIA_MEM_32},
    371      1.169    dyoung 
    372       1.22    chopps 	/* sentinel, or Generic chip */
    373       1.22    chopps 	{ 0 /* null id */ , CB_UNKNOWN, PCCBB_PCMCIA_MEM_32},
    374        1.1      haya };
    375        1.1      haya 
    376        1.1      haya static int
    377      1.143    dyoung cb_chipset(u_int32_t pci_id, int *flagp)
    378        1.1      haya {
    379       1.60  jdolecek 	const struct yenta_chipinfo *yc;
    380        1.1      haya 
    381       1.35     enami 	/* Loop over except the last default entry. */
    382       1.35     enami 	for (yc = yc_chipsets; yc < yc_chipsets +
    383      1.168    dyoung 	    __arraycount(yc_chipsets) - 1; yc++)
    384       1.39    kleink 		if (pci_id == yc->yc_id)
    385       1.35     enami 			break;
    386        1.1      haya 
    387       1.35     enami 	if (flagp != NULL)
    388       1.35     enami 		*flagp = yc->yc_flags;
    389        1.1      haya 
    390       1.35     enami 	return (yc->yc_chiptype);
    391        1.1      haya }
    392        1.1      haya 
    393        1.1      haya void
    394      1.162    dyoung pccbbattach(device_t parent, device_t self, void *aux)
    395       1.22    chopps {
    396      1.162    dyoung 	struct pccbb_softc *sc = device_private(self);
    397       1.22    chopps 	struct pci_attach_args *pa = aux;
    398       1.22    chopps 	pci_chipset_tag_t pc = pa->pa_pc;
    399       1.43     jhawk 	pcireg_t busreg, reg, sock_base;
    400       1.22    chopps 	bus_addr_t sockbase;
    401       1.22    chopps 	char devinfo[256];
    402       1.22    chopps 	int flags;
    403       1.22    chopps 
    404       1.88  nakayama #ifdef __HAVE_PCCBB_ATTACH_HOOK
    405       1.88  nakayama 	pccbb_attach_hook(parent, self, pa);
    406       1.88  nakayama #endif
    407       1.88  nakayama 
    408      1.172  drochner 	sc->sc_dev = self;
    409      1.172  drochner 
    410      1.149     joerg 	callout_init(&sc->sc_insert_ch, 0);
    411      1.149     joerg 	callout_setfunc(&sc->sc_insert_ch, pci113x_insert, sc);
    412      1.149     joerg 
    413       1.22    chopps 	sc->sc_chipset = cb_chipset(pa->pa_id, &flags);
    414       1.22    chopps 
    415      1.155  jmcneill 	aprint_naive("\n");
    416      1.155  jmcneill 
    417       1.97    itojun 	pci_devinfo(pa->pa_id, 0, 0, devinfo, sizeof(devinfo));
    418      1.155  jmcneill 	aprint_normal(": %s (rev. 0x%02x)", devinfo,
    419      1.155  jmcneill 	    PCI_REVISION(pa->pa_class));
    420      1.133  christos 	DPRINTF((" (chipflags %x)", flags));
    421      1.155  jmcneill 	aprint_normal("\n");
    422        1.1      haya 
    423       1.27   thorpej 	TAILQ_INIT(&sc->sc_memwindow);
    424       1.27   thorpej 	TAILQ_INIT(&sc->sc_iowindow);
    425       1.27   thorpej 
    426        1.1      haya #if rbus
    427       1.22    chopps 	sc->sc_rbus_iot = rbus_pccbb_parent_io(pa);
    428       1.22    chopps 	sc->sc_rbus_memt = rbus_pccbb_parent_mem(pa);
    429       1.65       mcr 
    430       1.65       mcr #if 0
    431       1.65       mcr 	printf("pa->pa_memt: %08x vs rbus_mem->rb_bt: %08x\n",
    432       1.65       mcr 	       pa->pa_memt, sc->sc_rbus_memt->rb_bt);
    433       1.65       mcr #endif
    434        1.1      haya #endif /* rbus */
    435        1.1      haya 
    436       1.88  nakayama 	sc->sc_flags &= ~CBB_MEMHMAPPED;
    437        1.1      haya 
    438      1.117     perry 	/*
    439       1.22    chopps 	 * MAP socket registers and ExCA registers on memory-space
    440       1.22    chopps 	 * When no valid address is set on socket base registers (on pci
    441       1.22    chopps 	 * config space), get it not polite way.
    442       1.22    chopps 	 */
    443       1.22    chopps 	sock_base = pci_conf_read(pc, pa->pa_tag, PCI_SOCKBASE);
    444       1.22    chopps 
    445       1.22    chopps 	if (PCI_MAPREG_MEM_ADDR(sock_base) >= 0x100000 &&
    446       1.22    chopps 	    PCI_MAPREG_MEM_ADDR(sock_base) != 0xfffffff0) {
    447       1.22    chopps 		/* The address must be valid. */
    448       1.22    chopps 		if (pci_mapreg_map(pa, PCI_SOCKBASE, PCI_MAPREG_TYPE_MEM, 0,
    449      1.158    dyoung 		    &sc->sc_base_memt, &sc->sc_base_memh, &sockbase, &sc->sc_base_size)) {
    450      1.172  drochner 			aprint_error_dev(self,
    451      1.164    dyoung 			    "can't map socket base address 0x%lx\n",
    452      1.164    dyoung 			    (unsigned long)sock_base);
    453       1.22    chopps 			/*
    454       1.22    chopps 			 * I think it's funny: socket base registers must be
    455       1.22    chopps 			 * mapped on memory space, but ...
    456       1.22    chopps 			 */
    457       1.22    chopps 			if (pci_mapreg_map(pa, PCI_SOCKBASE, PCI_MAPREG_TYPE_IO,
    458       1.22    chopps 			    0, &sc->sc_base_memt, &sc->sc_base_memh, &sockbase,
    459      1.158    dyoung 			    &sc->sc_base_size)) {
    460      1.172  drochner 				aprint_error_dev(self,
    461      1.164    dyoung 				    "can't map socket base address"
    462      1.164    dyoung 				    " 0x%lx: io mode\n",
    463       1.63       jmc 				    (unsigned long)sockbase);
    464       1.22    chopps 				/* give up... allocate reg space via rbus. */
    465       1.22    chopps 				pci_conf_write(pc, pa->pa_tag, PCI_SOCKBASE, 0);
    466       1.88  nakayama 			} else
    467       1.88  nakayama 				sc->sc_flags |= CBB_MEMHMAPPED;
    468       1.22    chopps 		} else {
    469       1.22    chopps 			DPRINTF(("%s: socket base address 0x%lx\n",
    470      1.172  drochner 			    device_xname(self),
    471      1.164    dyoung 			    (unsigned long)sockbase));
    472       1.88  nakayama 			sc->sc_flags |= CBB_MEMHMAPPED;
    473       1.22    chopps 		}
    474       1.22    chopps 	}
    475        1.1      haya 
    476       1.22    chopps 	sc->sc_mem_start = 0;	       /* XXX */
    477       1.22    chopps 	sc->sc_mem_end = 0xffffffff;   /* XXX */
    478        1.1      haya 
    479       1.22    chopps 	busreg = pci_conf_read(pc, pa->pa_tag, PCI_BUSNUM);
    480        1.4      haya 
    481       1.22    chopps 	/* pccbb_machdep.c end */
    482        1.1      haya 
    483        1.1      haya #if defined CBB_DEBUG
    484       1.22    chopps 	{
    485      1.121    sekiya 		static const char *intrname[] = { "NON", "A", "B", "C", "D" };
    486      1.172  drochner 		aprint_debug_dev(self, "intrpin %s, intrtag %d\n",
    487       1.23       cgd 		    intrname[pa->pa_intrpin], pa->pa_intrline);
    488       1.22    chopps 	}
    489        1.1      haya #endif
    490        1.1      haya 
    491       1.22    chopps 	/* setup softc */
    492       1.22    chopps 	sc->sc_pc = pc;
    493       1.22    chopps 	sc->sc_iot = pa->pa_iot;
    494       1.22    chopps 	sc->sc_memt = pa->pa_memt;
    495       1.22    chopps 	sc->sc_dmat = pa->pa_dmat;
    496       1.22    chopps 	sc->sc_tag = pa->pa_tag;
    497       1.22    chopps 
    498       1.51  sommerfe 	memcpy(&sc->sc_pa, pa, sizeof(*pa));
    499        1.1      haya 
    500       1.22    chopps 	sc->sc_pcmcia_flags = flags;   /* set PCMCIA facility */
    501        1.1      haya 
    502       1.43     jhawk 	/* Disable legacy register mapping. */
    503       1.43     jhawk 	switch (sc->sc_chipset) {
    504       1.43     jhawk 	case CB_RX5C46X:	       /* fallthrough */
    505       1.43     jhawk #if 0
    506       1.44     jhawk 	/* The RX5C47X-series requires writes to the PCI_LEGACY register. */
    507       1.43     jhawk 	case CB_RX5C47X:
    508       1.43     jhawk #endif
    509      1.117     perry 		/*
    510       1.44     jhawk 		 * The legacy pcic io-port on Ricoh RX5C46X CardBus bridges
    511       1.44     jhawk 		 * cannot be disabled by substituting 0 into PCI_LEGACY
    512       1.44     jhawk 		 * register.  Ricoh CardBus bridges have special bits on Bridge
    513       1.44     jhawk 		 * control reg (addr 0x3e on PCI config space).
    514       1.43     jhawk 		 */
    515      1.146    dyoung 		reg = pci_conf_read(pc, pa->pa_tag, PCI_BRIDGE_CONTROL_REG);
    516       1.43     jhawk 		reg &= ~(CB_BCRI_RL_3E0_ENA | CB_BCRI_RL_3E2_ENA);
    517      1.146    dyoung 		pci_conf_write(pc, pa->pa_tag, PCI_BRIDGE_CONTROL_REG, reg);
    518       1.43     jhawk 		break;
    519       1.43     jhawk 
    520       1.43     jhawk 	default:
    521       1.43     jhawk 		/* XXX I don't know proper way to kill legacy I/O. */
    522       1.43     jhawk 		pci_conf_write(pc, pa->pa_tag, PCI_LEGACY, 0x0);
    523       1.43     jhawk 		break;
    524       1.43     jhawk 	}
    525       1.43     jhawk 
    526      1.156  jmcneill 	if (!pmf_device_register(self, pccbb_suspend, pccbb_resume))
    527      1.156  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    528      1.156  jmcneill 
    529       1.22    chopps 	config_defer(self, pccbb_pci_callback);
    530        1.1      haya }
    531        1.1      haya 
    532      1.158    dyoung int
    533      1.158    dyoung pccbbdetach(device_t self, int flags)
    534      1.158    dyoung {
    535      1.158    dyoung 	struct pccbb_softc *sc = device_private(self);
    536      1.158    dyoung 	pci_chipset_tag_t pc = sc->sc_pa.pa_pc;
    537      1.158    dyoung 	bus_space_tag_t bmt = sc->sc_base_memt;
    538      1.158    dyoung 	bus_space_handle_t bmh = sc->sc_base_memh;
    539      1.158    dyoung 	uint32_t sockmask;
    540      1.158    dyoung 	int rc;
    541      1.158    dyoung 
    542      1.158    dyoung 	if ((rc = config_detach_children(self, flags)) != 0)
    543      1.158    dyoung 		return rc;
    544      1.158    dyoung 
    545      1.161    dyoung 	if (!LIST_EMPTY(&sc->sc_pil)) {
    546      1.161    dyoung 		panic("%s: interrupt handlers still registered",
    547      1.172  drochner 		    device_xname(self));
    548      1.161    dyoung 		return EBUSY;
    549      1.161    dyoung 	}
    550      1.161    dyoung 
    551      1.158    dyoung 	if (sc->sc_ih != NULL) {
    552      1.158    dyoung 		pci_intr_disestablish(pc, sc->sc_ih);
    553      1.158    dyoung 		sc->sc_ih = NULL;
    554      1.158    dyoung 	}
    555      1.158    dyoung 
    556      1.158    dyoung 	/* CSC Interrupt: turn off card detect and power cycle interrupts */
    557      1.158    dyoung 	sockmask = bus_space_read_4(bmt, bmh, CB_SOCKET_MASK);
    558      1.165    dyoung 	sockmask &= ~(CB_SOCKET_MASK_CSTS | CB_SOCKET_MASK_CD |
    559      1.165    dyoung 		      CB_SOCKET_MASK_POWER);
    560      1.158    dyoung 	bus_space_write_4(bmt, bmh, CB_SOCKET_MASK, sockmask);
    561      1.158    dyoung 	/* reset interrupt */
    562      1.158    dyoung 	bus_space_write_4(bmt, bmh, CB_SOCKET_EVENT,
    563      1.158    dyoung 	    bus_space_read_4(bmt, bmh, CB_SOCKET_EVENT));
    564      1.158    dyoung 
    565      1.158    dyoung 	switch (sc->sc_flags & (CBB_MEMHMAPPED|CBB_SPECMAPPED)) {
    566      1.158    dyoung 	case CBB_MEMHMAPPED:
    567      1.158    dyoung 		bus_space_unmap(bmt, bmh, sc->sc_base_size);
    568      1.158    dyoung 		break;
    569      1.158    dyoung 	case CBB_MEMHMAPPED|CBB_SPECMAPPED:
    570      1.158    dyoung #if rbus
    571      1.158    dyoung 	{
    572      1.158    dyoung 		pcireg_t sockbase;
    573      1.158    dyoung 
    574      1.158    dyoung 		sockbase = pci_conf_read(pc, sc->sc_tag, PCI_SOCKBASE);
    575      1.158    dyoung 		rbus_space_free(sc->sc_rbus_memt, bmh, 0x1000,
    576      1.158    dyoung 		    NULL);
    577      1.158    dyoung 	}
    578      1.158    dyoung #else
    579      1.158    dyoung 		bus_space_free(bmt, bmh, 0x1000);
    580      1.158    dyoung #endif
    581      1.158    dyoung 	}
    582      1.158    dyoung 	sc->sc_flags &= ~(CBB_MEMHMAPPED|CBB_SPECMAPPED);
    583       1.26      haya 
    584      1.158    dyoung 	if (!TAILQ_EMPTY(&sc->sc_iowindow))
    585      1.158    dyoung 		aprint_error_dev(self, "i/o windows not empty");
    586      1.158    dyoung 	if (!TAILQ_EMPTY(&sc->sc_memwindow))
    587      1.158    dyoung 		aprint_error_dev(self, "memory windows not empty");
    588       1.26      haya 
    589      1.158    dyoung 	callout_stop(&sc->sc_insert_ch);
    590      1.158    dyoung 	callout_destroy(&sc->sc_insert_ch);
    591      1.158    dyoung 	return 0;
    592      1.158    dyoung }
    593       1.26      haya 
    594       1.26      haya /*
    595      1.162    dyoung  * static void pccbb_pci_callback(device_t self)
    596       1.26      haya  *
    597       1.26      haya  *   The actual attach routine: get memory space for YENTA register
    598       1.26      haya  *   space, setup YENTA register and route interrupt.
    599       1.26      haya  *
    600       1.26      haya  *   This function should be deferred because this device may obtain
    601       1.26      haya  *   memory space dynamically.  This function must avoid obtaining
    602       1.43     jhawk  *   memory area which has already kept for another device.
    603       1.26      haya  */
    604        1.1      haya static void
    605      1.162    dyoung pccbb_pci_callback(device_t self)
    606        1.1      haya {
    607      1.162    dyoung 	struct pccbb_softc *sc = device_private(self);
    608       1.22    chopps 	pci_chipset_tag_t pc = sc->sc_pc;
    609       1.22    chopps 	bus_addr_t sockbase;
    610       1.22    chopps 	struct cbslot_attach_args cba;
    611       1.22    chopps 	struct pcmciabus_attach_args paa;
    612       1.22    chopps 	struct cardslot_attach_args caa;
    613      1.172  drochner 	device_t csc;
    614        1.1      haya 
    615       1.88  nakayama 	if (!(sc->sc_flags & CBB_MEMHMAPPED)) {
    616       1.22    chopps 		/* The socket registers aren't mapped correctly. */
    617        1.1      haya #if rbus
    618       1.22    chopps 		if (rbus_space_alloc(sc->sc_rbus_memt, 0, 0x1000, 0x0fff,
    619       1.22    chopps 		    (sc->sc_chipset == CB_RX5C47X
    620       1.22    chopps 		    || sc->sc_chipset == CB_TI113X) ? 0x10000 : 0x1000,
    621       1.22    chopps 		    0, &sockbase, &sc->sc_base_memh)) {
    622       1.22    chopps 			return;
    623       1.22    chopps 		}
    624       1.22    chopps 		sc->sc_base_memt = sc->sc_memt;
    625       1.22    chopps 		pci_conf_write(pc, sc->sc_tag, PCI_SOCKBASE, sockbase);
    626      1.120    sekiya 		DPRINTF(("%s: CardBus register address 0x%lx -> 0x%lx\n",
    627      1.172  drochner 		    device_xname(self), (unsigned long)sockbase,
    628       1.94  christos 		    (unsigned long)pci_conf_read(pc, sc->sc_tag,
    629       1.22    chopps 		    PCI_SOCKBASE)));
    630        1.1      haya #else
    631       1.22    chopps 		sc->sc_base_memt = sc->sc_memt;
    632        1.1      haya #if !defined CBB_PCI_BASE
    633        1.1      haya #define CBB_PCI_BASE 0x20000000
    634        1.1      haya #endif
    635       1.22    chopps 		if (bus_space_alloc(sc->sc_base_memt, CBB_PCI_BASE, 0xffffffff,
    636       1.22    chopps 		    0x1000, 0x1000, 0, 0, &sockbase, &sc->sc_base_memh)) {
    637       1.22    chopps 			/* cannot allocate memory space */
    638       1.22    chopps 			return;
    639       1.22    chopps 		}
    640       1.22    chopps 		pci_conf_write(pc, sc->sc_tag, PCI_SOCKBASE, sockbase);
    641      1.120    sekiya 		DPRINTF(("%s: CardBus register address 0x%lx -> 0x%lx\n",
    642      1.172  drochner 		    device_xname(self), (unsigned long)sock_base,
    643       1.94  christos 		    (unsigned long)pci_conf_read(pc,
    644       1.22    chopps 		    sc->sc_tag, PCI_SOCKBASE)));
    645        1.1      haya #endif
    646  1.182.2.1       jym 		sc->sc_flags |= CBB_MEMHMAPPED|CBB_SPECMAPPED;
    647       1.22    chopps 	}
    648       1.19      haya 
    649      1.165    dyoung 	/* clear data structure for child device interrupt handlers */
    650      1.165    dyoung 	LIST_INIT(&sc->sc_pil);
    651      1.165    dyoung 
    652       1.32     enami 	/* bus bridge initialization */
    653       1.22    chopps 	pccbb_chipinit(sc);
    654        1.1      haya 
    655       1.38      haya 	sc->sc_pil_intr_enable = 1;
    656       1.38      haya 
    657       1.22    chopps 	{
    658       1.69      haya 		u_int32_t sockstat;
    659       1.69      haya 
    660       1.69      haya 		sockstat = bus_space_read_4(sc->sc_base_memt,
    661       1.69      haya 		    sc->sc_base_memh, CB_SOCKET_STAT);
    662       1.22    chopps 		if (0 == (sockstat & CB_SOCKET_STAT_CD)) {
    663       1.22    chopps 			sc->sc_flags |= CBB_CARDEXIST;
    664       1.22    chopps 		}
    665       1.22    chopps 	}
    666        1.1      haya 
    667      1.117     perry 	/*
    668      1.117     perry 	 * attach cardbus
    669       1.22    chopps 	 */
    670       1.98   mycroft 	{
    671       1.22    chopps 		pcireg_t busreg = pci_conf_read(pc, sc->sc_tag, PCI_BUSNUM);
    672       1.22    chopps 		pcireg_t bhlc = pci_conf_read(pc, sc->sc_tag, PCI_BHLC_REG);
    673       1.22    chopps 
    674       1.32     enami 		/* initialize cbslot_attach */
    675       1.22    chopps 		cba.cba_iot = sc->sc_iot;
    676       1.22    chopps 		cba.cba_memt = sc->sc_memt;
    677       1.22    chopps 		cba.cba_dmat = sc->sc_dmat;
    678       1.22    chopps 		cba.cba_bus = (busreg >> 8) & 0x0ff;
    679       1.22    chopps 		cba.cba_cc = (void *)sc;
    680       1.22    chopps 		cba.cba_cf = &pccbb_funcs;
    681      1.171  drochner 		cba.cba_intrline = 0; /* XXX dummy */
    682        1.1      haya 
    683        1.1      haya #if rbus
    684       1.22    chopps 		cba.cba_rbus_iot = sc->sc_rbus_iot;
    685       1.22    chopps 		cba.cba_rbus_memt = sc->sc_rbus_memt;
    686        1.1      haya #endif
    687        1.1      haya 
    688       1.22    chopps 		cba.cba_cacheline = PCI_CACHELINE(bhlc);
    689      1.151    dyoung 		cba.cba_max_lattimer = PCI_LATTIMER(bhlc);
    690        1.1      haya 
    691      1.172  drochner 		aprint_verbose_dev(self,
    692      1.164    dyoung 		    "cacheline 0x%x lattimer 0x%x\n",
    693      1.164    dyoung 		    cba.cba_cacheline,
    694      1.164    dyoung 		    cba.cba_max_lattimer);
    695      1.172  drochner 		aprint_verbose_dev(self, "bhlc 0x%x\n", bhlc);
    696        1.1      haya #if defined SHOW_REGS
    697       1.22    chopps 		cb_show_regs(sc->sc_pc, sc->sc_tag, sc->sc_base_memt,
    698       1.22    chopps 		    sc->sc_base_memh);
    699        1.1      haya #endif
    700       1.22    chopps 	}
    701        1.1      haya 
    702       1.22    chopps 	pccbb_pcmcia_attach_setup(sc, &paa);
    703       1.22    chopps 	caa.caa_cb_attach = NULL;
    704       1.98   mycroft 	if (cba.cba_bus == 0)
    705      1.172  drochner 		aprint_error_dev(self,
    706      1.164    dyoung 		    "secondary bus number uninitialized; try PCI_BUS_FIXUP\n");
    707       1.98   mycroft 	else
    708       1.22    chopps 		caa.caa_cb_attach = &cba;
    709       1.22    chopps 	caa.caa_16_attach = &paa;
    710        1.1      haya 
    711      1.165    dyoung 	pccbb_intrinit(sc);
    712      1.165    dyoung 
    713      1.172  drochner 	if (NULL != (csc = config_found_ia(self, "pcmciaslot", &caa,
    714      1.172  drochner 					   cbbprint))) {
    715      1.141    dyoung 		DPRINTF(("%s: found cardslot\n", __func__));
    716      1.172  drochner 		sc->sc_csc = device_private(csc);
    717       1.22    chopps 	}
    718        1.1      haya 
    719       1.22    chopps 	return;
    720        1.1      haya }
    721        1.1      haya 
    722       1.26      haya 
    723       1.26      haya 
    724       1.26      haya 
    725       1.26      haya 
    726       1.26      haya /*
    727       1.26      haya  * static void pccbb_chipinit(struct pccbb_softc *sc)
    728       1.26      haya  *
    729       1.32     enami  *   This function initialize YENTA chip registers listed below:
    730       1.26      haya  *     1) PCI command reg,
    731       1.26      haya  *     2) PCI and CardBus latency timer,
    732       1.43     jhawk  *     3) route PCI interrupt,
    733       1.43     jhawk  *     4) close all memory and io windows.
    734       1.69      haya  *     5) turn off bus power.
    735      1.118  christos  *     6) card detect and power cycle interrupts on.
    736       1.69      haya  *     7) clear interrupt
    737       1.26      haya  */
    738        1.1      haya static void
    739      1.143    dyoung pccbb_chipinit(struct pccbb_softc *sc)
    740        1.1      haya {
    741       1.22    chopps 	pci_chipset_tag_t pc = sc->sc_pc;
    742       1.22    chopps 	pcitag_t tag = sc->sc_tag;
    743       1.69      haya 	bus_space_tag_t bmt = sc->sc_base_memt;
    744       1.69      haya 	bus_space_handle_t bmh = sc->sc_base_memh;
    745      1.151    dyoung 	pcireg_t bcr, bhlc, cbctl, csr, lscp, mfunc, mrburst, slotctl, sockctl,
    746      1.165    dyoung 	    sysctrl;
    747       1.22    chopps 
    748      1.117     perry 	/*
    749       1.22    chopps 	 * Set PCI command reg.
    750       1.22    chopps 	 * Some laptop's BIOSes (i.e. TICO) do not enable CardBus chip.
    751       1.22    chopps 	 */
    752      1.146    dyoung 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    753       1.30   mycroft 	/* I believe it is harmless. */
    754      1.146    dyoung 	csr |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    755       1.30   mycroft 	    PCI_COMMAND_MASTER_ENABLE);
    756      1.169    dyoung 
    757      1.169    dyoung 	/* All O2 Micro chips have broken parity-error reporting
    758      1.169    dyoung 	 * until proven otherwise.  The OZ6933 PCI-CardBus Bridge
    759      1.169    dyoung 	 * is known to have the defect---see PR kern/38698.
    760      1.169    dyoung 	 */
    761      1.169    dyoung 	if (sc->sc_chipset != CB_O2MICRO)
    762      1.169    dyoung 		csr |= PCI_COMMAND_PARITY_ENABLE;
    763      1.169    dyoung 
    764      1.169    dyoung 	csr |= PCI_COMMAND_SERR_ENABLE;
    765      1.146    dyoung 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    766        1.1      haya 
    767      1.117     perry 	/*
    768       1.30   mycroft 	 * Set CardBus latency timer.
    769       1.22    chopps 	 */
    770      1.146    dyoung 	lscp = pci_conf_read(pc, tag, PCI_CB_LSCP_REG);
    771      1.146    dyoung 	if (PCI_CB_LATENCY(lscp) < 0x20) {
    772      1.146    dyoung 		lscp &= ~(PCI_CB_LATENCY_MASK << PCI_CB_LATENCY_SHIFT);
    773      1.146    dyoung 		lscp |= (0x20 << PCI_CB_LATENCY_SHIFT);
    774      1.146    dyoung 		pci_conf_write(pc, tag, PCI_CB_LSCP_REG, lscp);
    775       1.22    chopps 	}
    776       1.30   mycroft 	DPRINTF(("CardBus latency timer 0x%x (%x)\n",
    777      1.146    dyoung 	    PCI_CB_LATENCY(lscp), pci_conf_read(pc, tag, PCI_CB_LSCP_REG)));
    778        1.1      haya 
    779      1.117     perry 	/*
    780       1.30   mycroft 	 * Set PCI latency timer.
    781       1.22    chopps 	 */
    782      1.146    dyoung 	bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
    783      1.146    dyoung 	if (PCI_LATTIMER(bhlc) < 0x10) {
    784      1.146    dyoung 		bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
    785      1.146    dyoung 		bhlc |= (0x10 << PCI_LATTIMER_SHIFT);
    786      1.146    dyoung 		pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc);
    787       1.22    chopps 	}
    788       1.30   mycroft 	DPRINTF(("PCI latency timer 0x%x (%x)\n",
    789      1.146    dyoung 	    PCI_LATTIMER(bhlc), pci_conf_read(pc, tag, PCI_BHLC_REG)));
    790        1.1      haya 
    791        1.1      haya 
    792       1.30   mycroft 	/* Route functional interrupts to PCI. */
    793      1.146    dyoung 	bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG);
    794      1.146    dyoung 	bcr |= CB_BCR_INTR_IREQ_ENABLE;		/* disable PCI Intr */
    795      1.146    dyoung 	bcr |= CB_BCR_WRITE_POST_ENABLE;	/* enable write post */
    796      1.146    dyoung 	/* assert reset */
    797      1.146    dyoung 	bcr |= PCI_BRIDGE_CONTROL_SECBR	<< PCI_BRIDGE_CONTROL_SHIFT;
    798      1.151    dyoung         /* Set master abort mode to 1, forward SERR# from secondary
    799      1.151    dyoung          * to primary, and detect parity errors on secondary.
    800      1.151    dyoung 	 */
    801      1.151    dyoung 	bcr |= PCI_BRIDGE_CONTROL_MABRT	<< PCI_BRIDGE_CONTROL_SHIFT;
    802      1.151    dyoung 	bcr |= PCI_BRIDGE_CONTROL_SERR << PCI_BRIDGE_CONTROL_SHIFT;
    803      1.151    dyoung 	bcr |= PCI_BRIDGE_CONTROL_PERE << PCI_BRIDGE_CONTROL_SHIFT;
    804      1.146    dyoung 	pci_conf_write(pc, tag, PCI_BRIDGE_CONTROL_REG, bcr);
    805        1.1      haya 
    806       1.30   mycroft 	switch (sc->sc_chipset) {
    807       1.30   mycroft 	case CB_TI113X:
    808      1.146    dyoung 		cbctl = pci_conf_read(pc, tag, PCI_CBCTRL);
    809       1.30   mycroft 		/* This bit is shared, but may read as 0 on some chips, so set
    810       1.30   mycroft 		   it explicitly on both functions. */
    811      1.146    dyoung 		cbctl |= PCI113X_CBCTRL_PCI_IRQ_ENA;
    812       1.22    chopps 		/* CSC intr enable */
    813      1.146    dyoung 		cbctl |= PCI113X_CBCTRL_PCI_CSC;
    814       1.45      haya 		/* functional intr prohibit | prohibit ISA routing */
    815      1.146    dyoung 		cbctl &= ~(PCI113X_CBCTRL_PCI_INTR | PCI113X_CBCTRL_INT_MASK);
    816      1.146    dyoung 		pci_conf_write(pc, tag, PCI_CBCTRL, cbctl);
    817       1.50   mycroft 		break;
    818       1.50   mycroft 
    819      1.151    dyoung 	case CB_TI1420:
    820      1.151    dyoung 		sysctrl = pci_conf_read(pc, tag, PCI_SYSCTRL);
    821      1.151    dyoung 		mrburst = pccbb_burstup
    822      1.151    dyoung 		    ? PCI1420_SYSCTRL_MRBURST : PCI1420_SYSCTRL_MRBURSTDN;
    823      1.151    dyoung 		if ((sysctrl & PCI1420_SYSCTRL_MRBURST) == mrburst) {
    824      1.151    dyoung 			printf("%s: %swrite bursts enabled\n",
    825      1.172  drochner 			    device_xname(sc->sc_dev),
    826      1.151    dyoung 			    pccbb_burstup ? "read/" : "");
    827      1.151    dyoung 		} else if (pccbb_burstup) {
    828      1.151    dyoung 			printf("%s: enabling read/write bursts\n",
    829      1.172  drochner 			    device_xname(sc->sc_dev));
    830      1.151    dyoung 			sysctrl |= PCI1420_SYSCTRL_MRBURST;
    831      1.151    dyoung 			pci_conf_write(pc, tag, PCI_SYSCTRL, sysctrl);
    832      1.151    dyoung 		} else {
    833      1.151    dyoung 			printf("%s: disabling read bursts, "
    834      1.151    dyoung 			    "enabling write bursts\n",
    835      1.172  drochner 			    device_xname(sc->sc_dev));
    836      1.151    dyoung 			sysctrl |= PCI1420_SYSCTRL_MRBURSTDN;
    837      1.151    dyoung 			sysctrl &= ~PCI1420_SYSCTRL_MRBURSTUP;
    838      1.151    dyoung 			pci_conf_write(pc, tag, PCI_SYSCTRL, sysctrl);
    839      1.151    dyoung 		}
    840      1.151    dyoung 		/*FALLTHROUGH*/
    841       1.50   mycroft 	case CB_TI12XX:
    842       1.96  nakayama 		/*
    843       1.96  nakayama 		 * Some TI 12xx (and [14][45]xx) based pci cards
    844       1.96  nakayama 		 * sometimes have issues with the MFUNC register not
    845       1.96  nakayama 		 * being initialized due to a bad EEPROM on board.
    846       1.96  nakayama 		 * Laptops that this matters on have this register
    847       1.96  nakayama 		 * properly initialized.
    848       1.96  nakayama 		 *
    849       1.96  nakayama 		 * The TI125X parts have a different register.
    850       1.96  nakayama 		 */
    851      1.146    dyoung 		mfunc = pci_conf_read(pc, tag, PCI12XX_MFUNC);
    852      1.146    dyoung 		if (mfunc == 0) {
    853      1.146    dyoung 			mfunc &= ~PCI12XX_MFUNC_PIN0;
    854      1.146    dyoung 			mfunc |= PCI12XX_MFUNC_PIN0_INTA;
    855       1.96  nakayama 			if ((pci_conf_read(pc, tag, PCI_SYSCTRL) &
    856       1.96  nakayama 			     PCI12XX_SYSCTRL_INTRTIE) == 0) {
    857      1.146    dyoung 				mfunc &= ~PCI12XX_MFUNC_PIN1;
    858      1.146    dyoung 				mfunc |= PCI12XX_MFUNC_PIN1_INTB;
    859       1.96  nakayama 			}
    860      1.146    dyoung 			pci_conf_write(pc, tag, PCI12XX_MFUNC, mfunc);
    861       1.96  nakayama 		}
    862       1.96  nakayama 		/* fallthrough */
    863       1.96  nakayama 
    864       1.96  nakayama 	case CB_TI125X:
    865       1.96  nakayama 		/*
    866       1.96  nakayama 		 * Disable zoom video.  Some machines initialize this
    867       1.96  nakayama 		 * improperly and experience has shown that this helps
    868       1.96  nakayama 		 * prevent strange behavior.
    869       1.96  nakayama 		 */
    870       1.96  nakayama 		pci_conf_write(pc, tag, PCI12XX_MMCTRL, 0);
    871       1.96  nakayama 
    872      1.146    dyoung 		sysctrl = pci_conf_read(pc, tag, PCI_SYSCTRL);
    873      1.146    dyoung 		sysctrl |= PCI12XX_SYSCTRL_VCCPROT;
    874      1.146    dyoung 		pci_conf_write(pc, tag, PCI_SYSCTRL, sysctrl);
    875      1.146    dyoung 		cbctl = pci_conf_read(pc, tag, PCI_CBCTRL);
    876      1.146    dyoung 		cbctl |= PCI12XX_CBCTRL_CSC;
    877      1.146    dyoung 		pci_conf_write(pc, tag, PCI_CBCTRL, cbctl);
    878       1.30   mycroft 		break;
    879       1.30   mycroft 
    880       1.30   mycroft 	case CB_TOPIC95B:
    881      1.146    dyoung 		sockctl = pci_conf_read(pc, tag, TOPIC_SOCKET_CTRL);
    882      1.146    dyoung 		sockctl |= TOPIC_SOCKET_CTRL_SCR_IRQSEL;
    883      1.146    dyoung 		pci_conf_write(pc, tag, TOPIC_SOCKET_CTRL, sockctl);
    884      1.146    dyoung 		slotctl = pci_conf_read(pc, tag, TOPIC_SLOT_CTRL);
    885       1.67      haya 		DPRINTF(("%s: topic slot ctrl reg 0x%x -> ",
    886      1.172  drochner 		    device_xname(sc->sc_dev), slotctl));
    887      1.146    dyoung 		slotctl |= (TOPIC_SLOT_CTRL_SLOTON | TOPIC_SLOT_CTRL_SLOTEN |
    888       1.67      haya 		    TOPIC_SLOT_CTRL_ID_LOCK | TOPIC_SLOT_CTRL_CARDBUS);
    889      1.146    dyoung 		slotctl &= ~TOPIC_SLOT_CTRL_SWDETECT;
    890      1.146    dyoung 		DPRINTF(("0x%x\n", slotctl));
    891      1.146    dyoung 		pci_conf_write(pc, tag, TOPIC_SLOT_CTRL, slotctl);
    892       1.67      haya 		break;
    893       1.22    chopps 
    894       1.67      haya 	case CB_TOPIC97:
    895      1.146    dyoung 		slotctl = pci_conf_read(pc, tag, TOPIC_SLOT_CTRL);
    896       1.22    chopps 		DPRINTF(("%s: topic slot ctrl reg 0x%x -> ",
    897      1.172  drochner 		    device_xname(sc->sc_dev), slotctl));
    898      1.146    dyoung 		slotctl |= (TOPIC_SLOT_CTRL_SLOTON | TOPIC_SLOT_CTRL_SLOTEN |
    899       1.30   mycroft 		    TOPIC_SLOT_CTRL_ID_LOCK | TOPIC_SLOT_CTRL_CARDBUS);
    900      1.146    dyoung 		slotctl &= ~TOPIC_SLOT_CTRL_SWDETECT;
    901      1.146    dyoung 		slotctl |= TOPIC97_SLOT_CTRL_PCIINT;
    902      1.146    dyoung 		slotctl &= ~(TOPIC97_SLOT_CTRL_STSIRQP | TOPIC97_SLOT_CTRL_IRQP);
    903      1.146    dyoung 		DPRINTF(("0x%x\n", slotctl));
    904      1.146    dyoung 		pci_conf_write(pc, tag, TOPIC_SLOT_CTRL, slotctl);
    905       1.69      haya 		/* make sure to assert LV card support bits */
    906       1.69      haya 		bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
    907       1.69      haya 		    0x800 + 0x3e,
    908       1.69      haya 		    bus_space_read_1(sc->sc_base_memt, sc->sc_base_memh,
    909       1.69      haya 			0x800 + 0x3e) | 0x03);
    910       1.30   mycroft 		break;
    911       1.22    chopps 	}
    912        1.1      haya 
    913       1.30   mycroft 	/* Close all memory and I/O windows. */
    914       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_MEMBASE0, 0xffffffff);
    915       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_MEMLIMIT0, 0);
    916       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_MEMBASE1, 0xffffffff);
    917       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_MEMLIMIT1, 0);
    918       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_IOBASE0, 0xffffffff);
    919       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_IOLIMIT0, 0);
    920       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_IOBASE1, 0xffffffff);
    921       1.22    chopps 	pci_conf_write(pc, tag, PCI_CB_IOLIMIT1, 0);
    922       1.46      haya 
    923       1.46      haya 	/* reset 16-bit pcmcia bus */
    924       1.69      haya 	bus_space_write_1(bmt, bmh, 0x800 + PCIC_INTR,
    925       1.69      haya 	    bus_space_read_1(bmt, bmh, 0x800 + PCIC_INTR) & ~PCIC_INTR_RESET);
    926       1.46      haya 
    927       1.69      haya 	/* turn off power */
    928      1.160    dyoung 	pccbb_power(sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
    929      1.165    dyoung }
    930      1.165    dyoung 
    931      1.165    dyoung static void
    932      1.165    dyoung pccbb_intrinit(struct pccbb_softc *sc)
    933      1.165    dyoung {
    934      1.165    dyoung 	pcireg_t sockmask;
    935      1.165    dyoung 	const char *intrstr = NULL;
    936      1.165    dyoung 	pci_intr_handle_t ih;
    937      1.165    dyoung 	pci_chipset_tag_t pc = sc->sc_pc;
    938      1.165    dyoung 	bus_space_tag_t bmt = sc->sc_base_memt;
    939      1.165    dyoung 	bus_space_handle_t bmh = sc->sc_base_memh;
    940      1.165    dyoung 
    941      1.165    dyoung 	/* Map and establish the interrupt. */
    942      1.165    dyoung 	if (pci_intr_map(&sc->sc_pa, &ih)) {
    943      1.172  drochner 		aprint_error_dev(sc->sc_dev, "couldn't map interrupt\n");
    944      1.165    dyoung 		return;
    945      1.165    dyoung 	}
    946      1.165    dyoung 	intrstr = pci_intr_string(pc, ih);
    947      1.165    dyoung 
    948      1.165    dyoung 	/*
    949      1.165    dyoung 	 * XXX pccbbintr should be called under the priority lower
    950  1.182.2.1       jym 	 * than any other hard interrupts.
    951      1.165    dyoung 	 */
    952      1.165    dyoung 	KASSERT(sc->sc_ih == NULL);
    953      1.165    dyoung 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, pccbbintr, sc);
    954      1.165    dyoung 
    955      1.165    dyoung 	if (sc->sc_ih == NULL) {
    956      1.172  drochner 		aprint_error_dev(sc->sc_dev, "couldn't establish interrupt");
    957      1.165    dyoung 		if (intrstr != NULL)
    958      1.165    dyoung 			aprint_error(" at %s\n", intrstr);
    959      1.165    dyoung 		else
    960      1.165    dyoung 			aprint_error("\n");
    961      1.165    dyoung 		return;
    962      1.165    dyoung 	}
    963      1.165    dyoung 
    964      1.172  drochner 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
    965       1.69      haya 
    966      1.118  christos 	/* CSC Interrupt: Card detect and power cycle interrupts on */
    967      1.146    dyoung 	sockmask = bus_space_read_4(bmt, bmh, CB_SOCKET_MASK);
    968      1.165    dyoung 	sockmask |= CB_SOCKET_MASK_CSTS | CB_SOCKET_MASK_CD |
    969      1.165    dyoung 	    CB_SOCKET_MASK_POWER;
    970      1.146    dyoung 	bus_space_write_4(bmt, bmh, CB_SOCKET_MASK, sockmask);
    971       1.69      haya 	/* reset interrupt */
    972       1.69      haya 	bus_space_write_4(bmt, bmh, CB_SOCKET_EVENT,
    973       1.69      haya 	    bus_space_read_4(bmt, bmh, CB_SOCKET_EVENT));
    974        1.1      haya }
    975        1.1      haya 
    976        1.4      haya /*
    977       1.26      haya  * STATIC void pccbb_pcmcia_attach_setup(struct pccbb_softc *sc,
    978       1.26      haya  *					 struct pcmciabus_attach_args *paa)
    979       1.26      haya  *
    980       1.26      haya  *   This function attaches 16-bit PCcard bus.
    981        1.4      haya  */
    982        1.1      haya STATIC void
    983      1.143    dyoung pccbb_pcmcia_attach_setup(struct pccbb_softc *sc,
    984      1.143    dyoung     struct pcmciabus_attach_args *paa)
    985        1.1      haya {
    986       1.10      haya #if rbus
    987       1.22    chopps 	rbus_tag_t rb;
    988       1.10      haya #endif
    989       1.31   mycroft 	/*
    990       1.31   mycroft 	 * We need to do a few things here:
    991       1.31   mycroft 	 * 1) Disable routing of CSC and functional interrupts to ISA IRQs by
    992       1.31   mycroft 	 *    setting the IRQ numbers to 0.
    993       1.31   mycroft 	 * 2) Set bit 4 of PCIC_INTR, which is needed on some chips to enable
    994       1.31   mycroft 	 *    routing of CSC interrupts (e.g. card removal) to PCI while in
    995       1.31   mycroft 	 *    PCMCIA mode.  We just leave this set all the time.
    996       1.31   mycroft 	 * 3) Enable card insertion/removal interrupts in case the chip also
    997       1.31   mycroft 	 *    needs that while in PCMCIA mode.
    998       1.31   mycroft 	 * 4) Clear any pending CSC interrupt.
    999       1.31   mycroft 	 */
   1000      1.177  drochner 	Pcic_write(sc, PCIC_INTR, PCIC_INTR_ENABLE);
   1001       1.45      haya 	if (sc->sc_chipset == CB_TI113X) {
   1002      1.177  drochner 		Pcic_write(sc, PCIC_CSC_INTR, 0);
   1003       1.45      haya 	} else {
   1004      1.177  drochner 		Pcic_write(sc, PCIC_CSC_INTR, PCIC_CSC_INTR_CD_ENABLE);
   1005      1.177  drochner 		Pcic_read(sc, PCIC_CSC);
   1006       1.45      haya 	}
   1007       1.22    chopps 
   1008       1.32     enami 	/* initialize pcmcia bus attachment */
   1009       1.22    chopps 	paa->paa_busname = "pcmcia";
   1010      1.177  drochner 	paa->pct = &pccbb_pcmcia_funcs;
   1011      1.177  drochner 	paa->pch = sc;
   1012       1.22    chopps 	paa->iobase = 0;	       /* I don't use them */
   1013       1.22    chopps 	paa->iosize = 0;
   1014       1.10      haya #if rbus
   1015      1.173  drochner 	rb = sc->sc_rbus_iot;
   1016       1.22    chopps 	paa->iobase = rb->rb_start + rb->rb_offset;
   1017       1.22    chopps 	paa->iosize = rb->rb_end - rb->rb_start;
   1018       1.10      haya #endif
   1019        1.1      haya 
   1020       1.22    chopps 	return;
   1021        1.1      haya }
   1022        1.1      haya 
   1023        1.4      haya /*
   1024        1.4      haya  * int pccbbintr(arg)
   1025        1.4      haya  *    void *arg;
   1026        1.4      haya  *   This routine handles the interrupt from Yenta PCI-CardBus bridge
   1027        1.4      haya  *   itself.
   1028        1.4      haya  */
   1029        1.1      haya int
   1030      1.143    dyoung pccbbintr(void *arg)
   1031        1.1      haya {
   1032       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)arg;
   1033       1.31   mycroft 	u_int32_t sockevent, sockstate;
   1034       1.22    chopps 	bus_space_tag_t memt = sc->sc_base_memt;
   1035       1.22    chopps 	bus_space_handle_t memh = sc->sc_base_memh;
   1036       1.22    chopps 
   1037      1.172  drochner 	if (!device_has_power(sc->sc_dev))
   1038      1.165    dyoung 		return 0;
   1039      1.165    dyoung 
   1040       1.22    chopps 	sockevent = bus_space_read_4(memt, memh, CB_SOCKET_EVENT);
   1041       1.31   mycroft 	bus_space_write_4(memt, memh, CB_SOCKET_EVENT, sockevent);
   1042      1.177  drochner 	Pcic_read(sc, PCIC_CSC);
   1043       1.31   mycroft 
   1044      1.152    dyoung 	if (sockevent != 0) {
   1045      1.152    dyoung 		aprint_debug("%s: enter sockevent %" PRIx32 "\n", __func__,
   1046      1.152    dyoung 		    sockevent);
   1047      1.152    dyoung 	}
   1048      1.152    dyoung 
   1049      1.182    dyoung 	/* XXX sockevent == CB_SOCKET_EVENT_CSTS|CB_SOCKET_EVENT_POWER
   1050      1.182    dyoung 	 * does occur in the wild.  Check for a _POWER event before
   1051      1.182    dyoung 	 * possibly exiting because of an _CSTS event.
   1052      1.182    dyoung 	 */
   1053      1.182    dyoung 	if (sockevent & CB_SOCKET_EVENT_POWER) {
   1054      1.182    dyoung 		DPRINTF(("Powercycling because of socket event\n"));
   1055      1.182    dyoung 		/* XXX: Does not happen when attaching a 16-bit card */
   1056      1.182    dyoung 		sc->sc_pwrcycle++;
   1057      1.182    dyoung 		wakeup(&sc->sc_pwrcycle);
   1058      1.182    dyoung 	}
   1059      1.182    dyoung 
   1060      1.152    dyoung 	/* Sometimes a change of CSTSCHG# accompanies the first
   1061      1.152    dyoung 	 * interrupt from an Atheros WLAN.  That generates a
   1062      1.152    dyoung 	 * CB_SOCKET_EVENT_CSTS event on the bridge.  The event
   1063      1.152    dyoung 	 * isn't interesting to pccbb(4), so we used to ignore the
   1064      1.152    dyoung 	 * interrupt.  Now, let the child devices try to handle
   1065      1.152    dyoung 	 * the interrupt, instead.  The Atheros NIC produces
   1066      1.152    dyoung 	 * interrupts more reliably, now: used to be that it would
   1067      1.152    dyoung 	 * only interrupt if the driver avoided powering down the
   1068      1.152    dyoung 	 * NIC's cardslot, and then the NIC would only work after
   1069      1.152    dyoung 	 * it was reset a second time.
   1070      1.152    dyoung 	 */
   1071      1.152    dyoung 	if (sockevent == 0 ||
   1072      1.152    dyoung 	    (sockevent & ~(CB_SOCKET_EVENT_POWER|CB_SOCKET_EVENT_CD)) != 0) {
   1073       1.22    chopps 		/* This intr is not for me: it may be for my child devices. */
   1074       1.38      haya 		if (sc->sc_pil_intr_enable) {
   1075       1.38      haya 			return pccbbintr_function(sc);
   1076       1.38      haya 		} else {
   1077       1.38      haya 			return 0;
   1078       1.38      haya 		}
   1079       1.22    chopps 	}
   1080        1.1      haya 
   1081       1.22    chopps 	if (sockevent & CB_SOCKET_EVENT_CD) {
   1082       1.31   mycroft 		sockstate = bus_space_read_4(memt, memh, CB_SOCKET_STAT);
   1083       1.90   msaitoh 		if (0x00 != (sockstate & CB_SOCKET_STAT_CD)) {
   1084       1.22    chopps 			/* A card should be removed. */
   1085       1.22    chopps 			if (sc->sc_flags & CBB_CARDEXIST) {
   1086      1.164    dyoung 				DPRINTF(("%s: 0x%08x",
   1087      1.172  drochner 				    device_xname(sc->sc_dev), sockevent));
   1088       1.22    chopps 				DPRINTF((" card removed, 0x%08x\n", sockstate));
   1089       1.22    chopps 				sc->sc_flags &= ~CBB_CARDEXIST;
   1090       1.33     enami 				if (sc->sc_csc->sc_status &
   1091       1.33     enami 				    CARDSLOT_STATUS_CARD_16) {
   1092       1.22    chopps 					cardslot_event_throw(sc->sc_csc,
   1093       1.22    chopps 					    CARDSLOT_EVENT_REMOVAL_16);
   1094       1.33     enami 				} else if (sc->sc_csc->sc_status &
   1095       1.33     enami 				    CARDSLOT_STATUS_CARD_CB) {
   1096       1.22    chopps 					/* Cardbus intr removed */
   1097       1.22    chopps 					cardslot_event_throw(sc->sc_csc,
   1098       1.22    chopps 					    CARDSLOT_EVENT_REMOVAL_CB);
   1099       1.22    chopps 				}
   1100       1.74      haya 			} else if (sc->sc_flags & CBB_INSERTING) {
   1101       1.74      haya 				sc->sc_flags &= ~CBB_INSERTING;
   1102       1.74      haya 				callout_stop(&sc->sc_insert_ch);
   1103       1.22    chopps 			}
   1104       1.34     enami 		} else if (0x00 == (sockstate & CB_SOCKET_STAT_CD) &&
   1105       1.34     enami 		    /*
   1106       1.34     enami 		     * The pccbbintr may called from powerdown hook when
   1107       1.34     enami 		     * the system resumed, to detect the card
   1108       1.34     enami 		     * insertion/removal during suspension.
   1109       1.34     enami 		     */
   1110       1.34     enami 		    (sc->sc_flags & CBB_CARDEXIST) == 0) {
   1111       1.22    chopps 			if (sc->sc_flags & CBB_INSERTING) {
   1112       1.37   thorpej 				callout_stop(&sc->sc_insert_ch);
   1113       1.22    chopps 			}
   1114      1.149     joerg 			callout_schedule(&sc->sc_insert_ch, hz / 5);
   1115       1.22    chopps 			sc->sc_flags |= CBB_INSERTING;
   1116       1.22    chopps 		}
   1117       1.22    chopps 	}
   1118        1.1      haya 
   1119       1.33     enami 	return (1);
   1120        1.1      haya }
   1121        1.1      haya 
   1122       1.21      haya /*
   1123       1.21      haya  * static int pccbbintr_function(struct pccbb_softc *sc)
   1124       1.21      haya  *
   1125       1.21      haya  *    This function calls each interrupt handler registered at the
   1126       1.32     enami  *    bridge.  The interrupt handlers are called in registered order.
   1127       1.21      haya  */
   1128       1.21      haya static int
   1129      1.143    dyoung pccbbintr_function(struct pccbb_softc *sc)
   1130       1.21      haya {
   1131       1.22    chopps 	int retval = 0, val;
   1132       1.22    chopps 	struct pccbb_intrhand_list *pil;
   1133      1.138      yamt 	int s;
   1134       1.21      haya 
   1135      1.159    dyoung 	LIST_FOREACH(pil, &sc->sc_pil, pil_next) {
   1136      1.138      yamt 		s = splraiseipl(pil->pil_icookie);
   1137       1.41      haya 		val = (*pil->pil_func)(pil->pil_arg);
   1138      1.138      yamt 		splx(s);
   1139       1.41      haya 
   1140       1.22    chopps 		retval = retval == 1 ? 1 :
   1141       1.22    chopps 		    retval == 0 ? val : val != 0 ? val : retval;
   1142       1.22    chopps 	}
   1143       1.21      haya 
   1144       1.22    chopps 	return retval;
   1145       1.21      haya }
   1146       1.21      haya 
   1147        1.1      haya static void
   1148      1.143    dyoung pci113x_insert(void *arg)
   1149        1.1      haya {
   1150      1.172  drochner 	struct pccbb_softc *sc = arg;
   1151       1.22    chopps 	u_int32_t sockevent, sockstate;
   1152       1.74      haya 
   1153       1.74      haya 	if (!(sc->sc_flags & CBB_INSERTING)) {
   1154       1.74      haya 		/* We add a card only under inserting state. */
   1155       1.74      haya 		return;
   1156       1.74      haya 	}
   1157       1.74      haya 	sc->sc_flags &= ~CBB_INSERTING;
   1158        1.1      haya 
   1159       1.22    chopps 	sockevent = bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
   1160       1.22    chopps 	    CB_SOCKET_EVENT);
   1161       1.22    chopps 	sockstate = bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
   1162       1.22    chopps 	    CB_SOCKET_STAT);
   1163       1.22    chopps 
   1164       1.22    chopps 	if (0 == (sockstate & CB_SOCKET_STAT_CD)) {	/* card exist */
   1165      1.172  drochner 		DPRINTF(("%s: 0x%08x", device_xname(sc->sc_dev), sockevent));
   1166       1.22    chopps 		DPRINTF((" card inserted, 0x%08x\n", sockstate));
   1167       1.22    chopps 		sc->sc_flags |= CBB_CARDEXIST;
   1168       1.32     enami 		/* call pccard interrupt handler here */
   1169       1.22    chopps 		if (sockstate & CB_SOCKET_STAT_16BIT) {
   1170       1.22    chopps 			/* 16-bit card found */
   1171       1.22    chopps 			cardslot_event_throw(sc->sc_csc,
   1172       1.22    chopps 			    CARDSLOT_EVENT_INSERTION_16);
   1173       1.22    chopps 		} else if (sockstate & CB_SOCKET_STAT_CB) {
   1174       1.32     enami 			/* cardbus card found */
   1175       1.22    chopps 			cardslot_event_throw(sc->sc_csc,
   1176       1.22    chopps 			    CARDSLOT_EVENT_INSERTION_CB);
   1177       1.22    chopps 		} else {
   1178       1.22    chopps 			/* who are you? */
   1179       1.22    chopps 		}
   1180       1.22    chopps 	} else {
   1181      1.149     joerg 		callout_schedule(&sc->sc_insert_ch, hz / 10);
   1182       1.22    chopps 	}
   1183        1.1      haya }
   1184        1.1      haya 
   1185        1.1      haya #define PCCBB_PCMCIA_OFFSET 0x800
   1186        1.1      haya static u_int8_t
   1187      1.173  drochner pccbb_pcmcia_read(struct pccbb_softc *sc, int reg)
   1188        1.1      haya {
   1189      1.173  drochner 	bus_space_barrier(sc->sc_base_memt, sc->sc_base_memh,
   1190       1.48      haya 	    PCCBB_PCMCIA_OFFSET + reg, 1, BUS_SPACE_BARRIER_READ);
   1191       1.48      haya 
   1192      1.173  drochner 	return bus_space_read_1(sc->sc_base_memt, sc->sc_base_memh,
   1193       1.22    chopps 	    PCCBB_PCMCIA_OFFSET + reg);
   1194        1.1      haya }
   1195        1.1      haya 
   1196        1.1      haya static void
   1197      1.173  drochner pccbb_pcmcia_write(struct pccbb_softc *sc, int reg, u_int8_t val)
   1198        1.1      haya {
   1199      1.173  drochner 	bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
   1200      1.173  drochner 			  PCCBB_PCMCIA_OFFSET + reg, val);
   1201       1.48      haya 
   1202      1.173  drochner 	bus_space_barrier(sc->sc_base_memt, sc->sc_base_memh,
   1203       1.48      haya 	    PCCBB_PCMCIA_OFFSET + reg, 1, BUS_SPACE_BARRIER_WRITE);
   1204        1.1      haya }
   1205        1.1      haya 
   1206        1.4      haya /*
   1207        1.4      haya  * STATIC int pccbb_ctrl(cardbus_chipset_tag_t, int)
   1208        1.4      haya  */
   1209        1.1      haya STATIC int
   1210      1.143    dyoung pccbb_ctrl(cardbus_chipset_tag_t ct, int command)
   1211        1.1      haya {
   1212       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1213        1.1      haya 
   1214       1.22    chopps 	switch (command) {
   1215       1.22    chopps 	case CARDBUS_CD:
   1216       1.22    chopps 		if (2 == pccbb_detect_card(sc)) {
   1217       1.22    chopps 			int retval = 0;
   1218       1.22    chopps 			int status = cb_detect_voltage(sc);
   1219       1.22    chopps 			if (PCCARD_VCC_5V & status) {
   1220       1.22    chopps 				retval |= CARDBUS_5V_CARD;
   1221       1.22    chopps 			}
   1222       1.22    chopps 			if (PCCARD_VCC_3V & status) {
   1223       1.22    chopps 				retval |= CARDBUS_3V_CARD;
   1224       1.22    chopps 			}
   1225       1.22    chopps 			if (PCCARD_VCC_XV & status) {
   1226       1.22    chopps 				retval |= CARDBUS_XV_CARD;
   1227       1.22    chopps 			}
   1228       1.22    chopps 			if (PCCARD_VCC_YV & status) {
   1229       1.22    chopps 				retval |= CARDBUS_YV_CARD;
   1230       1.22    chopps 			}
   1231       1.22    chopps 			return retval;
   1232       1.22    chopps 		} else {
   1233       1.22    chopps 			return 0;
   1234       1.22    chopps 		}
   1235       1.22    chopps 	case CARDBUS_RESET:
   1236       1.22    chopps 		return cb_reset(sc);
   1237       1.22    chopps 	case CARDBUS_IO_ENABLE:       /* fallthrough */
   1238       1.22    chopps 	case CARDBUS_IO_DISABLE:      /* fallthrough */
   1239       1.22    chopps 	case CARDBUS_MEM_ENABLE:      /* fallthrough */
   1240       1.22    chopps 	case CARDBUS_MEM_DISABLE:     /* fallthrough */
   1241       1.22    chopps 	case CARDBUS_BM_ENABLE:       /* fallthrough */
   1242       1.22    chopps 	case CARDBUS_BM_DISABLE:      /* fallthrough */
   1243       1.69      haya 		/* XXX: I think we don't need to call this function below. */
   1244       1.22    chopps 		return pccbb_cardenable(sc, command);
   1245       1.22    chopps 	}
   1246        1.1      haya 
   1247       1.22    chopps 	return 0;
   1248        1.1      haya }
   1249        1.1      haya 
   1250      1.160    dyoung STATIC int
   1251      1.160    dyoung pccbb_power_ct(cardbus_chipset_tag_t ct, int command)
   1252      1.160    dyoung {
   1253      1.160    dyoung 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1254      1.160    dyoung 
   1255      1.160    dyoung 	return pccbb_power(sc, command);
   1256      1.160    dyoung }
   1257      1.160    dyoung 
   1258        1.4      haya /*
   1259        1.4      haya  * STATIC int pccbb_power(cardbus_chipset_tag_t, int)
   1260        1.4      haya  *   This function returns true when it succeeds and returns false when
   1261        1.4      haya  *   it fails.
   1262        1.4      haya  */
   1263        1.1      haya STATIC int
   1264      1.160    dyoung pccbb_power(struct pccbb_softc *sc, int command)
   1265        1.1      haya {
   1266      1.144    dyoung 	u_int32_t status, osock_ctrl, sock_ctrl, reg_ctrl;
   1267       1.22    chopps 	bus_space_tag_t memt = sc->sc_base_memt;
   1268       1.22    chopps 	bus_space_handle_t memh = sc->sc_base_memh;
   1269      1.144    dyoung 	int on = 0, pwrcycle, s, times;
   1270      1.144    dyoung 	struct timeval before, after, diff;
   1271       1.22    chopps 
   1272       1.95  christos 	DPRINTF(("pccbb_power: %s and %s [0x%x]\n",
   1273       1.22    chopps 	    (command & CARDBUS_VCCMASK) == CARDBUS_VCC_UC ? "CARDBUS_VCC_UC" :
   1274       1.22    chopps 	    (command & CARDBUS_VCCMASK) == CARDBUS_VCC_5V ? "CARDBUS_VCC_5V" :
   1275       1.22    chopps 	    (command & CARDBUS_VCCMASK) == CARDBUS_VCC_3V ? "CARDBUS_VCC_3V" :
   1276       1.22    chopps 	    (command & CARDBUS_VCCMASK) == CARDBUS_VCC_XV ? "CARDBUS_VCC_XV" :
   1277       1.22    chopps 	    (command & CARDBUS_VCCMASK) == CARDBUS_VCC_YV ? "CARDBUS_VCC_YV" :
   1278       1.22    chopps 	    (command & CARDBUS_VCCMASK) == CARDBUS_VCC_0V ? "CARDBUS_VCC_0V" :
   1279       1.22    chopps 	    "UNKNOWN",
   1280       1.22    chopps 	    (command & CARDBUS_VPPMASK) == CARDBUS_VPP_UC ? "CARDBUS_VPP_UC" :
   1281       1.22    chopps 	    (command & CARDBUS_VPPMASK) == CARDBUS_VPP_12V ? "CARDBUS_VPP_12V" :
   1282       1.22    chopps 	    (command & CARDBUS_VPPMASK) == CARDBUS_VPP_VCC ? "CARDBUS_VPP_VCC" :
   1283       1.22    chopps 	    (command & CARDBUS_VPPMASK) == CARDBUS_VPP_0V ? "CARDBUS_VPP_0V" :
   1284       1.22    chopps 	    "UNKNOWN", command));
   1285       1.22    chopps 
   1286       1.22    chopps 	status = bus_space_read_4(memt, memh, CB_SOCKET_STAT);
   1287      1.144    dyoung 	osock_ctrl = sock_ctrl = bus_space_read_4(memt, memh, CB_SOCKET_CTRL);
   1288       1.22    chopps 
   1289       1.22    chopps 	switch (command & CARDBUS_VCCMASK) {
   1290       1.22    chopps 	case CARDBUS_VCC_UC:
   1291       1.22    chopps 		break;
   1292       1.22    chopps 	case CARDBUS_VCC_5V:
   1293      1.111   mycroft 		on++;
   1294       1.22    chopps 		if (CB_SOCKET_STAT_5VCARD & status) {	/* check 5 V card */
   1295       1.22    chopps 			sock_ctrl &= ~CB_SOCKET_CTRL_VCCMASK;
   1296       1.22    chopps 			sock_ctrl |= CB_SOCKET_CTRL_VCC_5V;
   1297       1.22    chopps 		} else {
   1298      1.172  drochner 			aprint_error_dev(sc->sc_dev,
   1299      1.164    dyoung 			    "BAD voltage request: no 5 V card\n");
   1300       1.91    briggs 			return 0;
   1301       1.22    chopps 		}
   1302       1.22    chopps 		break;
   1303       1.22    chopps 	case CARDBUS_VCC_3V:
   1304      1.111   mycroft 		on++;
   1305       1.22    chopps 		if (CB_SOCKET_STAT_3VCARD & status) {
   1306       1.22    chopps 			sock_ctrl &= ~CB_SOCKET_CTRL_VCCMASK;
   1307       1.22    chopps 			sock_ctrl |= CB_SOCKET_CTRL_VCC_3V;
   1308       1.22    chopps 		} else {
   1309      1.172  drochner 			aprint_error_dev(sc->sc_dev,
   1310      1.164    dyoung 			    "BAD voltage request: no 3.3 V card\n");
   1311       1.91    briggs 			return 0;
   1312       1.22    chopps 		}
   1313       1.22    chopps 		break;
   1314       1.22    chopps 	case CARDBUS_VCC_0V:
   1315       1.22    chopps 		sock_ctrl &= ~CB_SOCKET_CTRL_VCCMASK;
   1316       1.22    chopps 		break;
   1317       1.22    chopps 	default:
   1318       1.22    chopps 		return 0;	       /* power NEVER changed */
   1319       1.22    chopps 	}
   1320        1.1      haya 
   1321       1.22    chopps 	switch (command & CARDBUS_VPPMASK) {
   1322       1.22    chopps 	case CARDBUS_VPP_UC:
   1323       1.22    chopps 		break;
   1324       1.22    chopps 	case CARDBUS_VPP_0V:
   1325       1.22    chopps 		sock_ctrl &= ~CB_SOCKET_CTRL_VPPMASK;
   1326       1.22    chopps 		break;
   1327       1.22    chopps 	case CARDBUS_VPP_VCC:
   1328       1.22    chopps 		sock_ctrl &= ~CB_SOCKET_CTRL_VPPMASK;
   1329       1.22    chopps 		sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
   1330       1.22    chopps 		break;
   1331       1.22    chopps 	case CARDBUS_VPP_12V:
   1332       1.22    chopps 		sock_ctrl &= ~CB_SOCKET_CTRL_VPPMASK;
   1333       1.22    chopps 		sock_ctrl |= CB_SOCKET_CTRL_VPP_12V;
   1334       1.22    chopps 		break;
   1335       1.22    chopps 	}
   1336        1.1      haya 
   1337      1.111   mycroft 	pwrcycle = sc->sc_pwrcycle;
   1338      1.172  drochner 	aprint_debug_dev(sc->sc_dev, "osock_ctrl %#" PRIx32
   1339      1.164    dyoung 	    " sock_ctrl %#" PRIx32 "\n", osock_ctrl, sock_ctrl);
   1340      1.111   mycroft 
   1341      1.144    dyoung 	microtime(&before);
   1342      1.144    dyoung 	s = splbio();
   1343       1.22    chopps 	bus_space_write_4(memt, memh, CB_SOCKET_CTRL, sock_ctrl);
   1344      1.111   mycroft 
   1345      1.144    dyoung 	/*
   1346      1.144    dyoung 	 * Wait as long as 200ms for a power-cycle interrupt.  If
   1347      1.144    dyoung 	 * interrupts are enabled, but the socket has already
   1348      1.144    dyoung 	 * changed to the desired status, keep waiting for the
   1349      1.144    dyoung 	 * interrupt.  "Consuming" the interrupt in this way keeps
   1350      1.144    dyoung 	 * the interrupt from prematurely waking some subsequent
   1351      1.144    dyoung 	 * pccbb_power call.
   1352      1.144    dyoung 	 *
   1353      1.144    dyoung 	 * XXX Not every bridge interrupts on the ->OFF transition.
   1354      1.144    dyoung 	 * XXX That's ok, we will time-out after 200ms.
   1355      1.144    dyoung 	 *
   1356      1.144    dyoung 	 * XXX The power cycle event will never happen when attaching
   1357      1.144    dyoung 	 * XXX a 16-bit card.  That's ok, we will time-out after
   1358      1.144    dyoung 	 * XXX 200ms.
   1359      1.144    dyoung 	 */
   1360      1.144    dyoung 	for (times = 5; --times >= 0; ) {
   1361      1.144    dyoung 		if (cold)
   1362      1.144    dyoung 			DELAY(40 * 1000);
   1363      1.144    dyoung 		else {
   1364      1.144    dyoung 			(void)tsleep(&sc->sc_pwrcycle, PWAIT, "pccpwr",
   1365      1.144    dyoung 			    hz / 25);
   1366      1.144    dyoung 			if (pwrcycle == sc->sc_pwrcycle)
   1367      1.144    dyoung 				continue;
   1368      1.118  christos 		}
   1369      1.144    dyoung 		status = bus_space_read_4(memt, memh, CB_SOCKET_STAT);
   1370      1.144    dyoung 		if ((status & CB_SOCKET_STAT_PWRCYCLE) != 0 && on)
   1371      1.144    dyoung 			break;
   1372      1.144    dyoung 		if ((status & CB_SOCKET_STAT_PWRCYCLE) == 0 && !on)
   1373      1.144    dyoung 			break;
   1374      1.144    dyoung 	}
   1375      1.144    dyoung 	splx(s);
   1376      1.144    dyoung 	microtime(&after);
   1377      1.144    dyoung 	timersub(&after, &before, &diff);
   1378      1.181  christos 	aprint_debug_dev(sc->sc_dev, "wait took%s %lld.%06lds\n",
   1379      1.181  christos 	    (on && times < 0) ? " too long" : "", (long long)diff.tv_sec,
   1380      1.181  christos 	    (long)diff.tv_usec);
   1381      1.133  christos 
   1382      1.144    dyoung 	/*
   1383      1.144    dyoung 	 * Ok, wait a bit longer for things to settle.
   1384      1.144    dyoung 	 */
   1385      1.144    dyoung 	if (on && sc->sc_chipset == CB_TOPIC95B)
   1386      1.144    dyoung 		delay_ms(100, sc);
   1387      1.111   mycroft 
   1388       1.22    chopps 	status = bus_space_read_4(memt, memh, CB_SOCKET_STAT);
   1389        1.1      haya 
   1390      1.132  christos 	if (on && sc->sc_chipset != CB_TOPIC95B) {
   1391      1.111   mycroft 		if ((status & CB_SOCKET_STAT_PWRCYCLE) == 0)
   1392      1.172  drochner 			aprint_error_dev(sc->sc_dev, "power on failed?\n");
   1393      1.111   mycroft 	}
   1394      1.111   mycroft 
   1395       1.22    chopps 	if (status & CB_SOCKET_STAT_BADVCC) {	/* bad Vcc request */
   1396      1.172  drochner 		aprint_error_dev(sc->sc_dev,
   1397      1.164    dyoung 		    "bad Vcc request. sock_ctrl 0x%x, sock_status 0x%x\n",
   1398      1.164    dyoung 		    sock_ctrl, status);
   1399      1.172  drochner 		aprint_error_dev(sc->sc_dev, "disabling socket\n");
   1400      1.104   mycroft 		sock_ctrl &= ~CB_SOCKET_CTRL_VCCMASK;
   1401      1.104   mycroft 		sock_ctrl &= ~CB_SOCKET_CTRL_VPPMASK;
   1402      1.104   mycroft 		bus_space_write_4(memt, memh, CB_SOCKET_CTRL, sock_ctrl);
   1403      1.111   mycroft 		status &= ~CB_SOCKET_STAT_BADVCC;
   1404      1.145  christos 		bus_space_write_4(memt, memh, CB_SOCKET_FORCE, status);
   1405      1.104   mycroft 		printf("new status 0x%x\n", bus_space_read_4(memt, memh,
   1406      1.104   mycroft 		    CB_SOCKET_STAT));
   1407       1.22    chopps 		return 0;
   1408       1.77   mycroft 	}
   1409       1.77   mycroft 
   1410       1.77   mycroft 	if (sc->sc_chipset == CB_TOPIC97) {
   1411       1.77   mycroft 		reg_ctrl = pci_conf_read(sc->sc_pc, sc->sc_tag, TOPIC_REG_CTRL);
   1412       1.77   mycroft 		reg_ctrl &= ~TOPIC97_REG_CTRL_TESTMODE;
   1413       1.77   mycroft 		if ((command & CARDBUS_VCCMASK) == CARDBUS_VCC_0V)
   1414       1.77   mycroft 			reg_ctrl &= ~TOPIC97_REG_CTRL_CLKRUN_ENA;
   1415       1.77   mycroft 		else
   1416       1.77   mycroft 			reg_ctrl |= TOPIC97_REG_CTRL_CLKRUN_ENA;
   1417       1.77   mycroft 		pci_conf_write(sc->sc_pc, sc->sc_tag, TOPIC_REG_CTRL, reg_ctrl);
   1418       1.22    chopps 	}
   1419       1.48      haya 
   1420       1.22    chopps 	return 1;		       /* power changed correctly */
   1421        1.1      haya }
   1422        1.1      haya 
   1423        1.4      haya /*
   1424        1.4      haya  * static int pccbb_detect_card(struct pccbb_softc *sc)
   1425        1.4      haya  *   return value:  0 if no card exists.
   1426        1.4      haya  *                  1 if 16-bit card exists.
   1427        1.4      haya  *                  2 if cardbus card exists.
   1428        1.4      haya  */
   1429        1.1      haya static int
   1430      1.143    dyoung pccbb_detect_card(struct pccbb_softc *sc)
   1431        1.1      haya {
   1432       1.22    chopps 	bus_space_handle_t base_memh = sc->sc_base_memh;
   1433       1.22    chopps 	bus_space_tag_t base_memt = sc->sc_base_memt;
   1434       1.22    chopps 	u_int32_t sockstat =
   1435       1.22    chopps 	    bus_space_read_4(base_memt, base_memh, CB_SOCKET_STAT);
   1436       1.22    chopps 	int retval = 0;
   1437       1.22    chopps 
   1438       1.22    chopps 	/* CD1 and CD2 asserted */
   1439       1.22    chopps 	if (0x00 == (sockstat & CB_SOCKET_STAT_CD)) {
   1440       1.22    chopps 		/* card must be present */
   1441       1.22    chopps 		if (!(CB_SOCKET_STAT_NOTCARD & sockstat)) {
   1442       1.22    chopps 			/* NOTACARD DEASSERTED */
   1443       1.22    chopps 			if (CB_SOCKET_STAT_CB & sockstat) {
   1444       1.22    chopps 				/* CardBus mode */
   1445       1.22    chopps 				retval = 2;
   1446       1.22    chopps 			} else if (CB_SOCKET_STAT_16BIT & sockstat) {
   1447       1.22    chopps 				/* 16-bit mode */
   1448       1.22    chopps 				retval = 1;
   1449       1.22    chopps 			}
   1450       1.22    chopps 		}
   1451       1.22    chopps 	}
   1452       1.22    chopps 	return retval;
   1453        1.1      haya }
   1454        1.1      haya 
   1455        1.4      haya /*
   1456        1.4      haya  * STATIC int cb_reset(struct pccbb_softc *sc)
   1457        1.4      haya  *   This function resets CardBus card.
   1458        1.4      haya  */
   1459        1.1      haya STATIC int
   1460      1.143    dyoung cb_reset(struct pccbb_softc *sc)
   1461        1.1      haya {
   1462      1.117     perry 	/*
   1463      1.117     perry 	 * Reset Assert at least 20 ms
   1464       1.22    chopps 	 * Some machines request longer duration.
   1465       1.22    chopps 	 */
   1466       1.22    chopps 	int reset_duration =
   1467      1.136     itohy 	    (sc->sc_chipset == CB_RX5C47X ? 400 : 50);
   1468      1.146    dyoung 	u_int32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG);
   1469      1.153    dyoung 	aprint_debug("%s: enter bcr %" PRIx32 "\n", __func__, bcr);
   1470       1.22    chopps 
   1471       1.40      haya 	/* Reset bit Assert (bit 6 at 0x3E) */
   1472      1.153    dyoung 	bcr |= PCI_BRIDGE_CONTROL_SECBR << PCI_BRIDGE_CONTROL_SHIFT;
   1473      1.146    dyoung 	pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG, bcr);
   1474      1.153    dyoung 	aprint_debug("%s: wrote bcr %" PRIx32 "\n", __func__, bcr);
   1475      1.142    dyoung 	delay_ms(reset_duration, sc);
   1476       1.22    chopps 
   1477       1.22    chopps 	if (CBB_CARDEXIST & sc->sc_flags) {	/* A card exists.  Reset it! */
   1478       1.40      haya 		/* Reset bit Deassert (bit 6 at 0x3E) */
   1479      1.153    dyoung 		bcr &= ~(PCI_BRIDGE_CONTROL_SECBR << PCI_BRIDGE_CONTROL_SHIFT);
   1480      1.153    dyoung 		pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG,
   1481      1.153    dyoung 		    bcr);
   1482      1.153    dyoung 		aprint_debug("%s: wrote bcr %" PRIx32 "\n", __func__, bcr);
   1483      1.142    dyoung 		delay_ms(reset_duration, sc);
   1484      1.153    dyoung 		aprint_debug("%s: end of delay\n", __func__);
   1485       1.22    chopps 	}
   1486       1.22    chopps 	/* No card found on the slot. Keep Reset. */
   1487       1.22    chopps 	return 1;
   1488        1.1      haya }
   1489        1.1      haya 
   1490        1.4      haya /*
   1491        1.4      haya  * STATIC int cb_detect_voltage(struct pccbb_softc *sc)
   1492        1.4      haya  *  This function detect card Voltage.
   1493        1.4      haya  */
   1494        1.1      haya STATIC int
   1495      1.143    dyoung cb_detect_voltage(struct pccbb_softc *sc)
   1496        1.1      haya {
   1497       1.22    chopps 	u_int32_t psr;		       /* socket present-state reg */
   1498       1.22    chopps 	bus_space_tag_t iot = sc->sc_base_memt;
   1499       1.22    chopps 	bus_space_handle_t ioh = sc->sc_base_memh;
   1500       1.22    chopps 	int vol = PCCARD_VCC_UKN;      /* set 0 */
   1501       1.22    chopps 
   1502       1.22    chopps 	psr = bus_space_read_4(iot, ioh, CB_SOCKET_STAT);
   1503        1.1      haya 
   1504       1.22    chopps 	if (0x400u & psr) {
   1505       1.22    chopps 		vol |= PCCARD_VCC_5V;
   1506       1.22    chopps 	}
   1507       1.22    chopps 	if (0x800u & psr) {
   1508       1.22    chopps 		vol |= PCCARD_VCC_3V;
   1509       1.22    chopps 	}
   1510        1.1      haya 
   1511       1.22    chopps 	return vol;
   1512        1.1      haya }
   1513        1.1      haya 
   1514        1.1      haya STATIC int
   1515      1.137  christos cbbprint(void *aux, const char *pcic)
   1516        1.1      haya {
   1517      1.135  christos #if 0
   1518      1.135  christos 	struct cbslot_attach_args *cba = aux;
   1519        1.1      haya 
   1520      1.135  christos 	if (cba->cba_slot >= 0) {
   1521      1.135  christos 		aprint_normal(" slot %d", cba->cba_slot);
   1522      1.135  christos 	}
   1523      1.135  christos #endif
   1524       1.22    chopps 	return UNCONF;
   1525        1.1      haya }
   1526        1.1      haya 
   1527        1.4      haya /*
   1528        1.4      haya  * STATIC int pccbb_cardenable(struct pccbb_softc *sc, int function)
   1529        1.4      haya  *   This function enables and disables the card
   1530        1.4      haya  */
   1531        1.1      haya STATIC int
   1532      1.143    dyoung pccbb_cardenable(struct pccbb_softc *sc, int function)
   1533        1.1      haya {
   1534       1.22    chopps 	u_int32_t command =
   1535       1.22    chopps 	    pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
   1536        1.1      haya 
   1537       1.22    chopps 	DPRINTF(("pccbb_cardenable:"));
   1538       1.22    chopps 	switch (function) {
   1539       1.22    chopps 	case CARDBUS_IO_ENABLE:
   1540       1.22    chopps 		command |= PCI_COMMAND_IO_ENABLE;
   1541       1.22    chopps 		break;
   1542       1.22    chopps 	case CARDBUS_IO_DISABLE:
   1543       1.22    chopps 		command &= ~PCI_COMMAND_IO_ENABLE;
   1544       1.22    chopps 		break;
   1545       1.22    chopps 	case CARDBUS_MEM_ENABLE:
   1546       1.22    chopps 		command |= PCI_COMMAND_MEM_ENABLE;
   1547       1.22    chopps 		break;
   1548       1.22    chopps 	case CARDBUS_MEM_DISABLE:
   1549       1.22    chopps 		command &= ~PCI_COMMAND_MEM_ENABLE;
   1550       1.22    chopps 		break;
   1551       1.22    chopps 	case CARDBUS_BM_ENABLE:
   1552       1.22    chopps 		command |= PCI_COMMAND_MASTER_ENABLE;
   1553       1.22    chopps 		break;
   1554       1.22    chopps 	case CARDBUS_BM_DISABLE:
   1555       1.22    chopps 		command &= ~PCI_COMMAND_MASTER_ENABLE;
   1556       1.22    chopps 		break;
   1557       1.22    chopps 	default:
   1558       1.22    chopps 		return 0;
   1559       1.22    chopps 	}
   1560        1.1      haya 
   1561       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, command);
   1562       1.22    chopps 	DPRINTF((" command reg 0x%x\n", command));
   1563       1.22    chopps 	return 1;
   1564        1.1      haya }
   1565        1.1      haya 
   1566        1.1      haya #if !rbus
   1567        1.1      haya static int
   1568      1.143    dyoung pccbb_io_open(cardbus_chipset_tag_t ct, int win, uint32_t start, uint32_t end)
   1569       1.22    chopps {
   1570       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1571       1.22    chopps 	int basereg;
   1572       1.22    chopps 	int limitreg;
   1573        1.1      haya 
   1574       1.22    chopps 	if ((win < 0) || (win > 2)) {
   1575        1.1      haya #if defined DIAGNOSTIC
   1576       1.22    chopps 		printf("cardbus_io_open: window out of range %d\n", win);
   1577        1.1      haya #endif
   1578       1.22    chopps 		return 0;
   1579       1.22    chopps 	}
   1580        1.1      haya 
   1581      1.161    dyoung 	basereg = win * 8 + PCI_CB_IOBASE0;
   1582      1.161    dyoung 	limitreg = win * 8 + PCI_CB_IOLIMIT0;
   1583        1.1      haya 
   1584       1.22    chopps 	DPRINTF(("pccbb_io_open: 0x%x[0x%x] - 0x%x[0x%x]\n",
   1585       1.22    chopps 	    start, basereg, end, limitreg));
   1586        1.1      haya 
   1587       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, basereg, start);
   1588       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, limitreg, end);
   1589       1.22    chopps 	return 1;
   1590        1.1      haya }
   1591       1.22    chopps 
   1592        1.4      haya /*
   1593        1.4      haya  * int pccbb_io_close(cardbus_chipset_tag_t, int)
   1594        1.4      haya  */
   1595        1.1      haya static int
   1596      1.143    dyoung pccbb_io_close(cardbus_chipset_tag_t ct, int win)
   1597        1.1      haya {
   1598       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1599       1.22    chopps 	int basereg;
   1600       1.22    chopps 	int limitreg;
   1601        1.1      haya 
   1602       1.22    chopps 	if ((win < 0) || (win > 2)) {
   1603        1.1      haya #if defined DIAGNOSTIC
   1604       1.22    chopps 		printf("cardbus_io_close: window out of range %d\n", win);
   1605        1.1      haya #endif
   1606       1.22    chopps 		return 0;
   1607       1.22    chopps 	}
   1608        1.1      haya 
   1609      1.161    dyoung 	basereg = win * 8 + PCI_CB_IOBASE0;
   1610      1.161    dyoung 	limitreg = win * 8 + PCI_CB_IOLIMIT0;
   1611        1.1      haya 
   1612       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, basereg, 0);
   1613       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, limitreg, 0);
   1614       1.22    chopps 	return 1;
   1615        1.1      haya }
   1616        1.1      haya 
   1617        1.1      haya static int
   1618      1.143    dyoung pccbb_mem_open(cardbus_chipset_tag_t ct, int win, uint32_t start, uint32_t end)
   1619       1.22    chopps {
   1620       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1621       1.22    chopps 	int basereg;
   1622       1.22    chopps 	int limitreg;
   1623        1.1      haya 
   1624       1.22    chopps 	if ((win < 0) || (win > 2)) {
   1625        1.1      haya #if defined DIAGNOSTIC
   1626       1.22    chopps 		printf("cardbus_mem_open: window out of range %d\n", win);
   1627        1.1      haya #endif
   1628       1.22    chopps 		return 0;
   1629       1.22    chopps 	}
   1630        1.1      haya 
   1631      1.161    dyoung 	basereg = win * 8 + PCI_CB_MEMBASE0;
   1632      1.161    dyoung 	limitreg = win * 8 + PCI_CB_MEMLIMIT0;
   1633        1.1      haya 
   1634       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, basereg, start);
   1635       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, limitreg, end);
   1636       1.22    chopps 	return 1;
   1637        1.1      haya }
   1638        1.1      haya 
   1639        1.1      haya static int
   1640      1.143    dyoung pccbb_mem_close(cardbus_chipset_tag_t ct, int win)
   1641        1.1      haya {
   1642       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1643       1.22    chopps 	int basereg;
   1644       1.22    chopps 	int limitreg;
   1645        1.1      haya 
   1646       1.22    chopps 	if ((win < 0) || (win > 2)) {
   1647        1.1      haya #if defined DIAGNOSTIC
   1648       1.22    chopps 		printf("cardbus_mem_close: window out of range %d\n", win);
   1649        1.1      haya #endif
   1650       1.22    chopps 		return 0;
   1651       1.22    chopps 	}
   1652        1.1      haya 
   1653      1.161    dyoung 	basereg = win * 8 + PCI_CB_MEMBASE0;
   1654      1.161    dyoung 	limitreg = win * 8 + PCI_CB_MEMLIMIT0;
   1655        1.1      haya 
   1656       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, basereg, 0);
   1657       1.22    chopps 	pci_conf_write(sc->sc_pc, sc->sc_tag, limitreg, 0);
   1658       1.22    chopps 	return 1;
   1659        1.1      haya }
   1660        1.1      haya #endif
   1661        1.1      haya 
   1662       1.21      haya /*
   1663       1.26      haya  * static void *pccbb_cb_intr_establish(cardbus_chipset_tag_t ct,
   1664       1.26      haya  *					int irq,
   1665       1.26      haya  *					int level,
   1666      1.116     perry  *					int (* func)(void *),
   1667       1.26      haya  *					void *arg)
   1668       1.26      haya  *
   1669       1.26      haya  *   This function registers an interrupt handler at the bridge, in
   1670       1.32     enami  *   order not to call the interrupt handlers of child devices when
   1671       1.32     enami  *   a card-deletion interrupt occurs.
   1672       1.26      haya  *
   1673       1.26      haya  *   The arguments irq and level are not used.
   1674       1.26      haya  */
   1675       1.26      haya static void *
   1676      1.171  drochner pccbb_cb_intr_establish(cardbus_chipset_tag_t ct, cardbus_intr_line_t irq,
   1677      1.171  drochner     int level, int (*func)(void *), void *arg)
   1678       1.26      haya {
   1679       1.26      haya 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1680       1.26      haya 
   1681       1.26      haya 	return pccbb_intr_establish(sc, irq, level, func, arg);
   1682       1.26      haya }
   1683       1.26      haya 
   1684       1.26      haya 
   1685       1.26      haya /*
   1686       1.26      haya  * static void *pccbb_cb_intr_disestablish(cardbus_chipset_tag_t ct,
   1687       1.26      haya  *					   void *ih)
   1688       1.26      haya  *
   1689       1.26      haya  *   This function removes an interrupt handler pointed by ih.
   1690       1.26      haya  */
   1691       1.26      haya static void
   1692      1.143    dyoung pccbb_cb_intr_disestablish(cardbus_chipset_tag_t ct, void *ih)
   1693       1.26      haya {
   1694       1.26      haya 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   1695       1.26      haya 
   1696       1.26      haya 	pccbb_intr_disestablish(sc, ih);
   1697       1.26      haya }
   1698       1.26      haya 
   1699       1.26      haya 
   1700       1.65       mcr void
   1701      1.143    dyoung pccbb_intr_route(struct pccbb_softc *sc)
   1702       1.65       mcr {
   1703      1.143    dyoung 	pcireg_t bcr, cbctrl;
   1704       1.65       mcr 
   1705      1.143    dyoung 	/* initialize bridge intr routing */
   1706      1.146    dyoung 	bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG);
   1707      1.143    dyoung 	bcr &= ~CB_BCR_INTR_IREQ_ENABLE;
   1708      1.146    dyoung 	pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG, bcr);
   1709      1.143    dyoung 
   1710      1.143    dyoung 	switch (sc->sc_chipset) {
   1711      1.143    dyoung 	case CB_TI113X:
   1712      1.143    dyoung 		cbctrl = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CBCTRL);
   1713      1.143    dyoung 		/* functional intr enabled */
   1714      1.143    dyoung 		cbctrl |= PCI113X_CBCTRL_PCI_INTR;
   1715      1.143    dyoung 		pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_CBCTRL, cbctrl);
   1716      1.143    dyoung 		break;
   1717      1.143    dyoung 	default:
   1718      1.143    dyoung 		break;
   1719      1.143    dyoung 	}
   1720       1.65       mcr }
   1721       1.65       mcr 
   1722       1.26      haya /*
   1723       1.26      haya  * static void *pccbb_intr_establish(struct pccbb_softc *sc,
   1724       1.21      haya  *				     int irq,
   1725       1.21      haya  *				     int level,
   1726      1.116     perry  *				     int (* func)(void *),
   1727       1.21      haya  *				     void *arg)
   1728       1.21      haya  *
   1729       1.21      haya  *   This function registers an interrupt handler at the bridge, in
   1730       1.32     enami  *   order not to call the interrupt handlers of child devices when
   1731       1.32     enami  *   a card-deletion interrupt occurs.
   1732       1.21      haya  *
   1733       1.41      haya  *   The arguments irq is not used because pccbb selects intr vector.
   1734       1.21      haya  */
   1735        1.1      haya static void *
   1736      1.171  drochner pccbb_intr_establish(struct pccbb_softc *sc, cardbus_intr_line_t irq,
   1737      1.171  drochner     int level, int (*func)(void *), void *arg)
   1738       1.22    chopps {
   1739       1.22    chopps 	struct pccbb_intrhand_list *pil, *newpil;
   1740       1.22    chopps 
   1741       1.81      onoe 	DPRINTF(("pccbb_intr_establish start. %p\n", LIST_FIRST(&sc->sc_pil)));
   1742       1.26      haya 
   1743       1.80      haya 	if (LIST_EMPTY(&sc->sc_pil)) {
   1744       1.80      haya 		pccbb_intr_route(sc);
   1745       1.22    chopps 	}
   1746       1.22    chopps 
   1747      1.117     perry 	/*
   1748       1.32     enami 	 * Allocate a room for interrupt handler structure.
   1749       1.22    chopps 	 */
   1750       1.22    chopps 	if (NULL == (newpil =
   1751       1.22    chopps 	    (struct pccbb_intrhand_list *)malloc(sizeof(struct
   1752       1.22    chopps 	    pccbb_intrhand_list), M_DEVBUF, M_WAITOK))) {
   1753       1.22    chopps 		return NULL;
   1754       1.22    chopps 	}
   1755       1.21      haya 
   1756       1.22    chopps 	newpil->pil_func = func;
   1757       1.22    chopps 	newpil->pil_arg = arg;
   1758      1.138      yamt 	newpil->pil_icookie = makeiplcookie(level);
   1759       1.21      haya 
   1760       1.80      haya 	if (LIST_EMPTY(&sc->sc_pil)) {
   1761       1.80      haya 		LIST_INSERT_HEAD(&sc->sc_pil, newpil, pil_next);
   1762       1.22    chopps 	} else {
   1763       1.80      haya 		for (pil = LIST_FIRST(&sc->sc_pil);
   1764       1.80      haya 		     LIST_NEXT(pil, pil_next) != NULL;
   1765       1.80      haya 		     pil = LIST_NEXT(pil, pil_next));
   1766       1.80      haya 		LIST_INSERT_AFTER(pil, newpil, pil_next);
   1767       1.21      haya 	}
   1768        1.1      haya 
   1769       1.81      onoe 	DPRINTF(("pccbb_intr_establish add pil. %p\n",
   1770       1.81      onoe 	    LIST_FIRST(&sc->sc_pil)));
   1771       1.26      haya 
   1772       1.22    chopps 	return newpil;
   1773        1.1      haya }
   1774        1.1      haya 
   1775       1.21      haya /*
   1776       1.26      haya  * static void *pccbb_intr_disestablish(struct pccbb_softc *sc,
   1777       1.21      haya  *					void *ih)
   1778       1.21      haya  *
   1779       1.80      haya  *	This function removes an interrupt handler pointed by ih.  ih
   1780       1.80      haya  *	should be the value returned by cardbus_intr_establish() or
   1781       1.80      haya  *	NULL.
   1782       1.80      haya  *
   1783       1.80      haya  *	When ih is NULL, this function will do nothing.
   1784       1.21      haya  */
   1785        1.1      haya static void
   1786      1.143    dyoung pccbb_intr_disestablish(struct pccbb_softc *sc, void *ih)
   1787        1.1      haya {
   1788       1.80      haya 	struct pccbb_intrhand_list *pil;
   1789       1.48      haya 	pcireg_t reg;
   1790       1.21      haya 
   1791       1.81      onoe 	DPRINTF(("pccbb_intr_disestablish start. %p\n",
   1792       1.81      onoe 	    LIST_FIRST(&sc->sc_pil)));
   1793       1.26      haya 
   1794       1.80      haya 	if (ih == NULL) {
   1795       1.80      haya 		/* intr handler is not set */
   1796       1.80      haya 		DPRINTF(("pccbb_intr_disestablish: no ih\n"));
   1797       1.80      haya 		return;
   1798       1.80      haya 	}
   1799       1.22    chopps 
   1800       1.80      haya #ifdef DIAGNOSTIC
   1801      1.159    dyoung 	LIST_FOREACH(pil, &sc->sc_pil, pil_next) {
   1802       1.83    atatat 		DPRINTF(("pccbb_intr_disestablish: pil %p\n", pil));
   1803       1.22    chopps 		if (pil == ih) {
   1804       1.26      haya 			DPRINTF(("pccbb_intr_disestablish frees one pil\n"));
   1805       1.22    chopps 			break;
   1806       1.22    chopps 		}
   1807       1.21      haya 	}
   1808       1.80      haya 	if (pil == NULL) {
   1809       1.80      haya 		panic("pccbb_intr_disestablish: %s cannot find pil %p",
   1810      1.172  drochner 		    device_xname(sc->sc_dev), ih);
   1811       1.80      haya 	}
   1812       1.80      haya #endif
   1813       1.80      haya 
   1814       1.80      haya 	pil = (struct pccbb_intrhand_list *)ih;
   1815       1.80      haya 	LIST_REMOVE(pil, pil_next);
   1816       1.80      haya 	free(pil, M_DEVBUF);
   1817       1.80      haya 	DPRINTF(("pccbb_intr_disestablish frees one pil\n"));
   1818       1.21      haya 
   1819       1.80      haya 	if (LIST_EMPTY(&sc->sc_pil)) {
   1820       1.22    chopps 		/* No interrupt handlers */
   1821       1.21      haya 
   1822       1.26      haya 		DPRINTF(("pccbb_intr_disestablish: no interrupt handler\n"));
   1823       1.26      haya 
   1824       1.48      haya 		/* stop routing PCI intr */
   1825      1.146    dyoung 		reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG);
   1826       1.48      haya 		reg |= CB_BCR_INTR_IREQ_ENABLE;
   1827      1.146    dyoung 		pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG, reg);
   1828       1.48      haya 
   1829       1.22    chopps 		switch (sc->sc_chipset) {
   1830       1.22    chopps 		case CB_TI113X:
   1831       1.48      haya 			reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CBCTRL);
   1832       1.48      haya 			/* functional intr disabled */
   1833       1.48      haya 			reg &= ~PCI113X_CBCTRL_PCI_INTR;
   1834       1.48      haya 			pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_CBCTRL, reg);
   1835       1.48      haya 			break;
   1836       1.22    chopps 		default:
   1837       1.22    chopps 			break;
   1838       1.22    chopps 		}
   1839       1.21      haya 	}
   1840        1.1      haya }
   1841        1.1      haya 
   1842        1.1      haya #if defined SHOW_REGS
   1843        1.1      haya static void
   1844      1.143    dyoung cb_show_regs(pci_chipset_tag_t pc, pcitag_t tag, bus_space_tag_t memt,
   1845      1.143    dyoung     bus_space_handle_t memh)
   1846       1.22    chopps {
   1847       1.22    chopps 	int i;
   1848       1.22    chopps 	printf("PCI config regs:");
   1849       1.22    chopps 	for (i = 0; i < 0x50; i += 4) {
   1850      1.143    dyoung 		if (i % 16 == 0)
   1851       1.22    chopps 			printf("\n 0x%02x:", i);
   1852       1.22    chopps 		printf(" %08x", pci_conf_read(pc, tag, i));
   1853       1.22    chopps 	}
   1854       1.22    chopps 	for (i = 0x80; i < 0xb0; i += 4) {
   1855      1.143    dyoung 		if (i % 16 == 0)
   1856       1.22    chopps 			printf("\n 0x%02x:", i);
   1857       1.22    chopps 		printf(" %08x", pci_conf_read(pc, tag, i));
   1858       1.22    chopps 	}
   1859        1.1      haya 
   1860       1.22    chopps 	if (memh == 0) {
   1861       1.22    chopps 		printf("\n");
   1862       1.22    chopps 		return;
   1863       1.22    chopps 	}
   1864        1.1      haya 
   1865       1.22    chopps 	printf("\nsocket regs:");
   1866      1.143    dyoung 	for (i = 0; i <= 0x10; i += 0x04)
   1867       1.22    chopps 		printf(" %08x", bus_space_read_4(memt, memh, i));
   1868       1.22    chopps 	printf("\nExCA regs:");
   1869      1.143    dyoung 	for (i = 0; i < 0x08; ++i)
   1870       1.22    chopps 		printf(" %02x", bus_space_read_1(memt, memh, 0x800 + i));
   1871       1.22    chopps 	printf("\n");
   1872       1.22    chopps 	return;
   1873        1.1      haya }
   1874        1.1      haya #endif
   1875        1.1      haya 
   1876        1.4      haya /*
   1877        1.4      haya  * static cardbustag_t pccbb_make_tag(cardbus_chipset_tag_t cc,
   1878      1.125  drochner  *                                    int busno, int function)
   1879        1.4      haya  *   This is the function to make a tag to access config space of
   1880        1.4      haya  *  a CardBus Card.  It works same as pci_conf_read.
   1881        1.4      haya  */
   1882        1.1      haya static cardbustag_t
   1883      1.143    dyoung pccbb_make_tag(cardbus_chipset_tag_t cc, int busno, int function)
   1884        1.1      haya {
   1885       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)cc;
   1886        1.1      haya 
   1887      1.125  drochner 	return pci_make_tag(sc->sc_pc, busno, 0, function);
   1888        1.1      haya }
   1889        1.1      haya 
   1890        1.1      haya static void
   1891      1.137  christos pccbb_free_tag(cardbus_chipset_tag_t cc, cardbustag_t tag)
   1892        1.1      haya {
   1893        1.1      haya }
   1894        1.1      haya 
   1895        1.4      haya /*
   1896      1.143    dyoung  * pccbb_conf_read
   1897      1.143    dyoung  *
   1898      1.143    dyoung  * This is the function to read the config space of a CardBus card.
   1899      1.143    dyoung  * It works the same as pci_conf_read(9).
   1900        1.4      haya  */
   1901        1.1      haya static cardbusreg_t
   1902      1.143    dyoung pccbb_conf_read(cardbus_chipset_tag_t cc, cardbustag_t tag, int offset)
   1903        1.1      haya {
   1904       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)cc;
   1905      1.178  drochner 	pcitag_t brtag = sc->sc_tag;
   1906      1.178  drochner 	cardbusreg_t reg;
   1907        1.1      haya 
   1908      1.178  drochner 	/*
   1909      1.178  drochner 	 * clear cardbus master abort status; it is OK to write without
   1910      1.178  drochner 	 * reading before because all bits are r/o or w1tc
   1911      1.178  drochner 	 */
   1912      1.178  drochner 	pci_conf_write(sc->sc_pc, brtag, PCI_CBB_SECSTATUS,
   1913      1.178  drochner 		       CBB_SECSTATUS_CBMABORT);
   1914      1.178  drochner 	reg = pci_conf_read(sc->sc_pc, tag, offset);
   1915      1.178  drochner 	/* check cardbus master abort status */
   1916      1.178  drochner 	if (pci_conf_read(sc->sc_pc, brtag, PCI_CBB_SECSTATUS)
   1917      1.178  drochner 			  & CBB_SECSTATUS_CBMABORT)
   1918      1.178  drochner 		return (0xffffffff);
   1919      1.178  drochner 	return reg;
   1920        1.1      haya }
   1921        1.1      haya 
   1922        1.4      haya /*
   1923      1.143    dyoung  * pccbb_conf_write
   1924      1.143    dyoung  *
   1925      1.143    dyoung  * This is the function to write the config space of a CardBus
   1926      1.143    dyoung  * card.  It works the same as pci_conf_write(9).
   1927        1.4      haya  */
   1928        1.1      haya static void
   1929      1.143    dyoung pccbb_conf_write(cardbus_chipset_tag_t cc, cardbustag_t tag, int reg,
   1930      1.143    dyoung     cardbusreg_t val)
   1931        1.1      haya {
   1932       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)cc;
   1933        1.1      haya 
   1934       1.22    chopps 	pci_conf_write(sc->sc_pc, tag, reg, val);
   1935        1.1      haya }
   1936        1.1      haya 
   1937        1.1      haya #if 0
   1938        1.1      haya STATIC int
   1939        1.1      haya pccbb_new_pcmcia_io_alloc(pcmcia_chipset_handle_t pch,
   1940       1.22    chopps     bus_addr_t start, bus_size_t size, bus_size_t align, bus_addr_t mask,
   1941       1.22    chopps     int speed, int flags,
   1942       1.22    chopps     bus_space_handle_t * iohp)
   1943        1.1      haya #endif
   1944        1.4      haya /*
   1945        1.4      haya  * STATIC int pccbb_pcmcia_io_alloc(pcmcia_chipset_handle_t pch,
   1946        1.4      haya  *                                  bus_addr_t start, bus_size_t size,
   1947        1.4      haya  *                                  bus_size_t align,
   1948        1.4      haya  *                                  struct pcmcia_io_handle *pcihp
   1949        1.4      haya  *
   1950        1.4      haya  * This function only allocates I/O region for pccard. This function
   1951       1.32     enami  * never maps the allocated region to pccard I/O area.
   1952        1.4      haya  *
   1953        1.4      haya  * XXX: The interface of this function is not very good, I believe.
   1954        1.4      haya  */
   1955       1.22    chopps STATIC int
   1956      1.143    dyoung pccbb_pcmcia_io_alloc(pcmcia_chipset_handle_t pch, bus_addr_t start,
   1957      1.143    dyoung     bus_size_t size, bus_size_t align, struct pcmcia_io_handle *pcihp)
   1958       1.22    chopps {
   1959      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   1960       1.22    chopps 	bus_addr_t ioaddr;
   1961       1.22    chopps 	int flags = 0;
   1962       1.22    chopps 	bus_space_tag_t iot;
   1963       1.22    chopps 	bus_space_handle_t ioh;
   1964       1.57      haya 	bus_addr_t mask;
   1965        1.1      haya #if rbus
   1966       1.22    chopps 	rbus_tag_t rb;
   1967        1.1      haya #endif
   1968       1.22    chopps 	if (align == 0) {
   1969       1.22    chopps 		align = size;	       /* XXX: funny??? */
   1970       1.22    chopps 	}
   1971        1.1      haya 
   1972       1.57      haya 	if (start != 0) {
   1973       1.57      haya 		/* XXX: assume all card decode lower 10 bits by its hardware */
   1974       1.57      haya 		mask = 0x3ff;
   1975       1.75      haya 		/* enforce to use only masked address */
   1976       1.75      haya 		start &= mask;
   1977       1.57      haya 	} else {
   1978       1.57      haya 		/*
   1979       1.57      haya 		 * calculate mask:
   1980       1.57      haya 		 *  1. get the most significant bit of size (call it msb).
   1981       1.57      haya 		 *  2. compare msb with the value of size.
   1982       1.57      haya 		 *  3. if size is larger, shift msb left once.
   1983       1.57      haya 		 *  4. obtain mask value to decrement msb.
   1984       1.57      haya 		 */
   1985       1.57      haya 		bus_size_t size_tmp = size;
   1986       1.57      haya 		int shifts = 0;
   1987       1.57      haya 
   1988       1.57      haya 		mask = 1;
   1989       1.57      haya 		while (size_tmp) {
   1990       1.57      haya 			++shifts;
   1991       1.57      haya 			size_tmp >>= 1;
   1992       1.57      haya 		}
   1993       1.57      haya 		mask = (1 << shifts);
   1994       1.57      haya 		if (mask < size) {
   1995       1.57      haya 			mask <<= 1;
   1996       1.57      haya 		}
   1997       1.57      haya 		--mask;
   1998       1.57      haya 	}
   1999       1.57      haya 
   2000      1.117     perry 	/*
   2001       1.22    chopps 	 * Allocate some arbitrary I/O space.
   2002       1.22    chopps 	 */
   2003        1.1      haya 
   2004      1.177  drochner 	iot = sc->sc_iot;
   2005        1.1      haya 
   2006        1.1      haya #if rbus
   2007      1.177  drochner 	rb = sc->sc_rbus_iot;
   2008       1.57      haya 	if (rbus_space_alloc(rb, start, size, mask, align, 0, &ioaddr, &ioh)) {
   2009       1.22    chopps 		return 1;
   2010       1.22    chopps 	}
   2011       1.95  christos 	DPRINTF(("pccbb_pcmcia_io_alloc alloc port 0x%lx+0x%lx\n",
   2012       1.81      onoe 	    (u_long) ioaddr, (u_long) size));
   2013       1.22    chopps #else
   2014       1.22    chopps 	if (start) {
   2015       1.22    chopps 		ioaddr = start;
   2016       1.22    chopps 		if (bus_space_map(iot, start, size, 0, &ioh)) {
   2017       1.22    chopps 			return 1;
   2018       1.22    chopps 		}
   2019       1.95  christos 		DPRINTF(("pccbb_pcmcia_io_alloc map port 0x%lx+0x%lx\n",
   2020       1.22    chopps 		    (u_long) ioaddr, (u_long) size));
   2021       1.22    chopps 	} else {
   2022       1.22    chopps 		flags |= PCMCIA_IO_ALLOCATED;
   2023       1.22    chopps 		if (bus_space_alloc(iot, 0x700 /* ph->sc->sc_iobase */ ,
   2024       1.22    chopps 		    0x800,	/* ph->sc->sc_iobase + ph->sc->sc_iosize */
   2025       1.22    chopps 		    size, align, 0, 0, &ioaddr, &ioh)) {
   2026       1.22    chopps 			/* No room be able to be get. */
   2027       1.22    chopps 			return 1;
   2028       1.22    chopps 		}
   2029       1.22    chopps 		DPRINTF(("pccbb_pcmmcia_io_alloc alloc port 0x%lx+0x%lx\n",
   2030       1.22    chopps 		    (u_long) ioaddr, (u_long) size));
   2031       1.22    chopps 	}
   2032        1.1      haya #endif
   2033        1.1      haya 
   2034       1.22    chopps 	pcihp->iot = iot;
   2035       1.22    chopps 	pcihp->ioh = ioh;
   2036       1.22    chopps 	pcihp->addr = ioaddr;
   2037       1.22    chopps 	pcihp->size = size;
   2038       1.22    chopps 	pcihp->flags = flags;
   2039        1.1      haya 
   2040       1.22    chopps 	return 0;
   2041        1.1      haya }
   2042        1.1      haya 
   2043        1.4      haya /*
   2044        1.4      haya  * STATIC int pccbb_pcmcia_io_free(pcmcia_chipset_handle_t pch,
   2045        1.4      haya  *                                 struct pcmcia_io_handle *pcihp)
   2046        1.4      haya  *
   2047        1.4      haya  * This function only frees I/O region for pccard.
   2048        1.4      haya  *
   2049        1.4      haya  * XXX: The interface of this function is not very good, I believe.
   2050        1.4      haya  */
   2051       1.22    chopps void
   2052      1.143    dyoung pccbb_pcmcia_io_free(pcmcia_chipset_handle_t pch,
   2053      1.143    dyoung     struct pcmcia_io_handle *pcihp)
   2054        1.1      haya {
   2055      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2056        1.1      haya #if !rbus
   2057       1.22    chopps 	bus_space_tag_t iot = pcihp->iot;
   2058        1.1      haya #endif
   2059       1.22    chopps 	bus_space_handle_t ioh = pcihp->ioh;
   2060       1.22    chopps 	bus_size_t size = pcihp->size;
   2061        1.1      haya 
   2062        1.1      haya #if rbus
   2063       1.22    chopps 	rbus_tag_t rb = sc->sc_rbus_iot;
   2064        1.1      haya 
   2065       1.22    chopps 	rbus_space_free(rb, ioh, size, NULL);
   2066        1.1      haya #else
   2067       1.22    chopps 	if (pcihp->flags & PCMCIA_IO_ALLOCATED)
   2068       1.22    chopps 		bus_space_free(iot, ioh, size);
   2069       1.22    chopps 	else
   2070       1.22    chopps 		bus_space_unmap(iot, ioh, size);
   2071        1.1      haya #endif
   2072        1.1      haya }
   2073        1.1      haya 
   2074        1.4      haya /*
   2075        1.4      haya  * STATIC int pccbb_pcmcia_io_map(pcmcia_chipset_handle_t pch, int width,
   2076        1.4      haya  *                                bus_addr_t offset, bus_size_t size,
   2077        1.4      haya  *                                struct pcmcia_io_handle *pcihp,
   2078        1.4      haya  *                                int *windowp)
   2079        1.4      haya  *
   2080        1.4      haya  * This function maps the allocated I/O region to pccard. This function
   2081        1.4      haya  * never allocates any I/O region for pccard I/O area.  I don't
   2082        1.4      haya  * understand why the original authors of pcmciabus separated alloc and
   2083        1.4      haya  * map.  I believe the two must be unite.
   2084        1.4      haya  *
   2085        1.4      haya  * XXX: no wait timing control?
   2086        1.4      haya  */
   2087       1.22    chopps int
   2088      1.143    dyoung pccbb_pcmcia_io_map(pcmcia_chipset_handle_t pch, int width, bus_addr_t offset,
   2089      1.143    dyoung     bus_size_t size, struct pcmcia_io_handle *pcihp, int *windowp)
   2090       1.22    chopps {
   2091      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2092      1.177  drochner 	struct pcic_handle *ph = &sc->sc_pcmcia_h;
   2093       1.22    chopps 	bus_addr_t ioaddr = pcihp->addr + offset;
   2094       1.22    chopps 	int i, win;
   2095        1.1      haya #if defined CBB_DEBUG
   2096      1.121    sekiya 	static const char *width_names[] = { "dynamic", "io8", "io16" };
   2097        1.1      haya #endif
   2098        1.1      haya 
   2099       1.22    chopps 	/* Sanity check I/O handle. */
   2100        1.1      haya 
   2101      1.177  drochner 	if (sc->sc_iot != pcihp->iot) {
   2102       1.22    chopps 		panic("pccbb_pcmcia_io_map iot is bogus");
   2103       1.22    chopps 	}
   2104        1.1      haya 
   2105       1.22    chopps 	/* XXX Sanity check offset/size. */
   2106        1.1      haya 
   2107       1.22    chopps 	win = -1;
   2108       1.22    chopps 	for (i = 0; i < PCIC_IO_WINS; i++) {
   2109       1.22    chopps 		if ((ph->ioalloc & (1 << i)) == 0) {
   2110       1.22    chopps 			win = i;
   2111       1.22    chopps 			ph->ioalloc |= (1 << i);
   2112       1.22    chopps 			break;
   2113       1.22    chopps 		}
   2114       1.22    chopps 	}
   2115        1.1      haya 
   2116       1.22    chopps 	if (win == -1) {
   2117       1.22    chopps 		return 1;
   2118       1.22    chopps 	}
   2119        1.1      haya 
   2120       1.22    chopps 	*windowp = win;
   2121        1.1      haya 
   2122       1.22    chopps 	/* XXX this is pretty gross */
   2123        1.1      haya 
   2124       1.22    chopps 	DPRINTF(("pccbb_pcmcia_io_map window %d %s port %lx+%lx\n",
   2125       1.22    chopps 	    win, width_names[width], (u_long) ioaddr, (u_long) size));
   2126        1.1      haya 
   2127       1.22    chopps 	/* XXX wtf is this doing here? */
   2128        1.1      haya 
   2129        1.1      haya #if 0
   2130       1.22    chopps 	printf(" port 0x%lx", (u_long) ioaddr);
   2131       1.22    chopps 	if (size > 1) {
   2132       1.22    chopps 		printf("-0x%lx", (u_long) ioaddr + (u_long) size - 1);
   2133       1.22    chopps 	}
   2134        1.1      haya #endif
   2135        1.1      haya 
   2136       1.22    chopps 	ph->io[win].addr = ioaddr;
   2137       1.22    chopps 	ph->io[win].size = size;
   2138       1.22    chopps 	ph->io[win].width = width;
   2139        1.1      haya 
   2140       1.22    chopps 	/* actual dirty register-value changing in the function below. */
   2141      1.176  drochner 	pccbb_pcmcia_do_io_map(sc, win);
   2142        1.1      haya 
   2143       1.22    chopps 	return 0;
   2144        1.1      haya }
   2145        1.1      haya 
   2146        1.4      haya /*
   2147        1.4      haya  * STATIC void pccbb_pcmcia_do_io_map(struct pcic_handle *h, int win)
   2148        1.4      haya  *
   2149        1.4      haya  * This function changes register-value to map I/O region for pccard.
   2150        1.4      haya  */
   2151       1.22    chopps static void
   2152      1.176  drochner pccbb_pcmcia_do_io_map(struct pccbb_softc *sc, int win)
   2153        1.1      haya {
   2154       1.22    chopps 	static u_int8_t pcic_iowidth[3] = {
   2155       1.22    chopps 		PCIC_IOCTL_IO0_IOCS16SRC_CARD,
   2156       1.22    chopps 		PCIC_IOCTL_IO0_IOCS16SRC_DATASIZE |
   2157       1.22    chopps 		    PCIC_IOCTL_IO0_DATASIZE_8BIT,
   2158       1.22    chopps 		PCIC_IOCTL_IO0_IOCS16SRC_DATASIZE |
   2159       1.22    chopps 		    PCIC_IOCTL_IO0_DATASIZE_16BIT,
   2160       1.22    chopps 	};
   2161        1.1      haya 
   2162        1.1      haya #define PCIC_SIA_START_LOW 0
   2163        1.1      haya #define PCIC_SIA_START_HIGH 1
   2164        1.1      haya #define PCIC_SIA_STOP_LOW 2
   2165        1.1      haya #define PCIC_SIA_STOP_HIGH 3
   2166        1.1      haya 
   2167       1.22    chopps 	int regbase_win = 0x8 + win * 0x04;
   2168       1.22    chopps 	u_int8_t ioctl, enable;
   2169      1.176  drochner 	struct pcic_handle *ph = &sc->sc_pcmcia_h;
   2170        1.1      haya 
   2171       1.95  christos 	DPRINTF(("pccbb_pcmcia_do_io_map win %d addr 0x%lx size 0x%lx "
   2172       1.95  christos 	    "width %d\n", win, (unsigned long)ph->io[win].addr,
   2173       1.95  christos 	    (unsigned long)ph->io[win].size, ph->io[win].width * 8));
   2174       1.22    chopps 
   2175      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SIA_START_LOW,
   2176       1.22    chopps 	    ph->io[win].addr & 0xff);
   2177      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SIA_START_HIGH,
   2178       1.22    chopps 	    (ph->io[win].addr >> 8) & 0xff);
   2179       1.22    chopps 
   2180      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SIA_STOP_LOW,
   2181       1.22    chopps 	    (ph->io[win].addr + ph->io[win].size - 1) & 0xff);
   2182      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SIA_STOP_HIGH,
   2183       1.22    chopps 	    ((ph->io[win].addr + ph->io[win].size - 1) >> 8) & 0xff);
   2184       1.22    chopps 
   2185      1.177  drochner 	ioctl = Pcic_read(sc, PCIC_IOCTL);
   2186      1.177  drochner 	enable = Pcic_read(sc, PCIC_ADDRWIN_ENABLE);
   2187       1.22    chopps 	switch (win) {
   2188       1.22    chopps 	case 0:
   2189       1.22    chopps 		ioctl &= ~(PCIC_IOCTL_IO0_WAITSTATE | PCIC_IOCTL_IO0_ZEROWAIT |
   2190       1.22    chopps 		    PCIC_IOCTL_IO0_IOCS16SRC_MASK |
   2191       1.22    chopps 		    PCIC_IOCTL_IO0_DATASIZE_MASK);
   2192       1.22    chopps 		ioctl |= pcic_iowidth[ph->io[win].width];
   2193       1.22    chopps 		enable |= PCIC_ADDRWIN_ENABLE_IO0;
   2194       1.22    chopps 		break;
   2195       1.22    chopps 	case 1:
   2196       1.22    chopps 		ioctl &= ~(PCIC_IOCTL_IO1_WAITSTATE | PCIC_IOCTL_IO1_ZEROWAIT |
   2197       1.22    chopps 		    PCIC_IOCTL_IO1_IOCS16SRC_MASK |
   2198       1.22    chopps 		    PCIC_IOCTL_IO1_DATASIZE_MASK);
   2199       1.22    chopps 		ioctl |= (pcic_iowidth[ph->io[win].width] << 4);
   2200       1.22    chopps 		enable |= PCIC_ADDRWIN_ENABLE_IO1;
   2201       1.22    chopps 		break;
   2202       1.22    chopps 	}
   2203      1.177  drochner 	Pcic_write(sc, PCIC_IOCTL, ioctl);
   2204      1.177  drochner 	Pcic_write(sc, PCIC_ADDRWIN_ENABLE, enable);
   2205      1.133  christos #if defined(CBB_DEBUG)
   2206       1.22    chopps 	{
   2207       1.22    chopps 		u_int8_t start_low =
   2208      1.177  drochner 		    Pcic_read(sc, regbase_win + PCIC_SIA_START_LOW);
   2209       1.22    chopps 		u_int8_t start_high =
   2210      1.177  drochner 		    Pcic_read(sc, regbase_win + PCIC_SIA_START_HIGH);
   2211       1.22    chopps 		u_int8_t stop_low =
   2212      1.177  drochner 		    Pcic_read(sc, regbase_win + PCIC_SIA_STOP_LOW);
   2213       1.22    chopps 		u_int8_t stop_high =
   2214      1.177  drochner 		    Pcic_read(sc, regbase_win + PCIC_SIA_STOP_HIGH);
   2215      1.133  christos 		printf("pccbb_pcmcia_do_io_map start %02x %02x, "
   2216      1.133  christos 		    "stop %02x %02x, ioctl %02x enable %02x\n",
   2217       1.22    chopps 		    start_low, start_high, stop_low, stop_high, ioctl, enable);
   2218       1.22    chopps 	}
   2219        1.1      haya #endif
   2220        1.1      haya }
   2221        1.1      haya 
   2222        1.4      haya /*
   2223        1.4      haya  * STATIC void pccbb_pcmcia_io_unmap(pcmcia_chipset_handle_t *h, int win)
   2224        1.4      haya  *
   2225       1.32     enami  * This function unmaps I/O region.  No return value.
   2226        1.4      haya  */
   2227       1.22    chopps STATIC void
   2228      1.143    dyoung pccbb_pcmcia_io_unmap(pcmcia_chipset_handle_t pch, int win)
   2229        1.1      haya {
   2230      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2231      1.177  drochner 	struct pcic_handle *ph = &sc->sc_pcmcia_h;
   2232       1.22    chopps 	int reg;
   2233        1.1      haya 
   2234       1.22    chopps 	if (win >= PCIC_IO_WINS || win < 0) {
   2235       1.22    chopps 		panic("pccbb_pcmcia_io_unmap: window out of range");
   2236       1.22    chopps 	}
   2237        1.1      haya 
   2238      1.177  drochner 	reg = Pcic_read(sc, PCIC_ADDRWIN_ENABLE);
   2239       1.22    chopps 	switch (win) {
   2240       1.22    chopps 	case 0:
   2241       1.22    chopps 		reg &= ~PCIC_ADDRWIN_ENABLE_IO0;
   2242       1.22    chopps 		break;
   2243       1.22    chopps 	case 1:
   2244       1.22    chopps 		reg &= ~PCIC_ADDRWIN_ENABLE_IO1;
   2245       1.22    chopps 		break;
   2246       1.22    chopps 	}
   2247      1.177  drochner 	Pcic_write(sc, PCIC_ADDRWIN_ENABLE, reg);
   2248        1.1      haya 
   2249       1.22    chopps 	ph->ioalloc &= ~(1 << win);
   2250        1.1      haya }
   2251        1.1      haya 
   2252       1.91    briggs static int
   2253      1.176  drochner pccbb_pcmcia_wait_ready(struct pccbb_softc *sc)
   2254        1.1      haya {
   2255      1.104   mycroft 	u_int8_t stat;
   2256       1.22    chopps 	int i;
   2257        1.1      haya 
   2258      1.104   mycroft 	/* wait an initial 10ms for quick cards */
   2259      1.177  drochner 	stat = Pcic_read(sc, PCIC_IF_STATUS);
   2260      1.104   mycroft 	if (stat & PCIC_IF_STATUS_READY)
   2261      1.104   mycroft 		return (0);
   2262      1.176  drochner 	pccbb_pcmcia_delay(sc, 10, "pccwr0");
   2263      1.104   mycroft 	for (i = 0; i < 50; i++) {
   2264      1.177  drochner 		stat = Pcic_read(sc, PCIC_IF_STATUS);
   2265       1.91    briggs 		if (stat & PCIC_IF_STATUS_READY)
   2266      1.104   mycroft 			return (0);
   2267       1.91    briggs 		if ((stat & PCIC_IF_STATUS_CARDDETECT_MASK) !=
   2268       1.91    briggs 		    PCIC_IF_STATUS_CARDDETECT_PRESENT)
   2269      1.104   mycroft 			return (ENXIO);
   2270      1.104   mycroft 		/* wait .1s (100ms) each iteration now */
   2271      1.176  drochner 		pccbb_pcmcia_delay(sc, 100, "pccwr1");
   2272       1.22    chopps 	}
   2273        1.1      haya 
   2274      1.104   mycroft 	printf("pccbb_pcmcia_wait_ready: ready never happened, status=%02x\n", stat);
   2275      1.104   mycroft 	return (EWOULDBLOCK);
   2276      1.104   mycroft }
   2277      1.104   mycroft 
   2278      1.104   mycroft /*
   2279      1.143    dyoung  * Perform long (msec order) delay.  timo is in milliseconds.
   2280      1.104   mycroft  */
   2281      1.104   mycroft static void
   2282      1.176  drochner pccbb_pcmcia_delay(struct pccbb_softc *sc, int timo, const char *wmesg)
   2283      1.104   mycroft {
   2284        1.1      haya #ifdef DIAGNOSTIC
   2285      1.104   mycroft 	if (timo <= 0)
   2286      1.104   mycroft 		panic("pccbb_pcmcia_delay: called with timeout %d", timo);
   2287      1.104   mycroft 	if (!curlwp)
   2288      1.104   mycroft 		panic("pccbb_pcmcia_delay: called in interrupt context");
   2289        1.1      haya #endif
   2290      1.175  drochner 	DPRINTF(("pccbb_pcmcia_delay: \"%s\", sleep %d ms\n", wmesg, timo));
   2291      1.104   mycroft 	tsleep(pccbb_pcmcia_delay, PWAIT, wmesg, roundup(timo * hz, 1000) / 1000);
   2292        1.1      haya }
   2293        1.1      haya 
   2294        1.4      haya /*
   2295        1.4      haya  * STATIC void pccbb_pcmcia_socket_enable(pcmcia_chipset_handle_t pch)
   2296        1.4      haya  *
   2297        1.4      haya  * This function enables the card.  All information is stored in
   2298        1.4      haya  * the first argument, pcmcia_chipset_handle_t.
   2299        1.4      haya  */
   2300        1.1      haya STATIC void
   2301      1.143    dyoung pccbb_pcmcia_socket_enable(pcmcia_chipset_handle_t pch)
   2302        1.1      haya {
   2303      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2304      1.177  drochner 	struct pcic_handle *ph = &sc->sc_pcmcia_h;
   2305      1.104   mycroft 	pcireg_t spsr;
   2306      1.104   mycroft 	int voltage;
   2307      1.101   mycroft 	int win;
   2308       1.22    chopps 	u_int8_t power, intr;
   2309      1.104   mycroft #ifdef DIAGNOSTIC
   2310      1.104   mycroft 	int reg;
   2311      1.104   mycroft #endif
   2312        1.1      haya 
   2313       1.22    chopps 	/* this bit is mostly stolen from pcic_attach_card */
   2314        1.1      haya 
   2315       1.22    chopps 	DPRINTF(("pccbb_pcmcia_socket_enable: "));
   2316        1.1      haya 
   2317       1.22    chopps 	/* get card Vcc info */
   2318       1.22    chopps 	spsr =
   2319       1.22    chopps 	    bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
   2320       1.22    chopps 	    CB_SOCKET_STAT);
   2321       1.22    chopps 	if (spsr & CB_SOCKET_STAT_5VCARD) {
   2322       1.22    chopps 		DPRINTF(("5V card\n"));
   2323       1.22    chopps 		voltage = CARDBUS_VCC_5V | CARDBUS_VPP_VCC;
   2324       1.22    chopps 	} else if (spsr & CB_SOCKET_STAT_3VCARD) {
   2325       1.22    chopps 		DPRINTF(("3V card\n"));
   2326       1.22    chopps 		voltage = CARDBUS_VCC_3V | CARDBUS_VPP_VCC;
   2327       1.22    chopps 	} else {
   2328      1.133  christos 		DPRINTF(("?V card, 0x%x\n", spsr));	/* XXX */
   2329       1.22    chopps 		return;
   2330       1.22    chopps 	}
   2331        1.1      haya 
   2332      1.108   mycroft 	/* disable interrupts; assert RESET */
   2333      1.177  drochner 	intr = Pcic_read(sc, PCIC_INTR);
   2334      1.109   mycroft 	intr &= PCIC_INTR_ENABLE;
   2335      1.177  drochner 	Pcic_write(sc, PCIC_INTR, intr);
   2336      1.104   mycroft 
   2337      1.104   mycroft 	/* zero out the address windows */
   2338      1.177  drochner 	Pcic_write(sc, PCIC_ADDRWIN_ENABLE, 0);
   2339      1.100   mycroft 
   2340      1.104   mycroft 	/* power down the socket to reset it, clear the card reset pin */
   2341      1.104   mycroft 	pccbb_power(sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
   2342        1.1      haya 
   2343      1.108   mycroft 	/* power off; assert output enable bit */
   2344      1.108   mycroft 	power = PCIC_PWRCTL_OE;
   2345      1.177  drochner 	Pcic_write(sc, PCIC_PWRCTL, power);
   2346        1.1      haya 
   2347      1.106   mycroft 	/* power up the socket */
   2348      1.104   mycroft 	if (pccbb_power(sc, voltage) == 0)
   2349      1.104   mycroft 		return;
   2350      1.104   mycroft 
   2351      1.112   mycroft 	/*
   2352      1.112   mycroft 	 * Table 4-18 and figure 4-6 of the PC Card specifiction say:
   2353      1.112   mycroft 	 * Vcc Rising Time (Tpr) = 100ms (handled in pccbb_power() above)
   2354      1.112   mycroft 	 * RESET Width (Th (Hi-z RESET)) = 1ms
   2355      1.112   mycroft 	 * RESET Width (Tw (RESET)) = 10us
   2356      1.132  christos 	 *
   2357      1.132  christos 	 * some machines require some more time to be settled
   2358      1.132  christos 	 * for example old toshiba topic bridges!
   2359      1.132  christos 	 * (100ms is added here).
   2360      1.132  christos 	 */
   2361      1.176  drochner 	pccbb_pcmcia_delay(sc, 200 + 1, "pccen1");
   2362      1.112   mycroft 
   2363      1.108   mycroft 	/* negate RESET */
   2364       1.22    chopps 	intr |= PCIC_INTR_RESET;
   2365      1.177  drochner 	Pcic_write(sc, PCIC_INTR, intr);
   2366        1.1      haya 
   2367      1.108   mycroft 	/*
   2368      1.108   mycroft 	 * RESET Setup Time (Tsu (RESET)) = 20ms
   2369      1.108   mycroft 	 */
   2370      1.176  drochner 	pccbb_pcmcia_delay(sc, 20, "pccen2");
   2371        1.1      haya 
   2372      1.104   mycroft #ifdef DIAGNOSTIC
   2373      1.177  drochner 	reg = Pcic_read(sc, PCIC_IF_STATUS);
   2374      1.104   mycroft 	if ((reg & PCIC_IF_STATUS_POWERACTIVE) == 0)
   2375      1.104   mycroft 		printf("pccbb_pcmcia_socket_enable: no power, status=%x\n", reg);
   2376       1.56     itohy #endif
   2377        1.1      haya 
   2378       1.22    chopps 	/* wait for the chip to finish initializing */
   2379      1.176  drochner 	if (pccbb_pcmcia_wait_ready(sc)) {
   2380      1.133  christos #ifdef DIAGNOSTIC
   2381      1.133  christos 		printf("pccbb_pcmcia_socket_enable: never became ready\n");
   2382      1.133  christos #endif
   2383      1.104   mycroft 		/* XXX return a failure status?? */
   2384       1.91    briggs 		pccbb_power(sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
   2385      1.177  drochner 		Pcic_write(sc, PCIC_PWRCTL, 0);
   2386       1.91    briggs 		return;
   2387       1.91    briggs 	}
   2388        1.1      haya 
   2389       1.22    chopps 	/* reinstall all the memory and io mappings */
   2390      1.104   mycroft 	for (win = 0; win < PCIC_MEM_WINS; ++win)
   2391      1.104   mycroft 		if (ph->memalloc & (1 << win))
   2392      1.176  drochner 			pccbb_pcmcia_do_mem_map(sc, win);
   2393      1.104   mycroft 	for (win = 0; win < PCIC_IO_WINS; ++win)
   2394      1.104   mycroft 		if (ph->ioalloc & (1 << win))
   2395      1.176  drochner 			pccbb_pcmcia_do_io_map(sc, win);
   2396        1.1      haya }
   2397        1.1      haya 
   2398        1.4      haya /*
   2399        1.4      haya  * STATIC void pccbb_pcmcia_socket_disable(pcmcia_chipset_handle_t *ph)
   2400        1.4      haya  *
   2401        1.4      haya  * This function disables the card.  All information is stored in
   2402        1.4      haya  * the first argument, pcmcia_chipset_handle_t.
   2403        1.4      haya  */
   2404        1.1      haya STATIC void
   2405      1.143    dyoung pccbb_pcmcia_socket_disable(pcmcia_chipset_handle_t pch)
   2406        1.1      haya {
   2407      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2408      1.104   mycroft 	u_int8_t intr;
   2409       1.22    chopps 
   2410       1.22    chopps 	DPRINTF(("pccbb_pcmcia_socket_disable\n"));
   2411       1.22    chopps 
   2412      1.108   mycroft 	/* disable interrupts; assert RESET */
   2413      1.177  drochner 	intr = Pcic_read(sc, PCIC_INTR);
   2414      1.109   mycroft 	intr &= PCIC_INTR_ENABLE;
   2415      1.177  drochner 	Pcic_write(sc, PCIC_INTR, intr);
   2416      1.102   mycroft 
   2417      1.102   mycroft 	/* zero out the address windows */
   2418      1.177  drochner 	Pcic_write(sc, PCIC_ADDRWIN_ENABLE, 0);
   2419       1.22    chopps 
   2420      1.108   mycroft 	/* power down the socket to reset it, clear the card reset pin */
   2421      1.108   mycroft 	pccbb_power(sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
   2422      1.108   mycroft 
   2423      1.104   mycroft 	/* disable socket: negate output enable bit and power off */
   2424      1.177  drochner 	Pcic_write(sc, PCIC_PWRCTL, 0);
   2425      1.104   mycroft 
   2426      1.108   mycroft 	/*
   2427      1.108   mycroft 	 * Vcc Falling Time (Tpf) = 300ms
   2428      1.108   mycroft 	 */
   2429      1.176  drochner 	pccbb_pcmcia_delay(sc, 300, "pccwr1");
   2430      1.101   mycroft }
   2431      1.101   mycroft 
   2432      1.101   mycroft STATIC void
   2433      1.143    dyoung pccbb_pcmcia_socket_settype(pcmcia_chipset_handle_t pch, int type)
   2434      1.101   mycroft {
   2435      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2436      1.101   mycroft 	u_int8_t intr;
   2437      1.101   mycroft 
   2438      1.101   mycroft 	/* set the card type */
   2439      1.100   mycroft 
   2440      1.177  drochner 	intr = Pcic_read(sc, PCIC_INTR);
   2441      1.102   mycroft 	intr &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_CARDTYPE_MASK);
   2442      1.101   mycroft 	if (type == PCMCIA_IFTYPE_IO)
   2443      1.101   mycroft 		intr |= PCIC_INTR_CARDTYPE_IO;
   2444      1.101   mycroft 	else
   2445      1.101   mycroft 		intr |= PCIC_INTR_CARDTYPE_MEM;
   2446      1.177  drochner 	Pcic_write(sc, PCIC_INTR, intr);
   2447      1.101   mycroft 
   2448      1.175  drochner 	DPRINTF(("%s: pccbb_pcmcia_socket_settype type %s %02x\n",
   2449      1.177  drochner 	    device_xname(sc->sc_dev),
   2450      1.175  drochner 	    ((type == PCMCIA_IFTYPE_IO) ? "io" : "mem"), intr));
   2451        1.1      haya }
   2452        1.1      haya 
   2453        1.4      haya /*
   2454        1.1      haya  * STATIC int pccbb_pcmcia_card_detect(pcmcia_chipset_handle_t *ph)
   2455        1.1      haya  *
   2456        1.1      haya  * This function detects whether a card is in the slot or not.
   2457        1.1      haya  * If a card is inserted, return 1.  Otherwise, return 0.
   2458        1.4      haya  */
   2459        1.1      haya STATIC int
   2460      1.143    dyoung pccbb_pcmcia_card_detect(pcmcia_chipset_handle_t pch)
   2461        1.1      haya {
   2462      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2463       1.22    chopps 
   2464       1.22    chopps 	DPRINTF(("pccbb_pcmcia_card_detect\n"));
   2465       1.22    chopps 	return pccbb_detect_card(sc) == 1 ? 1 : 0;
   2466        1.1      haya }
   2467        1.1      haya 
   2468        1.1      haya #if 0
   2469        1.1      haya STATIC int
   2470        1.1      haya pccbb_new_pcmcia_mem_alloc(pcmcia_chipset_handle_t pch,
   2471       1.22    chopps     bus_addr_t start, bus_size_t size, bus_size_t align, int speed, int flags,
   2472       1.22    chopps     bus_space_tag_t * memtp bus_space_handle_t * memhp)
   2473        1.1      haya #endif
   2474        1.4      haya /*
   2475        1.4      haya  * STATIC int pccbb_pcmcia_mem_alloc(pcmcia_chipset_handle_t pch,
   2476        1.4      haya  *                                   bus_size_t size,
   2477        1.4      haya  *                                   struct pcmcia_mem_handle *pcmhp)
   2478        1.4      haya  *
   2479        1.4      haya  * This function only allocates memory region for pccard. This
   2480       1.32     enami  * function never maps the allocated region to pccard memory area.
   2481        1.4      haya  *
   2482        1.4      haya  * XXX: Why the argument of start address is not in?
   2483        1.4      haya  */
   2484       1.22    chopps STATIC int
   2485      1.143    dyoung pccbb_pcmcia_mem_alloc(pcmcia_chipset_handle_t pch, bus_size_t size,
   2486      1.143    dyoung     struct pcmcia_mem_handle *pcmhp)
   2487       1.22    chopps {
   2488      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2489       1.22    chopps 	bus_space_handle_t memh;
   2490       1.22    chopps 	bus_addr_t addr;
   2491       1.22    chopps 	bus_size_t sizepg;
   2492        1.1      haya #if rbus
   2493       1.22    chopps 	rbus_tag_t rb;
   2494        1.1      haya #endif
   2495        1.1      haya 
   2496       1.91    briggs 	/* Check that the card is still there. */
   2497      1.177  drochner 	if ((Pcic_read(sc, PCIC_IF_STATUS) & PCIC_IF_STATUS_CARDDETECT_MASK) !=
   2498       1.91    briggs 		    PCIC_IF_STATUS_CARDDETECT_PRESENT)
   2499       1.91    briggs 		return 1;
   2500       1.91    briggs 
   2501       1.22    chopps 	/* out of sc->memh, allocate as many pages as necessary */
   2502        1.1      haya 
   2503       1.22    chopps 	/* convert size to PCIC pages */
   2504      1.117     perry 	/*
   2505       1.22    chopps 	 * This is not enough; when the requested region is on the page
   2506       1.22    chopps 	 * boundaries, this may calculate wrong result.
   2507       1.22    chopps 	 */
   2508       1.22    chopps 	sizepg = (size + (PCIC_MEM_PAGESIZE - 1)) / PCIC_MEM_PAGESIZE;
   2509        1.1      haya #if 0
   2510       1.22    chopps 	if (sizepg > PCIC_MAX_MEM_PAGES) {
   2511       1.22    chopps 		return 1;
   2512       1.22    chopps 	}
   2513        1.1      haya #endif
   2514        1.1      haya 
   2515       1.22    chopps 	if (!(sc->sc_pcmcia_flags & PCCBB_PCMCIA_MEM_32)) {
   2516       1.22    chopps 		return 1;
   2517       1.22    chopps 	}
   2518        1.1      haya 
   2519       1.22    chopps 	addr = 0;		       /* XXX gcc -Wuninitialized */
   2520        1.1      haya 
   2521        1.1      haya #if rbus
   2522       1.22    chopps 	rb = sc->sc_rbus_memt;
   2523       1.22    chopps 	if (rbus_space_alloc(rb, 0, sizepg * PCIC_MEM_PAGESIZE,
   2524       1.22    chopps 	    sizepg * PCIC_MEM_PAGESIZE - 1, PCIC_MEM_PAGESIZE, 0,
   2525       1.22    chopps 	    &addr, &memh)) {
   2526       1.22    chopps 		return 1;
   2527       1.22    chopps 	}
   2528        1.1      haya #else
   2529       1.22    chopps 	if (bus_space_alloc(sc->sc_memt, sc->sc_mem_start, sc->sc_mem_end,
   2530       1.22    chopps 	    sizepg * PCIC_MEM_PAGESIZE, PCIC_MEM_PAGESIZE,
   2531       1.22    chopps 	    0, /* boundary */
   2532       1.22    chopps 	    0,	/* flags */
   2533       1.22    chopps 	    &addr, &memh)) {
   2534       1.22    chopps 		return 1;
   2535       1.22    chopps 	}
   2536        1.1      haya #endif
   2537        1.1      haya 
   2538       1.95  christos 	DPRINTF(("pccbb_pcmcia_alloc_mem: addr 0x%lx size 0x%lx, "
   2539       1.95  christos 	    "realsize 0x%lx\n", (unsigned long)addr, (unsigned long)size,
   2540       1.95  christos 	    (unsigned long)sizepg * PCIC_MEM_PAGESIZE));
   2541       1.22    chopps 
   2542       1.22    chopps 	pcmhp->memt = sc->sc_memt;
   2543       1.22    chopps 	pcmhp->memh = memh;
   2544       1.22    chopps 	pcmhp->addr = addr;
   2545       1.22    chopps 	pcmhp->size = size;
   2546       1.22    chopps 	pcmhp->realsize = sizepg * PCIC_MEM_PAGESIZE;
   2547       1.22    chopps 	/* What is mhandle?  I feel it is very dirty and it must go trush. */
   2548       1.22    chopps 	pcmhp->mhandle = 0;
   2549       1.22    chopps 	/* No offset???  Funny. */
   2550        1.1      haya 
   2551       1.22    chopps 	return 0;
   2552        1.1      haya }
   2553        1.1      haya 
   2554        1.4      haya /*
   2555        1.4      haya  * STATIC void pccbb_pcmcia_mem_free(pcmcia_chipset_handle_t pch,
   2556        1.4      haya  *                                   struct pcmcia_mem_handle *pcmhp)
   2557        1.4      haya  *
   2558       1.32     enami  * This function release the memory space allocated by the function
   2559        1.4      haya  * pccbb_pcmcia_mem_alloc().
   2560        1.4      haya  */
   2561       1.22    chopps STATIC void
   2562      1.143    dyoung pccbb_pcmcia_mem_free(pcmcia_chipset_handle_t pch,
   2563      1.143    dyoung     struct pcmcia_mem_handle *pcmhp)
   2564        1.1      haya {
   2565        1.1      haya #if rbus
   2566      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2567        1.1      haya 
   2568       1.22    chopps 	rbus_space_free(sc->sc_rbus_memt, pcmhp->memh, pcmhp->realsize, NULL);
   2569        1.1      haya #else
   2570       1.22    chopps 	bus_space_free(pcmhp->memt, pcmhp->memh, pcmhp->realsize);
   2571        1.1      haya #endif
   2572        1.1      haya }
   2573        1.1      haya 
   2574        1.4      haya /*
   2575        1.4      haya  * STATIC void pccbb_pcmcia_do_mem_map(struct pcic_handle *ph, int win)
   2576        1.4      haya  *
   2577       1.32     enami  * This function release the memory space allocated by the function
   2578        1.4      haya  * pccbb_pcmcia_mem_alloc().
   2579        1.4      haya  */
   2580       1.22    chopps STATIC void
   2581      1.176  drochner pccbb_pcmcia_do_mem_map(struct pccbb_softc *sc, int win)
   2582        1.1      haya {
   2583       1.22    chopps 	int regbase_win;
   2584       1.22    chopps 	bus_addr_t phys_addr;
   2585       1.22    chopps 	bus_addr_t phys_end;
   2586      1.176  drochner 	struct pcic_handle *ph = &sc->sc_pcmcia_h;
   2587        1.1      haya 
   2588        1.1      haya #define PCIC_SMM_START_LOW 0
   2589        1.1      haya #define PCIC_SMM_START_HIGH 1
   2590        1.1      haya #define PCIC_SMM_STOP_LOW 2
   2591        1.1      haya #define PCIC_SMM_STOP_HIGH 3
   2592        1.1      haya #define PCIC_CMA_LOW 4
   2593        1.1      haya #define PCIC_CMA_HIGH 5
   2594        1.1      haya 
   2595       1.22    chopps 	u_int8_t start_low, start_high = 0;
   2596       1.22    chopps 	u_int8_t stop_low, stop_high;
   2597       1.22    chopps 	u_int8_t off_low, off_high;
   2598       1.22    chopps 	u_int8_t mem_window;
   2599       1.22    chopps 	int reg;
   2600       1.22    chopps 
   2601       1.22    chopps 	int kind = ph->mem[win].kind & ~PCMCIA_WIDTH_MEM_MASK;
   2602       1.22    chopps 	int mem8 =
   2603       1.24   thorpej 	    (ph->mem[win].kind & PCMCIA_WIDTH_MEM_MASK) == PCMCIA_WIDTH_MEM8
   2604       1.24   thorpej 	    || (kind == PCMCIA_MEM_ATTR);
   2605       1.12      joda 
   2606       1.22    chopps 	regbase_win = 0x10 + win * 0x08;
   2607        1.1      haya 
   2608       1.22    chopps 	phys_addr = ph->mem[win].addr;
   2609       1.22    chopps 	phys_end = phys_addr + ph->mem[win].size;
   2610        1.1      haya 
   2611       1.22    chopps 	DPRINTF(("pccbb_pcmcia_do_mem_map: start 0x%lx end 0x%lx off 0x%lx\n",
   2612       1.95  christos 	    (unsigned long)phys_addr, (unsigned long)phys_end,
   2613       1.95  christos 	    (unsigned long)ph->mem[win].offset));
   2614        1.1      haya 
   2615        1.1      haya #define PCIC_MEMREG_LSB_SHIFT PCIC_SYSMEM_ADDRX_SHIFT
   2616        1.1      haya #define PCIC_MEMREG_MSB_SHIFT (PCIC_SYSMEM_ADDRX_SHIFT + 8)
   2617        1.1      haya #define PCIC_MEMREG_WIN_SHIFT (PCIC_SYSMEM_ADDRX_SHIFT + 12)
   2618        1.1      haya 
   2619       1.22    chopps 	/* bit 19:12 */
   2620       1.22    chopps 	start_low = (phys_addr >> PCIC_MEMREG_LSB_SHIFT) & 0xff;
   2621       1.22    chopps 	/* bit 23:20 and bit 7 on */
   2622       1.22    chopps 	start_high = ((phys_addr >> PCIC_MEMREG_MSB_SHIFT) & 0x0f)
   2623       1.22    chopps 	    |(mem8 ? 0 : PCIC_SYSMEM_ADDRX_START_MSB_DATASIZE_16BIT);
   2624       1.22    chopps 	/* bit 31:24, for 32-bit address */
   2625       1.22    chopps 	mem_window = (phys_addr >> PCIC_MEMREG_WIN_SHIFT) & 0xff;
   2626       1.22    chopps 
   2627      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SMM_START_LOW, start_low);
   2628      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SMM_START_HIGH, start_high);
   2629       1.22    chopps 
   2630      1.177  drochner 	if (sc->sc_pcmcia_flags & PCCBB_PCMCIA_MEM_32) {
   2631      1.177  drochner 		Pcic_write(sc, 0x40 + win, mem_window);
   2632       1.22    chopps 	}
   2633        1.1      haya 
   2634       1.22    chopps 	stop_low = (phys_end >> PCIC_MEMREG_LSB_SHIFT) & 0xff;
   2635       1.22    chopps 	stop_high = ((phys_end >> PCIC_MEMREG_MSB_SHIFT) & 0x0f)
   2636       1.22    chopps 	    | PCIC_SYSMEM_ADDRX_STOP_MSB_WAIT2;	/* wait 2 cycles */
   2637       1.22    chopps 	/* XXX Geee, WAIT2!! Crazy!!  I must rewrite this routine. */
   2638       1.22    chopps 
   2639      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SMM_STOP_LOW, stop_low);
   2640      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_SMM_STOP_HIGH, stop_high);
   2641       1.22    chopps 
   2642       1.22    chopps 	off_low = (ph->mem[win].offset >> PCIC_CARDMEM_ADDRX_SHIFT) & 0xff;
   2643       1.22    chopps 	off_high = ((ph->mem[win].offset >> (PCIC_CARDMEM_ADDRX_SHIFT + 8))
   2644       1.22    chopps 	    & PCIC_CARDMEM_ADDRX_MSB_ADDR_MASK)
   2645       1.22    chopps 	    | ((kind == PCMCIA_MEM_ATTR) ?
   2646       1.22    chopps 	    PCIC_CARDMEM_ADDRX_MSB_REGACTIVE_ATTR : 0);
   2647       1.22    chopps 
   2648      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_CMA_LOW, off_low);
   2649      1.177  drochner 	Pcic_write(sc, regbase_win + PCIC_CMA_HIGH, off_high);
   2650       1.22    chopps 
   2651      1.177  drochner 	reg = Pcic_read(sc, PCIC_ADDRWIN_ENABLE);
   2652       1.22    chopps 	reg |= ((1 << win) | PCIC_ADDRWIN_ENABLE_MEMCS16);
   2653      1.177  drochner 	Pcic_write(sc, PCIC_ADDRWIN_ENABLE, reg);
   2654        1.1      haya 
   2655      1.133  christos #if defined(CBB_DEBUG)
   2656       1.22    chopps 	{
   2657       1.22    chopps 		int r1, r2, r3, r4, r5, r6, r7 = 0;
   2658        1.1      haya 
   2659      1.177  drochner 		r1 = Pcic_read(sc, regbase_win + PCIC_SMM_START_LOW);
   2660      1.177  drochner 		r2 = Pcic_read(sc, regbase_win + PCIC_SMM_START_HIGH);
   2661      1.177  drochner 		r3 = Pcic_read(sc, regbase_win + PCIC_SMM_STOP_LOW);
   2662      1.177  drochner 		r4 = Pcic_read(sc, regbase_win + PCIC_SMM_STOP_HIGH);
   2663      1.177  drochner 		r5 = Pcic_read(sc, regbase_win + PCIC_CMA_LOW);
   2664      1.177  drochner 		r6 = Pcic_read(sc, regbase_win + PCIC_CMA_HIGH);
   2665      1.177  drochner 		if (sc->sc_pcmcia_flags & PCCBB_PCMCIA_MEM_32) {
   2666      1.177  drochner 			r7 = Pcic_read(sc, 0x40 + win);
   2667       1.22    chopps 		}
   2668       1.22    chopps 
   2669      1.133  christos 		printf("pccbb_pcmcia_do_mem_map window %d: %02x%02x %02x%02x "
   2670      1.133  christos 		    "%02x%02x", win, r1, r2, r3, r4, r5, r6);
   2671      1.177  drochner 		if (sc->sc_pcmcia_flags & PCCBB_PCMCIA_MEM_32) {
   2672      1.133  christos 			printf(" %02x", r7);
   2673       1.22    chopps 		}
   2674      1.133  christos 		printf("\n");
   2675       1.22    chopps 	}
   2676        1.1      haya #endif
   2677        1.1      haya }
   2678        1.1      haya 
   2679        1.4      haya /*
   2680        1.4      haya  * STATIC int pccbb_pcmcia_mem_map(pcmcia_chipset_handle_t pch, int kind,
   2681        1.4      haya  *                                 bus_addr_t card_addr, bus_size_t size,
   2682        1.4      haya  *                                 struct pcmcia_mem_handle *pcmhp,
   2683        1.4      haya  *                                 bus_addr_t *offsetp, int *windowp)
   2684        1.4      haya  *
   2685       1.32     enami  * This function maps memory space allocated by the function
   2686        1.4      haya  * pccbb_pcmcia_mem_alloc().
   2687        1.4      haya  */
   2688       1.22    chopps STATIC int
   2689      1.143    dyoung pccbb_pcmcia_mem_map(pcmcia_chipset_handle_t pch, int kind,
   2690      1.143    dyoung     bus_addr_t card_addr, bus_size_t size, struct pcmcia_mem_handle *pcmhp,
   2691  1.182.2.1       jym     bus_size_t *offsetp, int *windowp)
   2692       1.22    chopps {
   2693      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2694      1.177  drochner 	struct pcic_handle *ph = &sc->sc_pcmcia_h;
   2695       1.22    chopps 	bus_addr_t busaddr;
   2696       1.22    chopps 	long card_offset;
   2697       1.22    chopps 	int win;
   2698       1.91    briggs 
   2699       1.91    briggs 	/* Check that the card is still there. */
   2700      1.177  drochner 	if ((Pcic_read(sc, PCIC_IF_STATUS) & PCIC_IF_STATUS_CARDDETECT_MASK) !=
   2701       1.91    briggs 		    PCIC_IF_STATUS_CARDDETECT_PRESENT)
   2702       1.91    briggs 		return 1;
   2703       1.22    chopps 
   2704       1.22    chopps 	for (win = 0; win < PCIC_MEM_WINS; ++win) {
   2705       1.22    chopps 		if ((ph->memalloc & (1 << win)) == 0) {
   2706       1.22    chopps 			ph->memalloc |= (1 << win);
   2707       1.22    chopps 			break;
   2708       1.22    chopps 		}
   2709       1.22    chopps 	}
   2710        1.1      haya 
   2711       1.22    chopps 	if (win == PCIC_MEM_WINS) {
   2712       1.22    chopps 		return 1;
   2713       1.22    chopps 	}
   2714        1.1      haya 
   2715       1.22    chopps 	*windowp = win;
   2716        1.1      haya 
   2717       1.22    chopps 	/* XXX this is pretty gross */
   2718        1.1      haya 
   2719      1.177  drochner 	if (sc->sc_memt != pcmhp->memt) {
   2720       1.22    chopps 		panic("pccbb_pcmcia_mem_map memt is bogus");
   2721       1.22    chopps 	}
   2722        1.1      haya 
   2723       1.22    chopps 	busaddr = pcmhp->addr;
   2724        1.1      haya 
   2725      1.117     perry 	/*
   2726       1.22    chopps 	 * compute the address offset to the pcmcia address space for the
   2727       1.22    chopps 	 * pcic.  this is intentionally signed.  The masks and shifts below
   2728       1.22    chopps 	 * will cause TRT to happen in the pcic registers.  Deal with making
   2729       1.22    chopps 	 * sure the address is aligned, and return the alignment offset.
   2730       1.22    chopps 	 */
   2731       1.22    chopps 
   2732       1.22    chopps 	*offsetp = card_addr % PCIC_MEM_PAGESIZE;
   2733       1.22    chopps 	card_addr -= *offsetp;
   2734       1.22    chopps 
   2735       1.22    chopps 	DPRINTF(("pccbb_pcmcia_mem_map window %d bus %lx+%lx+%lx at card addr "
   2736       1.22    chopps 	    "%lx\n", win, (u_long) busaddr, (u_long) * offsetp, (u_long) size,
   2737       1.22    chopps 	    (u_long) card_addr));
   2738       1.22    chopps 
   2739      1.117     perry 	/*
   2740       1.22    chopps 	 * include the offset in the size, and decrement size by one, since
   2741       1.22    chopps 	 * the hw wants start/stop
   2742       1.22    chopps 	 */
   2743       1.22    chopps 	size += *offsetp - 1;
   2744       1.22    chopps 
   2745       1.22    chopps 	card_offset = (((long)card_addr) - ((long)busaddr));
   2746       1.22    chopps 
   2747       1.22    chopps 	ph->mem[win].addr = busaddr;
   2748       1.22    chopps 	ph->mem[win].size = size;
   2749       1.22    chopps 	ph->mem[win].offset = card_offset;
   2750       1.22    chopps 	ph->mem[win].kind = kind;
   2751        1.1      haya 
   2752      1.176  drochner 	pccbb_pcmcia_do_mem_map(sc, win);
   2753        1.1      haya 
   2754       1.22    chopps 	return 0;
   2755        1.1      haya }
   2756        1.1      haya 
   2757        1.4      haya /*
   2758        1.4      haya  * STATIC int pccbb_pcmcia_mem_unmap(pcmcia_chipset_handle_t pch,
   2759        1.4      haya  *                                   int window)
   2760        1.4      haya  *
   2761       1.32     enami  * This function unmaps memory space which mapped by the function
   2762        1.4      haya  * pccbb_pcmcia_mem_map().
   2763        1.4      haya  */
   2764       1.22    chopps STATIC void
   2765      1.143    dyoung pccbb_pcmcia_mem_unmap(pcmcia_chipset_handle_t pch, int window)
   2766        1.1      haya {
   2767      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2768      1.177  drochner 	struct pcic_handle *ph = &sc->sc_pcmcia_h;
   2769       1.22    chopps 	int reg;
   2770        1.1      haya 
   2771       1.22    chopps 	if (window >= PCIC_MEM_WINS) {
   2772       1.22    chopps 		panic("pccbb_pcmcia_mem_unmap: window out of range");
   2773       1.22    chopps 	}
   2774        1.1      haya 
   2775      1.177  drochner 	reg = Pcic_read(sc, PCIC_ADDRWIN_ENABLE);
   2776       1.22    chopps 	reg &= ~(1 << window);
   2777      1.177  drochner 	Pcic_write(sc, PCIC_ADDRWIN_ENABLE, reg);
   2778        1.1      haya 
   2779       1.22    chopps 	ph->memalloc &= ~(1 << window);
   2780        1.1      haya }
   2781        1.1      haya 
   2782        1.4      haya /*
   2783        1.4      haya  * STATIC void *pccbb_pcmcia_intr_establish(pcmcia_chipset_handle_t pch,
   2784        1.4      haya  *                                          struct pcmcia_function *pf,
   2785        1.4      haya  *                                          int ipl,
   2786        1.4      haya  *                                          int (*func)(void *),
   2787        1.4      haya  *                                          void *arg);
   2788        1.4      haya  *
   2789        1.4      haya  * This function enables PC-Card interrupt.  PCCBB uses PCI interrupt line.
   2790        1.4      haya  */
   2791        1.1      haya STATIC void *
   2792      1.143    dyoung pccbb_pcmcia_intr_establish(pcmcia_chipset_handle_t pch,
   2793      1.143    dyoung     struct pcmcia_function *pf, int ipl, int (*func)(void *), void *arg)
   2794       1.22    chopps {
   2795      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2796       1.22    chopps 
   2797       1.22    chopps 	if (!(pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)) {
   2798       1.22    chopps 		/* what should I do? */
   2799       1.22    chopps 		if ((pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)) {
   2800       1.95  christos 			DPRINTF(("%s does not provide edge nor pulse "
   2801      1.172  drochner 			    "interrupt\n", device_xname(sc->sc_dev)));
   2802       1.22    chopps 			return NULL;
   2803       1.22    chopps 		}
   2804      1.117     perry 		/*
   2805       1.22    chopps 		 * XXX Noooooo!  The interrupt flag must set properly!!
   2806       1.22    chopps 		 * dumb pcmcia driver!!
   2807       1.22    chopps 		 */
   2808       1.22    chopps 	}
   2809        1.1      haya 
   2810       1.88  nakayama 	return pccbb_intr_establish(sc, 0, ipl, func, arg);
   2811        1.1      haya }
   2812        1.1      haya 
   2813        1.4      haya /*
   2814        1.4      haya  * STATIC void pccbb_pcmcia_intr_disestablish(pcmcia_chipset_handle_t pch,
   2815        1.4      haya  *                                            void *ih)
   2816        1.4      haya  *
   2817        1.4      haya  * This function disables PC-Card interrupt.
   2818        1.4      haya  */
   2819        1.1      haya STATIC void
   2820      1.143    dyoung pccbb_pcmcia_intr_disestablish(pcmcia_chipset_handle_t pch, void *ih)
   2821        1.1      haya {
   2822      1.177  drochner 	struct pccbb_softc *sc = (struct pccbb_softc *)pch;
   2823        1.1      haya 
   2824       1.26      haya 	pccbb_intr_disestablish(sc, ih);
   2825        1.1      haya }
   2826        1.1      haya 
   2827        1.1      haya #if rbus
   2828        1.4      haya /*
   2829        1.4      haya  * static int
   2830        1.4      haya  * pccbb_rbus_cb_space_alloc(cardbus_chipset_tag_t ct, rbus_tag_t rb,
   2831        1.4      haya  *			    bus_addr_t addr, bus_size_t size,
   2832        1.4      haya  *			    bus_addr_t mask, bus_size_t align,
   2833        1.4      haya  *			    int flags, bus_addr_t *addrp;
   2834        1.4      haya  *			    bus_space_handle_t *bshp)
   2835        1.4      haya  *
   2836        1.4      haya  *   This function allocates a portion of memory or io space for
   2837        1.4      haya  *   clients.  This function is called from CardBus card drivers.
   2838        1.4      haya  */
   2839        1.1      haya static int
   2840      1.143    dyoung pccbb_rbus_cb_space_alloc(cardbus_chipset_tag_t ct, rbus_tag_t rb,
   2841      1.143    dyoung     bus_addr_t addr, bus_size_t size, bus_addr_t mask, bus_size_t align,
   2842      1.143    dyoung     int flags, bus_addr_t *addrp, bus_space_handle_t *bshp)
   2843       1.22    chopps {
   2844       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   2845       1.22    chopps 
   2846       1.95  christos 	DPRINTF(("pccbb_rbus_cb_space_alloc: addr 0x%lx, size 0x%lx, "
   2847       1.95  christos 	    "mask 0x%lx, align 0x%lx\n", (unsigned long)addr,
   2848       1.95  christos 	    (unsigned long)size, (unsigned long)mask, (unsigned long)align));
   2849        1.1      haya 
   2850       1.22    chopps 	if (align == 0) {
   2851       1.22    chopps 		align = size;
   2852       1.22    chopps 	}
   2853        1.1      haya 
   2854       1.22    chopps 	if (rb->rb_bt == sc->sc_memt) {
   2855       1.22    chopps 		if (align < 16) {
   2856       1.22    chopps 			return 1;
   2857       1.68      yamt 		}
   2858       1.76      haya 		/*
   2859       1.76      haya 		 * XXX: align more than 0x1000 to avoid overwrapping
   2860       1.76      haya 		 * memory windows for two or more devices.  0x1000
   2861       1.76      haya 		 * means memory window's granularity.
   2862       1.76      haya 		 *
   2863       1.76      haya 		 * Two or more devices should be able to share same
   2864       1.76      haya 		 * memory window region.  However, overrapping memory
   2865       1.76      haya 		 * window is not good because some devices, such as
   2866       1.76      haya 		 * 3Com 3C575[BC], have a broken address decoder and
   2867       1.76      haya 		 * intrude other's memory region.
   2868       1.76      haya 		 */
   2869       1.68      yamt 		if (align < 0x1000) {
   2870       1.68      yamt 			align = 0x1000;
   2871       1.22    chopps 		}
   2872       1.22    chopps 	} else if (rb->rb_bt == sc->sc_iot) {
   2873       1.22    chopps 		if (align < 4) {
   2874       1.22    chopps 			return 1;
   2875       1.22    chopps 		}
   2876       1.36      haya 		/* XXX: hack for avoiding ISA image */
   2877       1.36      haya 		if (mask < 0x0100) {
   2878       1.36      haya 			mask = 0x3ff;
   2879       1.36      haya 			addr = 0x300;
   2880       1.36      haya 		}
   2881       1.36      haya 
   2882       1.22    chopps 	} else {
   2883       1.95  christos 		DPRINTF(("pccbb_rbus_cb_space_alloc: Bus space tag 0x%lx is "
   2884       1.95  christos 		    "NOT used. io: 0x%lx, mem: 0x%lx\n",
   2885       1.95  christos 		    (unsigned long)rb->rb_bt, (unsigned long)sc->sc_iot,
   2886       1.95  christos 		    (unsigned long)sc->sc_memt));
   2887       1.22    chopps 		return 1;
   2888       1.22    chopps 		/* XXX: panic here? */
   2889       1.22    chopps 	}
   2890        1.1      haya 
   2891       1.22    chopps 	if (rbus_space_alloc(rb, addr, size, mask, align, flags, addrp, bshp)) {
   2892      1.172  drochner 		aprint_normal_dev(sc->sc_dev, "<rbus> no bus space\n");
   2893       1.22    chopps 		return 1;
   2894       1.22    chopps 	}
   2895        1.1      haya 
   2896       1.22    chopps 	pccbb_open_win(sc, rb->rb_bt, *addrp, size, *bshp, 0);
   2897        1.1      haya 
   2898       1.22    chopps 	return 0;
   2899        1.1      haya }
   2900        1.1      haya 
   2901        1.4      haya /*
   2902        1.4      haya  * static int
   2903        1.4      haya  * pccbb_rbus_cb_space_free(cardbus_chipset_tag_t *ct, rbus_tag_t rb,
   2904        1.4      haya  *			   bus_space_handle_t *bshp, bus_size_t size);
   2905        1.4      haya  *
   2906        1.4      haya  *   This function is called from CardBus card drivers.
   2907        1.4      haya  */
   2908        1.1      haya static int
   2909      1.143    dyoung pccbb_rbus_cb_space_free(cardbus_chipset_tag_t ct, rbus_tag_t rb,
   2910      1.143    dyoung     bus_space_handle_t bsh, bus_size_t size)
   2911       1.22    chopps {
   2912       1.22    chopps 	struct pccbb_softc *sc = (struct pccbb_softc *)ct;
   2913       1.22    chopps 	bus_space_tag_t bt = rb->rb_bt;
   2914       1.22    chopps 
   2915       1.22    chopps 	pccbb_close_win(sc, bt, bsh, size);
   2916       1.22    chopps 
   2917       1.22    chopps 	if (bt == sc->sc_memt) {
   2918       1.22    chopps 	} else if (bt == sc->sc_iot) {
   2919       1.22    chopps 	} else {
   2920       1.22    chopps 		return 1;
   2921       1.22    chopps 		/* XXX: panic here? */
   2922       1.22    chopps 	}
   2923        1.1      haya 
   2924       1.22    chopps 	return rbus_space_free(rb, bsh, size, NULL);
   2925        1.1      haya }
   2926        1.1      haya #endif /* rbus */
   2927        1.1      haya 
   2928        1.1      haya #if rbus
   2929        1.1      haya 
   2930        1.1      haya static int
   2931      1.143    dyoung pccbb_open_win(struct pccbb_softc *sc, bus_space_tag_t bst, bus_addr_t addr,
   2932      1.143    dyoung     bus_size_t size, bus_space_handle_t bsh, int flags)
   2933       1.22    chopps {
   2934       1.27   thorpej 	struct pccbb_win_chain_head *head;
   2935       1.22    chopps 	bus_addr_t align;
   2936       1.22    chopps 
   2937       1.27   thorpej 	head = &sc->sc_iowindow;
   2938       1.22    chopps 	align = 0x04;
   2939       1.22    chopps 	if (sc->sc_memt == bst) {
   2940       1.27   thorpej 		head = &sc->sc_memwindow;
   2941       1.22    chopps 		align = 0x1000;
   2942       1.95  christos 		DPRINTF(("using memory window, 0x%lx 0x%lx 0x%lx\n\n",
   2943       1.95  christos 		    (unsigned long)sc->sc_iot, (unsigned long)sc->sc_memt,
   2944       1.95  christos 		    (unsigned long)bst));
   2945       1.22    chopps 	}
   2946        1.1      haya 
   2947       1.27   thorpej 	if (pccbb_winlist_insert(head, addr, size, bsh, flags)) {
   2948      1.172  drochner 		aprint_error_dev(sc->sc_dev,
   2949      1.164    dyoung 		    "pccbb_open_win: %s winlist insert failed\n",
   2950       1.27   thorpej 		    (head == &sc->sc_memwindow) ? "mem" : "io");
   2951       1.22    chopps 	}
   2952       1.22    chopps 	pccbb_winset(align, sc, bst);
   2953        1.1      haya 
   2954       1.22    chopps 	return 0;
   2955        1.1      haya }
   2956        1.1      haya 
   2957        1.1      haya static int
   2958      1.143    dyoung pccbb_close_win(struct pccbb_softc *sc, bus_space_tag_t bst,
   2959      1.143    dyoung     bus_space_handle_t bsh, bus_size_t size)
   2960       1.22    chopps {
   2961       1.27   thorpej 	struct pccbb_win_chain_head *head;
   2962       1.22    chopps 	bus_addr_t align;
   2963       1.22    chopps 
   2964       1.27   thorpej 	head = &sc->sc_iowindow;
   2965       1.22    chopps 	align = 0x04;
   2966       1.22    chopps 	if (sc->sc_memt == bst) {
   2967       1.27   thorpej 		head = &sc->sc_memwindow;
   2968       1.22    chopps 		align = 0x1000;
   2969       1.22    chopps 	}
   2970        1.1      haya 
   2971       1.27   thorpej 	if (pccbb_winlist_delete(head, bsh, size)) {
   2972      1.172  drochner 		aprint_error_dev(sc->sc_dev,
   2973      1.164    dyoung 		    "pccbb_close_win: %s winlist delete failed\n",
   2974       1.27   thorpej 		    (head == &sc->sc_memwindow) ? "mem" : "io");
   2975       1.22    chopps 	}
   2976       1.22    chopps 	pccbb_winset(align, sc, bst);
   2977        1.1      haya 
   2978       1.22    chopps 	return 0;
   2979        1.1      haya }
   2980        1.1      haya 
   2981        1.1      haya static int
   2982      1.143    dyoung pccbb_winlist_insert(struct pccbb_win_chain_head *head, bus_addr_t start,
   2983      1.143    dyoung     bus_size_t size, bus_space_handle_t bsh, int flags)
   2984       1.22    chopps {
   2985       1.27   thorpej 	struct pccbb_win_chain *chainp, *elem;
   2986       1.22    chopps 
   2987       1.27   thorpej 	if ((elem = malloc(sizeof(struct pccbb_win_chain), M_DEVBUF,
   2988       1.27   thorpej 	    M_NOWAIT)) == NULL)
   2989       1.35     enami 		return (1);		/* fail */
   2990        1.1      haya 
   2991       1.27   thorpej 	elem->wc_start = start;
   2992       1.27   thorpej 	elem->wc_end = start + (size - 1);
   2993       1.27   thorpej 	elem->wc_handle = bsh;
   2994       1.27   thorpej 	elem->wc_flags = flags;
   2995        1.1      haya 
   2996      1.154    dyoung 	TAILQ_FOREACH(chainp, head, wc_list) {
   2997      1.154    dyoung 		if (chainp->wc_end >= start)
   2998      1.154    dyoung 			break;
   2999      1.154    dyoung 	}
   3000      1.154    dyoung 	if (chainp != NULL)
   3001       1.27   thorpej 		TAILQ_INSERT_AFTER(head, chainp, elem, wc_list);
   3002      1.154    dyoung 	else
   3003      1.154    dyoung 		TAILQ_INSERT_TAIL(head, elem, wc_list);
   3004       1.35     enami 	return (0);
   3005        1.1      haya }
   3006        1.1      haya 
   3007        1.1      haya static int
   3008      1.143    dyoung pccbb_winlist_delete(struct pccbb_win_chain_head *head, bus_space_handle_t bsh,
   3009      1.143    dyoung     bus_size_t size)
   3010        1.1      haya {
   3011       1.27   thorpej 	struct pccbb_win_chain *chainp;
   3012        1.1      haya 
   3013      1.154    dyoung 	TAILQ_FOREACH(chainp, head, wc_list) {
   3014      1.154    dyoung 		if (memcmp(&chainp->wc_handle, &bsh, sizeof(bsh)) == 0)
   3015      1.154    dyoung 			break;
   3016      1.154    dyoung 	}
   3017      1.154    dyoung 	if (chainp == NULL)
   3018      1.154    dyoung 		return 1;	       /* fail: no candidate to remove */
   3019        1.1      haya 
   3020      1.154    dyoung 	if ((chainp->wc_end - chainp->wc_start) != (size - 1)) {
   3021      1.154    dyoung 		printf("pccbb_winlist_delete: window 0x%lx size "
   3022      1.154    dyoung 		    "inconsistent: 0x%lx, 0x%lx\n",
   3023      1.154    dyoung 		    (unsigned long)chainp->wc_start,
   3024      1.154    dyoung 		    (unsigned long)(chainp->wc_end - chainp->wc_start),
   3025      1.154    dyoung 		    (unsigned long)(size - 1));
   3026      1.154    dyoung 		return 1;
   3027      1.154    dyoung 	}
   3028        1.1      haya 
   3029      1.154    dyoung 	TAILQ_REMOVE(head, chainp, wc_list);
   3030      1.154    dyoung 	free(chainp, M_DEVBUF);
   3031        1.1      haya 
   3032      1.154    dyoung 	return 0;
   3033        1.1      haya }
   3034        1.1      haya 
   3035        1.1      haya static void
   3036      1.143    dyoung pccbb_winset(bus_addr_t align, struct pccbb_softc *sc, bus_space_tag_t bst)
   3037       1.22    chopps {
   3038       1.22    chopps 	pci_chipset_tag_t pc;
   3039       1.22    chopps 	pcitag_t tag;
   3040       1.22    chopps 	bus_addr_t mask = ~(align - 1);
   3041       1.22    chopps 	struct {
   3042       1.22    chopps 		cardbusreg_t win_start;
   3043       1.22    chopps 		cardbusreg_t win_limit;
   3044       1.22    chopps 		int win_flags;
   3045       1.22    chopps 	} win[2];
   3046       1.22    chopps 	struct pccbb_win_chain *chainp;
   3047       1.22    chopps 	int offs;
   3048       1.22    chopps 
   3049       1.61     enami 	win[0].win_start = win[1].win_start = 0xffffffff;
   3050       1.61     enami 	win[0].win_limit = win[1].win_limit = 0;
   3051       1.61     enami 	win[0].win_flags = win[1].win_flags = 0;
   3052       1.22    chopps 
   3053       1.27   thorpej 	chainp = TAILQ_FIRST(&sc->sc_iowindow);
   3054      1.161    dyoung 	offs = PCI_CB_IOBASE0;
   3055       1.22    chopps 	if (sc->sc_memt == bst) {
   3056       1.27   thorpej 		chainp = TAILQ_FIRST(&sc->sc_memwindow);
   3057      1.161    dyoung 		offs = PCI_CB_MEMBASE0;
   3058       1.22    chopps 	}
   3059        1.1      haya 
   3060       1.27   thorpej 	if (chainp != NULL) {
   3061       1.22    chopps 		win[0].win_start = chainp->wc_start & mask;
   3062       1.22    chopps 		win[0].win_limit = chainp->wc_end & mask;
   3063       1.22    chopps 		win[0].win_flags = chainp->wc_flags;
   3064       1.27   thorpej 		chainp = TAILQ_NEXT(chainp, wc_list);
   3065        1.1      haya 	}
   3066        1.1      haya 
   3067       1.27   thorpej 	for (; chainp != NULL; chainp = TAILQ_NEXT(chainp, wc_list)) {
   3068       1.22    chopps 		if (win[1].win_start == 0xffffffff) {
   3069       1.22    chopps 			/* window 1 is not used */
   3070       1.22    chopps 			if ((win[0].win_flags == chainp->wc_flags) &&
   3071       1.22    chopps 			    (win[0].win_limit + align >=
   3072       1.22    chopps 			    (chainp->wc_start & mask))) {
   3073       1.27   thorpej 				/* concatenate */
   3074       1.22    chopps 				win[0].win_limit = chainp->wc_end & mask;
   3075       1.22    chopps 			} else {
   3076       1.22    chopps 				/* make new window */
   3077       1.22    chopps 				win[1].win_start = chainp->wc_start & mask;
   3078       1.22    chopps 				win[1].win_limit = chainp->wc_end & mask;
   3079       1.22    chopps 				win[1].win_flags = chainp->wc_flags;
   3080       1.22    chopps 			}
   3081       1.22    chopps 			continue;
   3082       1.22    chopps 		}
   3083       1.22    chopps 
   3084       1.32     enami 		/* Both windows are engaged. */
   3085       1.22    chopps 		if (win[0].win_flags == win[1].win_flags) {
   3086       1.22    chopps 			/* same flags */
   3087       1.22    chopps 			if (win[0].win_flags == chainp->wc_flags) {
   3088       1.22    chopps 				if (win[1].win_start - (win[0].win_limit +
   3089       1.22    chopps 				    align) <
   3090       1.22    chopps 				    (chainp->wc_start & mask) -
   3091       1.22    chopps 				    ((chainp->wc_end & mask) + align)) {
   3092       1.22    chopps 					/*
   3093       1.22    chopps 					 * merge window 0 and 1, and set win1
   3094       1.22    chopps 					 * to chainp
   3095       1.22    chopps 					 */
   3096       1.22    chopps 					win[0].win_limit = win[1].win_limit;
   3097       1.22    chopps 					win[1].win_start =
   3098       1.22    chopps 					    chainp->wc_start & mask;
   3099       1.22    chopps 					win[1].win_limit =
   3100       1.22    chopps 					    chainp->wc_end & mask;
   3101       1.22    chopps 				} else {
   3102       1.22    chopps 					win[1].win_limit =
   3103       1.22    chopps 					    chainp->wc_end & mask;
   3104       1.22    chopps 				}
   3105       1.22    chopps 			} else {
   3106       1.22    chopps 				/* different flags */
   3107       1.22    chopps 
   3108       1.27   thorpej 				/* concatenate win0 and win1 */
   3109       1.22    chopps 				win[0].win_limit = win[1].win_limit;
   3110       1.22    chopps 				/* allocate win[1] to new space */
   3111       1.22    chopps 				win[1].win_start = chainp->wc_start & mask;
   3112       1.22    chopps 				win[1].win_limit = chainp->wc_end & mask;
   3113       1.22    chopps 				win[1].win_flags = chainp->wc_flags;
   3114       1.22    chopps 			}
   3115       1.22    chopps 		} else {
   3116       1.22    chopps 			/* the flags of win[0] and win[1] is different */
   3117       1.22    chopps 			if (win[0].win_flags == chainp->wc_flags) {
   3118       1.22    chopps 				win[0].win_limit = chainp->wc_end & mask;
   3119       1.22    chopps 				/*
   3120       1.22    chopps 				 * XXX this creates overlapping windows, so
   3121       1.22    chopps 				 * what should the poor bridge do if one is
   3122       1.22    chopps 				 * cachable, and the other is not?
   3123       1.22    chopps 				 */
   3124      1.172  drochner 				aprint_error_dev(sc->sc_dev,
   3125      1.164    dyoung 				    "overlapping windows\n");
   3126       1.22    chopps 			} else {
   3127       1.22    chopps 				win[1].win_limit = chainp->wc_end & mask;
   3128       1.22    chopps 			}
   3129       1.22    chopps 		}
   3130       1.22    chopps 	}
   3131        1.1      haya 
   3132       1.22    chopps 	pc = sc->sc_pc;
   3133       1.22    chopps 	tag = sc->sc_tag;
   3134       1.22    chopps 	pci_conf_write(pc, tag, offs, win[0].win_start);
   3135       1.22    chopps 	pci_conf_write(pc, tag, offs + 4, win[0].win_limit);
   3136       1.22    chopps 	pci_conf_write(pc, tag, offs + 8, win[1].win_start);
   3137       1.22    chopps 	pci_conf_write(pc, tag, offs + 12, win[1].win_limit);
   3138       1.95  christos 	DPRINTF(("--pccbb_winset: win0 [0x%lx, 0x%lx), win1 [0x%lx, 0x%lx)\n",
   3139       1.95  christos 	    (unsigned long)pci_conf_read(pc, tag, offs),
   3140       1.95  christos 	    (unsigned long)pci_conf_read(pc, tag, offs + 4) + align,
   3141       1.95  christos 	    (unsigned long)pci_conf_read(pc, tag, offs + 8),
   3142       1.95  christos 	    (unsigned long)pci_conf_read(pc, tag, offs + 12) + align));
   3143       1.22    chopps 
   3144       1.22    chopps 	if (bst == sc->sc_memt) {
   3145      1.146    dyoung 		pcireg_t bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG);
   3146       1.61     enami 
   3147       1.61     enami 		bcr &= ~(CB_BCR_PREFETCH_MEMWIN0 | CB_BCR_PREFETCH_MEMWIN1);
   3148       1.61     enami 		if (win[0].win_flags & PCCBB_MEM_CACHABLE)
   3149       1.22    chopps 			bcr |= CB_BCR_PREFETCH_MEMWIN0;
   3150       1.61     enami 		if (win[1].win_flags & PCCBB_MEM_CACHABLE)
   3151       1.22    chopps 			bcr |= CB_BCR_PREFETCH_MEMWIN1;
   3152      1.146    dyoung 		pci_conf_write(pc, tag, PCI_BRIDGE_CONTROL_REG, bcr);
   3153       1.22    chopps 	}
   3154        1.1      haya }
   3155        1.1      haya 
   3156        1.1      haya #endif /* rbus */
   3157       1.25     enami 
   3158      1.156  jmcneill static bool
   3159      1.166    dyoung pccbb_suspend(device_t dv PMF_FN_ARGS)
   3160       1.25     enami {
   3161      1.156  jmcneill 	struct pccbb_softc *sc = device_private(dv);
   3162       1.25     enami 	bus_space_tag_t base_memt = sc->sc_base_memt;	/* socket regs memory */
   3163       1.25     enami 	bus_space_handle_t base_memh = sc->sc_base_memh;
   3164      1.156  jmcneill 	pcireg_t reg;
   3165       1.25     enami 
   3166      1.156  jmcneill 	if (sc->sc_pil_intr_enable)
   3167      1.156  jmcneill 		(void)pccbbintr_function(sc);
   3168      1.156  jmcneill 	sc->sc_pil_intr_enable = 0;
   3169       1.25     enami 
   3170      1.156  jmcneill 	reg = bus_space_read_4(base_memt, base_memh, CB_SOCKET_MASK);
   3171      1.156  jmcneill 	/* Disable interrupts. */
   3172      1.156  jmcneill 	reg &= ~(CB_SOCKET_MASK_CSTS | CB_SOCKET_MASK_CD | CB_SOCKET_MASK_POWER);
   3173      1.156  jmcneill 	bus_space_write_4(base_memt, base_memh, CB_SOCKET_MASK, reg);
   3174      1.156  jmcneill 	/* XXX joerg Disable power to the socket? */
   3175       1.38      haya 
   3176      1.165    dyoung 	/* XXX flush PCI write */
   3177      1.165    dyoung 	bus_space_read_4(base_memt, base_memh, CB_SOCKET_EVENT);
   3178      1.165    dyoung 
   3179      1.165    dyoung 	/* reset interrupt */
   3180      1.165    dyoung 	bus_space_write_4(base_memt, base_memh, CB_SOCKET_EVENT,
   3181      1.165    dyoung 	    bus_space_read_4(base_memt, base_memh, CB_SOCKET_EVENT));
   3182      1.165    dyoung 	/* XXX flush PCI write */
   3183      1.165    dyoung 	bus_space_read_4(base_memt, base_memh, CB_SOCKET_EVENT);
   3184      1.165    dyoung 
   3185      1.165    dyoung 	if (sc->sc_ih != NULL) {
   3186      1.165    dyoung 		pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
   3187      1.165    dyoung 		sc->sc_ih = NULL;
   3188      1.165    dyoung 	}
   3189      1.165    dyoung 
   3190      1.156  jmcneill 	return true;
   3191      1.156  jmcneill }
   3192      1.129  jmcneill 
   3193      1.156  jmcneill static bool
   3194      1.166    dyoung pccbb_resume(device_t dv PMF_FN_ARGS)
   3195      1.156  jmcneill {
   3196      1.156  jmcneill 	struct pccbb_softc *sc = device_private(dv);
   3197      1.156  jmcneill 	bus_space_tag_t base_memt = sc->sc_base_memt;	/* socket regs memory */
   3198      1.156  jmcneill 	bus_space_handle_t base_memh = sc->sc_base_memh;
   3199      1.156  jmcneill 	pcireg_t reg;
   3200       1.38      haya 
   3201      1.156  jmcneill 	pccbb_chipinit(sc);
   3202      1.165    dyoung 	pccbb_intrinit(sc);
   3203      1.156  jmcneill 	/* setup memory and io space window for CB */
   3204      1.156  jmcneill 	pccbb_winset(0x1000, sc, sc->sc_memt);
   3205      1.156  jmcneill 	pccbb_winset(0x04, sc, sc->sc_iot);
   3206      1.156  jmcneill 
   3207      1.156  jmcneill 	/* CSC Interrupt: Card detect interrupt on */
   3208      1.156  jmcneill 	reg = bus_space_read_4(base_memt, base_memh, CB_SOCKET_MASK);
   3209      1.156  jmcneill 	/* Card detect intr is turned on. */
   3210      1.165    dyoung 	reg |= CB_SOCKET_MASK_CSTS | CB_SOCKET_MASK_CD | CB_SOCKET_MASK_POWER;
   3211      1.156  jmcneill 	bus_space_write_4(base_memt, base_memh, CB_SOCKET_MASK, reg);
   3212      1.156  jmcneill 	/* reset interrupt */
   3213      1.156  jmcneill 	reg = bus_space_read_4(base_memt, base_memh, CB_SOCKET_EVENT);
   3214      1.156  jmcneill 	bus_space_write_4(base_memt, base_memh, CB_SOCKET_EVENT, reg);
   3215       1.70      haya 
   3216      1.156  jmcneill 	/*
   3217      1.156  jmcneill 	 * check for card insertion or removal during suspend period.
   3218      1.156  jmcneill 	 * XXX: the code can't cope with card swap (remove then
   3219      1.156  jmcneill 	 * insert).  how can we detect such situation?
   3220      1.156  jmcneill 	 */
   3221      1.156  jmcneill 	(void)pccbbintr(sc);
   3222      1.129  jmcneill 
   3223      1.156  jmcneill 	sc->sc_pil_intr_enable = 1;
   3224       1.25     enami 
   3225      1.156  jmcneill 	return true;
   3226       1.25     enami }
   3227