pci.c revision 1.31 1 1.31 thorpej /* $NetBSD: pci.c,v 1.31 1998/01/31 00:37:39 thorpej Exp $ */
2 1.3 cgd
3 1.1 mycroft /*
4 1.27 cgd * Copyright (c) 1995, 1996, 1997
5 1.27 cgd * Christopher G. Demetriou. All rights reserved.
6 1.1 mycroft * Copyright (c) 1994 Charles Hannum. All rights reserved.
7 1.1 mycroft *
8 1.1 mycroft * Redistribution and use in source and binary forms, with or without
9 1.1 mycroft * modification, are permitted provided that the following conditions
10 1.1 mycroft * are met:
11 1.1 mycroft * 1. Redistributions of source code must retain the above copyright
12 1.1 mycroft * notice, this list of conditions and the following disclaimer.
13 1.1 mycroft * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 mycroft * notice, this list of conditions and the following disclaimer in the
15 1.1 mycroft * documentation and/or other materials provided with the distribution.
16 1.1 mycroft * 3. All advertising materials mentioning features or use of this software
17 1.1 mycroft * must display the following acknowledgement:
18 1.1 mycroft * This product includes software developed by Charles Hannum.
19 1.1 mycroft * 4. The name of the author may not be used to endorse or promote products
20 1.1 mycroft * derived from this software without specific prior written permission.
21 1.1 mycroft *
22 1.1 mycroft * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 mycroft * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 mycroft * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 mycroft * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 mycroft * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 mycroft * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 mycroft * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 mycroft * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 mycroft * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 mycroft * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 mycroft */
33 1.1 mycroft
34 1.1 mycroft /*
35 1.10 cgd * PCI bus autoconfiguration.
36 1.1 mycroft */
37 1.1 mycroft
38 1.1 mycroft #include <sys/param.h>
39 1.10 cgd #include <sys/systm.h>
40 1.1 mycroft #include <sys/device.h>
41 1.1 mycroft
42 1.10 cgd #include <dev/pci/pcireg.h>
43 1.7 cgd #include <dev/pci/pcivar.h>
44 1.10 cgd
45 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
46 1.10 cgd int pcimatch __P((struct device *, void *, void *));
47 1.26 cgd #else
48 1.26 cgd int pcimatch __P((struct device *, struct cfdata *, void *));
49 1.26 cgd #endif
50 1.10 cgd void pciattach __P((struct device *, struct device *, void *));
51 1.10 cgd
52 1.16 thorpej struct cfattach pci_ca = {
53 1.16 thorpej sizeof(struct device), pcimatch, pciattach
54 1.10 cgd };
55 1.10 cgd
56 1.21 cgd int pciprint __P((void *, const char *));
57 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
58 1.10 cgd int pcisubmatch __P((struct device *, void *, void *));
59 1.26 cgd #else
60 1.26 cgd int pcisubmatch __P((struct device *, struct cfdata *, void *));
61 1.26 cgd #endif
62 1.10 cgd
63 1.25 cgd /*
64 1.25 cgd * Callback so that ISA/EISA bridges can attach their child busses
65 1.25 cgd * after PCI configuration is done.
66 1.25 cgd *
67 1.25 cgd * This works because:
68 1.25 cgd * (1) there can be at most one ISA/EISA bridge per PCI bus, and
69 1.25 cgd * (2) any ISA/EISA bridges must be attached to primary PCI
70 1.25 cgd * busses (i.e. bus zero).
71 1.25 cgd *
72 1.25 cgd * That boils down to: there can only be one of these outstanding
73 1.25 cgd * at a time, it is cleared when configuring PCI bus 0 before any
74 1.25 cgd * subdevices have been found, and it is run after all subdevices
75 1.25 cgd * of PCI bus 0 have been found.
76 1.25 cgd *
77 1.25 cgd * This is needed because there are some (legacy) PCI devices which
78 1.25 cgd * can show up as ISA/EISA devices as well (the prime example of which
79 1.25 cgd * are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge,
80 1.25 cgd * and the bridge is seen before the video board is, the board can show
81 1.25 cgd * up as an ISA device, and that can (bogusly) complicate the PCI device's
82 1.25 cgd * attach code, or make the PCI device not be properly attached at all.
83 1.25 cgd */
84 1.25 cgd static void (*pci_isa_bridge_callback) __P((void *));
85 1.25 cgd static void *pci_isa_bridge_callback_arg;
86 1.25 cgd
87 1.10 cgd int
88 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
89 1.10 cgd pcimatch(parent, match, aux)
90 1.26 cgd #else
91 1.26 cgd pcimatch(parent, cf, aux)
92 1.26 cgd #endif
93 1.10 cgd struct device *parent;
94 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
95 1.26 cgd void *match;
96 1.26 cgd #else
97 1.26 cgd struct cfdata *cf;
98 1.26 cgd #endif
99 1.26 cgd void *aux;
100 1.10 cgd {
101 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
102 1.10 cgd struct cfdata *cf = match;
103 1.26 cgd #endif
104 1.10 cgd struct pcibus_attach_args *pba = aux;
105 1.10 cgd
106 1.10 cgd if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
107 1.10 cgd return (0);
108 1.10 cgd
109 1.10 cgd /* Check the locators */
110 1.14 cgd if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
111 1.14 cgd cf->pcibuscf_bus != pba->pba_bus)
112 1.10 cgd return (0);
113 1.10 cgd
114 1.10 cgd /* sanity */
115 1.10 cgd if (pba->pba_bus < 0 || pba->pba_bus > 255)
116 1.10 cgd return (0);
117 1.10 cgd
118 1.10 cgd /*
119 1.10 cgd * XXX check other (hardware?) indicators
120 1.10 cgd */
121 1.10 cgd
122 1.10 cgd return 1;
123 1.10 cgd }
124 1.10 cgd
125 1.10 cgd void
126 1.10 cgd pciattach(parent, self, aux)
127 1.10 cgd struct device *parent, *self;
128 1.10 cgd void *aux;
129 1.10 cgd {
130 1.10 cgd struct pcibus_attach_args *pba = aux;
131 1.24 thorpej bus_space_tag_t iot, memt;
132 1.18 cgd pci_chipset_tag_t pc;
133 1.18 cgd int bus, device, maxndevs, function, nfunctions;
134 1.31 thorpej int io_enabled, mem_enabled;
135 1.10 cgd
136 1.18 cgd pci_attach_hook(parent, self, pba);
137 1.31 thorpej printf("\n");
138 1.31 thorpej
139 1.31 thorpej io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED);
140 1.31 thorpej mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED);
141 1.31 thorpej
142 1.31 thorpej if (io_enabled == 0 && mem_enabled == 0) {
143 1.31 thorpej printf("%s: no spaces enabled!\n", self->dv_xname);
144 1.31 thorpej return;
145 1.31 thorpej }
146 1.31 thorpej
147 1.31 thorpej printf("%s: ", self->dv_xname);
148 1.31 thorpej if (io_enabled)
149 1.31 thorpej printf("i/o enabled");
150 1.31 thorpej if (mem_enabled) {
151 1.31 thorpej if (io_enabled)
152 1.31 thorpej printf(", ");
153 1.31 thorpej printf("memory enabled");
154 1.31 thorpej }
155 1.23 christos printf("\n");
156 1.10 cgd
157 1.24 thorpej iot = pba->pba_iot;
158 1.24 thorpej memt = pba->pba_memt;
159 1.18 cgd pc = pba->pba_pc;
160 1.18 cgd bus = pba->pba_bus;
161 1.18 cgd maxndevs = pci_bus_maxdevs(pc, bus);
162 1.18 cgd
163 1.25 cgd if (bus == 0)
164 1.25 cgd pci_isa_bridge_callback = NULL;
165 1.25 cgd
166 1.18 cgd for (device = 0; device < maxndevs; device++) {
167 1.10 cgd pcitag_t tag;
168 1.27 cgd pcireg_t id, class, intr, bhlcr, csr;
169 1.10 cgd struct pci_attach_args pa;
170 1.19 christos int pin;
171 1.10 cgd
172 1.18 cgd tag = pci_make_tag(pc, bus, device, 0);
173 1.18 cgd id = pci_conf_read(pc, tag, PCI_ID_REG);
174 1.10 cgd if (id == 0 || id == 0xffffffff)
175 1.10 cgd continue;
176 1.10 cgd
177 1.18 cgd bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
178 1.17 cgd nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1;
179 1.10 cgd
180 1.10 cgd for (function = 0; function < nfunctions; function++) {
181 1.18 cgd tag = pci_make_tag(pc, bus, device, function);
182 1.18 cgd id = pci_conf_read(pc, tag, PCI_ID_REG);
183 1.10 cgd if (id == 0 || id == 0xffffffff)
184 1.10 cgd continue;
185 1.27 cgd csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
186 1.18 cgd class = pci_conf_read(pc, tag, PCI_CLASS_REG);
187 1.18 cgd intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
188 1.10 cgd
189 1.24 thorpej pa.pa_iot = iot;
190 1.24 thorpej pa.pa_memt = memt;
191 1.29 mycroft pa.pa_dmat = pba->pba_dmat;
192 1.18 cgd pa.pa_pc = pc;
193 1.10 cgd pa.pa_device = device;
194 1.10 cgd pa.pa_function = function;
195 1.10 cgd pa.pa_tag = tag;
196 1.10 cgd pa.pa_id = id;
197 1.10 cgd pa.pa_class = class;
198 1.10 cgd
199 1.27 cgd /* set up memory and I/O enable flags as appropriate */
200 1.27 cgd pa.pa_flags = 0;
201 1.27 cgd if ((pba->pba_flags & PCI_FLAGS_IO_ENABLED) &&
202 1.27 cgd (csr & PCI_COMMAND_IO_ENABLE))
203 1.27 cgd pa.pa_flags |= PCI_FLAGS_IO_ENABLED;
204 1.27 cgd if ((pba->pba_flags & PCI_FLAGS_MEM_ENABLED) &&
205 1.27 cgd (csr & PCI_COMMAND_MEM_ENABLE))
206 1.27 cgd pa.pa_flags |= PCI_FLAGS_MEM_ENABLED;
207 1.27 cgd
208 1.18 cgd if (bus == 0) {
209 1.18 cgd pa.pa_intrswiz = 0;
210 1.18 cgd pa.pa_intrtag = tag;
211 1.18 cgd } else {
212 1.18 cgd pa.pa_intrswiz = pba->pba_intrswiz + device;
213 1.18 cgd pa.pa_intrtag = pba->pba_intrtag;
214 1.18 cgd }
215 1.18 cgd pin = PCI_INTERRUPT_PIN(intr);
216 1.18 cgd if (pin == PCI_INTERRUPT_PIN_NONE) {
217 1.18 cgd /* no interrupt */
218 1.18 cgd pa.pa_intrpin = 0;
219 1.18 cgd } else {
220 1.18 cgd /*
221 1.18 cgd * swizzle it based on the number of
222 1.18 cgd * busses we're behind and our device
223 1.18 cgd * number.
224 1.18 cgd */
225 1.18 cgd pa.pa_intrpin = /* XXX */
226 1.18 cgd ((pin + pa.pa_intrswiz - 1) % 4) + 1;
227 1.18 cgd }
228 1.18 cgd pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
229 1.18 cgd
230 1.10 cgd config_found_sm(self, &pa, pciprint, pcisubmatch);
231 1.10 cgd }
232 1.10 cgd }
233 1.25 cgd
234 1.25 cgd if (bus == 0 && pci_isa_bridge_callback != NULL)
235 1.25 cgd (*pci_isa_bridge_callback)(pci_isa_bridge_callback_arg);
236 1.10 cgd }
237 1.1 mycroft
238 1.1 mycroft int
239 1.10 cgd pciprint(aux, pnp)
240 1.1 mycroft void *aux;
241 1.21 cgd const char *pnp;
242 1.1 mycroft {
243 1.1 mycroft register struct pci_attach_args *pa = aux;
244 1.10 cgd char devinfo[256];
245 1.1 mycroft
246 1.10 cgd if (pnp) {
247 1.10 cgd pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
248 1.23 christos printf("%s at %s", devinfo, pnp);
249 1.10 cgd }
250 1.23 christos printf(" dev %d function %d", pa->pa_device, pa->pa_function);
251 1.27 cgd #if 0
252 1.27 cgd printf(" (%si/o, %smem)",
253 1.27 cgd pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "" : "no ",
254 1.27 cgd pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "" : "no ");
255 1.27 cgd #endif
256 1.6 mycroft return (UNCONF);
257 1.6 mycroft }
258 1.6 mycroft
259 1.6 mycroft int
260 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
261 1.6 mycroft pcisubmatch(parent, match, aux)
262 1.26 cgd #else
263 1.26 cgd pcisubmatch(parent, cf, aux)
264 1.26 cgd #endif
265 1.6 mycroft struct device *parent;
266 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
267 1.26 cgd void *match;
268 1.26 cgd #else
269 1.26 cgd struct cfdata *cf;
270 1.26 cgd #endif
271 1.26 cgd void *aux;
272 1.6 mycroft {
273 1.26 cgd #ifdef __BROKEN_INDIRECT_CONFIG
274 1.6 mycroft struct cfdata *cf = match;
275 1.26 cgd #endif
276 1.6 mycroft struct pci_attach_args *pa = aux;
277 1.6 mycroft
278 1.14 cgd if (cf->pcicf_dev != PCI_UNK_DEV &&
279 1.14 cgd cf->pcicf_dev != pa->pa_device)
280 1.6 mycroft return 0;
281 1.14 cgd if (cf->pcicf_function != PCI_UNK_FUNCTION &&
282 1.14 cgd cf->pcicf_function != pa->pa_function)
283 1.6 mycroft return 0;
284 1.26 cgd return ((*cf->cf_attach->ca_match)(parent, cf, aux));
285 1.25 cgd }
286 1.25 cgd
287 1.25 cgd void
288 1.25 cgd set_pci_isa_bridge_callback(fn, arg)
289 1.25 cgd void (*fn) __P((void *));
290 1.25 cgd void *arg;
291 1.25 cgd {
292 1.25 cgd
293 1.25 cgd if (pci_isa_bridge_callback != NULL)
294 1.25 cgd panic("set_pci_isa_bridge_callback");
295 1.25 cgd pci_isa_bridge_callback = fn;
296 1.25 cgd pci_isa_bridge_callback_arg = arg;
297 1.1 mycroft }
298