pci.c revision 1.40 1 1.40 drochner /* $NetBSD: pci.c,v 1.40 1998/11/07 16:47:22 drochner Exp $ */
2 1.3 cgd
3 1.1 mycroft /*
4 1.37 cgd * Copyright (c) 1995, 1996, 1997, 1998
5 1.27 cgd * Christopher G. Demetriou. All rights reserved.
6 1.39 mycroft * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 1.1 mycroft *
8 1.1 mycroft * Redistribution and use in source and binary forms, with or without
9 1.1 mycroft * modification, are permitted provided that the following conditions
10 1.1 mycroft * are met:
11 1.1 mycroft * 1. Redistributions of source code must retain the above copyright
12 1.1 mycroft * notice, this list of conditions and the following disclaimer.
13 1.1 mycroft * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 mycroft * notice, this list of conditions and the following disclaimer in the
15 1.1 mycroft * documentation and/or other materials provided with the distribution.
16 1.1 mycroft * 3. All advertising materials mentioning features or use of this software
17 1.1 mycroft * must display the following acknowledgement:
18 1.39 mycroft * This product includes software developed by Charles M. Hannum.
19 1.1 mycroft * 4. The name of the author may not be used to endorse or promote products
20 1.1 mycroft * derived from this software without specific prior written permission.
21 1.1 mycroft *
22 1.1 mycroft * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 mycroft * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 mycroft * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 mycroft * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 mycroft * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 mycroft * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 mycroft * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 mycroft * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 mycroft * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 mycroft * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 mycroft */
33 1.1 mycroft
34 1.1 mycroft /*
35 1.10 cgd * PCI bus autoconfiguration.
36 1.1 mycroft */
37 1.1 mycroft
38 1.1 mycroft #include <sys/param.h>
39 1.10 cgd #include <sys/systm.h>
40 1.1 mycroft #include <sys/device.h>
41 1.1 mycroft
42 1.10 cgd #include <dev/pci/pcireg.h>
43 1.7 cgd #include <dev/pci/pcivar.h>
44 1.33 cgd #include <dev/pci/pcidevs.h>
45 1.10 cgd
46 1.26 cgd int pcimatch __P((struct device *, struct cfdata *, void *));
47 1.10 cgd void pciattach __P((struct device *, struct device *, void *));
48 1.10 cgd
49 1.34 drochner struct pci_softc {
50 1.34 drochner struct device sc_dev;
51 1.34 drochner bus_space_tag_t sc_iot, sc_memt;
52 1.34 drochner bus_dma_tag_t sc_dmat;
53 1.34 drochner pci_chipset_tag_t sc_pc;
54 1.34 drochner int sc_bus, sc_maxndevs;
55 1.34 drochner u_int sc_intrswiz;
56 1.34 drochner pcitag_t sc_intrtag;
57 1.34 drochner int sc_flags;
58 1.34 drochner };
59 1.34 drochner
60 1.16 thorpej struct cfattach pci_ca = {
61 1.34 drochner sizeof(struct pci_softc), pcimatch, pciattach
62 1.10 cgd };
63 1.10 cgd
64 1.34 drochner void pci_probe_bus __P((struct device *));
65 1.21 cgd int pciprint __P((void *, const char *));
66 1.26 cgd int pcisubmatch __P((struct device *, struct cfdata *, void *));
67 1.10 cgd
68 1.25 cgd /*
69 1.38 thorpej * Important note about PCI-ISA bridges:
70 1.38 thorpej *
71 1.38 thorpej * Callbacks are used to configure these devices so that ISA/EISA bridges
72 1.38 thorpej * can attach their child busses after PCI configuration is done.
73 1.25 cgd *
74 1.25 cgd * This works because:
75 1.25 cgd * (1) there can be at most one ISA/EISA bridge per PCI bus, and
76 1.25 cgd * (2) any ISA/EISA bridges must be attached to primary PCI
77 1.25 cgd * busses (i.e. bus zero).
78 1.25 cgd *
79 1.25 cgd * That boils down to: there can only be one of these outstanding
80 1.25 cgd * at a time, it is cleared when configuring PCI bus 0 before any
81 1.25 cgd * subdevices have been found, and it is run after all subdevices
82 1.25 cgd * of PCI bus 0 have been found.
83 1.25 cgd *
84 1.25 cgd * This is needed because there are some (legacy) PCI devices which
85 1.25 cgd * can show up as ISA/EISA devices as well (the prime example of which
86 1.25 cgd * are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge,
87 1.25 cgd * and the bridge is seen before the video board is, the board can show
88 1.25 cgd * up as an ISA device, and that can (bogusly) complicate the PCI device's
89 1.25 cgd * attach code, or make the PCI device not be properly attached at all.
90 1.38 thorpej *
91 1.38 thorpej * We use the generic config_defer() facility to achieve this.
92 1.25 cgd */
93 1.25 cgd
94 1.10 cgd int
95 1.26 cgd pcimatch(parent, cf, aux)
96 1.10 cgd struct device *parent;
97 1.26 cgd struct cfdata *cf;
98 1.26 cgd void *aux;
99 1.10 cgd {
100 1.10 cgd struct pcibus_attach_args *pba = aux;
101 1.10 cgd
102 1.10 cgd if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
103 1.10 cgd return (0);
104 1.10 cgd
105 1.10 cgd /* Check the locators */
106 1.14 cgd if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
107 1.14 cgd cf->pcibuscf_bus != pba->pba_bus)
108 1.10 cgd return (0);
109 1.10 cgd
110 1.10 cgd /* sanity */
111 1.10 cgd if (pba->pba_bus < 0 || pba->pba_bus > 255)
112 1.10 cgd return (0);
113 1.10 cgd
114 1.10 cgd /*
115 1.10 cgd * XXX check other (hardware?) indicators
116 1.10 cgd */
117 1.10 cgd
118 1.10 cgd return 1;
119 1.10 cgd }
120 1.10 cgd
121 1.10 cgd void
122 1.34 drochner pci_probe_bus(self)
123 1.34 drochner struct device *self;
124 1.10 cgd {
125 1.34 drochner struct pci_softc *sc = (struct pci_softc *)self;
126 1.24 thorpej bus_space_tag_t iot, memt;
127 1.18 cgd pci_chipset_tag_t pc;
128 1.37 cgd const struct pci_quirkdata *qd;
129 1.18 cgd int bus, device, maxndevs, function, nfunctions;
130 1.31 thorpej
131 1.34 drochner iot = sc->sc_iot;
132 1.34 drochner memt = sc->sc_memt;
133 1.34 drochner pc = sc->sc_pc;
134 1.34 drochner bus = sc->sc_bus;
135 1.34 drochner maxndevs = sc->sc_maxndevs;
136 1.18 cgd
137 1.18 cgd for (device = 0; device < maxndevs; device++) {
138 1.10 cgd pcitag_t tag;
139 1.27 cgd pcireg_t id, class, intr, bhlcr, csr;
140 1.10 cgd struct pci_attach_args pa;
141 1.19 christos int pin;
142 1.10 cgd
143 1.18 cgd tag = pci_make_tag(pc, bus, device, 0);
144 1.18 cgd id = pci_conf_read(pc, tag, PCI_ID_REG);
145 1.32 cgd
146 1.32 cgd /* Invalid vendor ID value? */
147 1.33 cgd if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
148 1.32 cgd continue;
149 1.32 cgd /* XXX Not invalid, but we've done this ~forever. */
150 1.32 cgd if (PCI_VENDOR(id) == 0)
151 1.10 cgd continue;
152 1.10 cgd
153 1.37 cgd qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
154 1.37 cgd
155 1.18 cgd bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
156 1.37 cgd if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
157 1.37 cgd (qd != NULL &&
158 1.37 cgd (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
159 1.37 cgd nfunctions = 8;
160 1.37 cgd else
161 1.37 cgd nfunctions = 1;
162 1.10 cgd
163 1.10 cgd for (function = 0; function < nfunctions; function++) {
164 1.18 cgd tag = pci_make_tag(pc, bus, device, function);
165 1.18 cgd id = pci_conf_read(pc, tag, PCI_ID_REG);
166 1.27 cgd csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
167 1.18 cgd class = pci_conf_read(pc, tag, PCI_CLASS_REG);
168 1.18 cgd intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
169 1.32 cgd
170 1.32 cgd /* Invalid vendor ID value? */
171 1.33 cgd if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
172 1.32 cgd continue;
173 1.32 cgd /* XXX Not invalid, but we've done this ~forever. */
174 1.32 cgd if (PCI_VENDOR(id) == 0)
175 1.32 cgd continue;
176 1.10 cgd
177 1.24 thorpej pa.pa_iot = iot;
178 1.24 thorpej pa.pa_memt = memt;
179 1.34 drochner pa.pa_dmat = sc->sc_dmat;
180 1.18 cgd pa.pa_pc = pc;
181 1.10 cgd pa.pa_device = device;
182 1.10 cgd pa.pa_function = function;
183 1.10 cgd pa.pa_tag = tag;
184 1.10 cgd pa.pa_id = id;
185 1.10 cgd pa.pa_class = class;
186 1.10 cgd
187 1.27 cgd /* set up memory and I/O enable flags as appropriate */
188 1.27 cgd pa.pa_flags = 0;
189 1.34 drochner if ((sc->sc_flags & PCI_FLAGS_IO_ENABLED) &&
190 1.27 cgd (csr & PCI_COMMAND_IO_ENABLE))
191 1.27 cgd pa.pa_flags |= PCI_FLAGS_IO_ENABLED;
192 1.34 drochner if ((sc->sc_flags & PCI_FLAGS_MEM_ENABLED) &&
193 1.27 cgd (csr & PCI_COMMAND_MEM_ENABLE))
194 1.27 cgd pa.pa_flags |= PCI_FLAGS_MEM_ENABLED;
195 1.27 cgd
196 1.18 cgd if (bus == 0) {
197 1.18 cgd pa.pa_intrswiz = 0;
198 1.18 cgd pa.pa_intrtag = tag;
199 1.18 cgd } else {
200 1.34 drochner pa.pa_intrswiz = sc->sc_intrswiz + device;
201 1.34 drochner pa.pa_intrtag = sc->sc_intrtag;
202 1.18 cgd }
203 1.18 cgd pin = PCI_INTERRUPT_PIN(intr);
204 1.18 cgd if (pin == PCI_INTERRUPT_PIN_NONE) {
205 1.18 cgd /* no interrupt */
206 1.18 cgd pa.pa_intrpin = 0;
207 1.18 cgd } else {
208 1.18 cgd /*
209 1.18 cgd * swizzle it based on the number of
210 1.18 cgd * busses we're behind and our device
211 1.18 cgd * number.
212 1.18 cgd */
213 1.18 cgd pa.pa_intrpin = /* XXX */
214 1.18 cgd ((pin + pa.pa_intrswiz - 1) % 4) + 1;
215 1.18 cgd }
216 1.18 cgd pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
217 1.18 cgd
218 1.10 cgd config_found_sm(self, &pa, pciprint, pcisubmatch);
219 1.10 cgd }
220 1.10 cgd }
221 1.10 cgd }
222 1.1 mycroft
223 1.34 drochner void
224 1.34 drochner pciattach(parent, self, aux)
225 1.34 drochner struct device *parent, *self;
226 1.34 drochner void *aux;
227 1.34 drochner {
228 1.34 drochner struct pcibus_attach_args *pba = aux;
229 1.34 drochner struct pci_softc *sc = (struct pci_softc *)self;
230 1.34 drochner int io_enabled, mem_enabled;
231 1.34 drochner
232 1.34 drochner pci_attach_hook(parent, self, pba);
233 1.34 drochner printf("\n");
234 1.34 drochner
235 1.34 drochner io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED);
236 1.34 drochner mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED);
237 1.34 drochner
238 1.34 drochner if (io_enabled == 0 && mem_enabled == 0) {
239 1.34 drochner printf("%s: no spaces enabled!\n", self->dv_xname);
240 1.34 drochner return;
241 1.34 drochner }
242 1.34 drochner
243 1.34 drochner printf("%s: ", self->dv_xname);
244 1.34 drochner if (io_enabled)
245 1.34 drochner printf("i/o enabled");
246 1.34 drochner if (mem_enabled) {
247 1.34 drochner if (io_enabled)
248 1.34 drochner printf(", ");
249 1.34 drochner printf("memory enabled");
250 1.34 drochner }
251 1.34 drochner printf("\n");
252 1.34 drochner
253 1.34 drochner sc->sc_iot = pba->pba_iot;
254 1.34 drochner sc->sc_memt = pba->pba_memt;
255 1.34 drochner sc->sc_dmat = pba->pba_dmat;
256 1.34 drochner sc->sc_pc = pba->pba_pc;
257 1.34 drochner sc->sc_bus = pba->pba_bus;
258 1.34 drochner sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
259 1.34 drochner sc->sc_intrswiz = pba->pba_intrswiz;
260 1.34 drochner sc->sc_intrtag = pba->pba_intrtag;
261 1.34 drochner sc->sc_flags = pba->pba_flags;
262 1.34 drochner
263 1.34 drochner pci_probe_bus(self);
264 1.34 drochner }
265 1.34 drochner
266 1.1 mycroft int
267 1.10 cgd pciprint(aux, pnp)
268 1.1 mycroft void *aux;
269 1.21 cgd const char *pnp;
270 1.1 mycroft {
271 1.1 mycroft register struct pci_attach_args *pa = aux;
272 1.10 cgd char devinfo[256];
273 1.37 cgd #if 0
274 1.37 cgd const struct pci_quirkdata *qd;
275 1.37 cgd #endif
276 1.1 mycroft
277 1.10 cgd if (pnp) {
278 1.10 cgd pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
279 1.23 christos printf("%s at %s", devinfo, pnp);
280 1.10 cgd }
281 1.23 christos printf(" dev %d function %d", pa->pa_device, pa->pa_function);
282 1.27 cgd #if 0
283 1.36 cgd printf(": ");
284 1.36 cgd pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
285 1.36 cgd if (!pnp)
286 1.36 cgd pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
287 1.36 cgd printf("%s at %s", devinfo, pnp ? pnp : "?");
288 1.37 cgd printf(" dev %d function %d (", pa->pa_device, pa->pa_function);
289 1.37 cgd #ifdef __i386__
290 1.37 cgd printf("tag %#lx, intrtag %#lx, intrswiz %#lx, intrpin %#lx",
291 1.37 cgd *(long *)&pa->pa_tag, *(long *)&pa->pa_intrtag,
292 1.37 cgd (long)pa->pa_intrswiz, (long)pa->pa_intrpin);
293 1.37 cgd #else
294 1.37 cgd printf("tag %#lx, intrtag %#lx, intrswiz %#lx, intrpin %#lx",
295 1.37 cgd (long)pa->pa_tag, (long)pa->pa_intrtag, (long)pa->pa_intrswiz,
296 1.37 cgd (long)pa->pa_intrpin);
297 1.36 cgd #endif
298 1.37 cgd printf(", i/o %s, mem %s,",
299 1.37 cgd pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "on" : "off",
300 1.37 cgd pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "on" : "off");
301 1.37 cgd qd = pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
302 1.37 cgd PCI_PRODUCT(pa->pa_id));
303 1.37 cgd if (qd == NULL) {
304 1.37 cgd printf(" no quirks");
305 1.37 cgd } else {
306 1.37 cgd bitmask_snprintf(qd->quirks,
307 1.37 cgd "\20\1multifn", devinfo, sizeof (devinfo));
308 1.37 cgd printf(" quirks %s", devinfo);
309 1.37 cgd }
310 1.37 cgd printf(")");
311 1.27 cgd #endif
312 1.6 mycroft return (UNCONF);
313 1.6 mycroft }
314 1.6 mycroft
315 1.6 mycroft int
316 1.26 cgd pcisubmatch(parent, cf, aux)
317 1.6 mycroft struct device *parent;
318 1.26 cgd struct cfdata *cf;
319 1.26 cgd void *aux;
320 1.6 mycroft {
321 1.6 mycroft struct pci_attach_args *pa = aux;
322 1.6 mycroft
323 1.14 cgd if (cf->pcicf_dev != PCI_UNK_DEV &&
324 1.14 cgd cf->pcicf_dev != pa->pa_device)
325 1.6 mycroft return 0;
326 1.14 cgd if (cf->pcicf_function != PCI_UNK_FUNCTION &&
327 1.14 cgd cf->pcicf_function != pa->pa_function)
328 1.6 mycroft return 0;
329 1.26 cgd return ((*cf->cf_attach->ca_match)(parent, cf, aux));
330 1.40 drochner }
331 1.40 drochner
332 1.40 drochner int
333 1.40 drochner pci_get_capability(pc, tag, capid, offset, value)
334 1.40 drochner pci_chipset_tag_t pc;
335 1.40 drochner pcitag_t tag;
336 1.40 drochner int capid;
337 1.40 drochner int *offset;
338 1.40 drochner pcireg_t *value;
339 1.40 drochner {
340 1.40 drochner pcireg_t reg;
341 1.40 drochner unsigned int ofs;
342 1.40 drochner
343 1.40 drochner reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
344 1.40 drochner if (!(reg & PCI_STATUS_CAPLIST_SUPPORT))
345 1.40 drochner return (0);
346 1.40 drochner
347 1.40 drochner ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, PCI_CAPLISTPTR_REG));
348 1.40 drochner while (ofs != 0) {
349 1.40 drochner #ifdef DIAGNOSTIC
350 1.40 drochner if ((ofs & 3) || (ofs < 0x40))
351 1.40 drochner panic("pci_get_capability");
352 1.40 drochner #endif
353 1.40 drochner reg = pci_conf_read(pc, tag, ofs);
354 1.40 drochner if (PCI_CAPLIST_CAP(reg) == capid) {
355 1.40 drochner if (offset)
356 1.40 drochner *offset = ofs;
357 1.40 drochner if (value)
358 1.40 drochner *value = reg;
359 1.40 drochner return (1);
360 1.40 drochner }
361 1.40 drochner ofs = PCI_CAPLIST_NEXT(reg);
362 1.40 drochner }
363 1.40 drochner
364 1.40 drochner return (0);
365 1.1 mycroft }
366