pci.c revision 1.51.2.4 1 1.51.2.4 nathanw /* $NetBSD: pci.c,v 1.51.2.4 2001/10/22 20:41:25 nathanw Exp $ */
2 1.3 cgd
3 1.1 mycroft /*
4 1.37 cgd * Copyright (c) 1995, 1996, 1997, 1998
5 1.27 cgd * Christopher G. Demetriou. All rights reserved.
6 1.39 mycroft * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 1.1 mycroft *
8 1.1 mycroft * Redistribution and use in source and binary forms, with or without
9 1.1 mycroft * modification, are permitted provided that the following conditions
10 1.1 mycroft * are met:
11 1.1 mycroft * 1. Redistributions of source code must retain the above copyright
12 1.1 mycroft * notice, this list of conditions and the following disclaimer.
13 1.1 mycroft * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 mycroft * notice, this list of conditions and the following disclaimer in the
15 1.1 mycroft * documentation and/or other materials provided with the distribution.
16 1.1 mycroft * 3. All advertising materials mentioning features or use of this software
17 1.1 mycroft * must display the following acknowledgement:
18 1.39 mycroft * This product includes software developed by Charles M. Hannum.
19 1.1 mycroft * 4. The name of the author may not be used to endorse or promote products
20 1.1 mycroft * derived from this software without specific prior written permission.
21 1.1 mycroft *
22 1.1 mycroft * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 mycroft * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 mycroft * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 mycroft * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 mycroft * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 mycroft * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 mycroft * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 mycroft * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 mycroft * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 mycroft * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 mycroft */
33 1.1 mycroft
34 1.1 mycroft /*
35 1.10 cgd * PCI bus autoconfiguration.
36 1.1 mycroft */
37 1.1 mycroft
38 1.45 cgd #include "opt_pci.h"
39 1.45 cgd
40 1.1 mycroft #include <sys/param.h>
41 1.10 cgd #include <sys/systm.h>
42 1.1 mycroft #include <sys/device.h>
43 1.1 mycroft
44 1.10 cgd #include <dev/pci/pcireg.h>
45 1.7 cgd #include <dev/pci/pcivar.h>
46 1.33 cgd #include <dev/pci/pcidevs.h>
47 1.10 cgd
48 1.45 cgd #ifdef PCI_CONFIG_DUMP
49 1.45 cgd int pci_config_dump = 1;
50 1.45 cgd #else
51 1.45 cgd int pci_config_dump = 0;
52 1.45 cgd #endif
53 1.45 cgd
54 1.26 cgd int pcimatch __P((struct device *, struct cfdata *, void *));
55 1.10 cgd void pciattach __P((struct device *, struct device *, void *));
56 1.10 cgd
57 1.16 thorpej struct cfattach pci_ca = {
58 1.34 drochner sizeof(struct pci_softc), pcimatch, pciattach
59 1.10 cgd };
60 1.10 cgd
61 1.51.2.3 nathanw int pci_probe_bus(struct device *, int (*match)(struct pci_attach_args *),
62 1.51.2.3 nathanw struct pci_attach_args *);
63 1.21 cgd int pciprint __P((void *, const char *));
64 1.26 cgd int pcisubmatch __P((struct device *, struct cfdata *, void *));
65 1.10 cgd
66 1.25 cgd /*
67 1.38 thorpej * Important note about PCI-ISA bridges:
68 1.38 thorpej *
69 1.38 thorpej * Callbacks are used to configure these devices so that ISA/EISA bridges
70 1.38 thorpej * can attach their child busses after PCI configuration is done.
71 1.25 cgd *
72 1.25 cgd * This works because:
73 1.25 cgd * (1) there can be at most one ISA/EISA bridge per PCI bus, and
74 1.25 cgd * (2) any ISA/EISA bridges must be attached to primary PCI
75 1.25 cgd * busses (i.e. bus zero).
76 1.25 cgd *
77 1.25 cgd * That boils down to: there can only be one of these outstanding
78 1.25 cgd * at a time, it is cleared when configuring PCI bus 0 before any
79 1.25 cgd * subdevices have been found, and it is run after all subdevices
80 1.25 cgd * of PCI bus 0 have been found.
81 1.25 cgd *
82 1.25 cgd * This is needed because there are some (legacy) PCI devices which
83 1.25 cgd * can show up as ISA/EISA devices as well (the prime example of which
84 1.25 cgd * are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge,
85 1.25 cgd * and the bridge is seen before the video board is, the board can show
86 1.25 cgd * up as an ISA device, and that can (bogusly) complicate the PCI device's
87 1.25 cgd * attach code, or make the PCI device not be properly attached at all.
88 1.38 thorpej *
89 1.38 thorpej * We use the generic config_defer() facility to achieve this.
90 1.25 cgd */
91 1.25 cgd
92 1.10 cgd int
93 1.26 cgd pcimatch(parent, cf, aux)
94 1.10 cgd struct device *parent;
95 1.26 cgd struct cfdata *cf;
96 1.26 cgd void *aux;
97 1.10 cgd {
98 1.10 cgd struct pcibus_attach_args *pba = aux;
99 1.10 cgd
100 1.10 cgd if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
101 1.10 cgd return (0);
102 1.10 cgd
103 1.10 cgd /* Check the locators */
104 1.14 cgd if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
105 1.14 cgd cf->pcibuscf_bus != pba->pba_bus)
106 1.10 cgd return (0);
107 1.10 cgd
108 1.10 cgd /* sanity */
109 1.10 cgd if (pba->pba_bus < 0 || pba->pba_bus > 255)
110 1.10 cgd return (0);
111 1.10 cgd
112 1.10 cgd /*
113 1.10 cgd * XXX check other (hardware?) indicators
114 1.10 cgd */
115 1.10 cgd
116 1.10 cgd return 1;
117 1.10 cgd }
118 1.10 cgd
119 1.51 mrg /* XXX
120 1.51 mrg * The __PCI_BUS_DEVORDER/__PCI_DEV_FUNCORDER macros should go away
121 1.51 mrg * and be implemented with device properties when they arrive.
122 1.51 mrg */
123 1.51.2.3 nathanw int
124 1.51.2.3 nathanw pci_probe_bus(struct device *self, int (*match)(struct pci_attach_args *),
125 1.51.2.3 nathanw struct pci_attach_args *pap)
126 1.10 cgd {
127 1.34 drochner struct pci_softc *sc = (struct pci_softc *)self;
128 1.24 thorpej bus_space_tag_t iot, memt;
129 1.18 cgd pci_chipset_tag_t pc;
130 1.51.2.3 nathanw int bus, device, function, nfunctions, ret;
131 1.51 mrg #ifdef __PCI_BUS_DEVORDER
132 1.51 mrg char devs[32];
133 1.51 mrg int i;
134 1.51 mrg #endif
135 1.51 mrg #ifdef __PCI_DEV_FUNCORDER
136 1.51 mrg char funcs[8];
137 1.51 mrg int j;
138 1.51.2.4 nathanw #else
139 1.51.2.4 nathanw const struct pci_quirkdata *qd;
140 1.51 mrg #endif
141 1.31 thorpej
142 1.34 drochner iot = sc->sc_iot;
143 1.34 drochner memt = sc->sc_memt;
144 1.34 drochner pc = sc->sc_pc;
145 1.34 drochner bus = sc->sc_bus;
146 1.51 mrg #ifdef __PCI_BUS_DEVORDER
147 1.51 mrg pci_bus_devorder(sc->sc_pc, sc->sc_bus, devs);
148 1.51 mrg for (i = 0; (device = devs[i]) < 32 && device >= 0; i++)
149 1.51 mrg #else
150 1.51 mrg for (device = 0; device < sc->sc_maxndevs; device++)
151 1.51 mrg #endif
152 1.51 mrg {
153 1.10 cgd pcitag_t tag;
154 1.27 cgd pcireg_t id, class, intr, bhlcr, csr;
155 1.10 cgd struct pci_attach_args pa;
156 1.19 christos int pin;
157 1.10 cgd
158 1.51.2.4 nathanw #ifdef __PCI_DEV_FUNCORDER
159 1.51.2.4 nathanw pci_dev_funcorder(sc->sc_pc, sc->sc_bus, device, funcs);
160 1.51.2.4 nathanw nfunctions = 8;
161 1.51.2.4 nathanw #else
162 1.18 cgd tag = pci_make_tag(pc, bus, device, 0);
163 1.18 cgd id = pci_conf_read(pc, tag, PCI_ID_REG);
164 1.32 cgd
165 1.32 cgd /* Invalid vendor ID value? */
166 1.33 cgd if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
167 1.32 cgd continue;
168 1.32 cgd /* XXX Not invalid, but we've done this ~forever. */
169 1.32 cgd if (PCI_VENDOR(id) == 0)
170 1.10 cgd continue;
171 1.10 cgd
172 1.37 cgd qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
173 1.37 cgd
174 1.18 cgd bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
175 1.37 cgd if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
176 1.37 cgd (qd != NULL &&
177 1.37 cgd (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
178 1.37 cgd nfunctions = 8;
179 1.37 cgd else
180 1.37 cgd nfunctions = 1;
181 1.51.2.4 nathanw #endif /* __PCI_DEV_FUNCORDER */
182 1.10 cgd
183 1.51 mrg #ifdef __PCI_DEV_FUNCORDER
184 1.51 mrg for (j = 0; (function = funcs[j]) < nfunctions &&
185 1.51 mrg function >= 0; j++)
186 1.51 mrg #else
187 1.51 mrg for (function = 0; function < nfunctions; function++)
188 1.51 mrg #endif
189 1.51 mrg {
190 1.18 cgd tag = pci_make_tag(pc, bus, device, function);
191 1.18 cgd id = pci_conf_read(pc, tag, PCI_ID_REG);
192 1.27 cgd csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
193 1.18 cgd class = pci_conf_read(pc, tag, PCI_CLASS_REG);
194 1.18 cgd intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
195 1.51.2.1 nathanw bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
196 1.32 cgd
197 1.32 cgd /* Invalid vendor ID value? */
198 1.33 cgd if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
199 1.32 cgd continue;
200 1.32 cgd /* XXX Not invalid, but we've done this ~forever. */
201 1.32 cgd if (PCI_VENDOR(id) == 0)
202 1.32 cgd continue;
203 1.10 cgd
204 1.24 thorpej pa.pa_iot = iot;
205 1.24 thorpej pa.pa_memt = memt;
206 1.34 drochner pa.pa_dmat = sc->sc_dmat;
207 1.18 cgd pa.pa_pc = pc;
208 1.51.2.1 nathanw pa.pa_bus = bus;
209 1.10 cgd pa.pa_device = device;
210 1.10 cgd pa.pa_function = function;
211 1.10 cgd pa.pa_tag = tag;
212 1.10 cgd pa.pa_id = id;
213 1.10 cgd pa.pa_class = class;
214 1.10 cgd
215 1.44 thorpej /*
216 1.44 thorpej * Set up memory, I/O enable, and PCI command flags
217 1.44 thorpej * as appropriate.
218 1.44 thorpej */
219 1.44 thorpej pa.pa_flags = sc->sc_flags;
220 1.44 thorpej if ((csr & PCI_COMMAND_IO_ENABLE) == 0)
221 1.44 thorpej pa.pa_flags &= ~PCI_FLAGS_IO_ENABLED;
222 1.44 thorpej if ((csr & PCI_COMMAND_MEM_ENABLE) == 0)
223 1.44 thorpej pa.pa_flags &= ~PCI_FLAGS_MEM_ENABLED;
224 1.51.2.1 nathanw
225 1.51.2.1 nathanw /*
226 1.51.2.1 nathanw * If the cache line size is not configured, then
227 1.51.2.1 nathanw * clear the MRL/MRM/MWI command-ok flags.
228 1.51.2.1 nathanw */
229 1.51.2.1 nathanw if (PCI_CACHELINE(bhlcr) == 0)
230 1.51.2.1 nathanw pa.pa_flags &= ~(PCI_FLAGS_MRL_OKAY|
231 1.51.2.1 nathanw PCI_FLAGS_MRM_OKAY|PCI_FLAGS_MWI_OKAY);
232 1.27 cgd
233 1.18 cgd if (bus == 0) {
234 1.18 cgd pa.pa_intrswiz = 0;
235 1.18 cgd pa.pa_intrtag = tag;
236 1.18 cgd } else {
237 1.34 drochner pa.pa_intrswiz = sc->sc_intrswiz + device;
238 1.34 drochner pa.pa_intrtag = sc->sc_intrtag;
239 1.18 cgd }
240 1.18 cgd pin = PCI_INTERRUPT_PIN(intr);
241 1.18 cgd if (pin == PCI_INTERRUPT_PIN_NONE) {
242 1.18 cgd /* no interrupt */
243 1.18 cgd pa.pa_intrpin = 0;
244 1.18 cgd } else {
245 1.18 cgd /*
246 1.18 cgd * swizzle it based on the number of
247 1.18 cgd * busses we're behind and our device
248 1.18 cgd * number.
249 1.18 cgd */
250 1.18 cgd pa.pa_intrpin = /* XXX */
251 1.18 cgd ((pin + pa.pa_intrswiz - 1) % 4) + 1;
252 1.18 cgd }
253 1.18 cgd pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
254 1.18 cgd
255 1.51.2.3 nathanw if (match != NULL) {
256 1.51.2.3 nathanw ret = match(&pa);
257 1.51.2.3 nathanw if (ret != 0) {
258 1.51.2.3 nathanw if (pap != NULL)
259 1.51.2.3 nathanw *pap = pa;
260 1.51.2.3 nathanw return ret;
261 1.51.2.3 nathanw }
262 1.51.2.3 nathanw } else {
263 1.51.2.3 nathanw config_found_sm(self, &pa, pciprint,
264 1.51.2.3 nathanw pcisubmatch);
265 1.51.2.3 nathanw }
266 1.10 cgd }
267 1.10 cgd }
268 1.51.2.3 nathanw return 0;
269 1.10 cgd }
270 1.1 mycroft
271 1.34 drochner void
272 1.34 drochner pciattach(parent, self, aux)
273 1.34 drochner struct device *parent, *self;
274 1.34 drochner void *aux;
275 1.34 drochner {
276 1.34 drochner struct pcibus_attach_args *pba = aux;
277 1.34 drochner struct pci_softc *sc = (struct pci_softc *)self;
278 1.43 thorpej int io_enabled, mem_enabled, mrl_enabled, mrm_enabled, mwi_enabled;
279 1.43 thorpej const char *sep = "";
280 1.34 drochner
281 1.34 drochner pci_attach_hook(parent, self, pba);
282 1.34 drochner printf("\n");
283 1.34 drochner
284 1.34 drochner io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED);
285 1.34 drochner mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED);
286 1.43 thorpej mrl_enabled = (pba->pba_flags & PCI_FLAGS_MRL_OKAY);
287 1.43 thorpej mrm_enabled = (pba->pba_flags & PCI_FLAGS_MRM_OKAY);
288 1.43 thorpej mwi_enabled = (pba->pba_flags & PCI_FLAGS_MWI_OKAY);
289 1.34 drochner
290 1.34 drochner if (io_enabled == 0 && mem_enabled == 0) {
291 1.34 drochner printf("%s: no spaces enabled!\n", self->dv_xname);
292 1.34 drochner return;
293 1.34 drochner }
294 1.34 drochner
295 1.43 thorpej #define PRINT(s) do { printf("%s%s", sep, s); sep = ", "; } while (0)
296 1.43 thorpej
297 1.34 drochner printf("%s: ", self->dv_xname);
298 1.43 thorpej
299 1.34 drochner if (io_enabled)
300 1.43 thorpej PRINT("i/o space");
301 1.43 thorpej if (mem_enabled)
302 1.43 thorpej PRINT("memory space");
303 1.43 thorpej printf(" enabled");
304 1.43 thorpej
305 1.43 thorpej if (mrl_enabled || mrm_enabled || mwi_enabled) {
306 1.43 thorpej if (mrl_enabled)
307 1.43 thorpej PRINT("rd/line");
308 1.43 thorpej if (mrm_enabled)
309 1.43 thorpej PRINT("rd/mult");
310 1.43 thorpej if (mwi_enabled)
311 1.43 thorpej PRINT("wr/inv");
312 1.43 thorpej printf(" ok");
313 1.34 drochner }
314 1.43 thorpej
315 1.34 drochner printf("\n");
316 1.43 thorpej
317 1.43 thorpej #undef PRINT
318 1.34 drochner
319 1.34 drochner sc->sc_iot = pba->pba_iot;
320 1.34 drochner sc->sc_memt = pba->pba_memt;
321 1.34 drochner sc->sc_dmat = pba->pba_dmat;
322 1.34 drochner sc->sc_pc = pba->pba_pc;
323 1.34 drochner sc->sc_bus = pba->pba_bus;
324 1.34 drochner sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
325 1.34 drochner sc->sc_intrswiz = pba->pba_intrswiz;
326 1.34 drochner sc->sc_intrtag = pba->pba_intrtag;
327 1.34 drochner sc->sc_flags = pba->pba_flags;
328 1.51.2.3 nathanw pci_probe_bus(self, NULL, NULL);
329 1.34 drochner }
330 1.34 drochner
331 1.1 mycroft int
332 1.10 cgd pciprint(aux, pnp)
333 1.1 mycroft void *aux;
334 1.21 cgd const char *pnp;
335 1.1 mycroft {
336 1.46 augustss struct pci_attach_args *pa = aux;
337 1.10 cgd char devinfo[256];
338 1.37 cgd const struct pci_quirkdata *qd;
339 1.1 mycroft
340 1.10 cgd if (pnp) {
341 1.10 cgd pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
342 1.23 christos printf("%s at %s", devinfo, pnp);
343 1.10 cgd }
344 1.23 christos printf(" dev %d function %d", pa->pa_device, pa->pa_function);
345 1.45 cgd if (pci_config_dump) {
346 1.45 cgd printf(": ");
347 1.45 cgd pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
348 1.45 cgd if (!pnp)
349 1.45 cgd pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
350 1.45 cgd printf("%s at %s", devinfo, pnp ? pnp : "?");
351 1.45 cgd printf(" dev %d function %d (", pa->pa_device, pa->pa_function);
352 1.37 cgd #ifdef __i386__
353 1.45 cgd printf("tag %#lx, intrtag %#lx, intrswiz %#lx, intrpin %#lx",
354 1.45 cgd *(long *)&pa->pa_tag, *(long *)&pa->pa_intrtag,
355 1.45 cgd (long)pa->pa_intrswiz, (long)pa->pa_intrpin);
356 1.37 cgd #else
357 1.51.2.2 nathanw printf("intrswiz %#lx, intrpin %#lx",
358 1.51.2.2 nathanw (long)pa->pa_intrswiz, (long)pa->pa_intrpin);
359 1.36 cgd #endif
360 1.45 cgd printf(", i/o %s, mem %s,",
361 1.45 cgd pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "on" : "off",
362 1.45 cgd pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "on" : "off");
363 1.45 cgd qd = pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
364 1.45 cgd PCI_PRODUCT(pa->pa_id));
365 1.45 cgd if (qd == NULL) {
366 1.45 cgd printf(" no quirks");
367 1.45 cgd } else {
368 1.45 cgd bitmask_snprintf(qd->quirks,
369 1.45 cgd "\20\1multifn", devinfo, sizeof (devinfo));
370 1.45 cgd printf(" quirks %s", devinfo);
371 1.45 cgd }
372 1.45 cgd printf(")");
373 1.37 cgd }
374 1.6 mycroft return (UNCONF);
375 1.6 mycroft }
376 1.6 mycroft
377 1.6 mycroft int
378 1.26 cgd pcisubmatch(parent, cf, aux)
379 1.6 mycroft struct device *parent;
380 1.26 cgd struct cfdata *cf;
381 1.26 cgd void *aux;
382 1.6 mycroft {
383 1.6 mycroft struct pci_attach_args *pa = aux;
384 1.6 mycroft
385 1.14 cgd if (cf->pcicf_dev != PCI_UNK_DEV &&
386 1.14 cgd cf->pcicf_dev != pa->pa_device)
387 1.6 mycroft return 0;
388 1.14 cgd if (cf->pcicf_function != PCI_UNK_FUNCTION &&
389 1.14 cgd cf->pcicf_function != pa->pa_function)
390 1.6 mycroft return 0;
391 1.26 cgd return ((*cf->cf_attach->ca_match)(parent, cf, aux));
392 1.40 drochner }
393 1.40 drochner
394 1.40 drochner int
395 1.40 drochner pci_get_capability(pc, tag, capid, offset, value)
396 1.40 drochner pci_chipset_tag_t pc;
397 1.40 drochner pcitag_t tag;
398 1.40 drochner int capid;
399 1.40 drochner int *offset;
400 1.40 drochner pcireg_t *value;
401 1.40 drochner {
402 1.40 drochner pcireg_t reg;
403 1.40 drochner unsigned int ofs;
404 1.40 drochner
405 1.40 drochner reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
406 1.40 drochner if (!(reg & PCI_STATUS_CAPLIST_SUPPORT))
407 1.40 drochner return (0);
408 1.40 drochner
409 1.48 kleink /* Determine the Capability List Pointer register to start with. */
410 1.47 kleink reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
411 1.47 kleink switch (PCI_HDRTYPE_TYPE(reg)) {
412 1.47 kleink case 0: /* standard device header */
413 1.47 kleink ofs = PCI_CAPLISTPTR_REG;
414 1.47 kleink break;
415 1.47 kleink case 2: /* PCI-CardBus Bridge header */
416 1.47 kleink ofs = PCI_CARDBUS_CAPLISTPTR_REG;
417 1.47 kleink break;
418 1.47 kleink default:
419 1.47 kleink return (0);
420 1.47 kleink }
421 1.47 kleink
422 1.47 kleink ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs));
423 1.40 drochner while (ofs != 0) {
424 1.40 drochner #ifdef DIAGNOSTIC
425 1.40 drochner if ((ofs & 3) || (ofs < 0x40))
426 1.40 drochner panic("pci_get_capability");
427 1.40 drochner #endif
428 1.40 drochner reg = pci_conf_read(pc, tag, ofs);
429 1.40 drochner if (PCI_CAPLIST_CAP(reg) == capid) {
430 1.40 drochner if (offset)
431 1.40 drochner *offset = ofs;
432 1.40 drochner if (value)
433 1.40 drochner *value = reg;
434 1.40 drochner return (1);
435 1.40 drochner }
436 1.40 drochner ofs = PCI_CAPLIST_NEXT(reg);
437 1.40 drochner }
438 1.40 drochner
439 1.40 drochner return (0);
440 1.51.2.3 nathanw }
441 1.51.2.3 nathanw
442 1.51.2.3 nathanw int
443 1.51.2.3 nathanw pci_find_device(struct pci_attach_args *pa,
444 1.51.2.3 nathanw int (*match)(struct pci_attach_args *))
445 1.51.2.3 nathanw {
446 1.51.2.3 nathanw int i;
447 1.51.2.3 nathanw struct device *pcidev;
448 1.51.2.3 nathanw extern struct cfdriver pci_cd;
449 1.51.2.3 nathanw
450 1.51.2.3 nathanw for (i = 0; i < pci_cd.cd_ndevs; i++) {
451 1.51.2.3 nathanw pcidev = pci_cd.cd_devs[i];
452 1.51.2.3 nathanw if (pcidev != NULL && pci_probe_bus(pcidev, match, pa) != 0)
453 1.51.2.3 nathanw return 1;
454 1.51.2.3 nathanw }
455 1.51.2.3 nathanw return 0;
456 1.1 mycroft }
457