pci.c revision 1.63.2.2 1 1.63.2.2 gehenna /* $NetBSD: pci.c,v 1.63.2.2 2002/05/30 14:46:11 gehenna Exp $ */
2 1.63.2.2 gehenna
3 1.63.2.2 gehenna /*
4 1.63.2.2 gehenna * Copyright (c) 1995, 1996, 1997, 1998
5 1.63.2.2 gehenna * Christopher G. Demetriou. All rights reserved.
6 1.63.2.2 gehenna * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 1.63.2.2 gehenna *
8 1.63.2.2 gehenna * Redistribution and use in source and binary forms, with or without
9 1.63.2.2 gehenna * modification, are permitted provided that the following conditions
10 1.63.2.2 gehenna * are met:
11 1.63.2.2 gehenna * 1. Redistributions of source code must retain the above copyright
12 1.63.2.2 gehenna * notice, this list of conditions and the following disclaimer.
13 1.63.2.2 gehenna * 2. Redistributions in binary form must reproduce the above copyright
14 1.63.2.2 gehenna * notice, this list of conditions and the following disclaimer in the
15 1.63.2.2 gehenna * documentation and/or other materials provided with the distribution.
16 1.63.2.2 gehenna * 3. All advertising materials mentioning features or use of this software
17 1.63.2.2 gehenna * must display the following acknowledgement:
18 1.63.2.2 gehenna * This product includes software developed by Charles M. Hannum.
19 1.63.2.2 gehenna * 4. The name of the author may not be used to endorse or promote products
20 1.63.2.2 gehenna * derived from this software without specific prior written permission.
21 1.63.2.2 gehenna *
22 1.63.2.2 gehenna * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.63.2.2 gehenna * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.63.2.2 gehenna * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.63.2.2 gehenna * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.63.2.2 gehenna * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.63.2.2 gehenna * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.63.2.2 gehenna * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.63.2.2 gehenna * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.63.2.2 gehenna * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.63.2.2 gehenna * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.63.2.2 gehenna */
33 1.63.2.2 gehenna
34 1.63.2.2 gehenna /*
35 1.63.2.2 gehenna * PCI bus autoconfiguration.
36 1.63.2.2 gehenna */
37 1.63.2.2 gehenna
38 1.63.2.2 gehenna #include <sys/cdefs.h>
39 1.63.2.2 gehenna __KERNEL_RCSID(0, "$NetBSD: pci.c,v 1.63.2.2 2002/05/30 14:46:11 gehenna Exp $");
40 1.63.2.2 gehenna
41 1.63.2.2 gehenna #include "opt_pci.h"
42 1.63.2.2 gehenna
43 1.63.2.2 gehenna #include <sys/param.h>
44 1.63.2.2 gehenna #include <sys/systm.h>
45 1.63.2.2 gehenna #include <sys/device.h>
46 1.63.2.2 gehenna
47 1.63.2.2 gehenna #include <dev/pci/pcireg.h>
48 1.63.2.2 gehenna #include <dev/pci/pcivar.h>
49 1.63.2.2 gehenna #include <dev/pci/pcidevs.h>
50 1.63.2.2 gehenna
51 1.63.2.2 gehenna #ifdef PCI_CONFIG_DUMP
52 1.63.2.2 gehenna int pci_config_dump = 1;
53 1.63.2.2 gehenna #else
54 1.63.2.2 gehenna int pci_config_dump = 0;
55 1.63.2.2 gehenna #endif
56 1.63.2.2 gehenna
57 1.63.2.2 gehenna int pcimatch __P((struct device *, struct cfdata *, void *));
58 1.63.2.2 gehenna void pciattach __P((struct device *, struct device *, void *));
59 1.63.2.2 gehenna
60 1.63.2.2 gehenna struct cfattach pci_ca = {
61 1.63.2.2 gehenna sizeof(struct pci_softc), pcimatch, pciattach
62 1.63.2.2 gehenna };
63 1.63.2.2 gehenna
64 1.63.2.2 gehenna int pciprint __P((void *, const char *));
65 1.63.2.2 gehenna int pcisubmatch __P((struct device *, struct cfdata *, void *));
66 1.63.2.2 gehenna
67 1.63.2.2 gehenna /*
68 1.63.2.2 gehenna * Important note about PCI-ISA bridges:
69 1.63.2.2 gehenna *
70 1.63.2.2 gehenna * Callbacks are used to configure these devices so that ISA/EISA bridges
71 1.63.2.2 gehenna * can attach their child busses after PCI configuration is done.
72 1.63.2.2 gehenna *
73 1.63.2.2 gehenna * This works because:
74 1.63.2.2 gehenna * (1) there can be at most one ISA/EISA bridge per PCI bus, and
75 1.63.2.2 gehenna * (2) any ISA/EISA bridges must be attached to primary PCI
76 1.63.2.2 gehenna * busses (i.e. bus zero).
77 1.63.2.2 gehenna *
78 1.63.2.2 gehenna * That boils down to: there can only be one of these outstanding
79 1.63.2.2 gehenna * at a time, it is cleared when configuring PCI bus 0 before any
80 1.63.2.2 gehenna * subdevices have been found, and it is run after all subdevices
81 1.63.2.2 gehenna * of PCI bus 0 have been found.
82 1.63.2.2 gehenna *
83 1.63.2.2 gehenna * This is needed because there are some (legacy) PCI devices which
84 1.63.2.2 gehenna * can show up as ISA/EISA devices as well (the prime example of which
85 1.63.2.2 gehenna * are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge,
86 1.63.2.2 gehenna * and the bridge is seen before the video board is, the board can show
87 1.63.2.2 gehenna * up as an ISA device, and that can (bogusly) complicate the PCI device's
88 1.63.2.2 gehenna * attach code, or make the PCI device not be properly attached at all.
89 1.63.2.2 gehenna *
90 1.63.2.2 gehenna * We use the generic config_defer() facility to achieve this.
91 1.63.2.2 gehenna */
92 1.63.2.2 gehenna
93 1.63.2.2 gehenna int
94 1.63.2.2 gehenna pcimatch(parent, cf, aux)
95 1.63.2.2 gehenna struct device *parent;
96 1.63.2.2 gehenna struct cfdata *cf;
97 1.63.2.2 gehenna void *aux;
98 1.63.2.2 gehenna {
99 1.63.2.2 gehenna struct pcibus_attach_args *pba = aux;
100 1.63.2.2 gehenna
101 1.63.2.2 gehenna if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
102 1.63.2.2 gehenna return (0);
103 1.63.2.2 gehenna
104 1.63.2.2 gehenna /* Check the locators */
105 1.63.2.2 gehenna if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
106 1.63.2.2 gehenna cf->pcibuscf_bus != pba->pba_bus)
107 1.63.2.2 gehenna return (0);
108 1.63.2.2 gehenna
109 1.63.2.2 gehenna /* sanity */
110 1.63.2.2 gehenna if (pba->pba_bus < 0 || pba->pba_bus > 255)
111 1.63.2.2 gehenna return (0);
112 1.63.2.2 gehenna
113 1.63.2.2 gehenna /*
114 1.63.2.2 gehenna * XXX check other (hardware?) indicators
115 1.63.2.2 gehenna */
116 1.63.2.2 gehenna
117 1.63.2.2 gehenna return (1);
118 1.63.2.2 gehenna }
119 1.63.2.2 gehenna
120 1.63.2.2 gehenna void
121 1.63.2.2 gehenna pciattach(parent, self, aux)
122 1.63.2.2 gehenna struct device *parent, *self;
123 1.63.2.2 gehenna void *aux;
124 1.63.2.2 gehenna {
125 1.63.2.2 gehenna struct pcibus_attach_args *pba = aux;
126 1.63.2.2 gehenna struct pci_softc *sc = (struct pci_softc *)self;
127 1.63.2.2 gehenna int io_enabled, mem_enabled, mrl_enabled, mrm_enabled, mwi_enabled;
128 1.63.2.2 gehenna const char *sep = "";
129 1.63.2.2 gehenna
130 1.63.2.2 gehenna pci_attach_hook(parent, self, pba);
131 1.63.2.2 gehenna printf("\n");
132 1.63.2.2 gehenna
133 1.63.2.2 gehenna io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED);
134 1.63.2.2 gehenna mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED);
135 1.63.2.2 gehenna mrl_enabled = (pba->pba_flags & PCI_FLAGS_MRL_OKAY);
136 1.63.2.2 gehenna mrm_enabled = (pba->pba_flags & PCI_FLAGS_MRM_OKAY);
137 1.63.2.2 gehenna mwi_enabled = (pba->pba_flags & PCI_FLAGS_MWI_OKAY);
138 1.63.2.2 gehenna
139 1.63.2.2 gehenna if (io_enabled == 0 && mem_enabled == 0) {
140 1.63.2.2 gehenna printf("%s: no spaces enabled!\n", self->dv_xname);
141 1.63.2.2 gehenna return;
142 1.63.2.2 gehenna }
143 1.63.2.2 gehenna
144 1.63.2.2 gehenna #define PRINT(s) do { printf("%s%s", sep, s); sep = ", "; } while (0)
145 1.63.2.2 gehenna
146 1.63.2.2 gehenna printf("%s: ", self->dv_xname);
147 1.63.2.2 gehenna
148 1.63.2.2 gehenna if (io_enabled)
149 1.63.2.2 gehenna PRINT("i/o space");
150 1.63.2.2 gehenna if (mem_enabled)
151 1.63.2.2 gehenna PRINT("memory space");
152 1.63.2.2 gehenna printf(" enabled");
153 1.63.2.2 gehenna
154 1.63.2.2 gehenna if (mrl_enabled || mrm_enabled || mwi_enabled) {
155 1.63.2.2 gehenna if (mrl_enabled)
156 1.63.2.2 gehenna PRINT("rd/line");
157 1.63.2.2 gehenna if (mrm_enabled)
158 1.63.2.2 gehenna PRINT("rd/mult");
159 1.63.2.2 gehenna if (mwi_enabled)
160 1.63.2.2 gehenna PRINT("wr/inv");
161 1.63.2.2 gehenna printf(" ok");
162 1.63.2.2 gehenna }
163 1.63.2.2 gehenna
164 1.63.2.2 gehenna printf("\n");
165 1.63.2.2 gehenna
166 1.63.2.2 gehenna #undef PRINT
167 1.63.2.2 gehenna
168 1.63.2.2 gehenna sc->sc_iot = pba->pba_iot;
169 1.63.2.2 gehenna sc->sc_memt = pba->pba_memt;
170 1.63.2.2 gehenna sc->sc_dmat = pba->pba_dmat;
171 1.63.2.2 gehenna sc->sc_pc = pba->pba_pc;
172 1.63.2.2 gehenna sc->sc_bus = pba->pba_bus;
173 1.63.2.2 gehenna sc->sc_bridgetag = pba->pba_bridgetag;
174 1.63.2.2 gehenna sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
175 1.63.2.2 gehenna sc->sc_intrswiz = pba->pba_intrswiz;
176 1.63.2.2 gehenna sc->sc_intrtag = pba->pba_intrtag;
177 1.63.2.2 gehenna sc->sc_flags = pba->pba_flags;
178 1.63.2.2 gehenna pci_enumerate_bus(sc, NULL, NULL);
179 1.63.2.2 gehenna }
180 1.63.2.2 gehenna
181 1.63.2.2 gehenna int
182 1.63.2.2 gehenna pciprint(aux, pnp)
183 1.63.2.2 gehenna void *aux;
184 1.63.2.2 gehenna const char *pnp;
185 1.63.2.2 gehenna {
186 1.63.2.2 gehenna struct pci_attach_args *pa = aux;
187 1.63.2.2 gehenna char devinfo[256];
188 1.63.2.2 gehenna const struct pci_quirkdata *qd;
189 1.63.2.2 gehenna
190 1.63.2.2 gehenna if (pnp) {
191 1.63.2.2 gehenna pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
192 1.63.2.2 gehenna printf("%s at %s", devinfo, pnp);
193 1.63.2.2 gehenna }
194 1.63.2.2 gehenna printf(" dev %d function %d", pa->pa_device, pa->pa_function);
195 1.63.2.2 gehenna if (pci_config_dump) {
196 1.63.2.2 gehenna printf(": ");
197 1.63.2.2 gehenna pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
198 1.63.2.2 gehenna if (!pnp)
199 1.63.2.2 gehenna pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
200 1.63.2.2 gehenna printf("%s at %s", devinfo, pnp ? pnp : "?");
201 1.63.2.2 gehenna printf(" dev %d function %d (", pa->pa_device, pa->pa_function);
202 1.63.2.2 gehenna #ifdef __i386__
203 1.63.2.2 gehenna printf("tag %#lx, intrtag %#lx, intrswiz %#lx, intrpin %#lx",
204 1.63.2.2 gehenna *(long *)&pa->pa_tag, *(long *)&pa->pa_intrtag,
205 1.63.2.2 gehenna (long)pa->pa_intrswiz, (long)pa->pa_intrpin);
206 1.63.2.2 gehenna #else
207 1.63.2.2 gehenna printf("intrswiz %#lx, intrpin %#lx",
208 1.63.2.2 gehenna (long)pa->pa_intrswiz, (long)pa->pa_intrpin);
209 1.63.2.2 gehenna #endif
210 1.63.2.2 gehenna printf(", i/o %s, mem %s,",
211 1.63.2.2 gehenna pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "on" : "off",
212 1.63.2.2 gehenna pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "on" : "off");
213 1.63.2.2 gehenna qd = pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
214 1.63.2.2 gehenna PCI_PRODUCT(pa->pa_id));
215 1.63.2.2 gehenna if (qd == NULL) {
216 1.63.2.2 gehenna printf(" no quirks");
217 1.63.2.2 gehenna } else {
218 1.63.2.2 gehenna bitmask_snprintf(qd->quirks,
219 1.63.2.2 gehenna "\20\1multifn", devinfo, sizeof (devinfo));
220 1.63.2.2 gehenna printf(" quirks %s", devinfo);
221 1.63.2.2 gehenna }
222 1.63.2.2 gehenna printf(")");
223 1.63.2.2 gehenna }
224 1.63.2.2 gehenna return (UNCONF);
225 1.63.2.2 gehenna }
226 1.63.2.2 gehenna
227 1.63.2.2 gehenna int
228 1.63.2.2 gehenna pcisubmatch(parent, cf, aux)
229 1.63.2.2 gehenna struct device *parent;
230 1.63.2.2 gehenna struct cfdata *cf;
231 1.63.2.2 gehenna void *aux;
232 1.63.2.2 gehenna {
233 1.63.2.2 gehenna struct pci_attach_args *pa = aux;
234 1.63.2.2 gehenna
235 1.63.2.2 gehenna if (cf->pcicf_dev != PCI_UNK_DEV &&
236 1.63.2.2 gehenna cf->pcicf_dev != pa->pa_device)
237 1.63.2.2 gehenna return (0);
238 1.63.2.2 gehenna if (cf->pcicf_function != PCI_UNK_FUNCTION &&
239 1.63.2.2 gehenna cf->pcicf_function != pa->pa_function)
240 1.63.2.2 gehenna return (0);
241 1.63.2.2 gehenna return ((*cf->cf_attach->ca_match)(parent, cf, aux));
242 1.63.2.2 gehenna }
243 1.63.2.2 gehenna
244 1.63.2.2 gehenna int
245 1.63.2.2 gehenna pci_probe_device(struct pci_softc *sc, pcitag_t tag,
246 1.63.2.2 gehenna int (*match)(struct pci_attach_args *), struct pci_attach_args *pap)
247 1.63.2.2 gehenna {
248 1.63.2.2 gehenna pci_chipset_tag_t pc = sc->sc_pc;
249 1.63.2.2 gehenna struct pci_attach_args pa;
250 1.63.2.2 gehenna pcireg_t id, csr, class, intr, bhlcr;
251 1.63.2.2 gehenna int ret, pin, bus, device, function;
252 1.63.2.2 gehenna
253 1.63.2.2 gehenna pci_decompose_tag(pc, tag, &bus, &device, &function);
254 1.63.2.2 gehenna
255 1.63.2.2 gehenna id = pci_conf_read(pc, tag, PCI_ID_REG);
256 1.63.2.2 gehenna csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
257 1.63.2.2 gehenna class = pci_conf_read(pc, tag, PCI_CLASS_REG);
258 1.63.2.2 gehenna intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
259 1.63.2.2 gehenna bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
260 1.63.2.2 gehenna
261 1.63.2.2 gehenna /* Invalid vendor ID value? */
262 1.63.2.2 gehenna if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
263 1.63.2.2 gehenna return (NULL);
264 1.63.2.2 gehenna /* XXX Not invalid, but we've done this ~forever. */
265 1.63.2.2 gehenna if (PCI_VENDOR(id) == 0)
266 1.63.2.2 gehenna return (NULL);
267 1.63.2.2 gehenna
268 1.63.2.2 gehenna pa.pa_iot = sc->sc_iot;
269 1.63.2.2 gehenna pa.pa_memt = sc->sc_memt;
270 1.63.2.2 gehenna pa.pa_dmat = sc->sc_dmat;
271 1.63.2.2 gehenna pa.pa_pc = pc;
272 1.63.2.2 gehenna pa.pa_bus = bus;
273 1.63.2.2 gehenna pa.pa_device = device;
274 1.63.2.2 gehenna pa.pa_function = function;
275 1.63.2.2 gehenna pa.pa_tag = tag;
276 1.63.2.2 gehenna pa.pa_id = id;
277 1.63.2.2 gehenna pa.pa_class = class;
278 1.63.2.2 gehenna
279 1.63.2.2 gehenna /*
280 1.63.2.2 gehenna * Set up memory, I/O enable, and PCI command flags
281 1.63.2.2 gehenna * as appropriate.
282 1.63.2.2 gehenna */
283 1.63.2.2 gehenna pa.pa_flags = sc->sc_flags;
284 1.63.2.2 gehenna if ((csr & PCI_COMMAND_IO_ENABLE) == 0)
285 1.63.2.2 gehenna pa.pa_flags &= ~PCI_FLAGS_IO_ENABLED;
286 1.63.2.2 gehenna if ((csr & PCI_COMMAND_MEM_ENABLE) == 0)
287 1.63.2.2 gehenna pa.pa_flags &= ~PCI_FLAGS_MEM_ENABLED;
288 1.63.2.2 gehenna
289 1.63.2.2 gehenna /*
290 1.63.2.2 gehenna * If the cache line size is not configured, then
291 1.63.2.2 gehenna * clear the MRL/MRM/MWI command-ok flags.
292 1.63.2.2 gehenna */
293 1.63.2.2 gehenna if (PCI_CACHELINE(bhlcr) == 0)
294 1.63.2.2 gehenna pa.pa_flags &= ~(PCI_FLAGS_MRL_OKAY|
295 1.63.2.2 gehenna PCI_FLAGS_MRM_OKAY|PCI_FLAGS_MWI_OKAY);
296 1.63.2.2 gehenna
297 1.63.2.2 gehenna if (sc->sc_bridgetag == NULL) {
298 1.63.2.2 gehenna pa.pa_intrswiz = 0;
299 1.63.2.2 gehenna pa.pa_intrtag = tag;
300 1.63.2.2 gehenna } else {
301 1.63.2.2 gehenna pa.pa_intrswiz = sc->sc_intrswiz + device;
302 1.63.2.2 gehenna pa.pa_intrtag = sc->sc_intrtag;
303 1.63.2.2 gehenna }
304 1.63.2.2 gehenna pin = PCI_INTERRUPT_PIN(intr);
305 1.63.2.2 gehenna pa.pa_rawintrpin = pin;
306 1.63.2.2 gehenna if (pin == PCI_INTERRUPT_PIN_NONE) {
307 1.63.2.2 gehenna /* no interrupt */
308 1.63.2.2 gehenna pa.pa_intrpin = 0;
309 1.63.2.2 gehenna } else {
310 1.63.2.2 gehenna /*
311 1.63.2.2 gehenna * swizzle it based on the number of busses we're
312 1.63.2.2 gehenna * behind and our device number.
313 1.63.2.2 gehenna */
314 1.63.2.2 gehenna pa.pa_intrpin = /* XXX */
315 1.63.2.2 gehenna ((pin + pa.pa_intrswiz - 1) % 4) + 1;
316 1.63.2.2 gehenna }
317 1.63.2.2 gehenna pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
318 1.63.2.2 gehenna
319 1.63.2.2 gehenna if (match != NULL) {
320 1.63.2.2 gehenna ret = (*match)(&pa);
321 1.63.2.2 gehenna if (ret != 0 && pap != NULL)
322 1.63.2.2 gehenna *pap = pa;
323 1.63.2.2 gehenna } else {
324 1.63.2.2 gehenna ret = config_found_sm(&sc->sc_dev, &pa, pciprint,
325 1.63.2.2 gehenna pcisubmatch) != NULL;
326 1.63.2.2 gehenna }
327 1.63.2.2 gehenna
328 1.63.2.2 gehenna return (ret);
329 1.63.2.2 gehenna }
330 1.63.2.2 gehenna
331 1.63.2.2 gehenna int
332 1.63.2.2 gehenna pci_get_capability(pc, tag, capid, offset, value)
333 1.63.2.2 gehenna pci_chipset_tag_t pc;
334 1.63.2.2 gehenna pcitag_t tag;
335 1.63.2.2 gehenna int capid;
336 1.63.2.2 gehenna int *offset;
337 1.63.2.2 gehenna pcireg_t *value;
338 1.63.2.2 gehenna {
339 1.63.2.2 gehenna pcireg_t reg;
340 1.63.2.2 gehenna unsigned int ofs;
341 1.63.2.2 gehenna
342 1.63.2.2 gehenna reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
343 1.63.2.2 gehenna if (!(reg & PCI_STATUS_CAPLIST_SUPPORT))
344 1.63.2.2 gehenna return (0);
345 1.63.2.2 gehenna
346 1.63.2.2 gehenna /* Determine the Capability List Pointer register to start with. */
347 1.63.2.2 gehenna reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
348 1.63.2.2 gehenna switch (PCI_HDRTYPE_TYPE(reg)) {
349 1.63.2.2 gehenna case 0: /* standard device header */
350 1.63.2.2 gehenna ofs = PCI_CAPLISTPTR_REG;
351 1.63.2.2 gehenna break;
352 1.63.2.2 gehenna case 2: /* PCI-CardBus Bridge header */
353 1.63.2.2 gehenna ofs = PCI_CARDBUS_CAPLISTPTR_REG;
354 1.63.2.2 gehenna break;
355 1.63.2.2 gehenna default:
356 1.63.2.2 gehenna return (0);
357 1.63.2.2 gehenna }
358 1.63.2.2 gehenna
359 1.63.2.2 gehenna ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs));
360 1.63.2.2 gehenna while (ofs != 0) {
361 1.63.2.2 gehenna #ifdef DIAGNOSTIC
362 1.63.2.2 gehenna if ((ofs & 3) || (ofs < 0x40))
363 1.63.2.2 gehenna panic("pci_get_capability");
364 1.63.2.2 gehenna #endif
365 1.63.2.2 gehenna reg = pci_conf_read(pc, tag, ofs);
366 1.63.2.2 gehenna if (PCI_CAPLIST_CAP(reg) == capid) {
367 1.63.2.2 gehenna if (offset)
368 1.63.2.2 gehenna *offset = ofs;
369 1.63.2.2 gehenna if (value)
370 1.63.2.2 gehenna *value = reg;
371 1.63.2.2 gehenna return (1);
372 1.63.2.2 gehenna }
373 1.63.2.2 gehenna ofs = PCI_CAPLIST_NEXT(reg);
374 1.63.2.2 gehenna }
375 1.63.2.2 gehenna
376 1.63.2.2 gehenna return (0);
377 1.63.2.2 gehenna }
378 1.63.2.2 gehenna
379 1.63.2.2 gehenna int
380 1.63.2.2 gehenna pci_find_device(struct pci_attach_args *pa,
381 1.63.2.2 gehenna int (*match)(struct pci_attach_args *))
382 1.63.2.2 gehenna {
383 1.63.2.2 gehenna extern struct cfdriver pci_cd;
384 1.63.2.2 gehenna struct device *pcidev;
385 1.63.2.2 gehenna int i;
386 1.63.2.2 gehenna
387 1.63.2.2 gehenna for (i = 0; i < pci_cd.cd_ndevs; i++) {
388 1.63.2.2 gehenna pcidev = pci_cd.cd_devs[i];
389 1.63.2.2 gehenna if (pcidev != NULL &&
390 1.63.2.2 gehenna pci_enumerate_bus((struct pci_softc *) pcidev,
391 1.63.2.2 gehenna match, pa) != 0)
392 1.63.2.2 gehenna return (1);
393 1.63.2.2 gehenna }
394 1.63.2.2 gehenna return (0);
395 1.63.2.2 gehenna }
396 1.63.2.2 gehenna
397 1.63.2.2 gehenna /*
398 1.63.2.2 gehenna * Generic PCI bus enumeration routine. Used unless machine-dependent
399 1.63.2.2 gehenna * code needs to provide something else.
400 1.63.2.2 gehenna */
401 1.63.2.2 gehenna int
402 1.63.2.2 gehenna pci_enumerate_bus_generic(struct pci_softc *sc,
403 1.63.2.2 gehenna int (*match)(struct pci_attach_args *), struct pci_attach_args *pap)
404 1.63.2.2 gehenna {
405 1.63.2.2 gehenna pci_chipset_tag_t pc = sc->sc_pc;
406 1.63.2.2 gehenna int device, function, nfunctions, ret;
407 1.63.2.2 gehenna const struct pci_quirkdata *qd;
408 1.63.2.2 gehenna pcireg_t id, bhlcr;
409 1.63.2.2 gehenna pcitag_t tag;
410 1.63.2.2 gehenna #ifdef __PCI_BUS_DEVORDER
411 1.63.2.2 gehenna char devs[32];
412 1.63.2.2 gehenna int i;
413 1.63.2.2 gehenna #endif
414 1.63.2.2 gehenna
415 1.63.2.2 gehenna #ifdef __PCI_BUS_DEVORDER
416 1.63.2.2 gehenna pci_bus_devorder(sc->sc_pc, sc->sc_bus, devs);
417 1.63.2.2 gehenna for (i = 0; (device = devs[i]) < 32 && device >= 0; i++)
418 1.63.2.2 gehenna #else
419 1.63.2.2 gehenna for (device = 0; device < sc->sc_maxndevs; device++)
420 1.63.2.2 gehenna #endif
421 1.63.2.2 gehenna {
422 1.63.2.2 gehenna tag = pci_make_tag(pc, sc->sc_bus, device, 0);
423 1.63.2.2 gehenna id = pci_conf_read(pc, tag, PCI_ID_REG);
424 1.63.2.2 gehenna
425 1.63.2.2 gehenna /* Invalid vendor ID value? */
426 1.63.2.2 gehenna if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
427 1.63.2.2 gehenna continue;
428 1.63.2.2 gehenna /* XXX Not invalid, but we've done this ~forever. */
429 1.63.2.2 gehenna if (PCI_VENDOR(id) == 0)
430 1.63.2.2 gehenna continue;
431 1.63.2.2 gehenna
432 1.63.2.2 gehenna qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
433 1.63.2.2 gehenna
434 1.63.2.2 gehenna bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
435 1.63.2.2 gehenna if (PCI_HDRTYPE_MULTIFN(bhlcr) ||
436 1.63.2.2 gehenna (qd != NULL &&
437 1.63.2.2 gehenna (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
438 1.63.2.2 gehenna nfunctions = 8;
439 1.63.2.2 gehenna else
440 1.63.2.2 gehenna nfunctions = 1;
441 1.63.2.2 gehenna
442 1.63.2.2 gehenna for (function = 0; function < nfunctions; function++) {
443 1.63.2.2 gehenna tag = pci_make_tag(pc, sc->sc_bus, device, function);
444 1.63.2.2 gehenna ret = pci_probe_device(sc, tag, match, pap);
445 1.63.2.2 gehenna if (match != NULL && ret != 0)
446 1.63.2.2 gehenna return (ret);
447 1.63.2.2 gehenna }
448 1.63.2.2 gehenna }
449 1.63.2.2 gehenna return (0);
450 1.63.2.2 gehenna }
451