pci.c revision 1.32
1 /* $NetBSD: pci.c,v 1.32 1998/03/20 19:56:19 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996, 1997 5 * Christopher G. Demetriou. All rights reserved. 6 * Copyright (c) 1994 Charles Hannum. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Charles Hannum. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * PCI bus autoconfiguration. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 45 #ifdef __BROKEN_INDIRECT_CONFIG 46 int pcimatch __P((struct device *, void *, void *)); 47 #else 48 int pcimatch __P((struct device *, struct cfdata *, void *)); 49 #endif 50 void pciattach __P((struct device *, struct device *, void *)); 51 52 struct cfattach pci_ca = { 53 sizeof(struct device), pcimatch, pciattach 54 }; 55 56 int pciprint __P((void *, const char *)); 57 #ifdef __BROKEN_INDIRECT_CONFIG 58 int pcisubmatch __P((struct device *, void *, void *)); 59 #else 60 int pcisubmatch __P((struct device *, struct cfdata *, void *)); 61 #endif 62 63 /* 64 * Callback so that ISA/EISA bridges can attach their child busses 65 * after PCI configuration is done. 66 * 67 * This works because: 68 * (1) there can be at most one ISA/EISA bridge per PCI bus, and 69 * (2) any ISA/EISA bridges must be attached to primary PCI 70 * busses (i.e. bus zero). 71 * 72 * That boils down to: there can only be one of these outstanding 73 * at a time, it is cleared when configuring PCI bus 0 before any 74 * subdevices have been found, and it is run after all subdevices 75 * of PCI bus 0 have been found. 76 * 77 * This is needed because there are some (legacy) PCI devices which 78 * can show up as ISA/EISA devices as well (the prime example of which 79 * are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge, 80 * and the bridge is seen before the video board is, the board can show 81 * up as an ISA device, and that can (bogusly) complicate the PCI device's 82 * attach code, or make the PCI device not be properly attached at all. 83 */ 84 static void (*pci_isa_bridge_callback) __P((void *)); 85 static void *pci_isa_bridge_callback_arg; 86 87 int 88 #ifdef __BROKEN_INDIRECT_CONFIG 89 pcimatch(parent, match, aux) 90 #else 91 pcimatch(parent, cf, aux) 92 #endif 93 struct device *parent; 94 #ifdef __BROKEN_INDIRECT_CONFIG 95 void *match; 96 #else 97 struct cfdata *cf; 98 #endif 99 void *aux; 100 { 101 #ifdef __BROKEN_INDIRECT_CONFIG 102 struct cfdata *cf = match; 103 #endif 104 struct pcibus_attach_args *pba = aux; 105 106 if (strcmp(pba->pba_busname, cf->cf_driver->cd_name)) 107 return (0); 108 109 /* Check the locators */ 110 if (cf->pcibuscf_bus != PCIBUS_UNK_BUS && 111 cf->pcibuscf_bus != pba->pba_bus) 112 return (0); 113 114 /* sanity */ 115 if (pba->pba_bus < 0 || pba->pba_bus > 255) 116 return (0); 117 118 /* 119 * XXX check other (hardware?) indicators 120 */ 121 122 return 1; 123 } 124 125 void 126 pciattach(parent, self, aux) 127 struct device *parent, *self; 128 void *aux; 129 { 130 struct pcibus_attach_args *pba = aux; 131 bus_space_tag_t iot, memt; 132 pci_chipset_tag_t pc; 133 int bus, device, maxndevs, function, nfunctions; 134 int io_enabled, mem_enabled; 135 136 pci_attach_hook(parent, self, pba); 137 printf("\n"); 138 139 io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED); 140 mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED); 141 142 if (io_enabled == 0 && mem_enabled == 0) { 143 printf("%s: no spaces enabled!\n", self->dv_xname); 144 return; 145 } 146 147 printf("%s: ", self->dv_xname); 148 if (io_enabled) 149 printf("i/o enabled"); 150 if (mem_enabled) { 151 if (io_enabled) 152 printf(", "); 153 printf("memory enabled"); 154 } 155 printf("\n"); 156 157 iot = pba->pba_iot; 158 memt = pba->pba_memt; 159 pc = pba->pba_pc; 160 bus = pba->pba_bus; 161 maxndevs = pci_bus_maxdevs(pc, bus); 162 163 if (bus == 0) 164 pci_isa_bridge_callback = NULL; 165 166 for (device = 0; device < maxndevs; device++) { 167 pcitag_t tag; 168 pcireg_t id, class, intr, bhlcr, csr; 169 struct pci_attach_args pa; 170 int pin; 171 172 tag = pci_make_tag(pc, bus, device, 0); 173 id = pci_conf_read(pc, tag, PCI_ID_REG); 174 175 /* Invalid vendor ID value? */ 176 if (PCI_VENDOR(id) == 0xffff) 177 continue; 178 /* XXX Not invalid, but we've done this ~forever. */ 179 if (PCI_VENDOR(id) == 0) 180 continue; 181 182 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 183 nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1; 184 185 for (function = 0; function < nfunctions; function++) { 186 tag = pci_make_tag(pc, bus, device, function); 187 id = pci_conf_read(pc, tag, PCI_ID_REG); 188 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 189 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 190 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 191 192 /* Invalid vendor ID value? */ 193 if (PCI_VENDOR(id) == 0xffff) 194 continue; 195 /* XXX Not invalid, but we've done this ~forever. */ 196 if (PCI_VENDOR(id) == 0) 197 continue; 198 199 pa.pa_iot = iot; 200 pa.pa_memt = memt; 201 pa.pa_dmat = pba->pba_dmat; 202 pa.pa_pc = pc; 203 pa.pa_device = device; 204 pa.pa_function = function; 205 pa.pa_tag = tag; 206 pa.pa_id = id; 207 pa.pa_class = class; 208 209 /* set up memory and I/O enable flags as appropriate */ 210 pa.pa_flags = 0; 211 if ((pba->pba_flags & PCI_FLAGS_IO_ENABLED) && 212 (csr & PCI_COMMAND_IO_ENABLE)) 213 pa.pa_flags |= PCI_FLAGS_IO_ENABLED; 214 if ((pba->pba_flags & PCI_FLAGS_MEM_ENABLED) && 215 (csr & PCI_COMMAND_MEM_ENABLE)) 216 pa.pa_flags |= PCI_FLAGS_MEM_ENABLED; 217 218 if (bus == 0) { 219 pa.pa_intrswiz = 0; 220 pa.pa_intrtag = tag; 221 } else { 222 pa.pa_intrswiz = pba->pba_intrswiz + device; 223 pa.pa_intrtag = pba->pba_intrtag; 224 } 225 pin = PCI_INTERRUPT_PIN(intr); 226 if (pin == PCI_INTERRUPT_PIN_NONE) { 227 /* no interrupt */ 228 pa.pa_intrpin = 0; 229 } else { 230 /* 231 * swizzle it based on the number of 232 * busses we're behind and our device 233 * number. 234 */ 235 pa.pa_intrpin = /* XXX */ 236 ((pin + pa.pa_intrswiz - 1) % 4) + 1; 237 } 238 pa.pa_intrline = PCI_INTERRUPT_LINE(intr); 239 240 config_found_sm(self, &pa, pciprint, pcisubmatch); 241 } 242 } 243 244 if (bus == 0 && pci_isa_bridge_callback != NULL) 245 (*pci_isa_bridge_callback)(pci_isa_bridge_callback_arg); 246 } 247 248 int 249 pciprint(aux, pnp) 250 void *aux; 251 const char *pnp; 252 { 253 register struct pci_attach_args *pa = aux; 254 char devinfo[256]; 255 256 if (pnp) { 257 pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo); 258 printf("%s at %s", devinfo, pnp); 259 } 260 printf(" dev %d function %d", pa->pa_device, pa->pa_function); 261 #if 0 262 printf(" (%si/o, %smem)", 263 pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "" : "no ", 264 pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "" : "no "); 265 #endif 266 return (UNCONF); 267 } 268 269 int 270 #ifdef __BROKEN_INDIRECT_CONFIG 271 pcisubmatch(parent, match, aux) 272 #else 273 pcisubmatch(parent, cf, aux) 274 #endif 275 struct device *parent; 276 #ifdef __BROKEN_INDIRECT_CONFIG 277 void *match; 278 #else 279 struct cfdata *cf; 280 #endif 281 void *aux; 282 { 283 #ifdef __BROKEN_INDIRECT_CONFIG 284 struct cfdata *cf = match; 285 #endif 286 struct pci_attach_args *pa = aux; 287 288 if (cf->pcicf_dev != PCI_UNK_DEV && 289 cf->pcicf_dev != pa->pa_device) 290 return 0; 291 if (cf->pcicf_function != PCI_UNK_FUNCTION && 292 cf->pcicf_function != pa->pa_function) 293 return 0; 294 return ((*cf->cf_attach->ca_match)(parent, cf, aux)); 295 } 296 297 void 298 set_pci_isa_bridge_callback(fn, arg) 299 void (*fn) __P((void *)); 300 void *arg; 301 { 302 303 if (pci_isa_bridge_callback != NULL) 304 panic("set_pci_isa_bridge_callback"); 305 pci_isa_bridge_callback = fn; 306 pci_isa_bridge_callback_arg = arg; 307 } 308
Indexes created Wed Sep 24 05:09:52 GMT 2025