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pci.c revision 1.35
      1 /*	$NetBSD: pci.c,v 1.35 1998/05/05 22:14:23 mjacob Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995, 1996, 1997
      5  *     Christopher G. Demetriou.  All rights reserved.
      6  * Copyright (c) 1994 Charles Hannum.  All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Charles Hannum.
     19  * 4. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * PCI bus autoconfiguration.
     36  */
     37 
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/device.h>
     41 
     42 #include <dev/pci/pcireg.h>
     43 #include <dev/pci/pcivar.h>
     44 #include <dev/pci/pcidevs.h>
     45 
     46 int pcimatch __P((struct device *, struct cfdata *, void *));
     47 void pciattach __P((struct device *, struct device *, void *));
     48 
     49 struct pci_softc {
     50 	struct device sc_dev;
     51 	bus_space_tag_t sc_iot, sc_memt;
     52 	bus_dma_tag_t sc_dmat;
     53 	pci_chipset_tag_t sc_pc;
     54 	int sc_bus, sc_maxndevs;
     55 	u_int sc_intrswiz;
     56 	pcitag_t sc_intrtag;
     57 	int sc_flags;
     58 };
     59 
     60 struct cfattach pci_ca = {
     61 	sizeof(struct pci_softc), pcimatch, pciattach
     62 };
     63 
     64 void	pci_probe_bus __P((struct device *));
     65 int	pciprint __P((void *, const char *));
     66 int	pcisubmatch __P((struct device *, struct cfdata *, void *));
     67 
     68 /*
     69  * Callback so that ISA/EISA bridges can attach their child busses
     70  * after PCI configuration is done.
     71  *
     72  * This works because:
     73  *	(1) there can be at most one ISA/EISA bridge per PCI bus, and
     74  *	(2) any ISA/EISA bridges must be attached to primary PCI
     75  *	    busses (i.e. bus zero).
     76  *
     77  * That boils down to: there can only be one of these outstanding
     78  * at a time, it is cleared when configuring PCI bus 0 before any
     79  * subdevices have been found, and it is run after all subdevices
     80  * of PCI bus 0 have been found.
     81  *
     82  * This is needed because there are some (legacy) PCI devices which
     83  * can show up as ISA/EISA devices as well (the prime example of which
     84  * are VGA controllers).  If you attach ISA from a PCI-ISA/EISA bridge,
     85  * and the bridge is seen before the video board is, the board can show
     86  * up as an ISA device, and that can (bogusly) complicate the PCI device's
     87  * attach code, or make the PCI device not be properly attached at all.
     88  */
     89 static void	(*pci_isa_bridge_callback) __P((void *));
     90 static void	*pci_isa_bridge_callback_arg;
     91 
     92 int
     93 pcimatch(parent, cf, aux)
     94 	struct device *parent;
     95 	struct cfdata *cf;
     96 	void *aux;
     97 {
     98 	struct pcibus_attach_args *pba = aux;
     99 
    100 	if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
    101 		return (0);
    102 
    103 	/* Check the locators */
    104 	if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
    105 	    cf->pcibuscf_bus != pba->pba_bus)
    106 		return (0);
    107 
    108 	/* sanity */
    109 	if (pba->pba_bus < 0 || pba->pba_bus > 255)
    110 		return (0);
    111 
    112 	/*
    113 	 * XXX check other (hardware?) indicators
    114 	 */
    115 
    116 	return 1;
    117 }
    118 
    119 void
    120 pci_probe_bus(self)
    121 	struct device *self;
    122 {
    123 	struct pci_softc *sc = (struct pci_softc *)self;
    124 	bus_space_tag_t iot, memt;
    125 	pci_chipset_tag_t pc;
    126 	int bus, device, maxndevs, function, nfunctions;
    127 
    128 	iot = sc->sc_iot;
    129 	memt = sc->sc_memt;
    130 	pc = sc->sc_pc;
    131 	bus = sc->sc_bus;
    132 	maxndevs = sc->sc_maxndevs;
    133 
    134 	if (bus == 0)
    135 		pci_isa_bridge_callback = NULL;
    136 
    137 	for (device = 0; device < maxndevs; device++) {
    138 		pcitag_t tag;
    139 		pcireg_t id, class, intr, bhlcr, csr;
    140 		struct pci_attach_args pa;
    141 		int pin;
    142 
    143 		tag = pci_make_tag(pc, bus, device, 0);
    144 		id = pci_conf_read(pc, tag, PCI_ID_REG);
    145 
    146 		/* Invalid vendor ID value? */
    147 		if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
    148 			continue;
    149 		/* XXX Not invalid, but we've done this ~forever. */
    150 		if (PCI_VENDOR(id) == 0)
    151 			continue;
    152 
    153 		bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
    154 		nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1;
    155 
    156 		for (function = 0; function < nfunctions; function++) {
    157 			tag = pci_make_tag(pc, bus, device, function);
    158 			id = pci_conf_read(pc, tag, PCI_ID_REG);
    159 			csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    160 			class = pci_conf_read(pc, tag, PCI_CLASS_REG);
    161 			intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
    162 
    163 			/* Invalid vendor ID value? */
    164 			if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
    165 				continue;
    166 			/* XXX Not invalid, but we've done this ~forever. */
    167 			if (PCI_VENDOR(id) == 0)
    168 				continue;
    169 
    170 			pa.pa_iot = iot;
    171 			pa.pa_memt = memt;
    172 			pa.pa_dmat = sc->sc_dmat;
    173 			pa.pa_pc = pc;
    174 			pa.pa_device = device;
    175 			pa.pa_function = function;
    176 			pa.pa_tag = tag;
    177 			pa.pa_id = id;
    178 			pa.pa_class = class;
    179 
    180 			/* set up memory and I/O enable flags as appropriate */
    181 			pa.pa_flags = 0;
    182 			if ((sc->sc_flags & PCI_FLAGS_IO_ENABLED) &&
    183 			    (csr & PCI_COMMAND_IO_ENABLE))
    184 				pa.pa_flags |= PCI_FLAGS_IO_ENABLED;
    185 			if ((sc->sc_flags & PCI_FLAGS_MEM_ENABLED) &&
    186 			    (csr & PCI_COMMAND_MEM_ENABLE))
    187 				pa.pa_flags |= PCI_FLAGS_MEM_ENABLED;
    188 
    189 			if (bus == 0) {
    190 				pa.pa_intrswiz = 0;
    191 				pa.pa_intrtag = tag;
    192 			} else {
    193 				pa.pa_intrswiz = sc->sc_intrswiz + device;
    194 				pa.pa_intrtag = sc->sc_intrtag;
    195 			}
    196 			pin = PCI_INTERRUPT_PIN(intr);
    197 			if (pin == PCI_INTERRUPT_PIN_NONE) {
    198 				/* no interrupt */
    199 				pa.pa_intrpin = 0;
    200 			} else {
    201 				/*
    202 				 * swizzle it based on the number of
    203 				 * busses we're behind and our device
    204 				 * number.
    205 				 */
    206 				pa.pa_intrpin =			/* XXX */
    207 				    ((pin + pa.pa_intrswiz - 1) % 4) + 1;
    208 			}
    209 			pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
    210 
    211 			config_found_sm(self, &pa, pciprint, pcisubmatch);
    212 		}
    213 	}
    214 
    215 	if (bus == 0 && pci_isa_bridge_callback != NULL)
    216 		(*pci_isa_bridge_callback)(pci_isa_bridge_callback_arg);
    217 }
    218 
    219 void
    220 pciattach(parent, self, aux)
    221 	struct device *parent, *self;
    222 	void *aux;
    223 {
    224 	struct pcibus_attach_args *pba = aux;
    225 	struct pci_softc *sc = (struct pci_softc *)self;
    226 	int io_enabled, mem_enabled;
    227 
    228 	pci_attach_hook(parent, self, pba);
    229 	printf("\n");
    230 
    231 	io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED);
    232 	mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED);
    233 
    234 	if (io_enabled == 0 && mem_enabled == 0) {
    235 		printf("%s: no spaces enabled!\n", self->dv_xname);
    236 		return;
    237 	}
    238 
    239 	printf("%s: ", self->dv_xname);
    240 	if (io_enabled)
    241 		printf("i/o enabled");
    242 	if (mem_enabled) {
    243 		if (io_enabled)
    244 			printf(", ");
    245 		printf("memory enabled");
    246 	}
    247 	printf("\n");
    248 
    249 	sc->sc_iot = pba->pba_iot;
    250 	sc->sc_memt = pba->pba_memt;
    251 	sc->sc_dmat = pba->pba_dmat;
    252 	sc->sc_pc = pba->pba_pc;
    253 	sc->sc_bus = pba->pba_bus;
    254 	sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
    255 	sc->sc_intrswiz = pba->pba_intrswiz;
    256 	sc->sc_intrtag = pba->pba_intrtag;
    257 	sc->sc_flags = pba->pba_flags;
    258 
    259 	pci_probe_bus(self);
    260 }
    261 
    262 int
    263 pciprint(aux, pnp)
    264 	void *aux;
    265 	const char *pnp;
    266 {
    267 	register struct pci_attach_args *pa = aux;
    268 	char devinfo[256];
    269 
    270 	if (pnp) {
    271 		pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
    272 		printf("%s at %s", devinfo, pnp);
    273 	}
    274 	printf(" dev %d function %d", pa->pa_device, pa->pa_function);
    275 #if 0
    276 	printf(" (%si/o, %smem)",
    277 	    pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "" : "no ",
    278 	    pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "" : "no ");
    279 	printf(" tag %x intrtag %x intrswiz %x intrpin %x", pa->pa_tag,
    280 	    pa->pa_intrtag, pa->pa_intrswiz, pa->pa_intrpin);
    281 #endif
    282 	return (UNCONF);
    283 }
    284 
    285 int
    286 pcisubmatch(parent, cf, aux)
    287 	struct device *parent;
    288 	struct cfdata *cf;
    289 	void *aux;
    290 {
    291 	struct pci_attach_args *pa = aux;
    292 
    293 	if (cf->pcicf_dev != PCI_UNK_DEV &&
    294 	    cf->pcicf_dev != pa->pa_device)
    295 		return 0;
    296 	if (cf->pcicf_function != PCI_UNK_FUNCTION &&
    297 	    cf->pcicf_function != pa->pa_function)
    298 		return 0;
    299 	return ((*cf->cf_attach->ca_match)(parent, cf, aux));
    300 }
    301 
    302 void
    303 set_pci_isa_bridge_callback(fn, arg)
    304 	void (*fn) __P((void *));
    305 	void *arg;
    306 {
    307 
    308 	if (pci_isa_bridge_callback != NULL)
    309 		panic("set_pci_isa_bridge_callback");
    310 	pci_isa_bridge_callback = fn;
    311 	pci_isa_bridge_callback_arg = arg;
    312 }
    313