pci.c revision 1.51.2.4
1 /* $NetBSD: pci.c,v 1.51.2.4 2001/10/22 20:41:25 nathanw Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996, 1997, 1998 5 * Christopher G. Demetriou. All rights reserved. 6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Charles M. Hannum. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * PCI bus autoconfiguration. 36 */ 37 38 #include "opt_pci.h" 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pcidevs.h> 47 48 #ifdef PCI_CONFIG_DUMP 49 int pci_config_dump = 1; 50 #else 51 int pci_config_dump = 0; 52 #endif 53 54 int pcimatch __P((struct device *, struct cfdata *, void *)); 55 void pciattach __P((struct device *, struct device *, void *)); 56 57 struct cfattach pci_ca = { 58 sizeof(struct pci_softc), pcimatch, pciattach 59 }; 60 61 int pci_probe_bus(struct device *, int (*match)(struct pci_attach_args *), 62 struct pci_attach_args *); 63 int pciprint __P((void *, const char *)); 64 int pcisubmatch __P((struct device *, struct cfdata *, void *)); 65 66 /* 67 * Important note about PCI-ISA bridges: 68 * 69 * Callbacks are used to configure these devices so that ISA/EISA bridges 70 * can attach their child busses after PCI configuration is done. 71 * 72 * This works because: 73 * (1) there can be at most one ISA/EISA bridge per PCI bus, and 74 * (2) any ISA/EISA bridges must be attached to primary PCI 75 * busses (i.e. bus zero). 76 * 77 * That boils down to: there can only be one of these outstanding 78 * at a time, it is cleared when configuring PCI bus 0 before any 79 * subdevices have been found, and it is run after all subdevices 80 * of PCI bus 0 have been found. 81 * 82 * This is needed because there are some (legacy) PCI devices which 83 * can show up as ISA/EISA devices as well (the prime example of which 84 * are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge, 85 * and the bridge is seen before the video board is, the board can show 86 * up as an ISA device, and that can (bogusly) complicate the PCI device's 87 * attach code, or make the PCI device not be properly attached at all. 88 * 89 * We use the generic config_defer() facility to achieve this. 90 */ 91 92 int 93 pcimatch(parent, cf, aux) 94 struct device *parent; 95 struct cfdata *cf; 96 void *aux; 97 { 98 struct pcibus_attach_args *pba = aux; 99 100 if (strcmp(pba->pba_busname, cf->cf_driver->cd_name)) 101 return (0); 102 103 /* Check the locators */ 104 if (cf->pcibuscf_bus != PCIBUS_UNK_BUS && 105 cf->pcibuscf_bus != pba->pba_bus) 106 return (0); 107 108 /* sanity */ 109 if (pba->pba_bus < 0 || pba->pba_bus > 255) 110 return (0); 111 112 /* 113 * XXX check other (hardware?) indicators 114 */ 115 116 return 1; 117 } 118 119 /* XXX 120 * The __PCI_BUS_DEVORDER/__PCI_DEV_FUNCORDER macros should go away 121 * and be implemented with device properties when they arrive. 122 */ 123 int 124 pci_probe_bus(struct device *self, int (*match)(struct pci_attach_args *), 125 struct pci_attach_args *pap) 126 { 127 struct pci_softc *sc = (struct pci_softc *)self; 128 bus_space_tag_t iot, memt; 129 pci_chipset_tag_t pc; 130 int bus, device, function, nfunctions, ret; 131 #ifdef __PCI_BUS_DEVORDER 132 char devs[32]; 133 int i; 134 #endif 135 #ifdef __PCI_DEV_FUNCORDER 136 char funcs[8]; 137 int j; 138 #else 139 const struct pci_quirkdata *qd; 140 #endif 141 142 iot = sc->sc_iot; 143 memt = sc->sc_memt; 144 pc = sc->sc_pc; 145 bus = sc->sc_bus; 146 #ifdef __PCI_BUS_DEVORDER 147 pci_bus_devorder(sc->sc_pc, sc->sc_bus, devs); 148 for (i = 0; (device = devs[i]) < 32 && device >= 0; i++) 149 #else 150 for (device = 0; device < sc->sc_maxndevs; device++) 151 #endif 152 { 153 pcitag_t tag; 154 pcireg_t id, class, intr, bhlcr, csr; 155 struct pci_attach_args pa; 156 int pin; 157 158 #ifdef __PCI_DEV_FUNCORDER 159 pci_dev_funcorder(sc->sc_pc, sc->sc_bus, device, funcs); 160 nfunctions = 8; 161 #else 162 tag = pci_make_tag(pc, bus, device, 0); 163 id = pci_conf_read(pc, tag, PCI_ID_REG); 164 165 /* Invalid vendor ID value? */ 166 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 167 continue; 168 /* XXX Not invalid, but we've done this ~forever. */ 169 if (PCI_VENDOR(id) == 0) 170 continue; 171 172 qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id)); 173 174 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 175 if (PCI_HDRTYPE_MULTIFN(bhlcr) || 176 (qd != NULL && 177 (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)) 178 nfunctions = 8; 179 else 180 nfunctions = 1; 181 #endif /* __PCI_DEV_FUNCORDER */ 182 183 #ifdef __PCI_DEV_FUNCORDER 184 for (j = 0; (function = funcs[j]) < nfunctions && 185 function >= 0; j++) 186 #else 187 for (function = 0; function < nfunctions; function++) 188 #endif 189 { 190 tag = pci_make_tag(pc, bus, device, function); 191 id = pci_conf_read(pc, tag, PCI_ID_REG); 192 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 193 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 194 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 195 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 196 197 /* Invalid vendor ID value? */ 198 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 199 continue; 200 /* XXX Not invalid, but we've done this ~forever. */ 201 if (PCI_VENDOR(id) == 0) 202 continue; 203 204 pa.pa_iot = iot; 205 pa.pa_memt = memt; 206 pa.pa_dmat = sc->sc_dmat; 207 pa.pa_pc = pc; 208 pa.pa_bus = bus; 209 pa.pa_device = device; 210 pa.pa_function = function; 211 pa.pa_tag = tag; 212 pa.pa_id = id; 213 pa.pa_class = class; 214 215 /* 216 * Set up memory, I/O enable, and PCI command flags 217 * as appropriate. 218 */ 219 pa.pa_flags = sc->sc_flags; 220 if ((csr & PCI_COMMAND_IO_ENABLE) == 0) 221 pa.pa_flags &= ~PCI_FLAGS_IO_ENABLED; 222 if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) 223 pa.pa_flags &= ~PCI_FLAGS_MEM_ENABLED; 224 225 /* 226 * If the cache line size is not configured, then 227 * clear the MRL/MRM/MWI command-ok flags. 228 */ 229 if (PCI_CACHELINE(bhlcr) == 0) 230 pa.pa_flags &= ~(PCI_FLAGS_MRL_OKAY| 231 PCI_FLAGS_MRM_OKAY|PCI_FLAGS_MWI_OKAY); 232 233 if (bus == 0) { 234 pa.pa_intrswiz = 0; 235 pa.pa_intrtag = tag; 236 } else { 237 pa.pa_intrswiz = sc->sc_intrswiz + device; 238 pa.pa_intrtag = sc->sc_intrtag; 239 } 240 pin = PCI_INTERRUPT_PIN(intr); 241 if (pin == PCI_INTERRUPT_PIN_NONE) { 242 /* no interrupt */ 243 pa.pa_intrpin = 0; 244 } else { 245 /* 246 * swizzle it based on the number of 247 * busses we're behind and our device 248 * number. 249 */ 250 pa.pa_intrpin = /* XXX */ 251 ((pin + pa.pa_intrswiz - 1) % 4) + 1; 252 } 253 pa.pa_intrline = PCI_INTERRUPT_LINE(intr); 254 255 if (match != NULL) { 256 ret = match(&pa); 257 if (ret != 0) { 258 if (pap != NULL) 259 *pap = pa; 260 return ret; 261 } 262 } else { 263 config_found_sm(self, &pa, pciprint, 264 pcisubmatch); 265 } 266 } 267 } 268 return 0; 269 } 270 271 void 272 pciattach(parent, self, aux) 273 struct device *parent, *self; 274 void *aux; 275 { 276 struct pcibus_attach_args *pba = aux; 277 struct pci_softc *sc = (struct pci_softc *)self; 278 int io_enabled, mem_enabled, mrl_enabled, mrm_enabled, mwi_enabled; 279 const char *sep = ""; 280 281 pci_attach_hook(parent, self, pba); 282 printf("\n"); 283 284 io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED); 285 mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED); 286 mrl_enabled = (pba->pba_flags & PCI_FLAGS_MRL_OKAY); 287 mrm_enabled = (pba->pba_flags & PCI_FLAGS_MRM_OKAY); 288 mwi_enabled = (pba->pba_flags & PCI_FLAGS_MWI_OKAY); 289 290 if (io_enabled == 0 && mem_enabled == 0) { 291 printf("%s: no spaces enabled!\n", self->dv_xname); 292 return; 293 } 294 295 #define PRINT(s) do { printf("%s%s", sep, s); sep = ", "; } while (0) 296 297 printf("%s: ", self->dv_xname); 298 299 if (io_enabled) 300 PRINT("i/o space"); 301 if (mem_enabled) 302 PRINT("memory space"); 303 printf(" enabled"); 304 305 if (mrl_enabled || mrm_enabled || mwi_enabled) { 306 if (mrl_enabled) 307 PRINT("rd/line"); 308 if (mrm_enabled) 309 PRINT("rd/mult"); 310 if (mwi_enabled) 311 PRINT("wr/inv"); 312 printf(" ok"); 313 } 314 315 printf("\n"); 316 317 #undef PRINT 318 319 sc->sc_iot = pba->pba_iot; 320 sc->sc_memt = pba->pba_memt; 321 sc->sc_dmat = pba->pba_dmat; 322 sc->sc_pc = pba->pba_pc; 323 sc->sc_bus = pba->pba_bus; 324 sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus); 325 sc->sc_intrswiz = pba->pba_intrswiz; 326 sc->sc_intrtag = pba->pba_intrtag; 327 sc->sc_flags = pba->pba_flags; 328 pci_probe_bus(self, NULL, NULL); 329 } 330 331 int 332 pciprint(aux, pnp) 333 void *aux; 334 const char *pnp; 335 { 336 struct pci_attach_args *pa = aux; 337 char devinfo[256]; 338 const struct pci_quirkdata *qd; 339 340 if (pnp) { 341 pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo); 342 printf("%s at %s", devinfo, pnp); 343 } 344 printf(" dev %d function %d", pa->pa_device, pa->pa_function); 345 if (pci_config_dump) { 346 printf(": "); 347 pci_conf_print(pa->pa_pc, pa->pa_tag, NULL); 348 if (!pnp) 349 pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo); 350 printf("%s at %s", devinfo, pnp ? pnp : "?"); 351 printf(" dev %d function %d (", pa->pa_device, pa->pa_function); 352 #ifdef __i386__ 353 printf("tag %#lx, intrtag %#lx, intrswiz %#lx, intrpin %#lx", 354 *(long *)&pa->pa_tag, *(long *)&pa->pa_intrtag, 355 (long)pa->pa_intrswiz, (long)pa->pa_intrpin); 356 #else 357 printf("intrswiz %#lx, intrpin %#lx", 358 (long)pa->pa_intrswiz, (long)pa->pa_intrpin); 359 #endif 360 printf(", i/o %s, mem %s,", 361 pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "on" : "off", 362 pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "on" : "off"); 363 qd = pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id), 364 PCI_PRODUCT(pa->pa_id)); 365 if (qd == NULL) { 366 printf(" no quirks"); 367 } else { 368 bitmask_snprintf(qd->quirks, 369 "\20\1multifn", devinfo, sizeof (devinfo)); 370 printf(" quirks %s", devinfo); 371 } 372 printf(")"); 373 } 374 return (UNCONF); 375 } 376 377 int 378 pcisubmatch(parent, cf, aux) 379 struct device *parent; 380 struct cfdata *cf; 381 void *aux; 382 { 383 struct pci_attach_args *pa = aux; 384 385 if (cf->pcicf_dev != PCI_UNK_DEV && 386 cf->pcicf_dev != pa->pa_device) 387 return 0; 388 if (cf->pcicf_function != PCI_UNK_FUNCTION && 389 cf->pcicf_function != pa->pa_function) 390 return 0; 391 return ((*cf->cf_attach->ca_match)(parent, cf, aux)); 392 } 393 394 int 395 pci_get_capability(pc, tag, capid, offset, value) 396 pci_chipset_tag_t pc; 397 pcitag_t tag; 398 int capid; 399 int *offset; 400 pcireg_t *value; 401 { 402 pcireg_t reg; 403 unsigned int ofs; 404 405 reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 406 if (!(reg & PCI_STATUS_CAPLIST_SUPPORT)) 407 return (0); 408 409 /* Determine the Capability List Pointer register to start with. */ 410 reg = pci_conf_read(pc, tag, PCI_BHLC_REG); 411 switch (PCI_HDRTYPE_TYPE(reg)) { 412 case 0: /* standard device header */ 413 ofs = PCI_CAPLISTPTR_REG; 414 break; 415 case 2: /* PCI-CardBus Bridge header */ 416 ofs = PCI_CARDBUS_CAPLISTPTR_REG; 417 break; 418 default: 419 return (0); 420 } 421 422 ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs)); 423 while (ofs != 0) { 424 #ifdef DIAGNOSTIC 425 if ((ofs & 3) || (ofs < 0x40)) 426 panic("pci_get_capability"); 427 #endif 428 reg = pci_conf_read(pc, tag, ofs); 429 if (PCI_CAPLIST_CAP(reg) == capid) { 430 if (offset) 431 *offset = ofs; 432 if (value) 433 *value = reg; 434 return (1); 435 } 436 ofs = PCI_CAPLIST_NEXT(reg); 437 } 438 439 return (0); 440 } 441 442 int 443 pci_find_device(struct pci_attach_args *pa, 444 int (*match)(struct pci_attach_args *)) 445 { 446 int i; 447 struct device *pcidev; 448 extern struct cfdriver pci_cd; 449 450 for (i = 0; i < pci_cd.cd_ndevs; i++) { 451 pcidev = pci_cd.cd_devs[i]; 452 if (pcidev != NULL && pci_probe_bus(pcidev, match, pa) != 0) 453 return 1; 454 } 455 return 0; 456 } 457
Indexes created Tue Sep 30 20:09:53 GMT 2025