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pci_usrreq.c revision 1.2.2.3
      1  1.2.2.3  nathanw /*	$NetBSD: pci_usrreq.c,v 1.2.2.3 2001/11/14 19:15:24 nathanw Exp $	*/
      2  1.2.2.2  nathanw 
      3  1.2.2.2  nathanw /*
      4  1.2.2.2  nathanw  * Copyright 2001 Wasabi Systems, Inc.
      5  1.2.2.2  nathanw  * All rights reserved.
      6  1.2.2.2  nathanw  *
      7  1.2.2.2  nathanw  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
      8  1.2.2.2  nathanw  *
      9  1.2.2.2  nathanw  * Redistribution and use in source and binary forms, with or without
     10  1.2.2.2  nathanw  * modification, are permitted provided that the following conditions
     11  1.2.2.2  nathanw  * are met:
     12  1.2.2.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     13  1.2.2.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     14  1.2.2.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     15  1.2.2.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     16  1.2.2.2  nathanw  *    documentation and/or other materials provided with the distribution.
     17  1.2.2.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     18  1.2.2.2  nathanw  *    must display the following acknowledgement:
     19  1.2.2.2  nathanw  *	This product includes software developed for the NetBSD Project by
     20  1.2.2.2  nathanw  *	Wasabi Systems, Inc.
     21  1.2.2.2  nathanw  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  1.2.2.2  nathanw  *    or promote products derived from this software without specific prior
     23  1.2.2.2  nathanw  *    written permission.
     24  1.2.2.2  nathanw  *
     25  1.2.2.2  nathanw  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  1.2.2.2  nathanw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  1.2.2.2  nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  1.2.2.2  nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  1.2.2.2  nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  1.2.2.2  nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  1.2.2.2  nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  1.2.2.2  nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  1.2.2.2  nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  1.2.2.2  nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  1.2.2.2  nathanw  * POSSIBILITY OF SUCH DAMAGE.
     36  1.2.2.2  nathanw  */
     37  1.2.2.2  nathanw 
     38  1.2.2.2  nathanw /*
     39  1.2.2.2  nathanw  * User -> kernel interface for PCI bus access.
     40  1.2.2.2  nathanw  */
     41  1.2.2.2  nathanw 
     42  1.2.2.3  nathanw #include <sys/cdefs.h>
     43  1.2.2.3  nathanw __KERNEL_RCSID(0, "$NetBSD: pci_usrreq.c,v 1.2.2.3 2001/11/14 19:15:24 nathanw Exp $");
     44  1.2.2.3  nathanw 
     45  1.2.2.2  nathanw #include <sys/param.h>
     46  1.2.2.2  nathanw #include <sys/conf.h>
     47  1.2.2.2  nathanw #include <sys/device.h>
     48  1.2.2.2  nathanw #include <sys/ioctl.h>
     49  1.2.2.2  nathanw #include <sys/proc.h>
     50  1.2.2.2  nathanw #include <sys/systm.h>
     51  1.2.2.2  nathanw #include <sys/errno.h>
     52  1.2.2.2  nathanw #include <sys/fcntl.h>
     53  1.2.2.2  nathanw 
     54  1.2.2.2  nathanw #include <dev/pci/pcireg.h>
     55  1.2.2.2  nathanw #include <dev/pci/pcivar.h>
     56  1.2.2.2  nathanw #include <dev/pci/pciio.h>
     57  1.2.2.2  nathanw 
     58  1.2.2.2  nathanw cdev_decl(pci);
     59  1.2.2.2  nathanw 
     60  1.2.2.2  nathanw int
     61  1.2.2.2  nathanw pciopen(dev_t dev, int flags, int mode, struct proc *p)
     62  1.2.2.2  nathanw {
     63  1.2.2.2  nathanw 	struct pci_softc *sc;
     64  1.2.2.2  nathanw 	int unit;
     65  1.2.2.2  nathanw 
     66  1.2.2.2  nathanw 	unit = minor(dev);
     67  1.2.2.2  nathanw 	sc = device_lookup(&pci_cd, unit);
     68  1.2.2.2  nathanw 	if (sc == NULL)
     69  1.2.2.2  nathanw 		return (ENXIO);
     70  1.2.2.2  nathanw 
     71  1.2.2.2  nathanw 	return (0);
     72  1.2.2.2  nathanw }
     73  1.2.2.2  nathanw 
     74  1.2.2.2  nathanw int
     75  1.2.2.2  nathanw pciclose(dev_t dev, int flags, int mode, struct proc *p)
     76  1.2.2.2  nathanw {
     77  1.2.2.2  nathanw 
     78  1.2.2.2  nathanw 	return (0);
     79  1.2.2.2  nathanw }
     80  1.2.2.2  nathanw 
     81  1.2.2.2  nathanw int
     82  1.2.2.2  nathanw pciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
     83  1.2.2.2  nathanw {
     84  1.2.2.2  nathanw 	struct pci_softc *sc = device_lookup(&pci_cd, minor(dev));
     85  1.2.2.2  nathanw 	struct pciio_bdf_cfgreg *bdfr = (void *) data;
     86  1.2.2.2  nathanw 	struct pciio_businfo *binfo = (void *) data;
     87  1.2.2.2  nathanw 	pcitag_t tag;
     88  1.2.2.2  nathanw 
     89  1.2.2.2  nathanw 	switch (cmd) {
     90  1.2.2.2  nathanw 	case PCI_IOC_BDF_CFGREAD:
     91  1.2.2.2  nathanw 	case PCI_IOC_BDF_CFGWRITE:
     92  1.2.2.2  nathanw 		if (bdfr->bus > 255 || bdfr->device >= sc->sc_maxndevs ||
     93  1.2.2.2  nathanw 		    bdfr->function > 7)
     94  1.2.2.2  nathanw 			return (EINVAL);
     95  1.2.2.2  nathanw 		tag = pci_make_tag(sc->sc_pc, bdfr->bus, bdfr->device,
     96  1.2.2.2  nathanw 		    bdfr->function);
     97  1.2.2.2  nathanw 		if (cmd == PCI_IOC_BDF_CFGREAD)
     98  1.2.2.2  nathanw 			bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag,
     99  1.2.2.2  nathanw 			    bdfr->cfgreg.reg);
    100  1.2.2.2  nathanw 		else {
    101  1.2.2.2  nathanw 			if ((flag & FWRITE) == 0)
    102  1.2.2.2  nathanw 				return (EBADF);
    103  1.2.2.2  nathanw 			pci_conf_write(sc->sc_pc, tag, bdfr->cfgreg.reg,
    104  1.2.2.2  nathanw 			    bdfr->cfgreg.val);
    105  1.2.2.2  nathanw 		}
    106  1.2.2.2  nathanw 		break;
    107  1.2.2.2  nathanw 
    108  1.2.2.2  nathanw 	case PCI_IOC_BUSINFO:
    109  1.2.2.2  nathanw 		binfo->busno = sc->sc_bus;
    110  1.2.2.2  nathanw 		binfo->maxdevs = sc->sc_maxndevs;
    111  1.2.2.2  nathanw 		break;
    112  1.2.2.2  nathanw 
    113  1.2.2.2  nathanw 	default:
    114  1.2.2.2  nathanw 		return (ENOTTY);
    115  1.2.2.2  nathanw 	}
    116  1.2.2.2  nathanw 
    117  1.2.2.2  nathanw 	return (0);
    118  1.2.2.2  nathanw }
    119  1.2.2.2  nathanw 
    120  1.2.2.2  nathanw paddr_t
    121  1.2.2.2  nathanw pcimmap(dev_t dev, off_t offset, int prot)
    122  1.2.2.2  nathanw {
    123  1.2.2.2  nathanw #if 0
    124  1.2.2.2  nathanw 	struct pci_softc *sc = device_lookup(&pci_cd, minor(dev));
    125  1.2.2.2  nathanw 
    126  1.2.2.2  nathanw 	/*
    127  1.2.2.2  nathanw 	 * Since we allow mapping of the entire bus, we
    128  1.2.2.2  nathanw 	 * take the offset to be the address on the bus,
    129  1.2.2.2  nathanw 	 * and pass 0 as the offset into that range.
    130  1.2.2.2  nathanw 	 *
    131  1.2.2.2  nathanw 	 * XXX Need a way to deal with linear/prefetchable/etc.
    132  1.2.2.2  nathanw 	 */
    133  1.2.2.2  nathanw 	return (bus_space_mmap(sc->sc_memt, offset, 0, prot, 0));
    134  1.2.2.2  nathanw #else
    135  1.2.2.2  nathanw 	/* XXX Consider this further. */
    136  1.2.2.2  nathanw 	return (-1);
    137  1.2.2.2  nathanw #endif
    138  1.2.2.2  nathanw }
    139  1.2.2.2  nathanw 
    140  1.2.2.2  nathanw /*
    141  1.2.2.2  nathanw  * pci_devioctl:
    142  1.2.2.2  nathanw  *
    143  1.2.2.2  nathanw  *	PCI ioctls that can be performed on devices directly.
    144  1.2.2.2  nathanw  */
    145  1.2.2.2  nathanw int
    146  1.2.2.2  nathanw pci_devioctl(pci_chipset_tag_t pc, pcitag_t tag, u_long cmd, caddr_t data,
    147  1.2.2.2  nathanw     int flag, struct proc *p)
    148  1.2.2.2  nathanw {
    149  1.2.2.2  nathanw 	struct pciio_cfgreg *r = (void *) data;
    150  1.2.2.2  nathanw 
    151  1.2.2.2  nathanw 	switch (cmd) {
    152  1.2.2.2  nathanw 	case PCI_IOC_CFGREAD:
    153  1.2.2.2  nathanw 	case PCI_IOC_CFGWRITE:
    154  1.2.2.2  nathanw 		if (cmd == PCI_IOC_CFGREAD)
    155  1.2.2.2  nathanw 			r->val = pci_conf_read(pc, tag, r->reg);
    156  1.2.2.2  nathanw 		else {
    157  1.2.2.2  nathanw 			if ((flag & FWRITE) == 0)
    158  1.2.2.2  nathanw 				return (EBADF);
    159  1.2.2.2  nathanw 			pci_conf_write(pc, tag, r->reg, r->val);
    160  1.2.2.2  nathanw 		}
    161  1.2.2.2  nathanw 		break;
    162  1.2.2.2  nathanw 
    163  1.2.2.2  nathanw 	default:
    164  1.2.2.2  nathanw 		return (ENOTTY);
    165  1.2.2.2  nathanw 	}
    166  1.2.2.2  nathanw 
    167  1.2.2.2  nathanw 	return (0);
    168  1.2.2.2  nathanw }
    169