pci_usrreq.c revision 1.1 1 /* $NetBSD: pci_usrreq.c,v 1.1 2001/09/13 21:49:40 thorpej Exp $ */
2
3 /*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * User -> kernel interface for PCI bus access.
40 */
41
42 #include <sys/param.h>
43 #include <sys/conf.h>
44 #include <sys/device.h>
45 #include <sys/ioctl.h>
46 #include <sys/proc.h>
47 #include <sys/systm.h>
48 #include <sys/errno.h>
49 #include <sys/fcntl.h>
50
51 #include <dev/pci/pcireg.h>
52 #include <dev/pci/pcivar.h>
53 #include <dev/pci/pciio.h>
54
55 cdev_decl(pci);
56
57 int
58 pciopen(dev_t dev, int flags, int mode, struct proc *p)
59 {
60 struct pci_softc *sc;
61 int unit;
62
63 unit = minor(dev);
64 sc = device_lookup(&pci_cd, unit);
65 if (sc == NULL)
66 return (ENXIO);
67
68 return (0);
69 }
70
71 int
72 pciclose(dev_t dev, int flags, int mode, struct proc *p)
73 {
74
75 return (0);
76 }
77
78 int
79 pciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
80 {
81 struct pci_softc *sc = device_lookup(&pci_cd, minor(dev));
82 struct pciio_bdf_cfgreg *bdfr = (void *) data;
83 struct pciio_businfo *binfo = (void *) data;
84 pcitag_t tag;
85
86 switch (cmd) {
87 case PCI_IOC_BDF_CFGREAD:
88 case PCI_IOC_BDF_CFGWRITE:
89 if (bdfr->bus > 255 || bdfr->device >= sc->sc_maxndevs ||
90 bdfr->function > 7)
91 return (EINVAL);
92 tag = pci_make_tag(sc->sc_pc, bdfr->bus, bdfr->device,
93 bdfr->function);
94 if (cmd == PCI_IOC_BDF_CFGREAD)
95 bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag,
96 bdfr->cfgreg.reg);
97 else {
98 if ((flag & FWRITE) == 0)
99 return (EBADF);
100 pci_conf_write(sc->sc_pc, tag, bdfr->cfgreg.reg,
101 bdfr->cfgreg.val);
102 }
103 break;
104
105 case PCI_IOC_BUSINFO:
106 binfo->busno = sc->sc_bus;
107 binfo->maxdevs = sc->sc_maxndevs;
108 break;
109
110 default:
111 return (ENOTTY);
112 }
113
114 return (0);
115 }
116
117 paddr_t
118 pcimmap(dev_t dev, off_t offset, int prot)
119 {
120 struct pci_softc *sc = device_lookup(&pci_cd, minor(dev));
121
122 /*
123 * Since we allow mapping of the entire bus, we
124 * take the offset to be the address on the bus,
125 * and pass 0 as the offset into that range.
126 *
127 * XXX Need a way to deal with linear/prefetchable/etc.
128 */
129 return (bus_space_mmap(sc->sc_memt, offset, 0, prot, 0));
130 }
131
132 /*
133 * pci_devioctl:
134 *
135 * PCI ioctls that can be performed on devices directly.
136 */
137 int
138 pci_devioctl(pci_chipset_tag_t pc, pcitag_t tag, u_long cmd, caddr_t data,
139 int flag, struct proc *p)
140 {
141 struct pciio_cfgreg *r = (void *) data;
142
143 switch (cmd) {
144 case PCI_IOC_CFGREAD:
145 case PCI_IOC_CFGWRITE:
146 if (cmd == PCI_IOC_CFGREAD)
147 r->val = pci_conf_read(pc, tag, r->reg);
148 else {
149 if ((flag & FWRITE) == 0)
150 return (EBADF);
151 pci_conf_write(pc, tag, r->reg, r->val);
152 }
153 break;
154
155 default:
156 return (ENOTTY);
157 }
158
159 return (0);
160 }
161