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pciide.c revision 1.4
      1  1.4  cgd /*	$NetBSD: pciide.c,v 1.4 1998/03/06 17:41:59 cgd Exp $	*/
      2  1.1  cgd 
      3  1.1  cgd /*
      4  1.1  cgd  * Copyright (c) 1996, 1998 Christopher G. Demetriou.  All rights reserved.
      5  1.1  cgd  *
      6  1.1  cgd  * Redistribution and use in source and binary forms, with or without
      7  1.1  cgd  * modification, are permitted provided that the following conditions
      8  1.1  cgd  * are met:
      9  1.1  cgd  * 1. Redistributions of source code must retain the above copyright
     10  1.1  cgd  *    notice, this list of conditions and the following disclaimer.
     11  1.1  cgd  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.1  cgd  *    notice, this list of conditions and the following disclaimer in the
     13  1.1  cgd  *    documentation and/or other materials provided with the distribution.
     14  1.1  cgd  * 3. All advertising materials mentioning features or use of this software
     15  1.1  cgd  *    must display the following acknowledgement:
     16  1.1  cgd  *      This product includes software developed by Christopher G. Demetriou
     17  1.1  cgd  *	for the NetBSD Project.
     18  1.1  cgd  * 4. The name of the author may not be used to endorse or promote products
     19  1.1  cgd  *    derived from this software without specific prior written permission
     20  1.1  cgd  *
     21  1.1  cgd  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  1.1  cgd  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  1.1  cgd  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  1.1  cgd  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  1.1  cgd  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  1.1  cgd  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  1.1  cgd  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  1.1  cgd  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  1.1  cgd  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  1.1  cgd  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  1.1  cgd  */
     32  1.1  cgd 
     33  1.1  cgd /*
     34  1.1  cgd  * PCI IDE controller driver.
     35  1.1  cgd  *
     36  1.1  cgd  * Author: Christopher G. Demetriou, March 2, 1998 (derived from NetBSD
     37  1.1  cgd  * sys/dev/pci/ppb.c, revision 1.16).
     38  1.1  cgd  *
     39  1.2  cgd  * See "PCI IDE Controller Specification, Revision 1.0 3/4/94" and
     40  1.2  cgd  * "Programming Interface for Bus Master IDE Controller, Revision 1.0
     41  1.2  cgd  * 5/16/94" from the PCI SIG.
     42  1.1  cgd  *
     43  1.2  cgd  * XXX Does not yet support DMA (but does map the Bus Master DMA regs).
     44  1.1  cgd  *
     45  1.1  cgd  * XXX Does not support serializing the two channels for broken (at least
     46  1.1  cgd  * XXX according to linux and freebsd) controllers, e.g. CMD PCI0640.
     47  1.1  cgd  */
     48  1.1  cgd 
     49  1.1  cgd #include <sys/param.h>
     50  1.1  cgd #include <sys/systm.h>
     51  1.1  cgd #include <sys/device.h>
     52  1.1  cgd 
     53  1.1  cgd #include <dev/pci/pcireg.h>
     54  1.1  cgd #include <dev/pci/pcivar.h>
     55  1.1  cgd #include <dev/pci/pciidereg.h>
     56  1.1  cgd #include <dev/pci/pciidevar.h>
     57  1.1  cgd 
     58  1.1  cgd struct pciide_softc {
     59  1.1  cgd 	struct device		sc_dev;
     60  1.1  cgd 
     61  1.1  cgd 	void			*sc_pci_ih;	/* PCI interrupt handle */
     62  1.2  cgd 	int			sc_dma_ioh_valid; /* bus-master DMA info */
     63  1.2  cgd 	bus_space_tag_t		sc_dma_iot;
     64  1.2  cgd 	bus_space_handle_t	sc_dma_ioh;
     65  1.1  cgd 
     66  1.1  cgd 	struct pciide_channel {			/* per-channel data */
     67  1.1  cgd 		/* internal bookkeeping */
     68  1.1  cgd 		struct device	*dev;		/* 'wdc' dev attached */
     69  1.1  cgd 		int		compat;		/* is it compat? */
     70  1.1  cgd 		void		*ih;		/* compat or pci handle */
     71  1.1  cgd 
     72  1.1  cgd 		/* used by wdc attachment (read-only after init) */
     73  1.1  cgd 		int		cmd_ioh_valid, ctl_ioh_valid;
     74  1.1  cgd 		bus_space_tag_t	cmd_iot, ctl_iot;
     75  1.1  cgd 		bus_space_handle_t cmd_ioh, ctl_ioh;
     76  1.1  cgd 
     77  1.1  cgd 		/* filled in by wdc attachment (written by wdc attach) */
     78  1.1  cgd 		int		(*ihand) __P((void *));
     79  1.1  cgd 		void		*ihandarg;
     80  1.2  cgd 	} sc_channels[PCIIDE_NUM_CHANNELS];
     81  1.1  cgd };
     82  1.1  cgd 
     83  1.1  cgd #define	PCIIDE_CHANNEL_NAME(chan)	((chan) == 0 ? "primary" : "secondary")
     84  1.1  cgd 
     85  1.1  cgd #ifdef __BROKEN_INDIRECT_CONFIG
     86  1.1  cgd int	pciide_match __P((struct device *, void *, void *));
     87  1.1  cgd #else
     88  1.1  cgd int	pciide_match __P((struct device *, struct cfdata *, void *));
     89  1.1  cgd #endif
     90  1.1  cgd void	pciide_attach __P((struct device *, struct device *, void *));
     91  1.1  cgd 
     92  1.1  cgd struct cfattach pciide_ca = {
     93  1.1  cgd 	sizeof(struct pciide_softc), pciide_match, pciide_attach
     94  1.1  cgd };
     95  1.1  cgd 
     96  1.1  cgd int	pciide_compat_intr __P((void *));
     97  1.1  cgd int	pciide_pci_intr __P((void *));
     98  1.1  cgd int	pciide_print __P((void *, const char *pnp));
     99  1.1  cgd 
    100  1.1  cgd int
    101  1.1  cgd pciide_match(parent, match, aux)
    102  1.1  cgd 	struct device *parent;
    103  1.1  cgd #ifdef __BROKEN_INDIRECT_CONFIG
    104  1.1  cgd 	void *match;
    105  1.1  cgd #else
    106  1.1  cgd 	struct cfdata *match;
    107  1.1  cgd #endif
    108  1.1  cgd 	void *aux;
    109  1.1  cgd {
    110  1.1  cgd 	struct pci_attach_args *pa = aux;
    111  1.1  cgd 
    112  1.1  cgd 	/*
    113  1.1  cgd 	 * Check the ID register to see that it's a PCI IDE controller.
    114  1.1  cgd 	 * If it is, we assume that we can deal with it; it _should_
    115  1.1  cgd 	 * work in a standardized way...
    116  1.1  cgd 	 */
    117  1.1  cgd 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
    118  1.1  cgd 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
    119  1.1  cgd 		return (1);
    120  1.1  cgd 	}
    121  1.1  cgd 
    122  1.1  cgd 	return (0);
    123  1.1  cgd }
    124  1.1  cgd 
    125  1.1  cgd void
    126  1.1  cgd pciide_attach(parent, self, aux)
    127  1.1  cgd 	struct device *parent, *self;
    128  1.1  cgd 	void *aux;
    129  1.1  cgd {
    130  1.1  cgd 	struct pci_attach_args *pa = aux;
    131  1.1  cgd 	pci_chipset_tag_t pc = pa->pa_pc;
    132  1.1  cgd 	struct pciide_softc *sc = (struct pciide_softc *)self;
    133  1.1  cgd 	struct pciide_attach_args aa;
    134  1.1  cgd 	struct pciide_channel *cp;
    135  1.1  cgd 	pcireg_t class, interface, csr;
    136  1.1  cgd 	pci_intr_handle_t intrhandle;
    137  1.1  cgd 	const char *intrstr;
    138  1.1  cgd 	char devinfo[256];
    139  1.1  cgd 	int i;
    140  1.1  cgd 
    141  1.1  cgd 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
    142  1.1  cgd 	printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
    143  1.1  cgd 
    144  1.1  cgd 	if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0) {
    145  1.1  cgd 		csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    146  1.1  cgd 		printf("%s: device disabled (at %s)\n", sc->sc_dev.dv_xname,
    147  1.1  cgd 		    (csr & PCI_COMMAND_IO_ENABLE) == 0 ? "device" : "bridge");
    148  1.1  cgd 		return;
    149  1.1  cgd 	}
    150  1.1  cgd 
    151  1.1  cgd 	class = pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG);
    152  1.1  cgd 	interface = PCI_INTERFACE(class);
    153  1.1  cgd 
    154  1.1  cgd 	/*
    155  1.1  cgd 	 * Set up PCI interrupt.
    156  1.1  cgd 	 *
    157  1.1  cgd 	 * If mapping fails, that's (probably) because there's no pin
    158  1.1  cgd 	 * set to intr, which is (probably) because it's a compat-only
    159  1.1  cgd 	 * device (or hard-wired in compatibility-only mode).  Native-PCI
    160  1.1  cgd 	 * channels will complain later if the interrupt was needed.
    161  1.1  cgd 	 *
    162  1.1  cgd 	 * If establishment fails, that's (probably) some other problem.
    163  1.1  cgd 	 */
    164  1.1  cgd 	if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
    165  1.1  cgd 	    pa->pa_intrline, &intrhandle) == 0) {
    166  1.1  cgd 		intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    167  1.1  cgd 		sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle,
    168  1.1  cgd 		    IPL_BIO, pciide_pci_intr, sc);
    169  1.1  cgd 
    170  1.1  cgd 		if (sc->sc_pci_ih != NULL) {
    171  1.1  cgd 			printf("%s: using %s for native-PCI interrupt\n",
    172  1.1  cgd 			    sc->sc_dev.dv_xname,
    173  1.1  cgd 			    intrstr ? intrstr : "unknown interrupt");
    174  1.1  cgd 		} else {
    175  1.1  cgd 			printf("%s: couldn't establish native-PCI interrupt",
    176  1.1  cgd 			    sc->sc_dev.dv_xname);
    177  1.1  cgd 			if (intrstr != NULL)
    178  1.1  cgd 				printf(" at %s", intrstr);
    179  1.1  cgd 			printf("\n");
    180  1.1  cgd 		}
    181  1.1  cgd 	}
    182  1.1  cgd 
    183  1.2  cgd 	/*
    184  1.2  cgd 	 * Map DMA registers, if DMA is supported.
    185  1.2  cgd 	 *
    186  1.2  cgd 	 * Note that sc_dma_ioh_valid is a good test to see if DMA can
    187  1.2  cgd 	 * be done.  If the interface doesn't support DMA, sc_dma_ioh_valid
    188  1.2  cgd 	 * will never be non-zero.  If the DMA regs couldn't be mapped,
    189  1.2  cgd 	 * it'll be zero.  I.e., sc_dma_ioh_valid will only be non-zero
    190  1.2  cgd 	 * if the interface supports DMA and the registers could be
    191  1.2  cgd 	 * mapped.
    192  1.4  cgd 	 *
    193  1.4  cgd 	 * XXX Note that despite the fact that the Bus Master IDE specs
    194  1.4  cgd 	 * XXX say that "The bus master IDE functoin uses 16 bytes of IO
    195  1.4  cgd 	 * XXX space," some controllers (at least the United
    196  1.4  cgd 	 * XXX Microelectronics UM8886BF) place it in memory space.
    197  1.4  cgd 	 * XXX eventually, we should probably read the register and check
    198  1.4  cgd 	 * XXX which type it is.  Either that or 'quirk' certain devices.
    199  1.2  cgd 	 */
    200  1.2  cgd 	if (interface & PCIIDE_INTERFACE_BUS_MASTER_DMA) {
    201  1.2  cgd 		sc->sc_dma_ioh_valid = (pci_mapreg_map(pa,
    202  1.2  cgd 		    PCIIDE_REG_BUS_MASTER_DMA, PCI_MAPREG_TYPE_IO, 0,
    203  1.2  cgd 		    &sc->sc_dma_iot, &sc->sc_dma_ioh, NULL, NULL) == 0);
    204  1.3  cgd 		printf("%s: bus-master DMA support present, but unused (%s)\n",
    205  1.2  cgd 		    sc->sc_dev.dv_xname,
    206  1.2  cgd 		    sc->sc_dma_ioh_valid ? "no driver support" :
    207  1.2  cgd 		      "couldn't map regs!");
    208  1.2  cgd 	}
    209  1.2  cgd 
    210  1.1  cgd 	for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
    211  1.2  cgd 		cp = &sc->sc_channels[i];
    212  1.1  cgd 
    213  1.1  cgd 		if (interface & PCIIDE_INTERFACE_PCI(i)) {
    214  1.1  cgd 			cp->compat = 0;
    215  1.1  cgd 			cp->ih = sc->sc_pci_ih;
    216  1.1  cgd 			cp->cmd_ioh_valid = (pci_mapreg_map(pa,
    217  1.1  cgd 			    PCIIDE_REG_CMD_BASE(i), PCI_MAPREG_TYPE_IO, 0,
    218  1.1  cgd 			    &cp->cmd_iot, &cp->cmd_ioh, NULL, NULL) == 0);
    219  1.1  cgd 			cp->ctl_ioh_valid = (pci_mapreg_map(pa,
    220  1.1  cgd 			    PCIIDE_REG_CTL_BASE(i), PCI_MAPREG_TYPE_IO, 0,
    221  1.1  cgd 			    &cp->ctl_iot, &cp->ctl_ioh, NULL, NULL) == 0);
    222  1.1  cgd 		} else {
    223  1.1  cgd 			cp->compat = 1;
    224  1.1  cgd 			cp->ih =
    225  1.1  cgd 			    pciide_machdep_compat_intr_establish(&sc->sc_dev,
    226  1.1  cgd 			    pa, i, pciide_compat_intr, cp);
    227  1.1  cgd 			cp->cmd_iot = pa->pa_iot;
    228  1.1  cgd 			cp->cmd_ioh_valid = (bus_space_map(cp->cmd_iot,
    229  1.1  cgd 			    PCIIDE_COMPAT_CMD_BASE(i), PCIIDE_COMPAT_CMD_SIZE,
    230  1.1  cgd 			    0, &cp->cmd_ioh) == 0);
    231  1.1  cgd 			cp->ctl_iot = pa->pa_iot;
    232  1.1  cgd 			cp->ctl_ioh_valid = (bus_space_map(cp->ctl_iot,
    233  1.1  cgd 			    PCIIDE_COMPAT_CTL_BASE(i), PCIIDE_COMPAT_CTL_SIZE,
    234  1.1  cgd 			    0, &cp->ctl_ioh) == 0);
    235  1.1  cgd 		}
    236  1.1  cgd 	}
    237  1.1  cgd 
    238  1.1  cgd 	for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
    239  1.2  cgd 		cp = &sc->sc_channels[i];
    240  1.2  cgd 
    241  1.2  cgd 		printf("%s: %s channel %s to %s mode\n",
    242  1.2  cgd 		    sc->sc_dev.dv_xname, PCIIDE_CHANNEL_NAME(i),
    243  1.2  cgd 		    (interface & PCIIDE_INTERFACE_SETTABLE(i)) ?
    244  1.2  cgd 		      "configured" : "wired",
    245  1.2  cgd 		    (interface & PCIIDE_INTERFACE_PCI(i)) ? "native-PCI" :
    246  1.2  cgd 		      "compatibility");
    247  1.1  cgd 
    248  1.1  cgd 		if (cp->cmd_ioh_valid && cp->ctl_ioh_valid && cp->ih != NULL) {
    249  1.1  cgd 			aa.channel = i;
    250  1.1  cgd 			aa.cmd_iot = cp->cmd_iot;
    251  1.1  cgd 			aa.cmd_ioh = cp->cmd_ioh;
    252  1.1  cgd 			aa.ctl_iot = cp->ctl_iot;
    253  1.1  cgd 			aa.ctl_ioh = cp->ctl_ioh;
    254  1.1  cgd 			aa.ihandp = &cp->ihand;
    255  1.1  cgd 			aa.ihandargp = &cp->ihandarg;
    256  1.1  cgd 			cp->dev = config_found(self, &aa, pciide_print);
    257  1.2  cgd 
    258  1.2  cgd 			/*
    259  1.2  cgd 			 * Note that if the 'wdc' device isn't configured,
    260  1.2  cgd 			 * the controller's resources are still marked as
    261  1.2  cgd 			 * being in use.  This is a feature.
    262  1.2  cgd 			 */
    263  1.1  cgd 		} else {
    264  1.1  cgd 			printf("%s: couldn't configure %s channel (cmd regs %s, ctl regs %s, (%s) intr %s)\n",
    265  1.1  cgd 			    sc->sc_dev.dv_xname, PCIIDE_CHANNEL_NAME(i),
    266  1.1  cgd 			    cp->cmd_ioh_valid ? "ok" : "unmapped",
    267  1.1  cgd 			    cp->ctl_ioh_valid ? "ok" : "unmapped",
    268  1.1  cgd 			    cp->compat ? "compat" : "native-PCI",
    269  1.1  cgd 			    cp->ih != NULL ? "ok" : "broken");
    270  1.1  cgd 		}
    271  1.1  cgd 	}
    272  1.1  cgd }
    273  1.1  cgd 
    274  1.1  cgd int
    275  1.1  cgd pciide_print(aux, pnp)
    276  1.1  cgd 	void *aux;
    277  1.1  cgd 	const char *pnp;
    278  1.1  cgd {
    279  1.1  cgd 	struct pciide_attach_args *aa = aux;
    280  1.1  cgd 
    281  1.1  cgd 	/* only 'wdc's can attach to 'pciide's; easy. */
    282  1.1  cgd 	if (pnp)
    283  1.1  cgd 		printf("wdc at %s", pnp);
    284  1.1  cgd 	printf(" channel %d", aa->channel);
    285  1.1  cgd 	return (UNCONF);
    286  1.1  cgd }
    287  1.1  cgd 
    288  1.1  cgd int
    289  1.1  cgd pciide_compat_intr(arg)
    290  1.1  cgd 	void *arg;
    291  1.1  cgd {
    292  1.1  cgd 	struct pciide_channel *cp = arg;
    293  1.1  cgd 
    294  1.1  cgd #ifdef DIAGNOSTIC
    295  1.1  cgd 	/* should only be called for a compat channel */
    296  1.1  cgd 	if (cp->compat == 0)
    297  1.1  cgd 		panic("pciide compat intr called for non-compat chan %p\n", cp);
    298  1.1  cgd #endif
    299  1.1  cgd 	/* if there's no handler, that probably means no dev attached */
    300  1.1  cgd 	if (cp->ihand == NULL)
    301  1.1  cgd 		return (0);
    302  1.1  cgd 
    303  1.1  cgd 	return ((*cp->ihand)(cp->ihandarg));
    304  1.1  cgd }
    305  1.1  cgd 
    306  1.1  cgd int
    307  1.1  cgd pciide_pci_intr(arg)
    308  1.1  cgd 	void *arg;
    309  1.1  cgd {
    310  1.1  cgd 	struct pciide_softc *sc = arg;
    311  1.1  cgd 	struct pciide_channel *cp;
    312  1.1  cgd 	int i, rv, crv;
    313  1.1  cgd 
    314  1.1  cgd 	rv = 0;
    315  1.1  cgd 	for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
    316  1.2  cgd 		cp = &sc->sc_channels[i];
    317  1.1  cgd 
    318  1.1  cgd 		/* If a compat channel or there's no handler, skip. */
    319  1.1  cgd 		if (cp->compat || cp->ihand == NULL)
    320  1.1  cgd 			continue;
    321  1.1  cgd 
    322  1.1  cgd 		crv = ((*cp->ihand)(cp->ihandarg));
    323  1.1  cgd 		if (crv == 0)
    324  1.1  cgd 			;		/* leave rv alone */
    325  1.1  cgd 		else if (crv == 1)
    326  1.1  cgd 			rv = 1;		/* claim the intr */
    327  1.1  cgd 		else if (rv == 0)	/* crv should be -1 in this case */
    328  1.1  cgd 			rv = crv;	/* if we've done no better, take it */
    329  1.1  cgd 	}
    330  1.1  cgd 	return (rv);
    331  1.1  cgd }
    332