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pciide.c revision 1.4
      1 /*	$NetBSD: pciide.c,v 1.4 1998/03/06 17:41:59 cgd Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996, 1998 Christopher G. Demetriou.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *      This product includes software developed by Christopher G. Demetriou
     17  *	for the NetBSD Project.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * PCI IDE controller driver.
     35  *
     36  * Author: Christopher G. Demetriou, March 2, 1998 (derived from NetBSD
     37  * sys/dev/pci/ppb.c, revision 1.16).
     38  *
     39  * See "PCI IDE Controller Specification, Revision 1.0 3/4/94" and
     40  * "Programming Interface for Bus Master IDE Controller, Revision 1.0
     41  * 5/16/94" from the PCI SIG.
     42  *
     43  * XXX Does not yet support DMA (but does map the Bus Master DMA regs).
     44  *
     45  * XXX Does not support serializing the two channels for broken (at least
     46  * XXX according to linux and freebsd) controllers, e.g. CMD PCI0640.
     47  */
     48 
     49 #include <sys/param.h>
     50 #include <sys/systm.h>
     51 #include <sys/device.h>
     52 
     53 #include <dev/pci/pcireg.h>
     54 #include <dev/pci/pcivar.h>
     55 #include <dev/pci/pciidereg.h>
     56 #include <dev/pci/pciidevar.h>
     57 
     58 struct pciide_softc {
     59 	struct device		sc_dev;
     60 
     61 	void			*sc_pci_ih;	/* PCI interrupt handle */
     62 	int			sc_dma_ioh_valid; /* bus-master DMA info */
     63 	bus_space_tag_t		sc_dma_iot;
     64 	bus_space_handle_t	sc_dma_ioh;
     65 
     66 	struct pciide_channel {			/* per-channel data */
     67 		/* internal bookkeeping */
     68 		struct device	*dev;		/* 'wdc' dev attached */
     69 		int		compat;		/* is it compat? */
     70 		void		*ih;		/* compat or pci handle */
     71 
     72 		/* used by wdc attachment (read-only after init) */
     73 		int		cmd_ioh_valid, ctl_ioh_valid;
     74 		bus_space_tag_t	cmd_iot, ctl_iot;
     75 		bus_space_handle_t cmd_ioh, ctl_ioh;
     76 
     77 		/* filled in by wdc attachment (written by wdc attach) */
     78 		int		(*ihand) __P((void *));
     79 		void		*ihandarg;
     80 	} sc_channels[PCIIDE_NUM_CHANNELS];
     81 };
     82 
     83 #define	PCIIDE_CHANNEL_NAME(chan)	((chan) == 0 ? "primary" : "secondary")
     84 
     85 #ifdef __BROKEN_INDIRECT_CONFIG
     86 int	pciide_match __P((struct device *, void *, void *));
     87 #else
     88 int	pciide_match __P((struct device *, struct cfdata *, void *));
     89 #endif
     90 void	pciide_attach __P((struct device *, struct device *, void *));
     91 
     92 struct cfattach pciide_ca = {
     93 	sizeof(struct pciide_softc), pciide_match, pciide_attach
     94 };
     95 
     96 int	pciide_compat_intr __P((void *));
     97 int	pciide_pci_intr __P((void *));
     98 int	pciide_print __P((void *, const char *pnp));
     99 
    100 int
    101 pciide_match(parent, match, aux)
    102 	struct device *parent;
    103 #ifdef __BROKEN_INDIRECT_CONFIG
    104 	void *match;
    105 #else
    106 	struct cfdata *match;
    107 #endif
    108 	void *aux;
    109 {
    110 	struct pci_attach_args *pa = aux;
    111 
    112 	/*
    113 	 * Check the ID register to see that it's a PCI IDE controller.
    114 	 * If it is, we assume that we can deal with it; it _should_
    115 	 * work in a standardized way...
    116 	 */
    117 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
    118 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE) {
    119 		return (1);
    120 	}
    121 
    122 	return (0);
    123 }
    124 
    125 void
    126 pciide_attach(parent, self, aux)
    127 	struct device *parent, *self;
    128 	void *aux;
    129 {
    130 	struct pci_attach_args *pa = aux;
    131 	pci_chipset_tag_t pc = pa->pa_pc;
    132 	struct pciide_softc *sc = (struct pciide_softc *)self;
    133 	struct pciide_attach_args aa;
    134 	struct pciide_channel *cp;
    135 	pcireg_t class, interface, csr;
    136 	pci_intr_handle_t intrhandle;
    137 	const char *intrstr;
    138 	char devinfo[256];
    139 	int i;
    140 
    141 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
    142 	printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
    143 
    144 	if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0) {
    145 		csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    146 		printf("%s: device disabled (at %s)\n", sc->sc_dev.dv_xname,
    147 		    (csr & PCI_COMMAND_IO_ENABLE) == 0 ? "device" : "bridge");
    148 		return;
    149 	}
    150 
    151 	class = pci_conf_read(pc, pa->pa_tag, PCI_CLASS_REG);
    152 	interface = PCI_INTERFACE(class);
    153 
    154 	/*
    155 	 * Set up PCI interrupt.
    156 	 *
    157 	 * If mapping fails, that's (probably) because there's no pin
    158 	 * set to intr, which is (probably) because it's a compat-only
    159 	 * device (or hard-wired in compatibility-only mode).  Native-PCI
    160 	 * channels will complain later if the interrupt was needed.
    161 	 *
    162 	 * If establishment fails, that's (probably) some other problem.
    163 	 */
    164 	if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
    165 	    pa->pa_intrline, &intrhandle) == 0) {
    166 		intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    167 		sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle,
    168 		    IPL_BIO, pciide_pci_intr, sc);
    169 
    170 		if (sc->sc_pci_ih != NULL) {
    171 			printf("%s: using %s for native-PCI interrupt\n",
    172 			    sc->sc_dev.dv_xname,
    173 			    intrstr ? intrstr : "unknown interrupt");
    174 		} else {
    175 			printf("%s: couldn't establish native-PCI interrupt",
    176 			    sc->sc_dev.dv_xname);
    177 			if (intrstr != NULL)
    178 				printf(" at %s", intrstr);
    179 			printf("\n");
    180 		}
    181 	}
    182 
    183 	/*
    184 	 * Map DMA registers, if DMA is supported.
    185 	 *
    186 	 * Note that sc_dma_ioh_valid is a good test to see if DMA can
    187 	 * be done.  If the interface doesn't support DMA, sc_dma_ioh_valid
    188 	 * will never be non-zero.  If the DMA regs couldn't be mapped,
    189 	 * it'll be zero.  I.e., sc_dma_ioh_valid will only be non-zero
    190 	 * if the interface supports DMA and the registers could be
    191 	 * mapped.
    192 	 *
    193 	 * XXX Note that despite the fact that the Bus Master IDE specs
    194 	 * XXX say that "The bus master IDE functoin uses 16 bytes of IO
    195 	 * XXX space," some controllers (at least the United
    196 	 * XXX Microelectronics UM8886BF) place it in memory space.
    197 	 * XXX eventually, we should probably read the register and check
    198 	 * XXX which type it is.  Either that or 'quirk' certain devices.
    199 	 */
    200 	if (interface & PCIIDE_INTERFACE_BUS_MASTER_DMA) {
    201 		sc->sc_dma_ioh_valid = (pci_mapreg_map(pa,
    202 		    PCIIDE_REG_BUS_MASTER_DMA, PCI_MAPREG_TYPE_IO, 0,
    203 		    &sc->sc_dma_iot, &sc->sc_dma_ioh, NULL, NULL) == 0);
    204 		printf("%s: bus-master DMA support present, but unused (%s)\n",
    205 		    sc->sc_dev.dv_xname,
    206 		    sc->sc_dma_ioh_valid ? "no driver support" :
    207 		      "couldn't map regs!");
    208 	}
    209 
    210 	for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
    211 		cp = &sc->sc_channels[i];
    212 
    213 		if (interface & PCIIDE_INTERFACE_PCI(i)) {
    214 			cp->compat = 0;
    215 			cp->ih = sc->sc_pci_ih;
    216 			cp->cmd_ioh_valid = (pci_mapreg_map(pa,
    217 			    PCIIDE_REG_CMD_BASE(i), PCI_MAPREG_TYPE_IO, 0,
    218 			    &cp->cmd_iot, &cp->cmd_ioh, NULL, NULL) == 0);
    219 			cp->ctl_ioh_valid = (pci_mapreg_map(pa,
    220 			    PCIIDE_REG_CTL_BASE(i), PCI_MAPREG_TYPE_IO, 0,
    221 			    &cp->ctl_iot, &cp->ctl_ioh, NULL, NULL) == 0);
    222 		} else {
    223 			cp->compat = 1;
    224 			cp->ih =
    225 			    pciide_machdep_compat_intr_establish(&sc->sc_dev,
    226 			    pa, i, pciide_compat_intr, cp);
    227 			cp->cmd_iot = pa->pa_iot;
    228 			cp->cmd_ioh_valid = (bus_space_map(cp->cmd_iot,
    229 			    PCIIDE_COMPAT_CMD_BASE(i), PCIIDE_COMPAT_CMD_SIZE,
    230 			    0, &cp->cmd_ioh) == 0);
    231 			cp->ctl_iot = pa->pa_iot;
    232 			cp->ctl_ioh_valid = (bus_space_map(cp->ctl_iot,
    233 			    PCIIDE_COMPAT_CTL_BASE(i), PCIIDE_COMPAT_CTL_SIZE,
    234 			    0, &cp->ctl_ioh) == 0);
    235 		}
    236 	}
    237 
    238 	for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
    239 		cp = &sc->sc_channels[i];
    240 
    241 		printf("%s: %s channel %s to %s mode\n",
    242 		    sc->sc_dev.dv_xname, PCIIDE_CHANNEL_NAME(i),
    243 		    (interface & PCIIDE_INTERFACE_SETTABLE(i)) ?
    244 		      "configured" : "wired",
    245 		    (interface & PCIIDE_INTERFACE_PCI(i)) ? "native-PCI" :
    246 		      "compatibility");
    247 
    248 		if (cp->cmd_ioh_valid && cp->ctl_ioh_valid && cp->ih != NULL) {
    249 			aa.channel = i;
    250 			aa.cmd_iot = cp->cmd_iot;
    251 			aa.cmd_ioh = cp->cmd_ioh;
    252 			aa.ctl_iot = cp->ctl_iot;
    253 			aa.ctl_ioh = cp->ctl_ioh;
    254 			aa.ihandp = &cp->ihand;
    255 			aa.ihandargp = &cp->ihandarg;
    256 			cp->dev = config_found(self, &aa, pciide_print);
    257 
    258 			/*
    259 			 * Note that if the 'wdc' device isn't configured,
    260 			 * the controller's resources are still marked as
    261 			 * being in use.  This is a feature.
    262 			 */
    263 		} else {
    264 			printf("%s: couldn't configure %s channel (cmd regs %s, ctl regs %s, (%s) intr %s)\n",
    265 			    sc->sc_dev.dv_xname, PCIIDE_CHANNEL_NAME(i),
    266 			    cp->cmd_ioh_valid ? "ok" : "unmapped",
    267 			    cp->ctl_ioh_valid ? "ok" : "unmapped",
    268 			    cp->compat ? "compat" : "native-PCI",
    269 			    cp->ih != NULL ? "ok" : "broken");
    270 		}
    271 	}
    272 }
    273 
    274 int
    275 pciide_print(aux, pnp)
    276 	void *aux;
    277 	const char *pnp;
    278 {
    279 	struct pciide_attach_args *aa = aux;
    280 
    281 	/* only 'wdc's can attach to 'pciide's; easy. */
    282 	if (pnp)
    283 		printf("wdc at %s", pnp);
    284 	printf(" channel %d", aa->channel);
    285 	return (UNCONF);
    286 }
    287 
    288 int
    289 pciide_compat_intr(arg)
    290 	void *arg;
    291 {
    292 	struct pciide_channel *cp = arg;
    293 
    294 #ifdef DIAGNOSTIC
    295 	/* should only be called for a compat channel */
    296 	if (cp->compat == 0)
    297 		panic("pciide compat intr called for non-compat chan %p\n", cp);
    298 #endif
    299 	/* if there's no handler, that probably means no dev attached */
    300 	if (cp->ihand == NULL)
    301 		return (0);
    302 
    303 	return ((*cp->ihand)(cp->ihandarg));
    304 }
    305 
    306 int
    307 pciide_pci_intr(arg)
    308 	void *arg;
    309 {
    310 	struct pciide_softc *sc = arg;
    311 	struct pciide_channel *cp;
    312 	int i, rv, crv;
    313 
    314 	rv = 0;
    315 	for (i = 0; i < PCIIDE_NUM_CHANNELS; i++) {
    316 		cp = &sc->sc_channels[i];
    317 
    318 		/* If a compat channel or there's no handler, skip. */
    319 		if (cp->compat || cp->ihand == NULL)
    320 			continue;
    321 
    322 		crv = ((*cp->ihand)(cp->ihandarg));
    323 		if (crv == 0)
    324 			;		/* leave rv alone */
    325 		else if (crv == 1)
    326 			rv = 1;		/* claim the intr */
    327 		else if (rv == 0)	/* crv should be -1 in this case */
    328 			rv = crv;	/* if we've done no better, take it */
    329 	}
    330 	return (rv);
    331 }
    332