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pciide_cy693_reg.h revision 1.7 
      1 /*	$NetBSD: pciide_cy693_reg.h,v 1.7 2003/10/05 17:48:49 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  *
     31  */
     32 
     33 /*
     34  * Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller.
     35  * Available from http://www.cypress.com/japan/prodgate/chip/cy82c693.html
     36  * This chip has 2 PCI IDE functions, each of them has only one channel
     37  * So there's no primary/secodary distinction in the registers defs.
     38  */
     39 
     40 /* IDE control register */
     41 #define CY_CTRL 0x40
     42 #define CY_CTRL_RETRY			0x00002000
     43 #define CY_CTRL_SLAVE_PREFETCH		0x00000400
     44 #define CY_CTRL_POSTWRITE		0x00000200
     45 #define	CY_CTRL_PREFETCH(drive)		(0x00000100 << (2 * (drive)))
     46 #define CY_CTRL_POSTWRITE_LENGTH_MASK	0x00000030
     47 #define CY_CTRL_POSTWRITE_LENGTH_OFF    4
     48 #define CY_CTRL_PREFETCH_LENGTH_MASK	0x00000003
     49 #define CY_CTRL_PREFETCH_LENGTH_OFF	0
     50 
     51 /* IDE addr setup control register */
     52 #define CY_ADDR_CTRL 0x48
     53 #define CY_ADDR_CTRL_SETUP_OFF(drive)  (4 * (drive))
     54 #define CY_ADDR_CTRL_SETUP_MASK(drive) \
     55 	(0x00000007 << CY_ADDR_CTRL_SETUP_OFF(drive))
     56 
     57 /* command control register */
     58 #define CY_CMD_CTRL 0x4c
     59 #define CY_CMD_CTRL_IOW_PULSE_OFF(drive)	(12 + 16 * (drive))
     60 #define CY_CMD_CTRL_IOW_REC_OFF(drive)		(8 + 16 * (drive))
     61 #define CY_CMD_CTRL_IOR_PULSE_OFF(drive)	(4 + 16 * (drive))
     62 #define CY_CMD_CTRL_IOR_REC_OFF(drive)		(0 + 16 * (drive))
     63 
     64 static const int8_t cy_pio_pulse[] __attribute__((__unused__)) =
     65     {9, 4, 3, 2, 2};
     66 static const int8_t cy_pio_rec[] __attribute__((__unused__)) =
     67     {9, 7, 4, 2, 0};
     68 #ifdef unused
     69 static const int8_t cy_dma_pulse[] __attribute__((__unused__)) =
     70     {7, 2, 2};
     71 static const int8_t cy_dma_rec[] __attribute__((__unused__)) =
     72     {7, 1, 0};
     73 #endif
     74 
     75 /*
     76  * The cypress is quite weird: it uses 8-bit ISA registers to control
     77  * DMA modes.
     78  */
     79 
     80 #define CY_DMA_ADDR 0x22
     81 #define CY_DMA_SIZE 0x2
     82 
     83 #define CY_DMA_IDX 0x00
     84 #define CY_DMA_IDX_PRIMARY	0x30
     85 #define CY_DMA_IDX_SECONDARY	0x31
     86 #define CY_DMA_IDX_TIMEOUT	0x32
     87 
     88 #define CY_DMA_DATA 0x01
     89 /* Multiword DMA transfer, for CY_DMA_IDX_PRIMARY or CY_DMA_IDX_SECONDARY */
     90 #define CY_DMA_DATA_MODE_MASK	0x03
     91 #define CY_DMA_DATA_SINGLE	0x04
     92