Home | History | Annotate | Line # | Download | only in pci
pciide_sl82c105_reg.h revision 1.1
      1  1.1  thorpej /*	$NetBSD: pciide_sl82c105_reg.h,v 1.1 2002/04/03 17:02:21 thorpej Exp $	*/
      2  1.1  thorpej 
      3  1.1  thorpej /*-
      4  1.1  thorpej  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5  1.1  thorpej  * All rights reserved.
      6  1.1  thorpej  *
      7  1.1  thorpej  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  thorpej  * by Jason R. Thorpe.
      9  1.1  thorpej  *
     10  1.1  thorpej  * Redistribution and use in source and binary forms, with or without
     11  1.1  thorpej  * modification, are permitted provided that the following conditions
     12  1.1  thorpej  * are met:
     13  1.1  thorpej  * 1. Redistributions of source code must retain the above copyright
     14  1.1  thorpej  *    notice, this list of conditions and the following disclaimer.
     15  1.1  thorpej  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  thorpej  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  thorpej  *    documentation and/or other materials provided with the distribution.
     18  1.1  thorpej  * 3. All advertising materials mentioning features or use of this software
     19  1.1  thorpej  *    must display the following acknowledgement:
     20  1.1  thorpej  *	This product includes software developed by the NetBSD
     21  1.1  thorpej  *	Foundation, Inc. and its contributors.
     22  1.1  thorpej  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  thorpej  *    contributors may be used to endorse or promote products derived
     24  1.1  thorpej  *    from this software without specific prior written permission.
     25  1.1  thorpej  *
     26  1.1  thorpej  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  thorpej  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  thorpej  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  thorpej  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  thorpej  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  thorpej  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  thorpej  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  thorpej  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  thorpej  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  thorpej  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  thorpej  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  thorpej  */
     38  1.1  thorpej 
     39  1.1  thorpej /*
     40  1.1  thorpej  * Register definitions for the Symphony Labs 82C105 PCI IDE
     41  1.1  thorpej  * interface.  This 82C105 is also found embedded in the Winbond
     42  1.1  thorpej  * 83C553 Southbridge.
     43  1.1  thorpej  */
     44  1.1  thorpej 
     45  1.1  thorpej /* PCI configuration space registers */
     46  1.1  thorpej 
     47  1.1  thorpej #define	SYMPH_PORT0_P	(PCI_MAPREG_START + 0x00)	/* port 0 primary */
     48  1.1  thorpej #define	SYMPH_PORT0_S	(PCI_MAPREG_START + 0x04)	/* port 0 secondary */
     49  1.1  thorpej #define	SYMPH_PORT1_P	(PCI_MAPREG_START + 0x08)	/* port 1 primary */
     50  1.1  thorpej #define	SYMPH_PORT1_S	(PCI_MAPREG_START + 0x0c)	/* port 1 secondary */
     51  1.1  thorpej #define	SYMPH_BMIDER	(PCI_MAPREG_START + 0x10)	/* bus master regs */
     52  1.1  thorpej 
     53  1.1  thorpej #define	SYMPH_IDECSR	0x40		/* IDE control/status */
     54  1.1  thorpej #define	SYMPH_P0D0CR	0x44		/* port 0 drive 0 control */
     55  1.1  thorpej #define	SYMPH_P0D1CR	0x48		/* port 0 drive 1 control */
     56  1.1  thorpej #define	SYMPH_P1D0CR	0x4c		/* port 1 drive 0 control */
     57  1.1  thorpej #define	SYMPH_P1D1CR	0c50		/* port 1 drive 1 control */
     58  1.1  thorpej 
     59  1.1  thorpej #define	IDECR_IDE_IRQB	(1U << 30)	/* IDE_IRQB signal */
     60  1.1  thorpej #define	IDECR_IDE_IRQA	(1U << 28)	/* IDE_IRQA signal */
     61  1.1  thorpej #define	IDECR_RA_SHIFT	16		/* read-ahead duration */
     62  1.1  thorpej #define	IDECR_RA_MASK	(0x7ff << IDECR_RA_SHIFT)
     63  1.1  thorpej #define	IDECR_LEGIRQ	(1U << 1)	/* legacy IRQ mode */
     64  1.1  thorpej #define	IDECR_P1F16	(1U << 5)	/* port 1 fast 16 */
     65  1.1  thorpej #define	IDECR_P1EN	(1U << 4)	/* port 1 enable */
     66  1.1  thorpej #define	IDECR_P0F16	(1U << 1)	/* port 0 fast 16 */
     67  1.1  thorpej #define	IDECR_P0EN	(1U << 0)	/* port 0 enable */
     68  1.1  thorpej 
     69  1.1  thorpej #define	PxDx_USR_SHIFT	16		/* user defined bits */
     70  1.1  thorpej #define	PxDx_USR_MASK	(0xff << PxDx_USR_SHIFT)
     71  1.1  thorpej #define	PxDx_CMD_ON_SHIFT 8		/* CMD ON time */
     72  1.1  thorpej #define	PxDx_CMD_ON_MASK (0x1f << PxDx_CMD_ON_SHIFT)
     73  1.1  thorpej #define	PxDx_PWEN	(1U << 7)	/* posted write enable */
     74  1.1  thorpej #define	PxDx_RDYEN	(1U << 6)	/* IOCHRDY enable */
     75  1.1  thorpej #define	PxDx_RAEN	(1U << 5)	/* read-ahead enable */
     76  1.1  thorpej #define	PxDx_CMD_OFF_MASK (0x1f)	/* CMD OFF time */
     77  1.1  thorpej 
     78  1.1  thorpej /*
     79  1.1  thorpej  * IDE CMD ON and CMD OFF times for a 33MHz PCI bus clock.
     80  1.1  thorpej  *
     81  1.1  thorpej  * These come from Table 4-4 of the 83c553 manual.
     82  1.1  thorpej  */
     83  1.1  thorpej struct symph_cmdtime {
     84  1.1  thorpej 	int	cmd_on;		/* cmd on time */
     85  1.1  thorpej 	int	cmd_off;	/* cmd off time */
     86  1.1  thorpej };
     87  1.1  thorpej 
     88  1.1  thorpej static const struct symph_cmdtime symph_pio_times[]
     89  1.1  thorpej     __attribute__((__unused__)) = {
     90  1.1  thorpej /*        programmed               actual       */
     91  1.1  thorpej 	{ 5, 13 },		/* 6, 14 */
     92  1.1  thorpej 	{ 4, 7 },		/* 5, 8 */
     93  1.1  thorpej 	{ 3, 4 },		/* 4, 5 */
     94  1.1  thorpej 	{ 2, 2 },		/* 3, 3 */
     95  1.1  thorpej 	{ 2, 0 },		/* 3, 1 */
     96  1.1  thorpej 	{ 1, 0 },		/* 2, 1 */
     97  1.1  thorpej };
     98  1.1  thorpej 
     99  1.1  thorpej static const struct symph_cmdtime symph_sw_dma_times[]
    100  1.1  thorpej     __attribute__((__unused__)) = {
    101  1.1  thorpej /*        programmed               actual       */
    102  1.1  thorpej 	{ 15, 15 },		/* 16, 16 */
    103  1.1  thorpej };
    104  1.1  thorpej 
    105  1.1  thorpej static const struct symph_cmdtime symph_mw_dma_times[]
    106  1.1  thorpej      __attribute__((__unused__)) = {
    107  1.1  thorpej /*        programmed               actual       */
    108  1.1  thorpej 	{ 7, 7 },		/* 8, 8 */
    109  1.1  thorpej 	{ 2, 1 },		/* 3, 2 */
    110  1.1  thorpej 	{ 2, 0 },		/* 3, 1 */
    111  1.1  thorpej 	{ 1, 0 },		/* 2, 1 */
    112  1.1  thorpej };
    113