pciio.h revision 1.2.2.2
1 1.2.2.2 nathanw /* $NetBSD: pciio.h,v 1.2.2.2 2001/09/21 22:36:02 nathanw Exp $ */ 2 1.2.2.2 nathanw 3 1.2.2.2 nathanw /* 4 1.2.2.2 nathanw * Copyright 2001 Wasabi Systems, Inc. 5 1.2.2.2 nathanw * All rights reserved. 6 1.2.2.2 nathanw * 7 1.2.2.2 nathanw * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 1.2.2.2 nathanw * 9 1.2.2.2 nathanw * Redistribution and use in source and binary forms, with or without 10 1.2.2.2 nathanw * modification, are permitted provided that the following conditions 11 1.2.2.2 nathanw * are met: 12 1.2.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 13 1.2.2.2 nathanw * notice, this list of conditions and the following disclaimer. 14 1.2.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 15 1.2.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 16 1.2.2.2 nathanw * documentation and/or other materials provided with the distribution. 17 1.2.2.2 nathanw * 3. All advertising materials mentioning features or use of this software 18 1.2.2.2 nathanw * must display the following acknowledgement: 19 1.2.2.2 nathanw * This product includes software developed for the NetBSD Project by 20 1.2.2.2 nathanw * Wasabi Systems, Inc. 21 1.2.2.2 nathanw * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.2.2.2 nathanw * or promote products derived from this software without specific prior 23 1.2.2.2 nathanw * written permission. 24 1.2.2.2 nathanw * 25 1.2.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.2.2.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.2.2.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.2.2.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.2.2.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.2.2.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.2.2.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.2.2.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.2.2.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.2.2.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.2.2.2 nathanw * POSSIBILITY OF SUCH DAMAGE. 36 1.2.2.2 nathanw */ 37 1.2.2.2 nathanw 38 1.2.2.2 nathanw #ifndef _DEV_PCI_PCIIO_H_ 39 1.2.2.2 nathanw #define _DEV_PCI_PCIIO_H_ 40 1.2.2.2 nathanw 41 1.2.2.2 nathanw /* 42 1.2.2.2 nathanw * User -> kernel interface for PCI bus access. 43 1.2.2.2 nathanw */ 44 1.2.2.2 nathanw 45 1.2.2.2 nathanw #include <sys/ioccom.h> 46 1.2.2.2 nathanw 47 1.2.2.2 nathanw /* 48 1.2.2.2 nathanw * pciio_cfgreg: 49 1.2.2.2 nathanw * 50 1.2.2.2 nathanw * Representation of a PCI config space register. 51 1.2.2.2 nathanw */ 52 1.2.2.2 nathanw struct pciio_cfgreg { 53 1.2.2.2 nathanw u_int reg; /* offset into PCI configuration space */ 54 1.2.2.2 nathanw uint32_t val; /* value of the register */ 55 1.2.2.2 nathanw }; 56 1.2.2.2 nathanw 57 1.2.2.2 nathanw /* 58 1.2.2.2 nathanw * Read and write PCI configuration space registers on a 59 1.2.2.2 nathanw * specific device. 60 1.2.2.2 nathanw */ 61 1.2.2.2 nathanw #define PCI_IOC_CFGREAD _IOWR('P', 0, struct pciio_cfgreg) 62 1.2.2.2 nathanw #define PCI_IOC_CFGWRITE _IOW('P', 1, struct pciio_cfgreg) 63 1.2.2.2 nathanw 64 1.2.2.2 nathanw /* 65 1.2.2.2 nathanw * pciio_bdf_cfgreg: 66 1.2.2.2 nathanw * 67 1.2.2.2 nathanw * Like pciio_cfgreg, except for any bus/dev/func within 68 1.2.2.2 nathanw * a given PCI domain. 69 1.2.2.2 nathanw */ 70 1.2.2.2 nathanw struct pciio_bdf_cfgreg { 71 1.2.2.2 nathanw u_int bus; 72 1.2.2.2 nathanw u_int device; 73 1.2.2.2 nathanw u_int function; 74 1.2.2.2 nathanw struct pciio_cfgreg cfgreg; 75 1.2.2.2 nathanw }; 76 1.2.2.2 nathanw 77 1.2.2.2 nathanw /* 78 1.2.2.2 nathanw * Read and write PCI configuration space registers on any 79 1.2.2.2 nathanw * device within a given PCI domain. 80 1.2.2.2 nathanw */ 81 1.2.2.2 nathanw #define PCI_IOC_BDF_CFGREAD _IOWR('P', 2, struct pciio_bdf_cfgreg) 82 1.2.2.2 nathanw #define PCI_IOC_BDF_CFGWRITE _IOW('P', 3, struct pciio_bdf_cfgreg) 83 1.2.2.2 nathanw 84 1.2.2.2 nathanw /* 85 1.2.2.2 nathanw * pciio_businfo: 86 1.2.2.2 nathanw * 87 1.2.2.2 nathanw * Information for a PCI bus (autconfiguration node) instance. 88 1.2.2.2 nathanw */ 89 1.2.2.2 nathanw struct pciio_businfo { 90 1.2.2.2 nathanw u_int busno; /* bus number */ 91 1.2.2.2 nathanw u_int maxdevs; /* max devices on bus */ 92 1.2.2.2 nathanw }; 93 1.2.2.2 nathanw 94 1.2.2.2 nathanw #define PCI_IOC_BUSINFO _IOR('P', 4, struct pciio_businfo) 95 1.2.2.2 nathanw 96 1.2.2.2 nathanw #endif /* _DEV_PCI_PCIIO_H_ */ 97
Indexes created Tue Oct 07 21:09:53 GMT 2025