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pcivar.h revision 1.58.2.2
      1  1.58.2.2     skrll /*	$NetBSD: pcivar.h,v 1.58.2.2 2004/08/03 10:49:11 skrll Exp $	*/
      2       1.2       cgd 
      3       1.1   mycroft /*
      4      1.19       cgd  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
      5      1.36   mycroft  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6       1.1   mycroft  *
      7       1.1   mycroft  * Redistribution and use in source and binary forms, with or without
      8       1.1   mycroft  * modification, are permitted provided that the following conditions
      9       1.1   mycroft  * are met:
     10       1.1   mycroft  * 1. Redistributions of source code must retain the above copyright
     11       1.1   mycroft  *    notice, this list of conditions and the following disclaimer.
     12       1.1   mycroft  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1   mycroft  *    notice, this list of conditions and the following disclaimer in the
     14       1.1   mycroft  *    documentation and/or other materials provided with the distribution.
     15       1.1   mycroft  * 3. All advertising materials mentioning features or use of this software
     16       1.1   mycroft  *    must display the following acknowledgement:
     17      1.36   mycroft  *	This product includes software developed by Charles M. Hannum.
     18       1.1   mycroft  * 4. The name of the author may not be used to endorse or promote products
     19       1.1   mycroft  *    derived from this software without specific prior written permission.
     20       1.1   mycroft  *
     21       1.1   mycroft  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22       1.1   mycroft  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23       1.1   mycroft  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24       1.1   mycroft  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25       1.1   mycroft  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26       1.1   mycroft  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27       1.1   mycroft  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28       1.1   mycroft  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29       1.1   mycroft  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30       1.1   mycroft  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31       1.1   mycroft  */
     32       1.1   mycroft 
     33      1.12       cgd #ifndef _DEV_PCI_PCIVAR_H_
     34      1.12       cgd #define	_DEV_PCI_PCIVAR_H_
     35      1.12       cgd 
     36       1.1   mycroft /*
     37       1.1   mycroft  * Definitions for PCI autoconfiguration.
     38       1.1   mycroft  *
     39       1.1   mycroft  * This file describes types and functions which are used for PCI
     40       1.1   mycroft  * configuration.  Some of this information is machine-specific, and is
     41      1.14       cgd  * provided by pci_machdep.h.
     42       1.1   mycroft  */
     43       1.1   mycroft 
     44      1.48   thorpej #include <sys/device.h>
     45      1.12       cgd #include <machine/bus.h>
     46      1.14       cgd #include <dev/pci/pcireg.h>
     47      1.12       cgd 
     48      1.14       cgd /*
     49      1.14       cgd  * Structures and definitions needed by the machine-dependent header.
     50      1.14       cgd  */
     51      1.14       cgd typedef u_int32_t pcireg_t;		/* configuration space register XXX */
     52      1.14       cgd struct pcibus_attach_args;
     53      1.50   thorpej struct pci_softc;
     54      1.14       cgd 
     55      1.48   thorpej #ifdef _KERNEL
     56      1.14       cgd /*
     57      1.14       cgd  * Machine-dependent definitions.
     58      1.14       cgd  */
     59      1.38       cgd #include <machine/pci_machdep.h>
     60       1.4       cgd 
     61      1.11       cgd /*
     62      1.11       cgd  * PCI bus attach arguments.
     63      1.11       cgd  */
     64      1.11       cgd struct pcibus_attach_args {
     65      1.19       cgd 	char		*pba_busname;	/* XXX should be common */
     66      1.16   thorpej 	bus_space_tag_t pba_iot;	/* pci i/o space tag */
     67      1.16   thorpej 	bus_space_tag_t pba_memt;	/* pci mem space tag */
     68      1.23   thorpej 	bus_dma_tag_t pba_dmat;		/* DMA tag */
     69      1.56      fvdl 	bus_dma_tag_t pba_dmat64;	/* DMA tag */
     70      1.14       cgd 	pci_chipset_tag_t pba_pc;
     71      1.19       cgd 	int		pba_flags;	/* flags; see below */
     72      1.11       cgd 
     73      1.11       cgd 	int		pba_bus;	/* PCI bus number */
     74      1.14       cgd 
     75      1.14       cgd 	/*
     76      1.50   thorpej 	 * Pointer to the pcitag of our parent bridge.  If there is no
     77      1.50   thorpej 	 * parent bridge, then we assume we are a root bus.
     78      1.50   thorpej 	 */
     79      1.50   thorpej 	pcitag_t	*pba_bridgetag;
     80      1.50   thorpej 
     81      1.50   thorpej 	/*
     82      1.14       cgd 	 * Interrupt swizzling information.  These fields
     83      1.14       cgd 	 * are only used by secondary busses.
     84      1.14       cgd 	 */
     85      1.14       cgd 	u_int		pba_intrswiz;	/* how to swizzle pins */
     86      1.14       cgd 	pcitag_t	pba_intrtag;	/* intr. appears to come from here */
     87      1.11       cgd };
     88      1.11       cgd 
     89      1.11       cgd /*
     90      1.11       cgd  * PCI device attach arguments.
     91      1.11       cgd  */
     92       1.1   mycroft struct pci_attach_args {
     93      1.16   thorpej 	bus_space_tag_t pa_iot;		/* pci i/o space tag */
     94      1.16   thorpej 	bus_space_tag_t pa_memt;	/* pci mem space tag */
     95      1.23   thorpej 	bus_dma_tag_t pa_dmat;		/* DMA tag */
     96      1.56      fvdl 	bus_dma_tag_t pa_dmat64;	/* DMA tag */
     97      1.14       cgd 	pci_chipset_tag_t pa_pc;
     98      1.19       cgd 	int		pa_flags;	/* flags; see below */
     99      1.12       cgd 
    100      1.46    bouyer 	u_int		pa_bus;
    101      1.15       cgd 	u_int		pa_device;
    102      1.15       cgd 	u_int		pa_function;
    103      1.11       cgd 	pcitag_t	pa_tag;
    104      1.11       cgd 	pcireg_t	pa_id, pa_class;
    105      1.14       cgd 
    106      1.14       cgd 	/*
    107      1.14       cgd 	 * Interrupt information.
    108      1.14       cgd 	 *
    109      1.14       cgd 	 * "Intrline" is used on systems whose firmware puts
    110      1.14       cgd 	 * the right routing data into the line register in
    111      1.14       cgd 	 * configuration space.  The rest are used on systems
    112      1.14       cgd 	 * that do not.
    113      1.14       cgd 	 */
    114      1.14       cgd 	u_int		pa_intrswiz;	/* how to swizzle pins if ppb */
    115      1.14       cgd 	pcitag_t	pa_intrtag;	/* intr. appears to come from here */
    116      1.14       cgd 	pci_intr_pin_t	pa_intrpin;	/* intr. appears on this pin */
    117      1.14       cgd 	pci_intr_line_t	pa_intrline;	/* intr. routing information */
    118      1.51  sommerfe 	pci_intr_pin_t  pa_rawintrpin; 	/* unswizzled pin */
    119       1.1   mycroft };
    120      1.19       cgd 
    121      1.19       cgd /*
    122      1.19       cgd  * Flags given in the bus and device attachment args.
    123      1.19       cgd  */
    124      1.19       cgd #define	PCI_FLAGS_IO_ENABLED	0x01		/* I/O space is enabled */
    125      1.19       cgd #define	PCI_FLAGS_MEM_ENABLED	0x02		/* memory space is enabled */
    126      1.41   thorpej #define	PCI_FLAGS_MRL_OKAY	0x04		/* Memory Read Line okay */
    127      1.41   thorpej #define	PCI_FLAGS_MRM_OKAY	0x08		/* Memory Read Multiple okay */
    128      1.41   thorpej #define	PCI_FLAGS_MWI_OKAY	0x10		/* Memory Write and Invalidate
    129      1.41   thorpej 						   okay */
    130      1.13       cgd 
    131      1.33       cgd /*
    132      1.33       cgd  * PCI device 'quirks'.
    133      1.33       cgd  *
    134      1.33       cgd  * In general strange behaviour which can be handled by a driver (e.g.
    135      1.33       cgd  * a bridge's inability to pass a type of access correctly) should be.
    136      1.33       cgd  * The quirks table should only contain information which impacts
    137      1.33       cgd  * the operation of the MI PCI code and which can't be pushed lower
    138      1.33       cgd  * (e.g. because it's unacceptable to require a driver to be present
    139      1.33       cgd  * for the information to be known).
    140      1.33       cgd  */
    141      1.33       cgd struct pci_quirkdata {
    142      1.33       cgd 	pci_vendor_id_t		vendor;		/* Vendor ID */
    143      1.33       cgd 	pci_product_id_t	product;	/* Product ID */
    144      1.33       cgd 	int			quirks;		/* quirks; see below */
    145      1.33       cgd };
    146      1.33       cgd #define	PCI_QUIRK_MULTIFUNCTION		1
    147  1.58.2.2     skrll #define	PCI_QUIRK_MONOFUNCTION		2
    148  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC(n)		(4 << n)
    149  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC0		PCI_QUIRK_SKIP_FUNC(0)
    150  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC1		PCI_QUIRK_SKIP_FUNC(1)
    151  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC2		PCI_QUIRK_SKIP_FUNC(2)
    152  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC3		PCI_QUIRK_SKIP_FUNC(3)
    153  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC4		PCI_QUIRK_SKIP_FUNC(4)
    154  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC5		PCI_QUIRK_SKIP_FUNC(5)
    155  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC6		PCI_QUIRK_SKIP_FUNC(6)
    156  1.58.2.2     skrll #define	PCI_QUIRK_SKIP_FUNC7		PCI_QUIRK_SKIP_FUNC(7)
    157      1.48   thorpej 
    158      1.48   thorpej struct pci_softc {
    159      1.48   thorpej 	struct device sc_dev;
    160      1.48   thorpej 	bus_space_tag_t sc_iot, sc_memt;
    161      1.51  sommerfe 	bus_dma_tag_t sc_dmat;
    162      1.56      fvdl 	bus_dma_tag_t sc_dmat64;
    163      1.51  sommerfe 	pci_chipset_tag_t sc_pc;
    164      1.48   thorpej 	int sc_bus, sc_maxndevs;
    165      1.50   thorpej 	pcitag_t *sc_bridgetag;
    166      1.48   thorpej 	u_int sc_intrswiz;
    167      1.48   thorpej 	pcitag_t sc_intrtag;
    168      1.48   thorpej 	int sc_flags;
    169      1.48   thorpej };
    170      1.48   thorpej 
    171      1.48   thorpej extern struct cfdriver pci_cd;
    172      1.24       jtk 
    173      1.13       cgd /*
    174      1.13       cgd  * Locators devices that attach to 'pcibus', as specified to config.
    175      1.13       cgd  */
    176      1.24       jtk #define	pcibuscf_bus		cf_loc[PCIBUSCF_BUS]
    177      1.24       jtk #define	PCIBUS_UNK_BUS		PCIBUSCF_BUS_DEFAULT	/* wildcarded 'bus' */
    178      1.13       cgd 
    179      1.13       cgd /*
    180      1.13       cgd  * Locators for PCI devices, as specified to config.
    181      1.13       cgd  */
    182      1.24       jtk #define	pcicf_dev		cf_loc[PCICF_DEV]
    183      1.24       jtk #define	PCI_UNK_DEV		PCICF_DEV_DEFAULT	/* wildcarded 'dev' */
    184      1.13       cgd 
    185      1.24       jtk #define	pcicf_function		cf_loc[PCICF_FUNCTION]
    186      1.24       jtk #define	PCI_UNK_FUNCTION	PCICF_FUNCTION_DEFAULT /* wildcarded 'function' */
    187       1.1   mycroft 
    188      1.14       cgd /*
    189      1.14       cgd  * Configuration space access and utility functions.  (Note that most,
    190      1.14       cgd  * e.g. make_tag, conf_read, conf_write are declared by pci_machdep.h.)
    191      1.14       cgd  */
    192      1.52  drochner int	pci_mapreg_probe __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t *));
    193      1.42   thorpej pcireg_t pci_mapreg_type __P((pci_chipset_tag_t, pcitag_t, int));
    194      1.27   thorpej int	pci_mapreg_info __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t,
    195      1.27   thorpej 	    bus_addr_t *, bus_size_t *, int *));
    196      1.21       cgd int	pci_mapreg_map __P((struct pci_attach_args *, int, pcireg_t, int,
    197      1.20       cgd 	    bus_space_tag_t *, bus_space_handle_t *, bus_addr_t *,
    198      1.16   thorpej 	    bus_size_t *));
    199      1.37  drochner 
    200      1.37  drochner int pci_get_capability __P((pci_chipset_tag_t, pcitag_t, int,
    201      1.37  drochner 			    int *, pcireg_t *));
    202      1.14       cgd 
    203      1.14       cgd /*
    204      1.14       cgd  * Helper functions for autoconfiguration.
    205      1.14       cgd  */
    206      1.49   thorpej int	pci_probe_device(struct pci_softc *, pcitag_t tag,
    207      1.49   thorpej 	    int (*)(struct pci_attach_args *), struct pci_attach_args *);
    208  1.58.2.2     skrll void	pci_devinfo __P((pcireg_t, pcireg_t, int, char *, size_t));
    209      1.31       cgd void	pci_conf_print __P((pci_chipset_tag_t, pcitag_t,
    210      1.31       cgd 	    void (*)(pci_chipset_tag_t, pcitag_t, const pcireg_t *)));
    211      1.33       cgd const struct pci_quirkdata *
    212      1.33       cgd 	pci_lookup_quirkdata __P((pci_vendor_id_t, pci_product_id_t));
    213      1.35  augustss 
    214      1.35  augustss /*
    215      1.48   thorpej  * Helper functions for user access to the PCI bus.
    216      1.48   thorpej  */
    217      1.48   thorpej struct proc;
    218      1.48   thorpej int	pci_devioctl __P((pci_chipset_tag_t, pcitag_t, u_long, caddr_t,
    219  1.58.2.1   darrenr 	    int flag, struct lwp *));
    220      1.53  tshiozak 
    221      1.53  tshiozak /*
    222      1.53  tshiozak  * Power Management (PCI 2.2)
    223      1.53  tshiozak  */
    224      1.53  tshiozak 
    225      1.53  tshiozak #define PCI_PWR_D0	0
    226      1.53  tshiozak #define PCI_PWR_D1	1
    227      1.53  tshiozak #define PCI_PWR_D2	2
    228      1.53  tshiozak #define PCI_PWR_D3	3
    229  1.58.2.2     skrll int	pci_powerstate __P((pci_chipset_tag_t, pcitag_t, const int *, int *));
    230      1.55   thorpej 
    231      1.55   thorpej /*
    232      1.55   thorpej  * Vital Product Data (PCI 2.2)
    233      1.55   thorpej  */
    234      1.55   thorpej int	pci_vpd_read __P((pci_chipset_tag_t, pcitag_t, int, int, pcireg_t *));
    235      1.55   thorpej int	pci_vpd_write __P((pci_chipset_tag_t, pcitag_t, int, int, pcireg_t *));
    236      1.48   thorpej 
    237      1.48   thorpej /*
    238      1.35  augustss  * Misc.
    239      1.35  augustss  */
    240  1.58.2.2     skrll const char *pci_findvendor __P((pcireg_t));
    241  1.58.2.2     skrll const char *pci_findproduct __P((pcireg_t));
    242      1.47      fvdl int	pci_find_device(struct pci_attach_args *pa,
    243      1.47      fvdl 			int (*match)(struct pci_attach_args *));
    244      1.56      fvdl int	pci_dma64_available(struct pci_attach_args *);
    245      1.56      fvdl 
    246      1.47      fvdl 
    247      1.48   thorpej #endif /* _KERNEL */
    248      1.12       cgd 
    249      1.12       cgd #endif /* _DEV_PCI_PCIVAR_H_ */
    250