pcscp.c revision 1.23 1 1.23 tsutsui /* $NetBSD: pcscp.c,v 1.23 2002/12/28 07:11:24 tsutsui Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*-
4 1.1 thorpej * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.1 thorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 thorpej * NASA Ames Research Center; Izumi Tsutsui.
10 1.1 thorpej *
11 1.1 thorpej * Redistribution and use in source and binary forms, with or without
12 1.1 thorpej * modification, are permitted provided that the following conditions
13 1.1 thorpej * are met:
14 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer.
16 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
18 1.1 thorpej * documentation and/or other materials provided with the distribution.
19 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
20 1.1 thorpej * must display the following acknowledgement:
21 1.1 thorpej * This product includes software developed by the NetBSD
22 1.1 thorpej * Foundation, Inc. and its contributors.
23 1.1 thorpej * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 thorpej * contributors may be used to endorse or promote products derived
25 1.1 thorpej * from this software without specific prior written permission.
26 1.1 thorpej *
27 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
38 1.1 thorpej */
39 1.1 thorpej
40 1.1 thorpej /*
41 1.1 thorpej * pcscp.c: device dependent code for AMD Am53c974 (PCscsi-PCI)
42 1.1 thorpej * written by Izumi Tsutsui <tsutsui (at) ceres.dti.ne.jp>
43 1.1 thorpej *
44 1.1 thorpej * Technical manual available at
45 1.3 thorpej * http://www.amd.com/products/npd/techdocs/techdocs.html
46 1.1 thorpej */
47 1.17 lukem
48 1.17 lukem #include <sys/cdefs.h>
49 1.23 tsutsui __KERNEL_RCSID(0, "$NetBSD: pcscp.c,v 1.23 2002/12/28 07:11:24 tsutsui Exp $");
50 1.1 thorpej
51 1.1 thorpej #include <sys/param.h>
52 1.1 thorpej #include <sys/systm.h>
53 1.1 thorpej #include <sys/device.h>
54 1.1 thorpej #include <sys/buf.h>
55 1.1 thorpej
56 1.1 thorpej #include <machine/bus.h>
57 1.1 thorpej #include <machine/intr.h>
58 1.6 thorpej #include <machine/endian.h>
59 1.1 thorpej
60 1.11 thorpej #include <uvm/uvm_extern.h>
61 1.11 thorpej
62 1.15 bouyer #include <dev/scsipi/scsipi_all.h>
63 1.1 thorpej #include <dev/scsipi/scsi_all.h>
64 1.1 thorpej #include <dev/scsipi/scsiconf.h>
65 1.1 thorpej
66 1.1 thorpej #include <dev/pci/pcireg.h>
67 1.1 thorpej #include <dev/pci/pcivar.h>
68 1.1 thorpej #include <dev/pci/pcidevs.h>
69 1.1 thorpej
70 1.1 thorpej #include <dev/ic/ncr53c9xreg.h>
71 1.1 thorpej #include <dev/ic/ncr53c9xvar.h>
72 1.1 thorpej
73 1.1 thorpej #include <dev/pci/pcscpreg.h>
74 1.1 thorpej
75 1.1 thorpej #define IO_MAP_REG 0x10
76 1.1 thorpej
77 1.1 thorpej struct pcscp_softc {
78 1.1 thorpej struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */
79 1.1 thorpej
80 1.1 thorpej bus_space_tag_t sc_st; /* bus space tag */
81 1.1 thorpej bus_space_handle_t sc_sh; /* bus space handle */
82 1.1 thorpej void *sc_ih; /* interrupt cookie */
83 1.1 thorpej
84 1.1 thorpej bus_dma_tag_t sc_dmat; /* DMA tag */
85 1.1 thorpej
86 1.1 thorpej bus_dmamap_t sc_xfermap; /* DMA map for transfers */
87 1.1 thorpej
88 1.1 thorpej u_int32_t *sc_mdladdr; /* MDL array */
89 1.1 thorpej bus_dmamap_t sc_mdldmap; /* MDL DMA map */
90 1.1 thorpej
91 1.1 thorpej int sc_active; /* DMA state */
92 1.1 thorpej int sc_datain; /* DMA Data Direction */
93 1.1 thorpej size_t sc_dmasize; /* DMA size */
94 1.1 thorpej char **sc_dmaaddr; /* DMA address */
95 1.1 thorpej size_t *sc_dmalen; /* DMA length */
96 1.1 thorpej };
97 1.1 thorpej
98 1.1 thorpej #define READ_DMAREG(sc, reg) \
99 1.1 thorpej bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
100 1.1 thorpej #define WRITE_DMAREG(sc, reg, var) \
101 1.1 thorpej bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (var))
102 1.1 thorpej
103 1.1 thorpej /* don't have to use MI defines in MD code... */
104 1.1 thorpej #undef NCR_READ_REG
105 1.9 tsutsui #define NCR_READ_REG(sc, reg) pcscp_read_reg((sc), (reg))
106 1.1 thorpej #undef NCR_WRITE_REG
107 1.9 tsutsui #define NCR_WRITE_REG(sc, reg, val) pcscp_write_reg((sc), (reg), (val))
108 1.1 thorpej
109 1.1 thorpej int pcscp_match __P((struct device *, struct cfdata *, void *));
110 1.23 tsutsui void pcscp_attach __P((struct device *, struct device *, void *));
111 1.1 thorpej
112 1.19 thorpej CFATTACH_DECL(pcscp, sizeof(struct pcscp_softc),
113 1.20 thorpej pcscp_match, pcscp_attach, NULL, NULL);
114 1.1 thorpej
115 1.1 thorpej /*
116 1.1 thorpej * Functions and the switch for the MI code.
117 1.1 thorpej */
118 1.1 thorpej
119 1.1 thorpej u_char pcscp_read_reg __P((struct ncr53c9x_softc *, int));
120 1.1 thorpej void pcscp_write_reg __P((struct ncr53c9x_softc *, int, u_char));
121 1.1 thorpej int pcscp_dma_isintr __P((struct ncr53c9x_softc *));
122 1.1 thorpej void pcscp_dma_reset __P((struct ncr53c9x_softc *));
123 1.1 thorpej int pcscp_dma_intr __P((struct ncr53c9x_softc *));
124 1.1 thorpej int pcscp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *,
125 1.1 thorpej size_t *, int, size_t *));
126 1.1 thorpej void pcscp_dma_go __P((struct ncr53c9x_softc *));
127 1.1 thorpej void pcscp_dma_stop __P((struct ncr53c9x_softc *));
128 1.1 thorpej int pcscp_dma_isactive __P((struct ncr53c9x_softc *));
129 1.1 thorpej
130 1.1 thorpej struct ncr53c9x_glue pcscp_glue = {
131 1.1 thorpej pcscp_read_reg,
132 1.1 thorpej pcscp_write_reg,
133 1.1 thorpej pcscp_dma_isintr,
134 1.1 thorpej pcscp_dma_reset,
135 1.1 thorpej pcscp_dma_intr,
136 1.1 thorpej pcscp_dma_setup,
137 1.1 thorpej pcscp_dma_go,
138 1.1 thorpej pcscp_dma_stop,
139 1.1 thorpej pcscp_dma_isactive,
140 1.1 thorpej NULL, /* gl_clear_latched_intr */
141 1.1 thorpej };
142 1.1 thorpej
143 1.1 thorpej int
144 1.1 thorpej pcscp_match(parent, match, aux)
145 1.1 thorpej struct device *parent;
146 1.1 thorpej struct cfdata *match;
147 1.1 thorpej void *aux;
148 1.1 thorpej {
149 1.1 thorpej struct pci_attach_args *pa = aux;
150 1.1 thorpej if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_AMD)
151 1.1 thorpej return 0;
152 1.1 thorpej
153 1.1 thorpej switch (PCI_PRODUCT(pa->pa_id)) {
154 1.1 thorpej case PCI_PRODUCT_AMD_PCSCSI_PCI:
155 1.1 thorpej return 1;
156 1.1 thorpej }
157 1.1 thorpej return 0;
158 1.1 thorpej }
159 1.1 thorpej
160 1.1 thorpej /*
161 1.1 thorpej * Attach this instance, and then all the sub-devices
162 1.1 thorpej */
163 1.1 thorpej void
164 1.1 thorpej pcscp_attach(parent, self, aux)
165 1.1 thorpej struct device *parent, *self;
166 1.1 thorpej void *aux;
167 1.1 thorpej {
168 1.1 thorpej struct pci_attach_args *pa = aux;
169 1.1 thorpej struct pcscp_softc *esc = (void *)self;
170 1.1 thorpej struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
171 1.22 tsutsui bus_space_tag_t iot;
172 1.22 tsutsui bus_space_handle_t ioh;
173 1.1 thorpej pci_intr_handle_t ih;
174 1.1 thorpej const char *intrstr;
175 1.1 thorpej pcireg_t csr;
176 1.1 thorpej bus_dma_segment_t seg;
177 1.1 thorpej int error, rseg;
178 1.22 tsutsui char devinfo[256];
179 1.1 thorpej
180 1.22 tsutsui pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
181 1.22 tsutsui printf(": %s\n", devinfo);
182 1.22 tsutsui
183 1.22 tsutsui if (pci_mapreg_map(pa, IO_MAP_REG, PCI_MAPREG_TYPE_IO, 0,
184 1.22 tsutsui &iot, &ioh, NULL, NULL)) {
185 1.22 tsutsui printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
186 1.1 thorpej return;
187 1.1 thorpej }
188 1.1 thorpej
189 1.1 thorpej sc->sc_glue = &pcscp_glue;
190 1.1 thorpej
191 1.22 tsutsui esc->sc_st = iot;
192 1.22 tsutsui esc->sc_sh = ioh;
193 1.1 thorpej esc->sc_dmat = pa->pa_dmat;
194 1.1 thorpej
195 1.1 thorpej csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
196 1.1 thorpej pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
197 1.1 thorpej csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
198 1.23 tsutsui
199 1.1 thorpej /*
200 1.1 thorpej * XXX More of this should be in ncr53c9x_attach(), but
201 1.1 thorpej * XXX should we really poke around the chip that much in
202 1.1 thorpej * XXX the MI code? Think about this more...
203 1.1 thorpej */
204 1.1 thorpej
205 1.1 thorpej /*
206 1.1 thorpej * Set up static configuration info.
207 1.1 thorpej */
208 1.1 thorpej
209 1.1 thorpej /*
210 1.1 thorpej * XXX should read configuration from EEPROM?
211 1.1 thorpej *
212 1.1 thorpej * MI ncr53c9x driver does not support configuration
213 1.1 thorpej * per each target device, though...
214 1.1 thorpej */
215 1.1 thorpej sc->sc_id = 7;
216 1.1 thorpej sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
217 1.1 thorpej sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_FE;
218 1.1 thorpej sc->sc_cfg3 = NCRAMDCFG3_IDM | NCRAMDCFG3_FCLK;
219 1.8 tsutsui sc->sc_cfg4 = NCRAMDCFG4_GE12NS | NCRAMDCFG4_RADE;
220 1.1 thorpej sc->sc_rev = NCR_VARIANT_AM53C974;
221 1.1 thorpej sc->sc_features = NCR_F_FASTSCSI;
222 1.4 mhitch sc->sc_cfg3_fscsi = NCRAMDCFG3_FSCSI;
223 1.1 thorpej sc->sc_freq = 40; /* MHz */
224 1.1 thorpej
225 1.1 thorpej /*
226 1.1 thorpej * XXX minsync and maxxfer _should_ be set up in MI code,
227 1.1 thorpej * XXX but it appears to have some dependency on what sort
228 1.1 thorpej * XXX of DMA we're hooked up to, etc.
229 1.1 thorpej */
230 1.1 thorpej
231 1.1 thorpej /*
232 1.1 thorpej * This is the value used to start sync negotiations
233 1.1 thorpej * Note that the NCR register "SYNCTP" is programmed
234 1.1 thorpej * in "clocks per byte", and has a minimum value of 4.
235 1.1 thorpej * The SCSI period used in negotiation is one-fourth
236 1.1 thorpej * of the time (in nanoseconds) needed to transfer one byte.
237 1.1 thorpej * Since the chip's clock is given in MHz, we have the following
238 1.1 thorpej * formula: 4 * period = (1000 / freq) * 4
239 1.1 thorpej */
240 1.1 thorpej
241 1.1 thorpej sc->sc_minsync = 1000 / sc->sc_freq;
242 1.1 thorpej
243 1.1 thorpej /* Really no limit, but since we want to fit into the TCR... */
244 1.1 thorpej sc->sc_maxxfer = 16 * 1024 * 1024;
245 1.1 thorpej
246 1.1 thorpej /* map and establish interrupt */
247 1.12 sommerfe if (pci_intr_map(pa, &ih)) {
248 1.1 thorpej printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
249 1.1 thorpej return;
250 1.1 thorpej }
251 1.1 thorpej
252 1.1 thorpej intrstr = pci_intr_string(pa->pa_pc, ih);
253 1.23 tsutsui esc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
254 1.10 tsutsui ncr53c9x_intr, esc);
255 1.1 thorpej if (esc->sc_ih == NULL) {
256 1.1 thorpej printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname);
257 1.1 thorpej if (intrstr != NULL)
258 1.1 thorpej printf(" at %s", intrstr);
259 1.1 thorpej printf("\n");
260 1.1 thorpej return;
261 1.1 thorpej }
262 1.1 thorpej if (intrstr != NULL)
263 1.1 thorpej printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
264 1.9 tsutsui intrstr);
265 1.1 thorpej
266 1.1 thorpej /*
267 1.1 thorpej * Create the DMA maps for the data transfers.
268 1.23 tsutsui */
269 1.1 thorpej
270 1.1 thorpej #define MDL_SEG_SIZE 0x1000 /* 4kbyte per segment */
271 1.1 thorpej #define MDL_SEG_OFFSET 0x0FFF
272 1.1 thorpej #define MDL_SIZE (MAXPHYS / MDL_SEG_SIZE + 1) /* no hardware limit? */
273 1.1 thorpej
274 1.1 thorpej if (bus_dmamap_create(esc->sc_dmat, MAXPHYS, MDL_SIZE, MAXPHYS, 0,
275 1.1 thorpej BUS_DMA_NOWAIT, &esc->sc_xfermap)) {
276 1.1 thorpej printf("%s: can't create dma maps\n", sc->sc_dev.dv_xname);
277 1.1 thorpej return;
278 1.1 thorpej }
279 1.1 thorpej
280 1.1 thorpej /*
281 1.1 thorpej * Allocate and map memory for the MDL.
282 1.1 thorpej */
283 1.1 thorpej
284 1.1 thorpej if ((error = bus_dmamem_alloc(esc->sc_dmat,
285 1.11 thorpej sizeof(u_int32_t) * MDL_SIZE, PAGE_SIZE, 0, &seg, 1, &rseg,
286 1.1 thorpej BUS_DMA_NOWAIT)) != 0) {
287 1.1 thorpej printf("%s: unable to allocate memory for the MDL, "
288 1.1 thorpej "error = %d\n", sc->sc_dev.dv_xname, error);
289 1.1 thorpej return;
290 1.1 thorpej }
291 1.1 thorpej if ((error = bus_dmamem_map(esc->sc_dmat, &seg, rseg,
292 1.1 thorpej sizeof(u_int32_t) * MDL_SIZE , (caddr_t *)&esc->sc_mdladdr,
293 1.1 thorpej BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
294 1.1 thorpej printf("%s: unable to map the MDL memory, error = %d\n",
295 1.9 tsutsui sc->sc_dev.dv_xname, error);
296 1.1 thorpej return;
297 1.1 thorpej }
298 1.1 thorpej if ((error = bus_dmamap_create(esc->sc_dmat,
299 1.1 thorpej sizeof(u_int32_t) * MDL_SIZE, 1, sizeof(u_int32_t) * MDL_SIZE,
300 1.1 thorpej 0, BUS_DMA_NOWAIT, &esc->sc_mdldmap)) != 0) {
301 1.1 thorpej printf("%s: unable to map_create for the MDL, error = %d\n",
302 1.9 tsutsui sc->sc_dev.dv_xname, error);
303 1.1 thorpej return;
304 1.1 thorpej }
305 1.1 thorpej if ((error = bus_dmamap_load(esc->sc_dmat, esc->sc_mdldmap,
306 1.1 thorpej esc->sc_mdladdr, sizeof(u_int32_t) * MDL_SIZE,
307 1.1 thorpej NULL, BUS_DMA_NOWAIT)) != 0) {
308 1.1 thorpej printf("%s: unable to load for the MDL, error = %d\n",
309 1.9 tsutsui sc->sc_dev.dv_xname, error);
310 1.1 thorpej return;
311 1.1 thorpej }
312 1.1 thorpej
313 1.1 thorpej /* Do the common parts of attachment. */
314 1.1 thorpej printf("%s", sc->sc_dev.dv_xname);
315 1.1 thorpej
316 1.15 bouyer sc->sc_adapter.adapt_minphys = minphys;
317 1.15 bouyer sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request;
318 1.15 bouyer ncr53c9x_attach(sc);
319 1.1 thorpej
320 1.1 thorpej /* Turn on target selection using the `dma' method */
321 1.14 petrov sc->sc_features |= NCR_F_DMASELECT;
322 1.1 thorpej }
323 1.1 thorpej
324 1.1 thorpej /*
325 1.1 thorpej * Glue functions.
326 1.1 thorpej */
327 1.1 thorpej
328 1.1 thorpej u_char
329 1.1 thorpej pcscp_read_reg(sc, reg)
330 1.1 thorpej struct ncr53c9x_softc *sc;
331 1.1 thorpej int reg;
332 1.1 thorpej {
333 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
334 1.1 thorpej
335 1.1 thorpej return bus_space_read_1(esc->sc_st, esc->sc_sh, reg << 2);
336 1.1 thorpej }
337 1.1 thorpej
338 1.1 thorpej void
339 1.1 thorpej pcscp_write_reg(sc, reg, v)
340 1.1 thorpej struct ncr53c9x_softc *sc;
341 1.1 thorpej int reg;
342 1.1 thorpej u_char v;
343 1.1 thorpej {
344 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
345 1.1 thorpej
346 1.1 thorpej bus_space_write_1(esc->sc_st, esc->sc_sh, reg << 2, v);
347 1.1 thorpej }
348 1.1 thorpej
349 1.1 thorpej int
350 1.1 thorpej pcscp_dma_isintr(sc)
351 1.1 thorpej struct ncr53c9x_softc *sc;
352 1.1 thorpej {
353 1.1 thorpej
354 1.1 thorpej return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT;
355 1.1 thorpej }
356 1.1 thorpej
357 1.1 thorpej void
358 1.1 thorpej pcscp_dma_reset(sc)
359 1.1 thorpej struct ncr53c9x_softc *sc;
360 1.1 thorpej {
361 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
362 1.1 thorpej
363 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE);
364 1.1 thorpej
365 1.1 thorpej esc->sc_active = 0;
366 1.1 thorpej }
367 1.1 thorpej
368 1.1 thorpej int
369 1.1 thorpej pcscp_dma_intr(sc)
370 1.1 thorpej struct ncr53c9x_softc *sc;
371 1.1 thorpej {
372 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
373 1.1 thorpej int trans, resid, i;
374 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap;
375 1.1 thorpej int datain = esc->sc_datain;
376 1.1 thorpej u_int32_t dmastat;
377 1.1 thorpej char *p = NULL;
378 1.1 thorpej
379 1.1 thorpej dmastat = READ_DMAREG(esc, DMA_STAT);
380 1.1 thorpej
381 1.1 thorpej if (dmastat & DMASTAT_ERR) {
382 1.1 thorpej /* XXX not tested... */
383 1.9 tsutsui WRITE_DMAREG(esc, DMA_CMD,
384 1.9 tsutsui DMACMD_ABORT | (datain ? DMACMD_DIR : 0));
385 1.1 thorpej
386 1.1 thorpej printf("%s: error: DMA error detected; Aborting.\n",
387 1.9 tsutsui sc->sc_dev.dv_xname);
388 1.1 thorpej bus_dmamap_unload(esc->sc_dmat, dmap);
389 1.1 thorpej return -1;
390 1.1 thorpej }
391 1.1 thorpej
392 1.1 thorpej if (dmastat & DMASTAT_ABT) {
393 1.1 thorpej /* XXX What should be done? */
394 1.1 thorpej printf("%s: dma_intr: DMA aborted.\n", sc->sc_dev.dv_xname);
395 1.9 tsutsui WRITE_DMAREG(esc, DMA_CMD,
396 1.9 tsutsui DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
397 1.1 thorpej esc->sc_active = 0;
398 1.1 thorpej return 0;
399 1.1 thorpej }
400 1.1 thorpej
401 1.1 thorpej /* This is an "assertion" :) */
402 1.1 thorpej if (esc->sc_active == 0)
403 1.1 thorpej panic("pcscp dmaintr: DMA wasn't active");
404 1.1 thorpej
405 1.1 thorpej /* DMA has stopped */
406 1.1 thorpej
407 1.1 thorpej esc->sc_active = 0;
408 1.1 thorpej
409 1.1 thorpej if (esc->sc_dmasize == 0) {
410 1.1 thorpej /* A "Transfer Pad" operation completed */
411 1.1 thorpej NCR_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n",
412 1.9 tsutsui NCR_READ_REG(sc, NCR_TCL) |
413 1.9 tsutsui (NCR_READ_REG(sc, NCR_TCM) << 8),
414 1.9 tsutsui NCR_READ_REG(sc, NCR_TCL),
415 1.9 tsutsui NCR_READ_REG(sc, NCR_TCM)));
416 1.1 thorpej return 0;
417 1.1 thorpej }
418 1.1 thorpej
419 1.1 thorpej resid = 0;
420 1.3 thorpej /*
421 1.3 thorpej * If a transfer onto the SCSI bus gets interrupted by the device
422 1.3 thorpej * (e.g. for a SAVEPOINTER message), the data in the FIFO counts
423 1.3 thorpej * as residual since the ESP counter registers get decremented as
424 1.3 thorpej * bytes are clocked into the FIFO.
425 1.3 thorpej */
426 1.3 thorpej if (!datain &&
427 1.3 thorpej (resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
428 1.3 thorpej NCR_DMA(("pcscp_dma_intr: empty esp FIFO of %d ", resid));
429 1.3 thorpej }
430 1.1 thorpej
431 1.1 thorpej if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
432 1.1 thorpej /*
433 1.1 thorpej * `Terminal count' is off, so read the residue
434 1.1 thorpej * out of the ESP counter registers.
435 1.1 thorpej */
436 1.1 thorpej if (datain) {
437 1.1 thorpej resid = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
438 1.1 thorpej while (resid > 1)
439 1.9 tsutsui resid =
440 1.9 tsutsui NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
441 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_BLAST | DMACMD_MDL |
442 1.9 tsutsui (datain ? DMACMD_DIR : 0));
443 1.1 thorpej
444 1.1 thorpej for (i = 0; i < 0x8000; i++) /* XXX 0x8000 ? */
445 1.1 thorpej if (READ_DMAREG(esc, DMA_STAT) & DMASTAT_BCMP)
446 1.1 thorpej break;
447 1.1 thorpej
448 1.1 thorpej /* See the below comments... */
449 1.1 thorpej if (resid)
450 1.1 thorpej p = *esc->sc_dmaaddr;
451 1.1 thorpej }
452 1.23 tsutsui
453 1.1 thorpej resid += (NCR_READ_REG(sc, NCR_TCL) |
454 1.9 tsutsui (NCR_READ_REG(sc, NCR_TCM) << 8) |
455 1.9 tsutsui ((sc->sc_cfg2 & NCRCFG2_FE)
456 1.9 tsutsui ? (NCR_READ_REG(sc, NCR_TCH) << 16) : 0));
457 1.1 thorpej
458 1.1 thorpej if (resid == 0 && esc->sc_dmasize == 65536 &&
459 1.1 thorpej (sc->sc_cfg2 & NCRCFG2_FE) == 0)
460 1.1 thorpej /* A transfer of 64K is encoded as `TCL=TCM=0' */
461 1.1 thorpej resid = 65536;
462 1.1 thorpej } else {
463 1.1 thorpej while((dmastat & DMASTAT_DONE) == 0)
464 1.1 thorpej dmastat = READ_DMAREG(esc, DMA_STAT);
465 1.1 thorpej }
466 1.1 thorpej
467 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
468 1.1 thorpej
469 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, dmap, 0, dmap->dm_mapsize,
470 1.9 tsutsui datain ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
471 1.1 thorpej bus_dmamap_unload(esc->sc_dmat, dmap);
472 1.1 thorpej
473 1.1 thorpej trans = esc->sc_dmasize - resid;
474 1.1 thorpej
475 1.1 thorpej /*
476 1.1 thorpej * From the technical manual notes:
477 1.1 thorpej *
478 1.1 thorpej * `In some odd byte conditions, one residual byte will be left
479 1.1 thorpej * in the SCSI FIFO, and the FIFO flags will never count to 0.
480 1.1 thorpej * When this happens, the residual byte should be retrieved
481 1.1 thorpej * via PIO following completion of the BLAST operation.'
482 1.1 thorpej */
483 1.23 tsutsui
484 1.1 thorpej if (p) {
485 1.1 thorpej p += trans;
486 1.1 thorpej *p = NCR_READ_REG(sc, NCR_FIFO);
487 1.1 thorpej trans++;
488 1.1 thorpej }
489 1.1 thorpej
490 1.1 thorpej if (trans < 0) { /* transferred < 0 ? */
491 1.1 thorpej #if 0
492 1.1 thorpej /*
493 1.1 thorpej * This situation can happen in perfectly normal operation
494 1.1 thorpej * if the ESP is reselected while using DMA to select
495 1.1 thorpej * another target. As such, don't print the warning.
496 1.1 thorpej */
497 1.1 thorpej printf("%s: xfer (%d) > req (%d)\n",
498 1.1 thorpej sc->sc_dev.dv_xname, trans, esc->sc_dmasize);
499 1.1 thorpej #endif
500 1.1 thorpej trans = esc->sc_dmasize;
501 1.1 thorpej }
502 1.1 thorpej
503 1.1 thorpej NCR_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n",
504 1.9 tsutsui NCR_READ_REG(sc, NCR_TCL),
505 1.9 tsutsui NCR_READ_REG(sc, NCR_TCM),
506 1.9 tsutsui (sc->sc_cfg2 & NCRCFG2_FE) ? NCR_READ_REG(sc, NCR_TCH) : 0,
507 1.9 tsutsui trans, resid));
508 1.1 thorpej
509 1.1 thorpej *esc->sc_dmalen -= trans;
510 1.1 thorpej *esc->sc_dmaaddr += trans;
511 1.1 thorpej
512 1.1 thorpej return 0;
513 1.1 thorpej }
514 1.1 thorpej
515 1.1 thorpej int
516 1.1 thorpej pcscp_dma_setup(sc, addr, len, datain, dmasize)
517 1.1 thorpej struct ncr53c9x_softc *sc;
518 1.1 thorpej caddr_t *addr;
519 1.1 thorpej size_t *len;
520 1.1 thorpej int datain;
521 1.1 thorpej size_t *dmasize;
522 1.1 thorpej {
523 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
524 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap;
525 1.1 thorpej u_int32_t *mdl;
526 1.1 thorpej int error, nseg, seg;
527 1.1 thorpej bus_addr_t s_offset, s_addr;
528 1.1 thorpej long rest, count;
529 1.1 thorpej
530 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
531 1.1 thorpej
532 1.1 thorpej esc->sc_dmaaddr = addr;
533 1.1 thorpej esc->sc_dmalen = len;
534 1.1 thorpej esc->sc_dmasize = *dmasize;
535 1.1 thorpej esc->sc_datain = datain;
536 1.1 thorpej
537 1.1 thorpej #ifdef DIAGNOSTIC
538 1.1 thorpej if ((*dmasize / MDL_SEG_SIZE) > MDL_SIZE)
539 1.1 thorpej panic("pcscp: transfer size too large");
540 1.1 thorpej #endif
541 1.1 thorpej
542 1.1 thorpej /*
543 1.3 thorpej * No need to set up DMA in `Transfer Pad' operation.
544 1.1 thorpej * (case of *dmasize == 0)
545 1.1 thorpej */
546 1.3 thorpej if (*dmasize == 0)
547 1.3 thorpej return 0;
548 1.1 thorpej
549 1.1 thorpej error = bus_dmamap_load(esc->sc_dmat, dmap, *esc->sc_dmaaddr,
550 1.9 tsutsui *esc->sc_dmalen, NULL,
551 1.13 thorpej ((sc->sc_nexus->xs->xs_control & XS_CTL_NOSLEEP) ?
552 1.16 thorpej BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | BUS_DMA_STREAMING |
553 1.16 thorpej ((sc->sc_nexus->xs->xs_control & XS_CTL_DATA_IN) ?
554 1.16 thorpej BUS_DMA_READ : BUS_DMA_WRITE));
555 1.1 thorpej if (error) {
556 1.1 thorpej printf("%s: unable to load dmamap, error = %d\n",
557 1.9 tsutsui sc->sc_dev.dv_xname, error);
558 1.1 thorpej return error;
559 1.1 thorpej }
560 1.1 thorpej
561 1.1 thorpej /* set transfer length */
562 1.1 thorpej WRITE_DMAREG(esc, DMA_STC, *dmasize);
563 1.1 thorpej
564 1.1 thorpej /* set up MDL */
565 1.1 thorpej mdl = esc->sc_mdladdr;
566 1.1 thorpej nseg = dmap->dm_nsegs;
567 1.1 thorpej
568 1.1 thorpej /* the first segment is possibly not aligned with 4k MDL boundary */
569 1.7 tsutsui count = dmap->dm_segs[0].ds_len;
570 1.7 tsutsui s_addr = dmap->dm_segs[0].ds_addr;
571 1.9 tsutsui s_offset = s_addr & MDL_SEG_OFFSET;
572 1.7 tsutsui s_addr -= s_offset;
573 1.1 thorpej rest = MDL_SEG_SIZE - s_offset;
574 1.1 thorpej
575 1.1 thorpej /* set the first MDL and offset */
576 1.1 thorpej WRITE_DMAREG(esc, DMA_SPA, s_offset);
577 1.6 thorpej *mdl++ = htole32(s_addr);
578 1.1 thorpej count -= rest;
579 1.23 tsutsui
580 1.1 thorpej /* rests of the first dmamap segment */
581 1.1 thorpej while (count > 0) {
582 1.1 thorpej s_addr += MDL_SEG_SIZE;
583 1.6 thorpej *mdl++ = htole32(s_addr);
584 1.1 thorpej count -= MDL_SEG_SIZE;
585 1.1 thorpej }
586 1.1 thorpej
587 1.1 thorpej /* the rest dmamap segments are aligned with 4k boundary */
588 1.1 thorpej for (seg = 1; seg < nseg; seg++) {
589 1.1 thorpej count = dmap->dm_segs[seg].ds_len;
590 1.1 thorpej s_addr = dmap->dm_segs[seg].ds_addr;
591 1.1 thorpej
592 1.1 thorpej /* first 4kbyte of each dmamap segment */
593 1.6 thorpej *mdl++ = htole32(s_addr);
594 1.1 thorpej count -= MDL_SEG_SIZE;
595 1.1 thorpej
596 1.1 thorpej /* trailing contiguous 4k frames of each dmamap segments */
597 1.1 thorpej while (count > 0) {
598 1.1 thorpej s_addr += MDL_SEG_SIZE;
599 1.6 thorpej *mdl++ = htole32(s_addr);
600 1.1 thorpej count -= MDL_SEG_SIZE;
601 1.1 thorpej }
602 1.1 thorpej }
603 1.1 thorpej
604 1.1 thorpej return 0;
605 1.1 thorpej }
606 1.1 thorpej
607 1.1 thorpej void
608 1.1 thorpej pcscp_dma_go(sc)
609 1.1 thorpej struct ncr53c9x_softc *sc;
610 1.1 thorpej {
611 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
612 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap, mdldmap = esc->sc_mdldmap;
613 1.1 thorpej int datain = esc->sc_datain;
614 1.3 thorpej
615 1.3 thorpej /* No DMA transfer in Transfer Pad operation */
616 1.3 thorpej if (esc->sc_dmasize == 0)
617 1.3 thorpej return;
618 1.1 thorpej
619 1.1 thorpej /* sync transfer buffer */
620 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, dmap, 0, dmap->dm_mapsize,
621 1.9 tsutsui datain ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
622 1.1 thorpej
623 1.1 thorpej /* sync MDL */
624 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, mdldmap, 0, mdldmap->dm_mapsize,
625 1.9 tsutsui BUS_DMASYNC_PREWRITE);
626 1.1 thorpej
627 1.1 thorpej /* set Starting MDL Address */
628 1.2 thorpej WRITE_DMAREG(esc, DMA_SMDLA, mdldmap->dm_segs[0].ds_addr);
629 1.1 thorpej
630 1.1 thorpej /* set DMA command register bits */
631 1.1 thorpej /* XXX DMA Transfer Interrupt Enable bit is broken? */
632 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | DMACMD_MDL |
633 1.9 tsutsui /* DMACMD_INTE | */
634 1.9 tsutsui (datain ? DMACMD_DIR : 0));
635 1.1 thorpej
636 1.1 thorpej /* issue DMA start command */
637 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_START | DMACMD_MDL |
638 1.9 tsutsui /* DMACMD_INTE | */
639 1.9 tsutsui (datain ? DMACMD_DIR : 0));
640 1.1 thorpej
641 1.1 thorpej esc->sc_active = 1;
642 1.1 thorpej }
643 1.1 thorpej
644 1.1 thorpej void
645 1.1 thorpej pcscp_dma_stop(sc)
646 1.1 thorpej struct ncr53c9x_softc *sc;
647 1.1 thorpej {
648 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
649 1.1 thorpej
650 1.1 thorpej /* dma stop */
651 1.1 thorpej /* XXX What should we do here ? */
652 1.9 tsutsui WRITE_DMAREG(esc, DMA_CMD,
653 1.9 tsutsui DMACMD_ABORT | (esc->sc_datain ? DMACMD_DIR : 0));
654 1.1 thorpej
655 1.1 thorpej esc->sc_active = 0;
656 1.1 thorpej }
657 1.1 thorpej
658 1.1 thorpej int
659 1.1 thorpej pcscp_dma_isactive(sc)
660 1.1 thorpej struct ncr53c9x_softc *sc;
661 1.1 thorpej {
662 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
663 1.1 thorpej
664 1.1 thorpej /* XXX should check esc->sc_active? */
665 1.1 thorpej if ((READ_DMAREG(esc, DMA_CMD) & DMACMD_CMD) != DMACMD_IDLE)
666 1.1 thorpej return 1;
667 1.1 thorpej return 0;
668 1.1 thorpej }
669