pcscp.c revision 1.46 1 1.46 drochner /* $NetBSD: pcscp.c,v 1.46 2012/01/30 19:41:22 drochner Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*-
4 1.1 thorpej * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.1 thorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 thorpej * NASA Ames Research Center; Izumi Tsutsui.
10 1.1 thorpej *
11 1.1 thorpej * Redistribution and use in source and binary forms, with or without
12 1.1 thorpej * modification, are permitted provided that the following conditions
13 1.1 thorpej * are met:
14 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer.
16 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
18 1.1 thorpej * documentation and/or other materials provided with the distribution.
19 1.1 thorpej *
20 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
31 1.1 thorpej */
32 1.1 thorpej
33 1.1 thorpej /*
34 1.1 thorpej * pcscp.c: device dependent code for AMD Am53c974 (PCscsi-PCI)
35 1.42 tsutsui * written by Izumi Tsutsui <tsutsui (at) NetBSD.org>
36 1.44 tsutsui *
37 1.44 tsutsui * Technical manual available at
38 1.44 tsutsui * http://www.amd.com/files/connectivitysolutions/networking/archivednetworking/19113.pdf
39 1.1 thorpej */
40 1.17 lukem
41 1.17 lukem #include <sys/cdefs.h>
42 1.46 drochner __KERNEL_RCSID(0, "$NetBSD: pcscp.c,v 1.46 2012/01/30 19:41:22 drochner Exp $");
43 1.1 thorpej
44 1.1 thorpej #include <sys/param.h>
45 1.1 thorpej #include <sys/systm.h>
46 1.1 thorpej #include <sys/device.h>
47 1.1 thorpej #include <sys/buf.h>
48 1.1 thorpej
49 1.40 ad #include <sys/bus.h>
50 1.40 ad #include <sys/intr.h>
51 1.1 thorpej
52 1.15 bouyer #include <dev/scsipi/scsipi_all.h>
53 1.1 thorpej #include <dev/scsipi/scsi_all.h>
54 1.1 thorpej #include <dev/scsipi/scsiconf.h>
55 1.1 thorpej
56 1.1 thorpej #include <dev/pci/pcireg.h>
57 1.1 thorpej #include <dev/pci/pcivar.h>
58 1.1 thorpej #include <dev/pci/pcidevs.h>
59 1.1 thorpej
60 1.1 thorpej #include <dev/ic/ncr53c9xreg.h>
61 1.1 thorpej #include <dev/ic/ncr53c9xvar.h>
62 1.1 thorpej
63 1.1 thorpej #include <dev/pci/pcscpreg.h>
64 1.1 thorpej
65 1.1 thorpej #define IO_MAP_REG 0x10
66 1.1 thorpej
67 1.1 thorpej struct pcscp_softc {
68 1.1 thorpej struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */
69 1.1 thorpej
70 1.1 thorpej bus_space_tag_t sc_st; /* bus space tag */
71 1.1 thorpej bus_space_handle_t sc_sh; /* bus space handle */
72 1.1 thorpej void *sc_ih; /* interrupt cookie */
73 1.1 thorpej
74 1.1 thorpej bus_dma_tag_t sc_dmat; /* DMA tag */
75 1.1 thorpej
76 1.1 thorpej bus_dmamap_t sc_xfermap; /* DMA map for transfers */
77 1.1 thorpej
78 1.31 tsutsui uint32_t *sc_mdladdr; /* MDL array */
79 1.1 thorpej bus_dmamap_t sc_mdldmap; /* MDL DMA map */
80 1.1 thorpej
81 1.1 thorpej int sc_active; /* DMA state */
82 1.1 thorpej int sc_datain; /* DMA Data Direction */
83 1.1 thorpej size_t sc_dmasize; /* DMA size */
84 1.42 tsutsui uint8_t **sc_dmaaddr; /* DMA address */
85 1.1 thorpej size_t *sc_dmalen; /* DMA length */
86 1.1 thorpej };
87 1.1 thorpej
88 1.1 thorpej #define READ_DMAREG(sc, reg) \
89 1.1 thorpej bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
90 1.1 thorpej #define WRITE_DMAREG(sc, reg, var) \
91 1.1 thorpej bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (var))
92 1.1 thorpej
93 1.28 tsutsui #define PCSCP_READ_REG(sc, reg) \
94 1.28 tsutsui bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg) << 2)
95 1.28 tsutsui #define PCSCP_WRITE_REG(sc, reg, val) \
96 1.28 tsutsui bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg) << 2, (val))
97 1.1 thorpej
98 1.42 tsutsui
99 1.42 tsutsui static int pcscp_match(device_t, cfdata_t, void *);
100 1.42 tsutsui static void pcscp_attach(device_t, device_t, void *);
101 1.42 tsutsui
102 1.42 tsutsui CFATTACH_DECL_NEW(pcscp, sizeof(struct pcscp_softc),
103 1.42 tsutsui pcscp_match, pcscp_attach, NULL, NULL);
104 1.42 tsutsui
105 1.1 thorpej /*
106 1.1 thorpej * Functions and the switch for the MI code.
107 1.1 thorpej */
108 1.1 thorpej
109 1.42 tsutsui static uint8_t pcscp_read_reg(struct ncr53c9x_softc *, int);
110 1.42 tsutsui static void pcscp_write_reg(struct ncr53c9x_softc *, int, uint8_t);
111 1.33 thorpej static int pcscp_dma_isintr(struct ncr53c9x_softc *);
112 1.33 thorpej static void pcscp_dma_reset(struct ncr53c9x_softc *);
113 1.33 thorpej static int pcscp_dma_intr(struct ncr53c9x_softc *);
114 1.42 tsutsui static int pcscp_dma_setup(struct ncr53c9x_softc *, uint8_t **, size_t *,
115 1.42 tsutsui int, size_t *);
116 1.33 thorpej static void pcscp_dma_go(struct ncr53c9x_softc *);
117 1.33 thorpej static void pcscp_dma_stop(struct ncr53c9x_softc *);
118 1.33 thorpej static int pcscp_dma_isactive(struct ncr53c9x_softc *);
119 1.1 thorpej
120 1.33 thorpej static struct ncr53c9x_glue pcscp_glue = {
121 1.1 thorpej pcscp_read_reg,
122 1.1 thorpej pcscp_write_reg,
123 1.1 thorpej pcscp_dma_isintr,
124 1.1 thorpej pcscp_dma_reset,
125 1.1 thorpej pcscp_dma_intr,
126 1.1 thorpej pcscp_dma_setup,
127 1.1 thorpej pcscp_dma_go,
128 1.1 thorpej pcscp_dma_stop,
129 1.1 thorpej pcscp_dma_isactive,
130 1.1 thorpej NULL, /* gl_clear_latched_intr */
131 1.1 thorpej };
132 1.1 thorpej
133 1.33 thorpej static int
134 1.42 tsutsui pcscp_match(device_t parent, cfdata_t cf, void *aux)
135 1.1 thorpej {
136 1.1 thorpej struct pci_attach_args *pa = aux;
137 1.30 tsutsui
138 1.1 thorpej if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_AMD)
139 1.1 thorpej return 0;
140 1.1 thorpej
141 1.1 thorpej switch (PCI_PRODUCT(pa->pa_id)) {
142 1.1 thorpej case PCI_PRODUCT_AMD_PCSCSI_PCI:
143 1.1 thorpej return 1;
144 1.1 thorpej }
145 1.1 thorpej return 0;
146 1.1 thorpej }
147 1.1 thorpej
148 1.1 thorpej /*
149 1.1 thorpej * Attach this instance, and then all the sub-devices
150 1.1 thorpej */
151 1.33 thorpej static void
152 1.42 tsutsui pcscp_attach(device_t parent, device_t self, void *aux)
153 1.1 thorpej {
154 1.42 tsutsui struct pcscp_softc *esc = device_private(self);
155 1.42 tsutsui struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
156 1.1 thorpej struct pci_attach_args *pa = aux;
157 1.22 tsutsui bus_space_tag_t iot;
158 1.22 tsutsui bus_space_handle_t ioh;
159 1.1 thorpej pci_intr_handle_t ih;
160 1.1 thorpej const char *intrstr;
161 1.1 thorpej pcireg_t csr;
162 1.1 thorpej bus_dma_segment_t seg;
163 1.1 thorpej int error, rseg;
164 1.1 thorpej
165 1.42 tsutsui sc->sc_dev = self;
166 1.46 drochner pci_aprint_devinfo(pa, NULL);
167 1.42 tsutsui aprint_normal("%s", device_xname(sc->sc_dev));
168 1.22 tsutsui
169 1.22 tsutsui if (pci_mapreg_map(pa, IO_MAP_REG, PCI_MAPREG_TYPE_IO, 0,
170 1.22 tsutsui &iot, &ioh, NULL, NULL)) {
171 1.42 tsutsui aprint_error(": unable to map registers\n");
172 1.1 thorpej return;
173 1.1 thorpej }
174 1.1 thorpej
175 1.1 thorpej sc->sc_glue = &pcscp_glue;
176 1.1 thorpej
177 1.22 tsutsui esc->sc_st = iot;
178 1.22 tsutsui esc->sc_sh = ioh;
179 1.1 thorpej esc->sc_dmat = pa->pa_dmat;
180 1.1 thorpej
181 1.1 thorpej csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
182 1.1 thorpej pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
183 1.1 thorpej csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
184 1.23 tsutsui
185 1.1 thorpej /*
186 1.1 thorpej * XXX More of this should be in ncr53c9x_attach(), but
187 1.1 thorpej * XXX should we really poke around the chip that much in
188 1.1 thorpej * XXX the MI code? Think about this more...
189 1.1 thorpej */
190 1.1 thorpej
191 1.1 thorpej /*
192 1.1 thorpej * Set up static configuration info.
193 1.1 thorpej */
194 1.1 thorpej
195 1.1 thorpej /*
196 1.1 thorpej * XXX should read configuration from EEPROM?
197 1.1 thorpej *
198 1.1 thorpej * MI ncr53c9x driver does not support configuration
199 1.1 thorpej * per each target device, though...
200 1.1 thorpej */
201 1.1 thorpej sc->sc_id = 7;
202 1.1 thorpej sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
203 1.1 thorpej sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_FE;
204 1.1 thorpej sc->sc_cfg3 = NCRAMDCFG3_IDM | NCRAMDCFG3_FCLK;
205 1.8 tsutsui sc->sc_cfg4 = NCRAMDCFG4_GE12NS | NCRAMDCFG4_RADE;
206 1.1 thorpej sc->sc_rev = NCR_VARIANT_AM53C974;
207 1.1 thorpej sc->sc_features = NCR_F_FASTSCSI;
208 1.4 mhitch sc->sc_cfg3_fscsi = NCRAMDCFG3_FSCSI;
209 1.1 thorpej sc->sc_freq = 40; /* MHz */
210 1.1 thorpej
211 1.1 thorpej /*
212 1.1 thorpej * XXX minsync and maxxfer _should_ be set up in MI code,
213 1.1 thorpej * XXX but it appears to have some dependency on what sort
214 1.1 thorpej * XXX of DMA we're hooked up to, etc.
215 1.1 thorpej */
216 1.1 thorpej
217 1.1 thorpej /*
218 1.1 thorpej * This is the value used to start sync negotiations
219 1.1 thorpej * Note that the NCR register "SYNCTP" is programmed
220 1.1 thorpej * in "clocks per byte", and has a minimum value of 4.
221 1.1 thorpej * The SCSI period used in negotiation is one-fourth
222 1.1 thorpej * of the time (in nanoseconds) needed to transfer one byte.
223 1.1 thorpej * Since the chip's clock is given in MHz, we have the following
224 1.1 thorpej * formula: 4 * period = (1000 / freq) * 4
225 1.1 thorpej */
226 1.1 thorpej
227 1.25 tsutsui sc->sc_minsync = 1000 / sc->sc_freq;
228 1.1 thorpej
229 1.1 thorpej /* Really no limit, but since we want to fit into the TCR... */
230 1.1 thorpej sc->sc_maxxfer = 16 * 1024 * 1024;
231 1.1 thorpej
232 1.1 thorpej /*
233 1.1 thorpej * Create the DMA maps for the data transfers.
234 1.23 tsutsui */
235 1.1 thorpej
236 1.1 thorpej #define MDL_SEG_SIZE 0x1000 /* 4kbyte per segment */
237 1.1 thorpej #define MDL_SEG_OFFSET 0x0FFF
238 1.1 thorpej #define MDL_SIZE (MAXPHYS / MDL_SEG_SIZE + 1) /* no hardware limit? */
239 1.1 thorpej
240 1.26 tsutsui if (bus_dmamap_create(esc->sc_dmat, MAXPHYS, MDL_SIZE, MDL_SEG_SIZE,
241 1.26 tsutsui MDL_SEG_SIZE, BUS_DMA_NOWAIT, &esc->sc_xfermap)) {
242 1.42 tsutsui aprint_error(": can't create DMA maps\n");
243 1.1 thorpej return;
244 1.1 thorpej }
245 1.1 thorpej
246 1.1 thorpej /*
247 1.1 thorpej * Allocate and map memory for the MDL.
248 1.1 thorpej */
249 1.1 thorpej
250 1.1 thorpej if ((error = bus_dmamem_alloc(esc->sc_dmat,
251 1.31 tsutsui sizeof(uint32_t) * MDL_SIZE, PAGE_SIZE, 0, &seg, 1, &rseg,
252 1.1 thorpej BUS_DMA_NOWAIT)) != 0) {
253 1.42 tsutsui aprint_error(": unable to allocate memory for the MDL,"
254 1.42 tsutsui " error = %d\n", error);
255 1.36 tsutsui goto fail_0;
256 1.1 thorpej }
257 1.1 thorpej if ((error = bus_dmamem_map(esc->sc_dmat, &seg, rseg,
258 1.39 christos sizeof(uint32_t) * MDL_SIZE , (void **)&esc->sc_mdladdr,
259 1.1 thorpej BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
260 1.42 tsutsui aprint_error(": unable to map the MDL memory, error = %d\n",
261 1.42 tsutsui error);
262 1.36 tsutsui goto fail_1;
263 1.1 thorpej }
264 1.25 tsutsui if ((error = bus_dmamap_create(esc->sc_dmat,
265 1.31 tsutsui sizeof(uint32_t) * MDL_SIZE, 1, sizeof(uint32_t) * MDL_SIZE,
266 1.1 thorpej 0, BUS_DMA_NOWAIT, &esc->sc_mdldmap)) != 0) {
267 1.42 tsutsui aprint_error(": unable to map_create for the MDL, error = %d\n",
268 1.27 tsutsui error);
269 1.36 tsutsui goto fail_2;
270 1.1 thorpej }
271 1.1 thorpej if ((error = bus_dmamap_load(esc->sc_dmat, esc->sc_mdldmap,
272 1.31 tsutsui esc->sc_mdladdr, sizeof(uint32_t) * MDL_SIZE,
273 1.1 thorpej NULL, BUS_DMA_NOWAIT)) != 0) {
274 1.42 tsutsui aprint_error(": unable to load for the MDL, error = %d\n",
275 1.42 tsutsui error);
276 1.36 tsutsui goto fail_3;
277 1.27 tsutsui }
278 1.27 tsutsui
279 1.27 tsutsui /* map and establish interrupt */
280 1.27 tsutsui if (pci_intr_map(pa, &ih)) {
281 1.42 tsutsui aprint_error(": couldn't map interrupt\n");
282 1.36 tsutsui goto fail_4;
283 1.27 tsutsui }
284 1.27 tsutsui
285 1.27 tsutsui intrstr = pci_intr_string(pa->pa_pc, ih);
286 1.27 tsutsui esc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
287 1.27 tsutsui ncr53c9x_intr, esc);
288 1.27 tsutsui if (esc->sc_ih == NULL) {
289 1.42 tsutsui aprint_error(": couldn't establish interrupt");
290 1.27 tsutsui if (intrstr != NULL)
291 1.42 tsutsui aprint_error(" at %s", intrstr);
292 1.42 tsutsui aprint_error("\n");
293 1.36 tsutsui goto fail_4;
294 1.1 thorpej }
295 1.42 tsutsui if (intrstr != NULL) {
296 1.42 tsutsui aprint_normal(": interrupting at %s\n", intrstr);
297 1.42 tsutsui aprint_normal("%s", device_xname(sc->sc_dev));
298 1.42 tsutsui }
299 1.1 thorpej
300 1.1 thorpej /* Do the common parts of attachment. */
301 1.15 bouyer sc->sc_adapter.adapt_minphys = minphys;
302 1.15 bouyer sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request;
303 1.15 bouyer ncr53c9x_attach(sc);
304 1.1 thorpej
305 1.24 wiz /* Turn on target selection using the `DMA' method */
306 1.14 petrov sc->sc_features |= NCR_F_DMASELECT;
307 1.35 tsutsui
308 1.35 tsutsui return;
309 1.35 tsutsui
310 1.36 tsutsui fail_4:
311 1.36 tsutsui bus_dmamap_unload(esc->sc_dmat, esc->sc_mdldmap);
312 1.35 tsutsui fail_3:
313 1.36 tsutsui bus_dmamap_destroy(esc->sc_dmat, esc->sc_mdldmap);
314 1.35 tsutsui fail_2:
315 1.39 christos bus_dmamem_unmap(esc->sc_dmat, (void *)esc->sc_mdldmap,
316 1.35 tsutsui sizeof(uint32_t) * MDL_SIZE);
317 1.36 tsutsui fail_1:
318 1.36 tsutsui bus_dmamem_free(esc->sc_dmat, &seg, rseg);
319 1.35 tsutsui fail_0:
320 1.36 tsutsui bus_dmamap_destroy(esc->sc_dmat, esc->sc_xfermap);
321 1.1 thorpej }
322 1.1 thorpej
323 1.1 thorpej /*
324 1.1 thorpej * Glue functions.
325 1.1 thorpej */
326 1.1 thorpej
327 1.42 tsutsui static uint8_t
328 1.30 tsutsui pcscp_read_reg(struct ncr53c9x_softc *sc, int reg)
329 1.1 thorpej {
330 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
331 1.1 thorpej
332 1.28 tsutsui return PCSCP_READ_REG(esc, reg);
333 1.1 thorpej }
334 1.1 thorpej
335 1.33 thorpej static void
336 1.42 tsutsui pcscp_write_reg(struct ncr53c9x_softc *sc, int reg, uint8_t v)
337 1.1 thorpej {
338 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
339 1.1 thorpej
340 1.28 tsutsui PCSCP_WRITE_REG(esc, reg, v);
341 1.1 thorpej }
342 1.1 thorpej
343 1.33 thorpej static int
344 1.30 tsutsui pcscp_dma_isintr(struct ncr53c9x_softc *sc)
345 1.1 thorpej {
346 1.28 tsutsui struct pcscp_softc *esc = (struct pcscp_softc *)sc;
347 1.1 thorpej
348 1.28 tsutsui return (PCSCP_READ_REG(esc, NCR_STAT) & NCRSTAT_INT) != 0;
349 1.1 thorpej }
350 1.1 thorpej
351 1.33 thorpej static void
352 1.30 tsutsui pcscp_dma_reset(struct ncr53c9x_softc *sc)
353 1.1 thorpej {
354 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
355 1.1 thorpej
356 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE);
357 1.1 thorpej
358 1.1 thorpej esc->sc_active = 0;
359 1.1 thorpej }
360 1.1 thorpej
361 1.33 thorpej static int
362 1.30 tsutsui pcscp_dma_intr(struct ncr53c9x_softc *sc)
363 1.1 thorpej {
364 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
365 1.1 thorpej int trans, resid, i;
366 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap;
367 1.1 thorpej int datain = esc->sc_datain;
368 1.31 tsutsui uint32_t dmastat;
369 1.42 tsutsui uint8_t *p = NULL;
370 1.1 thorpej
371 1.1 thorpej dmastat = READ_DMAREG(esc, DMA_STAT);
372 1.1 thorpej
373 1.1 thorpej if (dmastat & DMASTAT_ERR) {
374 1.1 thorpej /* XXX not tested... */
375 1.9 tsutsui WRITE_DMAREG(esc, DMA_CMD,
376 1.9 tsutsui DMACMD_ABORT | (datain ? DMACMD_DIR : 0));
377 1.1 thorpej
378 1.42 tsutsui printf("%s: error: DMA error detected; Aborting.\n",
379 1.42 tsutsui device_xname(sc->sc_dev));
380 1.1 thorpej bus_dmamap_unload(esc->sc_dmat, dmap);
381 1.1 thorpej return -1;
382 1.1 thorpej }
383 1.1 thorpej
384 1.1 thorpej if (dmastat & DMASTAT_ABT) {
385 1.1 thorpej /* XXX What should be done? */
386 1.42 tsutsui printf("%s: %s: DMA aborted.\n",
387 1.42 tsutsui device_xname(sc->sc_dev), __func__);
388 1.9 tsutsui WRITE_DMAREG(esc, DMA_CMD,
389 1.9 tsutsui DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
390 1.1 thorpej esc->sc_active = 0;
391 1.1 thorpej return 0;
392 1.1 thorpej }
393 1.1 thorpej
394 1.27 tsutsui #ifdef DIAGNOSTIC
395 1.1 thorpej /* This is an "assertion" :) */
396 1.1 thorpej if (esc->sc_active == 0)
397 1.42 tsutsui panic("%s: %s: DMA wasn't active",
398 1.42 tsutsui device_xname(sc->sc_dev), __func__);
399 1.27 tsutsui #endif
400 1.1 thorpej
401 1.1 thorpej /* DMA has stopped */
402 1.1 thorpej
403 1.1 thorpej esc->sc_active = 0;
404 1.1 thorpej
405 1.1 thorpej if (esc->sc_dmasize == 0) {
406 1.1 thorpej /* A "Transfer Pad" operation completed */
407 1.42 tsutsui NCR_DMA(("%s: discarded %d bytes (tcl=%d, tcm=%d)\n",
408 1.42 tsutsui __func__,
409 1.28 tsutsui PCSCP_READ_REG(esc, NCR_TCL) |
410 1.28 tsutsui (PCSCP_READ_REG(esc, NCR_TCM) << 8),
411 1.28 tsutsui PCSCP_READ_REG(esc, NCR_TCL),
412 1.28 tsutsui PCSCP_READ_REG(esc, NCR_TCM)));
413 1.1 thorpej return 0;
414 1.1 thorpej }
415 1.1 thorpej
416 1.1 thorpej resid = 0;
417 1.3 thorpej /*
418 1.3 thorpej * If a transfer onto the SCSI bus gets interrupted by the device
419 1.3 thorpej * (e.g. for a SAVEPOINTER message), the data in the FIFO counts
420 1.3 thorpej * as residual since the ESP counter registers get decremented as
421 1.3 thorpej * bytes are clocked into the FIFO.
422 1.3 thorpej */
423 1.3 thorpej if (!datain &&
424 1.28 tsutsui (resid = (PCSCP_READ_REG(esc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
425 1.42 tsutsui NCR_DMA(("%s: empty esp FIFO of %d ", __func__, resid));
426 1.3 thorpej }
427 1.1 thorpej
428 1.1 thorpej if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
429 1.1 thorpej /*
430 1.1 thorpej * `Terminal count' is off, so read the residue
431 1.1 thorpej * out of the ESP counter registers.
432 1.1 thorpej */
433 1.1 thorpej if (datain) {
434 1.28 tsutsui resid = PCSCP_READ_REG(esc, NCR_FFLAG) & NCRFIFO_FF;
435 1.1 thorpej while (resid > 1)
436 1.9 tsutsui resid =
437 1.28 tsutsui PCSCP_READ_REG(esc, NCR_FFLAG) & NCRFIFO_FF;
438 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_BLAST | DMACMD_MDL |
439 1.9 tsutsui (datain ? DMACMD_DIR : 0));
440 1.1 thorpej
441 1.42 tsutsui for (i = 0; i < 1000; i++) { /* XXX */
442 1.1 thorpej if (READ_DMAREG(esc, DMA_STAT) & DMASTAT_BCMP)
443 1.1 thorpej break;
444 1.42 tsutsui DELAY(1);
445 1.42 tsutsui }
446 1.1 thorpej
447 1.1 thorpej /* See the below comments... */
448 1.1 thorpej if (resid)
449 1.1 thorpej p = *esc->sc_dmaaddr;
450 1.1 thorpej }
451 1.23 tsutsui
452 1.28 tsutsui resid += PCSCP_READ_REG(esc, NCR_TCL) |
453 1.28 tsutsui (PCSCP_READ_REG(esc, NCR_TCM) << 8) |
454 1.28 tsutsui (PCSCP_READ_REG(esc, NCR_TCH) << 16);
455 1.1 thorpej } else {
456 1.27 tsutsui while ((dmastat & DMASTAT_DONE) == 0)
457 1.1 thorpej dmastat = READ_DMAREG(esc, DMA_STAT);
458 1.1 thorpej }
459 1.1 thorpej
460 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
461 1.1 thorpej
462 1.27 tsutsui /* sync MDL */
463 1.27 tsutsui bus_dmamap_sync(esc->sc_dmat, esc->sc_mdldmap,
464 1.31 tsutsui 0, sizeof(uint32_t) * dmap->dm_nsegs, BUS_DMASYNC_POSTWRITE);
465 1.27 tsutsui /* sync transfer buffer */
466 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, dmap, 0, dmap->dm_mapsize,
467 1.9 tsutsui datain ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
468 1.1 thorpej bus_dmamap_unload(esc->sc_dmat, dmap);
469 1.1 thorpej
470 1.1 thorpej trans = esc->sc_dmasize - resid;
471 1.1 thorpej
472 1.1 thorpej /*
473 1.1 thorpej * From the technical manual notes:
474 1.1 thorpej *
475 1.1 thorpej * `In some odd byte conditions, one residual byte will be left
476 1.1 thorpej * in the SCSI FIFO, and the FIFO flags will never count to 0.
477 1.1 thorpej * When this happens, the residual byte should be retrieved
478 1.1 thorpej * via PIO following completion of the BLAST operation.'
479 1.1 thorpej */
480 1.23 tsutsui
481 1.1 thorpej if (p) {
482 1.1 thorpej p += trans;
483 1.28 tsutsui *p = PCSCP_READ_REG(esc, NCR_FIFO);
484 1.1 thorpej trans++;
485 1.1 thorpej }
486 1.1 thorpej
487 1.1 thorpej if (trans < 0) { /* transferred < 0 ? */
488 1.1 thorpej #if 0
489 1.1 thorpej /*
490 1.1 thorpej * This situation can happen in perfectly normal operation
491 1.1 thorpej * if the ESP is reselected while using DMA to select
492 1.1 thorpej * another target. As such, don't print the warning.
493 1.1 thorpej */
494 1.1 thorpej printf("%s: xfer (%d) > req (%d)\n",
495 1.42 tsutsui device_xname(sc->sc_dev), trans, esc->sc_dmasize);
496 1.1 thorpej #endif
497 1.1 thorpej trans = esc->sc_dmasize;
498 1.1 thorpej }
499 1.1 thorpej
500 1.42 tsutsui NCR_DMA(("%s: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n",
501 1.42 tsutsui __func__,
502 1.28 tsutsui PCSCP_READ_REG(esc, NCR_TCL),
503 1.28 tsutsui PCSCP_READ_REG(esc, NCR_TCM),
504 1.28 tsutsui PCSCP_READ_REG(esc, NCR_TCH),
505 1.9 tsutsui trans, resid));
506 1.1 thorpej
507 1.1 thorpej *esc->sc_dmalen -= trans;
508 1.1 thorpej *esc->sc_dmaaddr += trans;
509 1.1 thorpej
510 1.1 thorpej return 0;
511 1.1 thorpej }
512 1.1 thorpej
513 1.33 thorpej static int
514 1.42 tsutsui pcscp_dma_setup(struct ncr53c9x_softc *sc, uint8_t **addr, size_t *len,
515 1.30 tsutsui int datain, size_t *dmasize)
516 1.1 thorpej {
517 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
518 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap;
519 1.31 tsutsui uint32_t *mdl;
520 1.1 thorpej int error, nseg, seg;
521 1.1 thorpej bus_addr_t s_offset, s_addr;
522 1.1 thorpej
523 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
524 1.1 thorpej
525 1.42 tsutsui esc->sc_dmaaddr = addr;
526 1.1 thorpej esc->sc_dmalen = len;
527 1.1 thorpej esc->sc_dmasize = *dmasize;
528 1.1 thorpej esc->sc_datain = datain;
529 1.1 thorpej
530 1.1 thorpej #ifdef DIAGNOSTIC
531 1.1 thorpej if ((*dmasize / MDL_SEG_SIZE) > MDL_SIZE)
532 1.42 tsutsui panic("%s: transfer size too large", device_xname(sc->sc_dev));
533 1.1 thorpej #endif
534 1.1 thorpej
535 1.1 thorpej /*
536 1.3 thorpej * No need to set up DMA in `Transfer Pad' operation.
537 1.1 thorpej * (case of *dmasize == 0)
538 1.1 thorpej */
539 1.3 thorpej if (*dmasize == 0)
540 1.3 thorpej return 0;
541 1.1 thorpej
542 1.1 thorpej error = bus_dmamap_load(esc->sc_dmat, dmap, *esc->sc_dmaaddr,
543 1.9 tsutsui *esc->sc_dmalen, NULL,
544 1.13 thorpej ((sc->sc_nexus->xs->xs_control & XS_CTL_NOSLEEP) ?
545 1.16 thorpej BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | BUS_DMA_STREAMING |
546 1.16 thorpej ((sc->sc_nexus->xs->xs_control & XS_CTL_DATA_IN) ?
547 1.16 thorpej BUS_DMA_READ : BUS_DMA_WRITE));
548 1.1 thorpej if (error) {
549 1.42 tsutsui printf("%s: unable to load dmamap, error = %d\n",
550 1.42 tsutsui device_xname(sc->sc_dev), error);
551 1.1 thorpej return error;
552 1.1 thorpej }
553 1.1 thorpej
554 1.1 thorpej /* set transfer length */
555 1.25 tsutsui WRITE_DMAREG(esc, DMA_STC, *dmasize);
556 1.1 thorpej
557 1.1 thorpej /* set up MDL */
558 1.1 thorpej mdl = esc->sc_mdladdr;
559 1.1 thorpej nseg = dmap->dm_nsegs;
560 1.1 thorpej
561 1.1 thorpej /* the first segment is possibly not aligned with 4k MDL boundary */
562 1.7 tsutsui s_addr = dmap->dm_segs[0].ds_addr;
563 1.9 tsutsui s_offset = s_addr & MDL_SEG_OFFSET;
564 1.7 tsutsui s_addr -= s_offset;
565 1.1 thorpej
566 1.1 thorpej /* set the first MDL and offset */
567 1.25 tsutsui WRITE_DMAREG(esc, DMA_SPA, s_offset);
568 1.6 thorpej *mdl++ = htole32(s_addr);
569 1.1 thorpej
570 1.1 thorpej /* the rest dmamap segments are aligned with 4k boundary */
571 1.26 tsutsui for (seg = 1; seg < nseg; seg++)
572 1.26 tsutsui *mdl++ = htole32(dmap->dm_segs[seg].ds_addr);
573 1.1 thorpej
574 1.1 thorpej return 0;
575 1.1 thorpej }
576 1.1 thorpej
577 1.33 thorpej static void
578 1.30 tsutsui pcscp_dma_go(struct ncr53c9x_softc *sc)
579 1.1 thorpej {
580 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
581 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap, mdldmap = esc->sc_mdldmap;
582 1.1 thorpej int datain = esc->sc_datain;
583 1.3 thorpej
584 1.3 thorpej /* No DMA transfer in Transfer Pad operation */
585 1.3 thorpej if (esc->sc_dmasize == 0)
586 1.3 thorpej return;
587 1.1 thorpej
588 1.1 thorpej /* sync transfer buffer */
589 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, dmap, 0, dmap->dm_mapsize,
590 1.9 tsutsui datain ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
591 1.1 thorpej
592 1.1 thorpej /* sync MDL */
593 1.27 tsutsui bus_dmamap_sync(esc->sc_dmat, mdldmap,
594 1.31 tsutsui 0, sizeof(uint32_t) * dmap->dm_nsegs, BUS_DMASYNC_PREWRITE);
595 1.1 thorpej
596 1.1 thorpej /* set Starting MDL Address */
597 1.2 thorpej WRITE_DMAREG(esc, DMA_SMDLA, mdldmap->dm_segs[0].ds_addr);
598 1.1 thorpej
599 1.1 thorpej /* set DMA command register bits */
600 1.1 thorpej /* XXX DMA Transfer Interrupt Enable bit is broken? */
601 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | DMACMD_MDL |
602 1.9 tsutsui /* DMACMD_INTE | */
603 1.9 tsutsui (datain ? DMACMD_DIR : 0));
604 1.1 thorpej
605 1.1 thorpej /* issue DMA start command */
606 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_START | DMACMD_MDL |
607 1.9 tsutsui /* DMACMD_INTE | */
608 1.9 tsutsui (datain ? DMACMD_DIR : 0));
609 1.1 thorpej
610 1.1 thorpej esc->sc_active = 1;
611 1.1 thorpej }
612 1.1 thorpej
613 1.33 thorpej static void
614 1.30 tsutsui pcscp_dma_stop(struct ncr53c9x_softc *sc)
615 1.1 thorpej {
616 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
617 1.1 thorpej
618 1.24 wiz /* DMA stop */
619 1.1 thorpej /* XXX What should we do here ? */
620 1.9 tsutsui WRITE_DMAREG(esc, DMA_CMD,
621 1.9 tsutsui DMACMD_ABORT | (esc->sc_datain ? DMACMD_DIR : 0));
622 1.32 tsutsui bus_dmamap_unload(esc->sc_dmat, esc->sc_xfermap);
623 1.1 thorpej
624 1.1 thorpej esc->sc_active = 0;
625 1.1 thorpej }
626 1.1 thorpej
627 1.33 thorpej static int
628 1.30 tsutsui pcscp_dma_isactive(struct ncr53c9x_softc *sc)
629 1.1 thorpej {
630 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
631 1.1 thorpej
632 1.1 thorpej /* XXX should check esc->sc_active? */
633 1.1 thorpej if ((READ_DMAREG(esc, DMA_CMD) & DMACMD_CMD) != DMACMD_IDLE)
634 1.1 thorpej return 1;
635 1.1 thorpej return 0;
636 1.1 thorpej }
637