pcscp.c revision 1.5.2.2 1 1.5.2.2 thorpej /* $NetBSD: pcscp.c,v 1.5.2.2 1999/10/20 20:43:21 thorpej Exp $ */
2 1.1 thorpej
3 1.1 thorpej /*-
4 1.1 thorpej * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
5 1.1 thorpej * All rights reserved.
6 1.1 thorpej *
7 1.1 thorpej * This code is derived from software contributed to The NetBSD Foundation
8 1.1 thorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 thorpej * NASA Ames Research Center; Izumi Tsutsui.
10 1.1 thorpej *
11 1.1 thorpej * Redistribution and use in source and binary forms, with or without
12 1.1 thorpej * modification, are permitted provided that the following conditions
13 1.1 thorpej * are met:
14 1.1 thorpej * 1. Redistributions of source code must retain the above copyright
15 1.1 thorpej * notice, this list of conditions and the following disclaimer.
16 1.1 thorpej * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 thorpej * notice, this list of conditions and the following disclaimer in the
18 1.1 thorpej * documentation and/or other materials provided with the distribution.
19 1.1 thorpej * 3. All advertising materials mentioning features or use of this software
20 1.1 thorpej * must display the following acknowledgement:
21 1.1 thorpej * This product includes software developed by the NetBSD
22 1.1 thorpej * Foundation, Inc. and its contributors.
23 1.1 thorpej * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 thorpej * contributors may be used to endorse or promote products derived
25 1.1 thorpej * from this software without specific prior written permission.
26 1.1 thorpej *
27 1.1 thorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 thorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 thorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 thorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 thorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 thorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 thorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 thorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 thorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 thorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 thorpej * POSSIBILITY OF SUCH DAMAGE.
38 1.1 thorpej */
39 1.1 thorpej
40 1.1 thorpej /*
41 1.1 thorpej * pcscp.c: device dependent code for AMD Am53c974 (PCscsi-PCI)
42 1.1 thorpej * written by Izumi Tsutsui <tsutsui (at) ceres.dti.ne.jp>
43 1.1 thorpej *
44 1.1 thorpej * Technical manual available at
45 1.3 thorpej * http://www.amd.com/products/npd/techdocs/techdocs.html
46 1.1 thorpej */
47 1.1 thorpej
48 1.1 thorpej #include <sys/param.h>
49 1.1 thorpej #include <sys/systm.h>
50 1.1 thorpej #include <sys/device.h>
51 1.1 thorpej #include <sys/buf.h>
52 1.1 thorpej
53 1.1 thorpej #include <machine/bus.h>
54 1.1 thorpej #include <machine/intr.h>
55 1.3 thorpej #if BYTE_ORDER == BIG_ENDIAN
56 1.3 thorpej #include <machine/bswap.h>
57 1.3 thorpej #endif
58 1.1 thorpej
59 1.1 thorpej #include <dev/scsipi/scsi_all.h>
60 1.1 thorpej #include <dev/scsipi/scsipi_all.h>
61 1.1 thorpej #include <dev/scsipi/scsiconf.h>
62 1.1 thorpej #include <dev/scsipi/scsi_message.h>
63 1.1 thorpej
64 1.1 thorpej #include <dev/pci/pcireg.h>
65 1.1 thorpej #include <dev/pci/pcivar.h>
66 1.1 thorpej #include <dev/pci/pcidevs.h>
67 1.1 thorpej
68 1.1 thorpej #include <dev/ic/ncr53c9xreg.h>
69 1.1 thorpej #include <dev/ic/ncr53c9xvar.h>
70 1.1 thorpej
71 1.1 thorpej #include <dev/pci/pcscpreg.h>
72 1.1 thorpej
73 1.1 thorpej #define IO_MAP_REG 0x10
74 1.1 thorpej #define MEM_MAP_REG 0x14
75 1.1 thorpej
76 1.1 thorpej struct pcscp_softc {
77 1.1 thorpej struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */
78 1.1 thorpej
79 1.1 thorpej bus_space_tag_t sc_st; /* bus space tag */
80 1.1 thorpej bus_space_handle_t sc_sh; /* bus space handle */
81 1.1 thorpej void *sc_ih; /* interrupt cookie */
82 1.1 thorpej
83 1.1 thorpej bus_dma_tag_t sc_dmat; /* DMA tag */
84 1.1 thorpej
85 1.1 thorpej bus_dmamap_t sc_xfermap; /* DMA map for transfers */
86 1.1 thorpej
87 1.1 thorpej u_int32_t *sc_mdladdr; /* MDL array */
88 1.1 thorpej bus_dmamap_t sc_mdldmap; /* MDL DMA map */
89 1.1 thorpej
90 1.1 thorpej int sc_active; /* DMA state */
91 1.1 thorpej int sc_datain; /* DMA Data Direction */
92 1.1 thorpej size_t sc_dmasize; /* DMA size */
93 1.1 thorpej char **sc_dmaaddr; /* DMA address */
94 1.1 thorpej size_t *sc_dmalen; /* DMA length */
95 1.1 thorpej };
96 1.1 thorpej
97 1.1 thorpej #define READ_DMAREG(sc, reg) \
98 1.1 thorpej bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
99 1.1 thorpej #define WRITE_DMAREG(sc, reg, var) \
100 1.1 thorpej bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (var))
101 1.1 thorpej
102 1.1 thorpej /* don't have to use MI defines in MD code... */
103 1.1 thorpej #undef NCR_READ_REG
104 1.1 thorpej #define NCR_READ_REG(sc, reg) pcscp_read_reg((sc), (reg))
105 1.1 thorpej #undef NCR_WRITE_REG
106 1.1 thorpej #define NCR_WRITE_REG(sc, reg, val) pcscp_write_reg((sc), (reg), (val))
107 1.1 thorpej
108 1.1 thorpej int pcscp_match __P((struct device *, struct cfdata *, void *));
109 1.1 thorpej void pcscp_attach __P((struct device *, struct device *, void *));
110 1.1 thorpej
111 1.1 thorpej struct cfattach pcscp_ca = {
112 1.1 thorpej sizeof(struct pcscp_softc), pcscp_match, pcscp_attach
113 1.1 thorpej };
114 1.1 thorpej
115 1.1 thorpej /*
116 1.1 thorpej * Functions and the switch for the MI code.
117 1.1 thorpej */
118 1.1 thorpej
119 1.1 thorpej u_char pcscp_read_reg __P((struct ncr53c9x_softc *, int));
120 1.1 thorpej void pcscp_write_reg __P((struct ncr53c9x_softc *, int, u_char));
121 1.1 thorpej int pcscp_dma_isintr __P((struct ncr53c9x_softc *));
122 1.1 thorpej void pcscp_dma_reset __P((struct ncr53c9x_softc *));
123 1.1 thorpej int pcscp_dma_intr __P((struct ncr53c9x_softc *));
124 1.1 thorpej int pcscp_dma_setup __P((struct ncr53c9x_softc *, caddr_t *,
125 1.1 thorpej size_t *, int, size_t *));
126 1.1 thorpej void pcscp_dma_go __P((struct ncr53c9x_softc *));
127 1.1 thorpej void pcscp_dma_stop __P((struct ncr53c9x_softc *));
128 1.1 thorpej int pcscp_dma_isactive __P((struct ncr53c9x_softc *));
129 1.1 thorpej
130 1.1 thorpej struct ncr53c9x_glue pcscp_glue = {
131 1.1 thorpej pcscp_read_reg,
132 1.1 thorpej pcscp_write_reg,
133 1.1 thorpej pcscp_dma_isintr,
134 1.1 thorpej pcscp_dma_reset,
135 1.1 thorpej pcscp_dma_intr,
136 1.1 thorpej pcscp_dma_setup,
137 1.1 thorpej pcscp_dma_go,
138 1.1 thorpej pcscp_dma_stop,
139 1.1 thorpej pcscp_dma_isactive,
140 1.1 thorpej NULL, /* gl_clear_latched_intr */
141 1.1 thorpej };
142 1.1 thorpej
143 1.1 thorpej int
144 1.1 thorpej pcscp_match(parent, match, aux)
145 1.1 thorpej struct device *parent;
146 1.1 thorpej struct cfdata *match;
147 1.1 thorpej void *aux;
148 1.1 thorpej {
149 1.1 thorpej struct pci_attach_args *pa = aux;
150 1.1 thorpej if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_AMD)
151 1.1 thorpej return 0;
152 1.1 thorpej
153 1.1 thorpej switch (PCI_PRODUCT(pa->pa_id)) {
154 1.1 thorpej case PCI_PRODUCT_AMD_PCSCSI_PCI:
155 1.1 thorpej #if 0
156 1.1 thorpej case PCI_PRODUCT_AMD_PCNETS_PCI:
157 1.1 thorpej #endif
158 1.1 thorpej return 1;
159 1.1 thorpej }
160 1.1 thorpej return 0;
161 1.1 thorpej }
162 1.1 thorpej
163 1.1 thorpej /*
164 1.1 thorpej * Attach this instance, and then all the sub-devices
165 1.1 thorpej */
166 1.1 thorpej void
167 1.1 thorpej pcscp_attach(parent, self, aux)
168 1.1 thorpej struct device *parent, *self;
169 1.1 thorpej void *aux;
170 1.1 thorpej {
171 1.1 thorpej struct pci_attach_args *pa = aux;
172 1.1 thorpej struct pcscp_softc *esc = (void *)self;
173 1.1 thorpej struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
174 1.1 thorpej bus_space_tag_t st, iot, memt;
175 1.1 thorpej bus_space_handle_t sh, ioh, memh;
176 1.1 thorpej int ioh_valid, memh_valid;
177 1.1 thorpej pci_intr_handle_t ih;
178 1.1 thorpej const char *intrstr;
179 1.1 thorpej pcireg_t csr;
180 1.1 thorpej bus_dma_segment_t seg;
181 1.1 thorpej int error, rseg;
182 1.1 thorpej
183 1.1 thorpej ioh_valid = (pci_mapreg_map(pa, IO_MAP_REG,
184 1.1 thorpej PCI_MAPREG_TYPE_IO, 0,
185 1.1 thorpej &iot, &ioh, NULL, NULL) == 0);
186 1.1 thorpej #if 0 /* XXX cannot use memory map? */
187 1.1 thorpej memh_valid = (pci_mapreg_map(pa, MEM_MAP_REG,
188 1.1 thorpej PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
189 1.1 thorpej &memt, &memh, NULL, NULL) == 0);
190 1.1 thorpej #else
191 1.1 thorpej memh_valid = 0;
192 1.1 thorpej #endif
193 1.1 thorpej
194 1.1 thorpej if (memh_valid) {
195 1.1 thorpej st = memt;
196 1.1 thorpej sh = memh;
197 1.1 thorpej } else if (ioh_valid) {
198 1.1 thorpej st = iot;
199 1.1 thorpej sh = ioh;
200 1.1 thorpej } else {
201 1.1 thorpej printf(": unable to map registers\n");
202 1.1 thorpej return;
203 1.1 thorpej }
204 1.1 thorpej printf("\n");
205 1.1 thorpej
206 1.1 thorpej sc->sc_glue = &pcscp_glue;
207 1.1 thorpej
208 1.1 thorpej esc->sc_st = st;
209 1.1 thorpej esc->sc_sh = sh;
210 1.1 thorpej esc->sc_dmat = pa->pa_dmat;
211 1.1 thorpej
212 1.1 thorpej csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
213 1.1 thorpej pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
214 1.1 thorpej csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
215 1.1 thorpej
216 1.1 thorpej /*
217 1.1 thorpej * XXX More of this should be in ncr53c9x_attach(), but
218 1.1 thorpej * XXX should we really poke around the chip that much in
219 1.1 thorpej * XXX the MI code? Think about this more...
220 1.1 thorpej */
221 1.1 thorpej
222 1.1 thorpej /*
223 1.1 thorpej * Set up static configuration info.
224 1.1 thorpej */
225 1.1 thorpej
226 1.1 thorpej /*
227 1.1 thorpej * XXX should read configuration from EEPROM?
228 1.1 thorpej *
229 1.1 thorpej * MI ncr53c9x driver does not support configuration
230 1.1 thorpej * per each target device, though...
231 1.1 thorpej */
232 1.1 thorpej sc->sc_id = 7;
233 1.1 thorpej sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
234 1.1 thorpej sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_FE;
235 1.1 thorpej sc->sc_cfg3 = NCRAMDCFG3_IDM | NCRAMDCFG3_FCLK;
236 1.1 thorpej sc->sc_rev = NCR_VARIANT_AM53C974;
237 1.1 thorpej sc->sc_features = NCR_F_FASTSCSI;
238 1.4 mhitch sc->sc_cfg3_fscsi = NCRAMDCFG3_FSCSI;
239 1.1 thorpej sc->sc_freq = 40; /* MHz */
240 1.1 thorpej
241 1.1 thorpej /*
242 1.1 thorpej * XXX minsync and maxxfer _should_ be set up in MI code,
243 1.1 thorpej * XXX but it appears to have some dependency on what sort
244 1.1 thorpej * XXX of DMA we're hooked up to, etc.
245 1.1 thorpej */
246 1.1 thorpej
247 1.1 thorpej /*
248 1.1 thorpej * This is the value used to start sync negotiations
249 1.1 thorpej * Note that the NCR register "SYNCTP" is programmed
250 1.1 thorpej * in "clocks per byte", and has a minimum value of 4.
251 1.1 thorpej * The SCSI period used in negotiation is one-fourth
252 1.1 thorpej * of the time (in nanoseconds) needed to transfer one byte.
253 1.1 thorpej * Since the chip's clock is given in MHz, we have the following
254 1.1 thorpej * formula: 4 * period = (1000 / freq) * 4
255 1.1 thorpej */
256 1.1 thorpej
257 1.1 thorpej sc->sc_minsync = 1000 / sc->sc_freq;
258 1.1 thorpej
259 1.1 thorpej /* Really no limit, but since we want to fit into the TCR... */
260 1.1 thorpej sc->sc_maxxfer = 16 * 1024 * 1024;
261 1.1 thorpej
262 1.1 thorpej /* map and establish interrupt */
263 1.1 thorpej if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
264 1.1 thorpej pa->pa_intrline, &ih)) {
265 1.1 thorpej printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
266 1.1 thorpej return;
267 1.1 thorpej }
268 1.1 thorpej
269 1.1 thorpej intrstr = pci_intr_string(pa->pa_pc, ih);
270 1.1 thorpej esc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
271 1.1 thorpej (int (*)(void *))ncr53c9x_intr, esc);
272 1.1 thorpej if (esc->sc_ih == NULL) {
273 1.1 thorpej printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname);
274 1.1 thorpej if (intrstr != NULL)
275 1.1 thorpej printf(" at %s", intrstr);
276 1.1 thorpej printf("\n");
277 1.1 thorpej return;
278 1.1 thorpej }
279 1.1 thorpej if (intrstr != NULL)
280 1.1 thorpej printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
281 1.1 thorpej intrstr);
282 1.1 thorpej
283 1.1 thorpej /*
284 1.1 thorpej * Create the DMA maps for the data transfers.
285 1.1 thorpej */
286 1.1 thorpej
287 1.1 thorpej #define MDL_SEG_SIZE 0x1000 /* 4kbyte per segment */
288 1.1 thorpej #define MDL_SEG_OFFSET 0x0FFF
289 1.1 thorpej #define MDL_SIZE (MAXPHYS / MDL_SEG_SIZE + 1) /* no hardware limit? */
290 1.1 thorpej
291 1.1 thorpej if (bus_dmamap_create(esc->sc_dmat, MAXPHYS, MDL_SIZE, MAXPHYS, 0,
292 1.1 thorpej BUS_DMA_NOWAIT, &esc->sc_xfermap)) {
293 1.1 thorpej printf("%s: can't create dma maps\n", sc->sc_dev.dv_xname);
294 1.1 thorpej return;
295 1.1 thorpej }
296 1.1 thorpej
297 1.1 thorpej /*
298 1.1 thorpej * Allocate and map memory for the MDL.
299 1.1 thorpej */
300 1.1 thorpej
301 1.1 thorpej if ((error = bus_dmamem_alloc(esc->sc_dmat,
302 1.1 thorpej sizeof(u_int32_t) * MDL_SIZE, NBPG, 0, &seg, 1, &rseg,
303 1.1 thorpej BUS_DMA_NOWAIT)) != 0) {
304 1.1 thorpej printf("%s: unable to allocate memory for the MDL, "
305 1.1 thorpej "error = %d\n", sc->sc_dev.dv_xname, error);
306 1.1 thorpej return;
307 1.1 thorpej }
308 1.1 thorpej if ((error = bus_dmamem_map(esc->sc_dmat, &seg, rseg,
309 1.1 thorpej sizeof(u_int32_t) * MDL_SIZE , (caddr_t *)&esc->sc_mdladdr,
310 1.1 thorpej BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
311 1.1 thorpej printf("%s: unable to map the MDL memory, error = %d\n",
312 1.1 thorpej sc->sc_dev.dv_xname, error);
313 1.1 thorpej return;
314 1.1 thorpej }
315 1.1 thorpej if ((error = bus_dmamap_create(esc->sc_dmat,
316 1.1 thorpej sizeof(u_int32_t) * MDL_SIZE, 1, sizeof(u_int32_t) * MDL_SIZE,
317 1.1 thorpej 0, BUS_DMA_NOWAIT, &esc->sc_mdldmap)) != 0) {
318 1.1 thorpej printf("%s: unable to map_create for the MDL, error = %d\n",
319 1.1 thorpej sc->sc_dev.dv_xname, error);
320 1.1 thorpej return;
321 1.1 thorpej }
322 1.1 thorpej if ((error = bus_dmamap_load(esc->sc_dmat, esc->sc_mdldmap,
323 1.1 thorpej esc->sc_mdladdr, sizeof(u_int32_t) * MDL_SIZE,
324 1.1 thorpej NULL, BUS_DMA_NOWAIT)) != 0) {
325 1.1 thorpej printf("%s: unable to load for the MDL, error = %d\n",
326 1.1 thorpej sc->sc_dev.dv_xname, error);
327 1.1 thorpej return;
328 1.1 thorpej }
329 1.1 thorpej
330 1.5.2.1 thorpej /* Turn on target selection using the `dma' method */
331 1.5.2.1 thorpej ncr53c9x_dmaselect = 1;
332 1.5.2.1 thorpej
333 1.1 thorpej /* Do the common parts of attachment. */
334 1.1 thorpej printf("%s", sc->sc_dev.dv_xname);
335 1.1 thorpej
336 1.5.2.1 thorpej sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request;
337 1.5.2.1 thorpej sc->sc_adapter.adapt_minphys = minphys;
338 1.1 thorpej
339 1.5.2.1 thorpej ncr53c9x_attach(sc);
340 1.1 thorpej }
341 1.1 thorpej
342 1.1 thorpej /*
343 1.1 thorpej * Glue functions.
344 1.1 thorpej */
345 1.1 thorpej
346 1.1 thorpej u_char
347 1.1 thorpej pcscp_read_reg(sc, reg)
348 1.1 thorpej struct ncr53c9x_softc *sc;
349 1.1 thorpej int reg;
350 1.1 thorpej {
351 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
352 1.1 thorpej
353 1.1 thorpej return bus_space_read_1(esc->sc_st, esc->sc_sh, reg << 2);
354 1.1 thorpej }
355 1.1 thorpej
356 1.1 thorpej void
357 1.1 thorpej pcscp_write_reg(sc, reg, v)
358 1.1 thorpej struct ncr53c9x_softc *sc;
359 1.1 thorpej int reg;
360 1.1 thorpej u_char v;
361 1.1 thorpej {
362 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
363 1.1 thorpej
364 1.1 thorpej bus_space_write_1(esc->sc_st, esc->sc_sh, reg << 2, v);
365 1.1 thorpej }
366 1.1 thorpej
367 1.1 thorpej int
368 1.1 thorpej pcscp_dma_isintr(sc)
369 1.1 thorpej struct ncr53c9x_softc *sc;
370 1.1 thorpej {
371 1.1 thorpej
372 1.1 thorpej return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT;
373 1.1 thorpej }
374 1.1 thorpej
375 1.1 thorpej void
376 1.1 thorpej pcscp_dma_reset(sc)
377 1.1 thorpej struct ncr53c9x_softc *sc;
378 1.1 thorpej {
379 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
380 1.1 thorpej
381 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE);
382 1.1 thorpej
383 1.1 thorpej esc->sc_active = 0;
384 1.1 thorpej }
385 1.1 thorpej
386 1.1 thorpej int
387 1.1 thorpej pcscp_dma_intr(sc)
388 1.1 thorpej struct ncr53c9x_softc *sc;
389 1.1 thorpej {
390 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
391 1.1 thorpej int trans, resid, i;
392 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap;
393 1.1 thorpej int datain = esc->sc_datain;
394 1.1 thorpej u_int32_t dmastat;
395 1.1 thorpej char *p = NULL;
396 1.1 thorpej
397 1.1 thorpej dmastat = READ_DMAREG(esc, DMA_STAT);
398 1.1 thorpej
399 1.1 thorpej if (dmastat & DMASTAT_ERR) {
400 1.1 thorpej /* XXX not tested... */
401 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_ABORT |
402 1.1 thorpej (datain ? DMACMD_DIR : 0));
403 1.1 thorpej
404 1.1 thorpej printf("%s: error: DMA error detected; Aborting.\n",
405 1.1 thorpej sc->sc_dev.dv_xname);
406 1.1 thorpej bus_dmamap_unload(esc->sc_dmat, dmap);
407 1.1 thorpej return -1;
408 1.1 thorpej }
409 1.1 thorpej
410 1.1 thorpej if (dmastat & DMASTAT_ABT) {
411 1.1 thorpej /* XXX What should be done? */
412 1.1 thorpej printf("%s: dma_intr: DMA aborted.\n", sc->sc_dev.dv_xname);
413 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE |
414 1.1 thorpej (datain ? DMACMD_DIR : 0));
415 1.1 thorpej esc->sc_active = 0;
416 1.1 thorpej return 0;
417 1.1 thorpej }
418 1.1 thorpej
419 1.1 thorpej /* This is an "assertion" :) */
420 1.1 thorpej if (esc->sc_active == 0)
421 1.1 thorpej panic("pcscp dmaintr: DMA wasn't active");
422 1.1 thorpej
423 1.1 thorpej /* DMA has stopped */
424 1.1 thorpej
425 1.1 thorpej esc->sc_active = 0;
426 1.1 thorpej
427 1.1 thorpej if (esc->sc_dmasize == 0) {
428 1.1 thorpej /* A "Transfer Pad" operation completed */
429 1.1 thorpej NCR_DMA(("dmaintr: discarded %d bytes (tcl=%d, tcm=%d)\n",
430 1.1 thorpej NCR_READ_REG(sc, NCR_TCL) |
431 1.1 thorpej (NCR_READ_REG(sc, NCR_TCM) << 8),
432 1.1 thorpej NCR_READ_REG(sc, NCR_TCL),
433 1.1 thorpej NCR_READ_REG(sc, NCR_TCM)));
434 1.1 thorpej return 0;
435 1.1 thorpej }
436 1.1 thorpej
437 1.1 thorpej resid = 0;
438 1.3 thorpej /*
439 1.3 thorpej * If a transfer onto the SCSI bus gets interrupted by the device
440 1.3 thorpej * (e.g. for a SAVEPOINTER message), the data in the FIFO counts
441 1.3 thorpej * as residual since the ESP counter registers get decremented as
442 1.3 thorpej * bytes are clocked into the FIFO.
443 1.3 thorpej */
444 1.3 thorpej if (!datain &&
445 1.3 thorpej (resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
446 1.3 thorpej NCR_DMA(("pcscp_dma_intr: empty esp FIFO of %d ", resid));
447 1.3 thorpej }
448 1.1 thorpej
449 1.1 thorpej if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
450 1.1 thorpej /*
451 1.1 thorpej * `Terminal count' is off, so read the residue
452 1.1 thorpej * out of the ESP counter registers.
453 1.1 thorpej */
454 1.1 thorpej if (datain) {
455 1.1 thorpej resid = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
456 1.1 thorpej while (resid > 1)
457 1.1 thorpej resid = NCR_READ_REG(sc, NCR_FFLAG) &
458 1.1 thorpej NCRFIFO_FF;
459 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_BLAST | DMACMD_MDL |
460 1.1 thorpej (datain ? DMACMD_DIR : 0));
461 1.1 thorpej
462 1.1 thorpej for (i = 0; i < 0x8000; i++) /* XXX 0x8000 ? */
463 1.1 thorpej if (READ_DMAREG(esc, DMA_STAT) & DMASTAT_BCMP)
464 1.1 thorpej break;
465 1.1 thorpej
466 1.1 thorpej /* See the below comments... */
467 1.1 thorpej if (resid)
468 1.1 thorpej p = *esc->sc_dmaaddr;
469 1.1 thorpej }
470 1.1 thorpej
471 1.1 thorpej resid += (NCR_READ_REG(sc, NCR_TCL) |
472 1.1 thorpej (NCR_READ_REG(sc, NCR_TCM) << 8) |
473 1.1 thorpej ((sc->sc_cfg2 & NCRCFG2_FE)
474 1.1 thorpej ? (NCR_READ_REG(sc, NCR_TCH) << 16) : 0));
475 1.1 thorpej
476 1.1 thorpej if (resid == 0 && esc->sc_dmasize == 65536 &&
477 1.1 thorpej (sc->sc_cfg2 & NCRCFG2_FE) == 0)
478 1.1 thorpej /* A transfer of 64K is encoded as `TCL=TCM=0' */
479 1.1 thorpej resid = 65536;
480 1.1 thorpej } else {
481 1.1 thorpej while((dmastat & DMASTAT_DONE) == 0)
482 1.1 thorpej dmastat = READ_DMAREG(esc, DMA_STAT);
483 1.1 thorpej }
484 1.1 thorpej
485 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
486 1.1 thorpej
487 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, dmap, 0, dmap->dm_mapsize,
488 1.1 thorpej datain ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
489 1.1 thorpej bus_dmamap_unload(esc->sc_dmat, dmap);
490 1.1 thorpej
491 1.1 thorpej trans = esc->sc_dmasize - resid;
492 1.1 thorpej
493 1.1 thorpej /*
494 1.1 thorpej * From the technical manual notes:
495 1.1 thorpej *
496 1.1 thorpej * `In some odd byte conditions, one residual byte will be left
497 1.1 thorpej * in the SCSI FIFO, and the FIFO flags will never count to 0.
498 1.1 thorpej * When this happens, the residual byte should be retrieved
499 1.1 thorpej * via PIO following completion of the BLAST operation.'
500 1.1 thorpej */
501 1.1 thorpej
502 1.1 thorpej if (p) {
503 1.1 thorpej p += trans;
504 1.1 thorpej *p = NCR_READ_REG(sc, NCR_FIFO);
505 1.1 thorpej trans++;
506 1.1 thorpej }
507 1.1 thorpej
508 1.1 thorpej if (trans < 0) { /* transferred < 0 ? */
509 1.1 thorpej #if 0
510 1.1 thorpej /*
511 1.1 thorpej * This situation can happen in perfectly normal operation
512 1.1 thorpej * if the ESP is reselected while using DMA to select
513 1.1 thorpej * another target. As such, don't print the warning.
514 1.1 thorpej */
515 1.1 thorpej printf("%s: xfer (%d) > req (%d)\n",
516 1.1 thorpej sc->sc_dev.dv_xname, trans, esc->sc_dmasize);
517 1.1 thorpej #endif
518 1.1 thorpej trans = esc->sc_dmasize;
519 1.1 thorpej }
520 1.1 thorpej
521 1.1 thorpej NCR_DMA(("dmaintr: tcl=%d, tcm=%d, tch=%d; trans=%d, resid=%d\n",
522 1.1 thorpej NCR_READ_REG(sc, NCR_TCL),
523 1.1 thorpej NCR_READ_REG(sc, NCR_TCM),
524 1.1 thorpej (sc->sc_cfg2 & NCRCFG2_FE)
525 1.1 thorpej ? NCR_READ_REG(sc, NCR_TCH) : 0,
526 1.1 thorpej trans, resid));
527 1.1 thorpej
528 1.1 thorpej *esc->sc_dmalen -= trans;
529 1.1 thorpej *esc->sc_dmaaddr += trans;
530 1.1 thorpej
531 1.1 thorpej return 0;
532 1.1 thorpej }
533 1.1 thorpej
534 1.1 thorpej int
535 1.1 thorpej pcscp_dma_setup(sc, addr, len, datain, dmasize)
536 1.1 thorpej struct ncr53c9x_softc *sc;
537 1.1 thorpej caddr_t *addr;
538 1.1 thorpej size_t *len;
539 1.1 thorpej int datain;
540 1.1 thorpej size_t *dmasize;
541 1.1 thorpej {
542 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
543 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap;
544 1.1 thorpej u_int32_t *mdl;
545 1.1 thorpej int error, nseg, seg;
546 1.1 thorpej bus_addr_t s_offset, s_addr;
547 1.1 thorpej long rest, count;
548 1.1 thorpej
549 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | (datain ? DMACMD_DIR : 0));
550 1.1 thorpej
551 1.1 thorpej esc->sc_dmaaddr = addr;
552 1.1 thorpej esc->sc_dmalen = len;
553 1.1 thorpej esc->sc_dmasize = *dmasize;
554 1.1 thorpej esc->sc_datain = datain;
555 1.1 thorpej
556 1.1 thorpej #ifdef DIAGNOSTIC
557 1.1 thorpej if ((*dmasize / MDL_SEG_SIZE) > MDL_SIZE)
558 1.1 thorpej panic("pcscp: transfer size too large");
559 1.1 thorpej #endif
560 1.1 thorpej
561 1.1 thorpej /*
562 1.3 thorpej * No need to set up DMA in `Transfer Pad' operation.
563 1.1 thorpej * (case of *dmasize == 0)
564 1.1 thorpej */
565 1.3 thorpej if (*dmasize == 0)
566 1.3 thorpej return 0;
567 1.1 thorpej
568 1.1 thorpej error = bus_dmamap_load(esc->sc_dmat, dmap, *esc->sc_dmaaddr,
569 1.5.2.2 thorpej *esc->sc_dmalen, NULL, BUS_DMA_NOWAIT);
570 1.5.2.2 thorpej switch (error) {
571 1.5.2.2 thorpej case 0:
572 1.5.2.2 thorpej break;
573 1.5.2.2 thorpej
574 1.5.2.2 thorpej default:
575 1.1 thorpej printf("%s: unable to load dmamap, error = %d\n",
576 1.5.2.2 thorpej sc->sc_dev.dv_xname, error);
577 1.5.2.2 thorpej /* FALLTHROUGH */
578 1.5.2.2 thorpej
579 1.5.2.2 thorpej case ENOMEM:
580 1.5.2.2 thorpej case EAGAIN:
581 1.5.2.2 thorpej return (error);
582 1.1 thorpej }
583 1.1 thorpej
584 1.1 thorpej /* set transfer length */
585 1.1 thorpej WRITE_DMAREG(esc, DMA_STC, *dmasize);
586 1.1 thorpej
587 1.1 thorpej /* set up MDL */
588 1.1 thorpej mdl = esc->sc_mdladdr;
589 1.1 thorpej nseg = dmap->dm_nsegs;
590 1.1 thorpej seg = 0;
591 1.1 thorpej
592 1.1 thorpej /* the first segment is possibly not aligned with 4k MDL boundary */
593 1.1 thorpej count = dmap->dm_segs[seg].ds_len;
594 1.1 thorpej s_offset = dmap->dm_segs[seg].ds_addr & MDL_SEG_OFFSET;
595 1.1 thorpej s_addr = dmap->dm_segs[seg].ds_addr - s_offset;
596 1.1 thorpej rest = MDL_SEG_SIZE - s_offset;
597 1.1 thorpej
598 1.1 thorpej #if BYTE_ORDER == BIG_ENDIAN
599 1.1 thorpej #define htopci(addr) bswap32(addr)
600 1.1 thorpej #else
601 1.1 thorpej #define htopci(addr) (addr)
602 1.1 thorpej #endif
603 1.1 thorpej
604 1.1 thorpej /* set the first MDL and offset */
605 1.1 thorpej WRITE_DMAREG(esc, DMA_SPA, s_offset);
606 1.1 thorpej *mdl++ = htopci(s_addr);
607 1.1 thorpej count -= rest;
608 1.1 thorpej
609 1.1 thorpej /* rests of the first dmamap segment */
610 1.1 thorpej while (count > 0) {
611 1.1 thorpej s_addr += MDL_SEG_SIZE;
612 1.1 thorpej *mdl++ = htopci(s_addr);
613 1.1 thorpej count -= MDL_SEG_SIZE;
614 1.1 thorpej }
615 1.1 thorpej
616 1.1 thorpej /* the rest dmamap segments are aligned with 4k boundary */
617 1.1 thorpej for (seg = 1; seg < nseg; seg++) {
618 1.1 thorpej count = dmap->dm_segs[seg].ds_len;
619 1.1 thorpej s_addr = dmap->dm_segs[seg].ds_addr;
620 1.1 thorpej
621 1.1 thorpej /* first 4kbyte of each dmamap segment */
622 1.1 thorpej *mdl++ = htopci(s_addr);
623 1.1 thorpej count -= MDL_SEG_SIZE;
624 1.1 thorpej
625 1.1 thorpej /* trailing contiguous 4k frames of each dmamap segments */
626 1.1 thorpej while (count > 0) {
627 1.1 thorpej s_addr += MDL_SEG_SIZE;
628 1.1 thorpej *mdl++ = htopci(s_addr);
629 1.1 thorpej count -= MDL_SEG_SIZE;
630 1.1 thorpej }
631 1.1 thorpej }
632 1.1 thorpej
633 1.1 thorpej #undef htopci
634 1.1 thorpej
635 1.1 thorpej return 0;
636 1.1 thorpej }
637 1.1 thorpej
638 1.1 thorpej void
639 1.1 thorpej pcscp_dma_go(sc)
640 1.1 thorpej struct ncr53c9x_softc *sc;
641 1.1 thorpej {
642 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
643 1.1 thorpej bus_dmamap_t dmap = esc->sc_xfermap, mdldmap = esc->sc_mdldmap;
644 1.1 thorpej int datain = esc->sc_datain;
645 1.3 thorpej
646 1.3 thorpej /* No DMA transfer in Transfer Pad operation */
647 1.3 thorpej if (esc->sc_dmasize == 0)
648 1.3 thorpej return;
649 1.1 thorpej
650 1.1 thorpej /* sync transfer buffer */
651 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, dmap, 0, dmap->dm_mapsize,
652 1.1 thorpej datain ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
653 1.1 thorpej
654 1.1 thorpej /* sync MDL */
655 1.1 thorpej bus_dmamap_sync(esc->sc_dmat, mdldmap, 0, mdldmap->dm_mapsize,
656 1.1 thorpej BUS_DMASYNC_PREWRITE);
657 1.1 thorpej
658 1.1 thorpej /* set Starting MDL Address */
659 1.2 thorpej WRITE_DMAREG(esc, DMA_SMDLA, mdldmap->dm_segs[0].ds_addr);
660 1.1 thorpej
661 1.1 thorpej /* set DMA command register bits */
662 1.1 thorpej /* XXX DMA Transfer Interrupt Enable bit is broken? */
663 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_IDLE | DMACMD_MDL |
664 1.1 thorpej /* DMACMD_INTE | */
665 1.1 thorpej (datain ? DMACMD_DIR : 0));
666 1.1 thorpej
667 1.1 thorpej /* issue DMA start command */
668 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_START | DMACMD_MDL |
669 1.1 thorpej /* DMACMD_INTE | */
670 1.1 thorpej (datain ? DMACMD_DIR : 0));
671 1.1 thorpej
672 1.1 thorpej esc->sc_active = 1;
673 1.1 thorpej }
674 1.1 thorpej
675 1.1 thorpej void
676 1.1 thorpej pcscp_dma_stop(sc)
677 1.1 thorpej struct ncr53c9x_softc *sc;
678 1.1 thorpej {
679 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
680 1.1 thorpej
681 1.1 thorpej /* dma stop */
682 1.1 thorpej /* XXX What should we do here ? */
683 1.1 thorpej WRITE_DMAREG(esc, DMA_CMD, DMACMD_ABORT |
684 1.1 thorpej ( esc->sc_datain ? DMACMD_DIR : 0));
685 1.1 thorpej
686 1.1 thorpej esc->sc_active = 0;
687 1.1 thorpej }
688 1.1 thorpej
689 1.1 thorpej int
690 1.1 thorpej pcscp_dma_isactive(sc)
691 1.1 thorpej struct ncr53c9x_softc *sc;
692 1.1 thorpej {
693 1.1 thorpej struct pcscp_softc *esc = (struct pcscp_softc *)sc;
694 1.1 thorpej
695 1.1 thorpej /* XXX should check esc->sc_active? */
696 1.1 thorpej if ((READ_DMAREG(esc, DMA_CMD) & DMACMD_CMD) != DMACMD_IDLE)
697 1.1 thorpej return 1;
698 1.1 thorpej return 0;
699 1.1 thorpej }
700