piixpm.c revision 1.3.2.3
1 1.3.2.3 yamt /* $NetBSD: piixpm.c,v 1.3.2.3 2006/12/30 20:48:48 yamt Exp $ */ 2 1.3.2.2 yamt /* $OpenBSD: piixpm.c,v 1.20 2006/02/27 08:25:02 grange Exp $ */ 3 1.3.2.2 yamt 4 1.3.2.2 yamt /* 5 1.3.2.2 yamt * Copyright (c) 2005, 2006 Alexander Yurchenko <grange (at) openbsd.org> 6 1.3.2.2 yamt * 7 1.3.2.2 yamt * Permission to use, copy, modify, and distribute this software for any 8 1.3.2.2 yamt * purpose with or without fee is hereby granted, provided that the above 9 1.3.2.2 yamt * copyright notice and this permission notice appear in all copies. 10 1.3.2.2 yamt * 11 1.3.2.2 yamt * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 1.3.2.2 yamt * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 1.3.2.2 yamt * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 1.3.2.2 yamt * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 1.3.2.2 yamt * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 1.3.2.2 yamt * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 1.3.2.2 yamt * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 1.3.2.2 yamt */ 19 1.3.2.2 yamt 20 1.3.2.2 yamt /* 21 1.3.2.2 yamt * Intel PIIX and compatible Power Management controller driver. 22 1.3.2.2 yamt */ 23 1.3.2.2 yamt 24 1.3.2.2 yamt #include <sys/param.h> 25 1.3.2.2 yamt #include <sys/systm.h> 26 1.3.2.2 yamt #include <sys/device.h> 27 1.3.2.2 yamt #include <sys/kernel.h> 28 1.3.2.2 yamt #include <sys/lock.h> 29 1.3.2.2 yamt #include <sys/proc.h> 30 1.3.2.2 yamt 31 1.3.2.2 yamt #include <machine/bus.h> 32 1.3.2.2 yamt 33 1.3.2.2 yamt #include <dev/pci/pcidevs.h> 34 1.3.2.2 yamt #include <dev/pci/pcireg.h> 35 1.3.2.2 yamt #include <dev/pci/pcivar.h> 36 1.3.2.2 yamt 37 1.3.2.2 yamt #include <dev/pci/piixpmreg.h> 38 1.3.2.2 yamt 39 1.3.2.2 yamt #include <dev/i2c/i2cvar.h> 40 1.3.2.2 yamt 41 1.3.2.3 yamt #ifdef __HAVE_TIMECOUNTER 42 1.3.2.3 yamt #include <dev/ic/acpipmtimer.h> 43 1.3.2.3 yamt #endif 44 1.3.2.3 yamt 45 1.3.2.2 yamt #ifdef PIIXPM_DEBUG 46 1.3.2.2 yamt #define DPRINTF(x) printf x 47 1.3.2.2 yamt #else 48 1.3.2.2 yamt #define DPRINTF(x) 49 1.3.2.2 yamt #endif 50 1.3.2.2 yamt 51 1.3.2.2 yamt #define PIIXPM_DELAY 200 52 1.3.2.2 yamt #define PIIXPM_TIMEOUT 1 53 1.3.2.2 yamt 54 1.3.2.2 yamt struct piixpm_softc { 55 1.3.2.2 yamt struct device sc_dev; 56 1.3.2.2 yamt 57 1.3.2.3 yamt bus_space_tag_t sc_smb_iot; 58 1.3.2.3 yamt bus_space_handle_t sc_smb_ioh; 59 1.3.2.3 yamt void * sc_smb_ih; 60 1.3.2.2 yamt int sc_poll; 61 1.3.2.2 yamt 62 1.3.2.3 yamt bus_space_tag_t sc_pm_iot; 63 1.3.2.3 yamt bus_space_handle_t sc_pm_ioh; 64 1.3.2.3 yamt 65 1.3.2.2 yamt pci_chipset_tag_t sc_pc; 66 1.3.2.2 yamt pcitag_t sc_pcitag; 67 1.3.2.2 yamt 68 1.3.2.2 yamt struct i2c_controller sc_i2c_tag; 69 1.3.2.2 yamt struct lock sc_i2c_lock; 70 1.3.2.2 yamt struct { 71 1.3.2.2 yamt i2c_op_t op; 72 1.3.2.2 yamt void * buf; 73 1.3.2.2 yamt size_t len; 74 1.3.2.2 yamt int flags; 75 1.3.2.2 yamt volatile int error; 76 1.3.2.2 yamt } sc_i2c_xfer; 77 1.3.2.2 yamt 78 1.3.2.2 yamt void * sc_powerhook; 79 1.3.2.2 yamt struct pci_conf_state sc_pciconf; 80 1.3.2.2 yamt pcireg_t sc_devact[2]; 81 1.3.2.2 yamt }; 82 1.3.2.2 yamt 83 1.3.2.2 yamt int piixpm_match(struct device *, struct cfdata *, void *); 84 1.3.2.2 yamt void piixpm_attach(struct device *, struct device *, void *); 85 1.3.2.2 yamt 86 1.3.2.2 yamt void piixpm_powerhook(int, void *); 87 1.3.2.2 yamt 88 1.3.2.2 yamt int piixpm_i2c_acquire_bus(void *, int); 89 1.3.2.2 yamt void piixpm_i2c_release_bus(void *, int); 90 1.3.2.2 yamt int piixpm_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 91 1.3.2.2 yamt void *, size_t, int); 92 1.3.2.2 yamt 93 1.3.2.2 yamt int piixpm_intr(void *); 94 1.3.2.2 yamt 95 1.3.2.2 yamt CFATTACH_DECL(piixpm, sizeof(struct piixpm_softc), 96 1.3.2.2 yamt piixpm_match, piixpm_attach, NULL, NULL); 97 1.3.2.2 yamt 98 1.3.2.2 yamt int 99 1.3.2.3 yamt piixpm_match(struct device *parent, struct cfdata *match, 100 1.3.2.3 yamt void *aux) 101 1.3.2.2 yamt { 102 1.3.2.2 yamt struct pci_attach_args *pa; 103 1.3.2.2 yamt 104 1.3.2.2 yamt pa = (struct pci_attach_args *)aux; 105 1.3.2.2 yamt switch (PCI_VENDOR(pa->pa_id)) { 106 1.3.2.2 yamt case PCI_VENDOR_INTEL: 107 1.3.2.2 yamt switch (PCI_PRODUCT(pa->pa_id)) { 108 1.3.2.2 yamt case PCI_PRODUCT_INTEL_82371AB_PMC: 109 1.3.2.2 yamt case PCI_PRODUCT_INTEL_82440MX_PMC: 110 1.3.2.2 yamt return 1; 111 1.3.2.2 yamt } 112 1.3.2.2 yamt break; 113 1.3.2.2 yamt case PCI_VENDOR_ATI: 114 1.3.2.2 yamt switch (PCI_PRODUCT(pa->pa_id)) { 115 1.3.2.2 yamt case PCI_PRODUCT_ATI_SB200_SMB: 116 1.3.2.3 yamt case PCI_PRODUCT_ATI_SB300_SMB: 117 1.3.2.3 yamt case PCI_PRODUCT_ATI_SB400_SMB: 118 1.3.2.2 yamt return 1; 119 1.3.2.2 yamt } 120 1.3.2.2 yamt break; 121 1.3.2.2 yamt } 122 1.3.2.2 yamt 123 1.3.2.2 yamt return 0; 124 1.3.2.2 yamt } 125 1.3.2.2 yamt 126 1.3.2.2 yamt void 127 1.3.2.2 yamt piixpm_attach(struct device *parent, struct device *self, void *aux) 128 1.3.2.2 yamt { 129 1.3.2.2 yamt struct piixpm_softc *sc = (struct piixpm_softc *)self; 130 1.3.2.2 yamt struct pci_attach_args *pa = aux; 131 1.3.2.2 yamt struct i2cbus_attach_args iba; 132 1.3.2.2 yamt pcireg_t base, conf; 133 1.3.2.3 yamt #ifdef __HAVE_TIMECOUNTER 134 1.3.2.3 yamt pcireg_t pmmisc; 135 1.3.2.3 yamt #endif 136 1.3.2.2 yamt pci_intr_handle_t ih; 137 1.3.2.3 yamt char devinfo[256]; 138 1.3.2.2 yamt const char *intrstr = NULL; 139 1.3.2.2 yamt 140 1.3.2.2 yamt sc->sc_pc = pa->pa_pc; 141 1.3.2.2 yamt sc->sc_pcitag = pa->pa_tag; 142 1.3.2.2 yamt 143 1.3.2.2 yamt aprint_naive("\n"); 144 1.3.2.2 yamt 145 1.3.2.3 yamt pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 146 1.3.2.3 yamt aprint_normal("\n%s: %s (rev. 0x%02x)\n", 147 1.3.2.3 yamt device_xname(self), devinfo, PCI_REVISION(pa->pa_class)); 148 1.3.2.3 yamt 149 1.3.2.3 yamt sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 150 1.3.2.3 yamt piixpm_powerhook, sc); 151 1.3.2.2 yamt if (sc->sc_powerhook == NULL) 152 1.3.2.2 yamt aprint_error("%s: can't establish powerhook\n", 153 1.3.2.2 yamt sc->sc_dev.dv_xname); 154 1.3.2.2 yamt 155 1.3.2.2 yamt /* Read configuration */ 156 1.3.2.2 yamt conf = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_HOSTC); 157 1.3.2.2 yamt DPRINTF((": conf 0x%x", conf)); 158 1.3.2.2 yamt 159 1.3.2.3 yamt #ifdef __HAVE_TIMECOUNTER 160 1.3.2.3 yamt if ((PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) || 161 1.3.2.3 yamt (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_INTEL_82371AB_PMC)) 162 1.3.2.3 yamt goto nopowermanagement; 163 1.3.2.3 yamt 164 1.3.2.3 yamt /* check whether I/O access to PM regs is enabled */ 165 1.3.2.3 yamt pmmisc = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_PMREGMISC); 166 1.3.2.3 yamt if (!(pmmisc & 1)) 167 1.3.2.3 yamt goto nopowermanagement; 168 1.3.2.3 yamt 169 1.3.2.3 yamt sc->sc_pm_iot = pa->pa_iot; 170 1.3.2.3 yamt /* Map I/O space */ 171 1.3.2.3 yamt base = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_PM_BASE); 172 1.3.2.3 yamt if (bus_space_map(sc->sc_pm_iot, PCI_MAPREG_IO_ADDR(base), 173 1.3.2.3 yamt PIIX_PM_SIZE, 0, &sc->sc_pm_ioh)) { 174 1.3.2.3 yamt aprint_error("%s: can't map power management I/O space\n", 175 1.3.2.3 yamt sc->sc_dev.dv_xname); 176 1.3.2.3 yamt goto nopowermanagement; 177 1.3.2.3 yamt } 178 1.3.2.3 yamt 179 1.3.2.3 yamt /* 180 1.3.2.3 yamt * Revision 0 and 1 are PIIX4, 2 is PIIX4E, 3 is PIIX4M. 181 1.3.2.3 yamt * PIIX4 and PIIX4E have a bug in the timer latch, see Errata #20 182 1.3.2.3 yamt * in the "Specification update" (document #297738). 183 1.3.2.3 yamt */ 184 1.3.2.3 yamt acpipmtimer_attach(&sc->sc_dev, sc->sc_pm_iot, sc->sc_pm_ioh, 185 1.3.2.3 yamt PIIX_PM_PMTMR, 186 1.3.2.3 yamt (PCI_REVISION(pa->pa_class) < 3) ? ACPIPMT_BADLATCH : 0 ); 187 1.3.2.3 yamt 188 1.3.2.3 yamt nopowermanagement: 189 1.3.2.3 yamt #endif 190 1.3.2.3 yamt 191 1.3.2.2 yamt if ((conf & PIIX_SMB_HOSTC_HSTEN) == 0) { 192 1.3.2.2 yamt aprint_normal("%s: SMBus disabled\n", sc->sc_dev.dv_xname); 193 1.3.2.2 yamt return; 194 1.3.2.2 yamt } 195 1.3.2.2 yamt 196 1.3.2.2 yamt /* Map I/O space */ 197 1.3.2.3 yamt sc->sc_smb_iot = pa->pa_iot; 198 1.3.2.2 yamt base = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_BASE) & 0xffff; 199 1.3.2.3 yamt if (bus_space_map(sc->sc_smb_iot, PCI_MAPREG_IO_ADDR(base), 200 1.3.2.3 yamt PIIX_SMB_SIZE, 0, &sc->sc_smb_ioh)) { 201 1.3.2.3 yamt aprint_error("%s: can't map smbus I/O space\n", 202 1.3.2.2 yamt sc->sc_dev.dv_xname); 203 1.3.2.2 yamt return; 204 1.3.2.2 yamt } 205 1.3.2.2 yamt 206 1.3.2.2 yamt sc->sc_poll = 1; 207 1.3.2.2 yamt if ((conf & PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_SMI) { 208 1.3.2.2 yamt /* No PCI IRQ */ 209 1.3.2.2 yamt aprint_normal("%s: interrupting at SMI", sc->sc_dev.dv_xname); 210 1.3.2.2 yamt } else if ((conf & PIIX_SMB_HOSTC_INTMASK) == PIIX_SMB_HOSTC_IRQ) { 211 1.3.2.2 yamt /* Install interrupt handler */ 212 1.3.2.2 yamt if (pci_intr_map(pa, &ih) == 0) { 213 1.3.2.2 yamt intrstr = pci_intr_string(pa->pa_pc, ih); 214 1.3.2.3 yamt sc->sc_smb_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, 215 1.3.2.2 yamt piixpm_intr, sc); 216 1.3.2.3 yamt if (sc->sc_smb_ih != NULL) { 217 1.3.2.2 yamt aprint_normal("%s: interrupting at %s", 218 1.3.2.2 yamt sc->sc_dev.dv_xname, intrstr); 219 1.3.2.2 yamt sc->sc_poll = 0; 220 1.3.2.2 yamt } 221 1.3.2.2 yamt } 222 1.3.2.2 yamt if (sc->sc_poll) 223 1.3.2.2 yamt aprint_normal("%s: polling", sc->sc_dev.dv_xname); 224 1.3.2.2 yamt } 225 1.3.2.2 yamt 226 1.3.2.2 yamt aprint_normal("\n"); 227 1.3.2.2 yamt 228 1.3.2.2 yamt /* Attach I2C bus */ 229 1.3.2.2 yamt lockinit(&sc->sc_i2c_lock, PRIBIO | PCATCH, "iiclk", 0, 0); 230 1.3.2.2 yamt sc->sc_i2c_tag.ic_cookie = sc; 231 1.3.2.2 yamt sc->sc_i2c_tag.ic_acquire_bus = piixpm_i2c_acquire_bus; 232 1.3.2.2 yamt sc->sc_i2c_tag.ic_release_bus = piixpm_i2c_release_bus; 233 1.3.2.2 yamt sc->sc_i2c_tag.ic_exec = piixpm_i2c_exec; 234 1.3.2.2 yamt 235 1.3.2.2 yamt bzero(&iba, sizeof(iba)); 236 1.3.2.2 yamt iba.iba_tag = &sc->sc_i2c_tag; 237 1.3.2.3 yamt config_found_ia(self, "i2cbus", &iba, iicbus_print); 238 1.3.2.2 yamt 239 1.3.2.2 yamt return; 240 1.3.2.2 yamt } 241 1.3.2.2 yamt 242 1.3.2.2 yamt void 243 1.3.2.2 yamt piixpm_powerhook(int why, void *cookie) 244 1.3.2.2 yamt { 245 1.3.2.2 yamt struct piixpm_softc *sc = cookie; 246 1.3.2.2 yamt pci_chipset_tag_t pc = sc->sc_pc; 247 1.3.2.2 yamt pcitag_t tag = sc->sc_pcitag; 248 1.3.2.2 yamt 249 1.3.2.2 yamt switch (why) { 250 1.3.2.2 yamt case PWR_SUSPEND: 251 1.3.2.2 yamt pci_conf_capture(pc, tag, &sc->sc_pciconf); 252 1.3.2.2 yamt sc->sc_devact[0] = pci_conf_read(pc, tag, PIIX_DEVACTA); 253 1.3.2.2 yamt sc->sc_devact[1] = pci_conf_read(pc, tag, PIIX_DEVACTB); 254 1.3.2.2 yamt break; 255 1.3.2.2 yamt case PWR_RESUME: 256 1.3.2.2 yamt pci_conf_restore(pc, tag, &sc->sc_pciconf); 257 1.3.2.2 yamt pci_conf_write(pc, tag, PIIX_DEVACTA, sc->sc_devact[0]); 258 1.3.2.2 yamt pci_conf_write(pc, tag, PIIX_DEVACTB, sc->sc_devact[1]); 259 1.3.2.2 yamt break; 260 1.3.2.2 yamt } 261 1.3.2.2 yamt 262 1.3.2.2 yamt return; 263 1.3.2.2 yamt } 264 1.3.2.2 yamt 265 1.3.2.2 yamt int 266 1.3.2.2 yamt piixpm_i2c_acquire_bus(void *cookie, int flags) 267 1.3.2.2 yamt { 268 1.3.2.2 yamt struct piixpm_softc *sc = cookie; 269 1.3.2.2 yamt 270 1.3.2.2 yamt if (cold || sc->sc_poll || (flags & I2C_F_POLL)) 271 1.3.2.2 yamt return (0); 272 1.3.2.2 yamt 273 1.3.2.2 yamt return (lockmgr(&sc->sc_i2c_lock, LK_EXCLUSIVE, NULL)); 274 1.3.2.2 yamt } 275 1.3.2.2 yamt 276 1.3.2.2 yamt void 277 1.3.2.2 yamt piixpm_i2c_release_bus(void *cookie, int flags) 278 1.3.2.2 yamt { 279 1.3.2.2 yamt struct piixpm_softc *sc = cookie; 280 1.3.2.2 yamt 281 1.3.2.2 yamt if (cold || sc->sc_poll || (flags & I2C_F_POLL)) 282 1.3.2.2 yamt return; 283 1.3.2.2 yamt 284 1.3.2.2 yamt lockmgr(&sc->sc_i2c_lock, LK_RELEASE, NULL); 285 1.3.2.2 yamt } 286 1.3.2.2 yamt 287 1.3.2.2 yamt int 288 1.3.2.2 yamt piixpm_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, 289 1.3.2.2 yamt const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) 290 1.3.2.2 yamt { 291 1.3.2.2 yamt struct piixpm_softc *sc = cookie; 292 1.3.2.2 yamt const u_int8_t *b; 293 1.3.2.2 yamt u_int8_t ctl = 0, st; 294 1.3.2.2 yamt int retries; 295 1.3.2.2 yamt 296 1.3.2.2 yamt DPRINTF(("%s: exec: op %d, addr 0x%x, cmdlen %d, len %d, flags 0x%x\n", 297 1.3.2.2 yamt sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags)); 298 1.3.2.2 yamt 299 1.3.2.2 yamt /* Wait for bus to be idle */ 300 1.3.2.2 yamt for (retries = 100; retries > 0; retries--) { 301 1.3.2.3 yamt st = bus_space_read_1(sc->sc_smb_iot, sc->sc_smb_ioh, 302 1.3.2.3 yamt PIIX_SMB_HS); 303 1.3.2.2 yamt if (!(st & PIIX_SMB_HS_BUSY)) 304 1.3.2.2 yamt break; 305 1.3.2.2 yamt DELAY(PIIXPM_DELAY); 306 1.3.2.2 yamt } 307 1.3.2.3 yamt DPRINTF(("%s: exec: st 0x%d\n", sc->sc_dev.dv_xname, st & 0xff)); 308 1.3.2.2 yamt if (st & PIIX_SMB_HS_BUSY) 309 1.3.2.2 yamt return (1); 310 1.3.2.2 yamt 311 1.3.2.2 yamt if (cold || sc->sc_poll) 312 1.3.2.2 yamt flags |= I2C_F_POLL; 313 1.3.2.2 yamt 314 1.3.2.2 yamt if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2) 315 1.3.2.2 yamt return (1); 316 1.3.2.2 yamt 317 1.3.2.2 yamt /* Setup transfer */ 318 1.3.2.2 yamt sc->sc_i2c_xfer.op = op; 319 1.3.2.2 yamt sc->sc_i2c_xfer.buf = buf; 320 1.3.2.2 yamt sc->sc_i2c_xfer.len = len; 321 1.3.2.2 yamt sc->sc_i2c_xfer.flags = flags; 322 1.3.2.2 yamt sc->sc_i2c_xfer.error = 0; 323 1.3.2.2 yamt 324 1.3.2.2 yamt /* Set slave address and transfer direction */ 325 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, PIIX_SMB_TXSLVA, 326 1.3.2.2 yamt PIIX_SMB_TXSLVA_ADDR(addr) | 327 1.3.2.2 yamt (I2C_OP_READ_P(op) ? PIIX_SMB_TXSLVA_READ : 0)); 328 1.3.2.2 yamt 329 1.3.2.2 yamt b = cmdbuf; 330 1.3.2.2 yamt if (cmdlen > 0) 331 1.3.2.2 yamt /* Set command byte */ 332 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, 333 1.3.2.3 yamt PIIX_SMB_HCMD, b[0]); 334 1.3.2.2 yamt 335 1.3.2.2 yamt if (I2C_OP_WRITE_P(op)) { 336 1.3.2.2 yamt /* Write data */ 337 1.3.2.2 yamt b = buf; 338 1.3.2.2 yamt if (len > 0) 339 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, 340 1.3.2.2 yamt PIIX_SMB_HD0, b[0]); 341 1.3.2.2 yamt if (len > 1) 342 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, 343 1.3.2.2 yamt PIIX_SMB_HD1, b[1]); 344 1.3.2.2 yamt } 345 1.3.2.2 yamt 346 1.3.2.2 yamt /* Set SMBus command */ 347 1.3.2.2 yamt if (len == 0) 348 1.3.2.2 yamt ctl = PIIX_SMB_HC_CMD_BYTE; 349 1.3.2.2 yamt else if (len == 1) 350 1.3.2.2 yamt ctl = PIIX_SMB_HC_CMD_BDATA; 351 1.3.2.2 yamt else if (len == 2) 352 1.3.2.2 yamt ctl = PIIX_SMB_HC_CMD_WDATA; 353 1.3.2.2 yamt 354 1.3.2.2 yamt if ((flags & I2C_F_POLL) == 0) 355 1.3.2.2 yamt ctl |= PIIX_SMB_HC_INTREN; 356 1.3.2.2 yamt 357 1.3.2.2 yamt /* Start transaction */ 358 1.3.2.2 yamt ctl |= PIIX_SMB_HC_START; 359 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, PIIX_SMB_HC, ctl); 360 1.3.2.2 yamt 361 1.3.2.2 yamt if (flags & I2C_F_POLL) { 362 1.3.2.2 yamt /* Poll for completion */ 363 1.3.2.2 yamt DELAY(PIIXPM_DELAY); 364 1.3.2.2 yamt for (retries = 1000; retries > 0; retries--) { 365 1.3.2.3 yamt st = bus_space_read_1(sc->sc_smb_iot, sc->sc_smb_ioh, 366 1.3.2.2 yamt PIIX_SMB_HS); 367 1.3.2.2 yamt if ((st & PIIX_SMB_HS_BUSY) == 0) 368 1.3.2.2 yamt break; 369 1.3.2.2 yamt DELAY(PIIXPM_DELAY); 370 1.3.2.2 yamt } 371 1.3.2.2 yamt if (st & PIIX_SMB_HS_BUSY) 372 1.3.2.2 yamt goto timeout; 373 1.3.2.2 yamt piixpm_intr(sc); 374 1.3.2.2 yamt } else { 375 1.3.2.2 yamt /* Wait for interrupt */ 376 1.3.2.2 yamt if (tsleep(sc, PRIBIO, "iicexec", PIIXPM_TIMEOUT * hz)) 377 1.3.2.2 yamt goto timeout; 378 1.3.2.2 yamt } 379 1.3.2.2 yamt 380 1.3.2.2 yamt if (sc->sc_i2c_xfer.error) 381 1.3.2.2 yamt return (1); 382 1.3.2.2 yamt 383 1.3.2.2 yamt return (0); 384 1.3.2.2 yamt 385 1.3.2.2 yamt timeout: 386 1.3.2.2 yamt /* 387 1.3.2.2 yamt * Transfer timeout. Kill the transaction and clear status bits. 388 1.3.2.2 yamt */ 389 1.3.2.2 yamt aprint_error("%s: timeout, status 0x%x\n", sc->sc_dev.dv_xname, st); 390 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, PIIX_SMB_HC, 391 1.3.2.2 yamt PIIX_SMB_HC_KILL); 392 1.3.2.2 yamt DELAY(PIIXPM_DELAY); 393 1.3.2.3 yamt st = bus_space_read_1(sc->sc_smb_iot, sc->sc_smb_ioh, PIIX_SMB_HS); 394 1.3.2.2 yamt if ((st & PIIX_SMB_HS_FAILED) == 0) 395 1.3.2.2 yamt aprint_error("%s: transaction abort failed, status 0x%x\n", 396 1.3.2.2 yamt sc->sc_dev.dv_xname, st); 397 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, PIIX_SMB_HS, st); 398 1.3.2.2 yamt return (1); 399 1.3.2.2 yamt } 400 1.3.2.2 yamt 401 1.3.2.2 yamt int 402 1.3.2.2 yamt piixpm_intr(void *arg) 403 1.3.2.2 yamt { 404 1.3.2.2 yamt struct piixpm_softc *sc = arg; 405 1.3.2.2 yamt u_int8_t st; 406 1.3.2.2 yamt u_int8_t *b; 407 1.3.2.2 yamt size_t len; 408 1.3.2.2 yamt 409 1.3.2.2 yamt /* Read status */ 410 1.3.2.3 yamt st = bus_space_read_1(sc->sc_smb_iot, sc->sc_smb_ioh, PIIX_SMB_HS); 411 1.3.2.2 yamt if ((st & PIIX_SMB_HS_BUSY) != 0 || (st & (PIIX_SMB_HS_INTR | 412 1.3.2.2 yamt PIIX_SMB_HS_DEVERR | PIIX_SMB_HS_BUSERR | 413 1.3.2.2 yamt PIIX_SMB_HS_FAILED)) == 0) 414 1.3.2.2 yamt /* Interrupt was not for us */ 415 1.3.2.2 yamt return (0); 416 1.3.2.2 yamt 417 1.3.2.3 yamt DPRINTF(("%s: intr st 0x%d\n", sc->sc_dev.dv_xname, st & 0xff)); 418 1.3.2.2 yamt 419 1.3.2.2 yamt /* Clear status bits */ 420 1.3.2.3 yamt bus_space_write_1(sc->sc_smb_iot, sc->sc_smb_ioh, PIIX_SMB_HS, st); 421 1.3.2.2 yamt 422 1.3.2.2 yamt /* Check for errors */ 423 1.3.2.2 yamt if (st & (PIIX_SMB_HS_DEVERR | PIIX_SMB_HS_BUSERR | 424 1.3.2.2 yamt PIIX_SMB_HS_FAILED)) { 425 1.3.2.2 yamt sc->sc_i2c_xfer.error = 1; 426 1.3.2.2 yamt goto done; 427 1.3.2.2 yamt } 428 1.3.2.2 yamt 429 1.3.2.2 yamt if (st & PIIX_SMB_HS_INTR) { 430 1.3.2.2 yamt if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op)) 431 1.3.2.2 yamt goto done; 432 1.3.2.2 yamt 433 1.3.2.2 yamt /* Read data */ 434 1.3.2.2 yamt b = sc->sc_i2c_xfer.buf; 435 1.3.2.2 yamt len = sc->sc_i2c_xfer.len; 436 1.3.2.2 yamt if (len > 0) 437 1.3.2.3 yamt b[0] = bus_space_read_1(sc->sc_smb_iot, sc->sc_smb_ioh, 438 1.3.2.2 yamt PIIX_SMB_HD0); 439 1.3.2.2 yamt if (len > 1) 440 1.3.2.3 yamt b[1] = bus_space_read_1(sc->sc_smb_iot, sc->sc_smb_ioh, 441 1.3.2.2 yamt PIIX_SMB_HD1); 442 1.3.2.2 yamt } 443 1.3.2.2 yamt 444 1.3.2.2 yamt done: 445 1.3.2.2 yamt if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0) 446 1.3.2.2 yamt wakeup(sc); 447 1.3.2.2 yamt return (1); 448 1.3.2.2 yamt } 449
Indexes created Thu Oct 02 01:09:59 GMT 2025