pm3fb.c revision 1.12
1 /* $NetBSD: pm3fb.c,v 1.12 2025/05/27 06:21:12 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2015 Naruaki Etomi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for Permedia 3 graphics controllers 30 * most of the following was adapted from the xf86-video-glint driver's 31 * pm3_accel.c, pm3_dac.c and pm2fb framebuffer console driver 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: pm3fb.c,v 1.12 2025/05/27 06:21:12 macallan Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/lwp.h> 42 #include <sys/kauth.h> 43 #include <sys/atomic.h> 44 45 #include <dev/videomode/videomode.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcidevs.h> 50 #include <dev/pci/pciio.h> 51 #include <dev/pci/pm3reg.h> 52 53 #include <dev/wscons/wsdisplayvar.h> 54 #include <dev/wscons/wsconsio.h> 55 #include <dev/wsfont/wsfont.h> 56 #include <dev/rasops/rasops.h> 57 #include <dev/wscons/wsdisplay_vconsvar.h> 58 #include <dev/wscons/wsdisplay_glyphcachevar.h> 59 #include <dev/pci/wsdisplay_pci.h> 60 61 #include <dev/i2c/i2cvar.h> 62 #include <dev/i2c/i2c_bitbang.h> 63 #include <dev/i2c/ddcvar.h> 64 #include <dev/videomode/videomode.h> 65 #include <dev/videomode/edidvar.h> 66 #include <dev/videomode/edidreg.h> 67 68 struct pm3fb_softc { 69 device_t sc_dev; 70 71 pci_chipset_tag_t sc_pc; 72 pcitag_t sc_pcitag; 73 74 bus_space_tag_t sc_memt; 75 bus_space_tag_t sc_iot; 76 77 bus_space_handle_t sc_regh; 78 bus_addr_t sc_fb, sc_reg; 79 bus_size_t sc_fbsize, sc_regsize; 80 81 int sc_width, sc_height, sc_depth, sc_stride; 82 int sc_locked; 83 struct vcons_screen sc_console_screen; 84 struct wsscreen_descr sc_defaultscreen_descr; 85 const struct wsscreen_descr *sc_screens[1]; 86 struct wsscreen_list sc_screenlist; 87 struct vcons_data vd; 88 int sc_mode; 89 u_char sc_cmap_red[256]; 90 u_char sc_cmap_green[256]; 91 u_char sc_cmap_blue[256]; 92 /* i2c stuff */ 93 struct i2c_controller sc_i2c; 94 uint8_t sc_edid_data[128]; 95 struct edid_info sc_ei; 96 const struct videomode *sc_videomode; 97 glyphcache sc_gc; 98 }; 99 100 static int pm3fb_match(device_t, cfdata_t, void *); 101 static void pm3fb_attach(device_t, device_t, void *); 102 103 CFATTACH_DECL_NEW(pm3fb, sizeof(struct pm3fb_softc), 104 pm3fb_match, pm3fb_attach, NULL, NULL); 105 106 extern const u_char rasops_cmap[768]; 107 108 static int pm3fb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 109 static paddr_t pm3fb_mmap(void *, void *, off_t, int); 110 static void pm3fb_init_screen(void *, struct vcons_screen *, int, long *); 111 112 static int pm3fb_putcmap(struct pm3fb_softc *, struct wsdisplay_cmap *); 113 static int pm3fb_getcmap(struct pm3fb_softc *, struct wsdisplay_cmap *); 114 static void pm3fb_init_palette(struct pm3fb_softc *); 115 static int pm3fb_putpalreg(struct pm3fb_softc *, uint8_t, uint8_t, uint8_t, uint8_t); 116 117 static void pm3fb_init(struct pm3fb_softc *); 118 static inline void pm3fb_wait(struct pm3fb_softc *, int); 119 static void pm3fb_flush_engine(struct pm3fb_softc *); 120 static void pm3fb_rectfill(struct pm3fb_softc *, int, int, int, int, uint32_t); 121 static void pm3fb_rectfill_a(void *, int, int, int, int, long); 122 static void pm3fb_bitblt(void *, int, int, int, int, int, int, int); 123 124 static void pm3fb_cursor(void *, int, int, int); 125 static void pm3fb_putchar(void *, int, int, u_int, long); 126 static void pm3fb_putchar_aa(void *, int, int, u_int, long); 127 static void pm3fb_copycols(void *, int, int, int, int); 128 static void pm3fb_erasecols(void *, int, int, int, long); 129 static void pm3fb_copyrows(void *, int, int, int); 130 static void pm3fb_eraserows(void *, int, int, long); 131 132 struct wsdisplay_accessops pm3fb_accessops = { 133 pm3fb_ioctl, 134 pm3fb_mmap, 135 NULL, /* alloc_screen */ 136 NULL, /* free_screen */ 137 NULL, /* show_screen */ 138 NULL, /* load_font */ 139 NULL, /* pollc */ 140 NULL /* scroll */ 141 }; 142 143 /* I2C glue */ 144 static int pm3fb_i2c_send_start(void *, int); 145 static int pm3fb_i2c_send_stop(void *, int); 146 static int pm3fb_i2c_initiate_xfer(void *, i2c_addr_t, int); 147 static int pm3fb_i2c_read_byte(void *, uint8_t *, int); 148 static int pm3fb_i2c_write_byte(void *, uint8_t, int); 149 150 /* I2C bitbang glue */ 151 static void pm3fb_i2cbb_set_bits(void *, uint32_t); 152 static void pm3fb_i2cbb_set_dir(void *, uint32_t); 153 static uint32_t pm3fb_i2cbb_read(void *); 154 155 static void pm3_setup_i2c(struct pm3fb_softc *); 156 157 static const struct i2c_bitbang_ops pm3fb_i2cbb_ops = { 158 pm3fb_i2cbb_set_bits, 159 pm3fb_i2cbb_set_dir, 160 pm3fb_i2cbb_read, 161 { 162 PM3_DD_SDA_IN, 163 PM3_DD_SCL_IN, 164 0, 165 0 166 } 167 }; 168 169 /* mode setting stuff */ 170 static int pm3fb_set_pll(struct pm3fb_softc *, int); 171 static void pm3fb_write_dac(struct pm3fb_softc *, int, uint8_t); 172 static void pm3fb_set_mode(struct pm3fb_softc *, const struct videomode *); 173 174 static inline void 175 pm3fb_wait(struct pm3fb_softc *sc, int slots) 176 { 177 uint32_t reg; 178 179 do { 180 reg = bus_space_read_4(sc->sc_memt, sc->sc_regh, 181 PM3_INPUT_FIFO_SPACE); 182 } while (reg <= slots); 183 } 184 185 static void 186 pm3fb_flush_engine(struct pm3fb_softc *sc) 187 { 188 189 pm3fb_wait(sc, 2); 190 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FILTER_MODE, PM3_FM_PASS_SYNC); 191 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SYNC, 0); 192 193 do { 194 while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_OUTPUT_FIFO_WORDS) == 0); 195 } while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_OUTPUT_FIFO) != 196 PM3_SYNC_TAG); 197 } 198 199 static int 200 pm3fb_match(device_t parent, cfdata_t match, void *aux) 201 { 202 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 203 204 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 205 return 0; 206 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3DLABS) 207 return 0; 208 209 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3DLABS_PERMEDIA3) 210 return 100; 211 return (0); 212 } 213 214 static void 215 pm3fb_attach(device_t parent, device_t self, void *aux) 216 { 217 struct pm3fb_softc *sc = device_private(self); 218 struct pci_attach_args *pa = aux; 219 struct rasops_info *ri; 220 struct wsemuldisplaydev_attach_args aa; 221 prop_dictionary_t dict; 222 unsigned long defattr; 223 bool is_console; 224 uint32_t flags; 225 226 sc->sc_pc = pa->pa_pc; 227 sc->sc_pcitag = pa->pa_tag; 228 sc->sc_memt = pa->pa_memt; 229 sc->sc_iot = pa->pa_iot; 230 sc->sc_dev = self; 231 232 pci_aprint_devinfo(pa, NULL); 233 234 /* 235 * fill in parameters from properties 236 * if we can't get a usable mode via DDC2 we'll use this to pick one, 237 * which is why we fill them in with some conservative values that 238 * hopefully work as a last resort 239 */ 240 dict = device_properties(self); 241 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 242 aprint_error("%s: no width property\n", device_xname(self)); 243 sc->sc_width = 1280; 244 } 245 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 246 aprint_error("%s: no height property\n", device_xname(self)); 247 sc->sc_height = 1024; 248 } 249 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 250 aprint_error("%s: no depth property\n", device_xname(self)); 251 sc->sc_depth = 8; 252 } 253 254 sc->sc_stride = sc->sc_width * (sc->sc_depth >> 3); 255 256 prop_dictionary_get_bool(dict, "is_console", &is_console); 257 258 pci_mapreg_info(pa->pa_pc, pa->pa_tag, 0x14, PCI_MAPREG_TYPE_MEM, 259 &sc->sc_fb, &sc->sc_fbsize, &flags); 260 261 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 262 &sc->sc_memt, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 263 aprint_error("%s: failed to map registers.\n", 264 device_xname(sc->sc_dev)); 265 } 266 267 /* 268 * Permedia 3 always return 64MB fbsize 269 * 16 MB should be enough -- more just wastes map entries 270 */ 271 if (sc->sc_fbsize != 0) 272 sc->sc_fbsize = (16 << 20); 273 274 /* 275 * Some Power Mac G4 model could not initialize these registers, 276 * Power Mac G4 (Mirrored Drive Doors), for example 277 */ 278 #if defined(__powerpc__) 279 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMCAPS, 0x02e311B8); 280 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMTIMINGS, 0x07424905); 281 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMCONTROL, 0x0c000003); 282 #endif 283 284 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 285 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 286 287 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 288 "default", 289 0, 0, 290 NULL, 291 8, 16, 292 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 293 NULL 294 }; 295 296 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 297 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 298 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 299 sc->sc_locked = 0; 300 301 pm3_setup_i2c(sc); 302 303 #ifdef PM3FB_DEBUG 304 sc->sc_height -= 200; 305 #endif 306 307 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 308 &pm3fb_accessops); 309 310 sc->vd.init_screen = pm3fb_init_screen; 311 sc->vd.show_screen_cookie = &sc->sc_gc; 312 sc->vd.show_screen_cb = glyphcache_adapt; 313 314 /* init engine here */ 315 pm3fb_init(sc); 316 317 sc->sc_gc.gc_bitblt = pm3fb_bitblt; 318 sc->sc_gc.gc_rectfill = pm3fb_rectfill_a; 319 sc->sc_gc.gc_blitcookie = sc; 320 sc->sc_gc.gc_rop = 3; 321 322 ri = &sc->sc_console_screen.scr_ri; 323 324 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, &defattr); 325 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 326 327 pm3fb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 328 ri->ri_devcmap[(defattr >> 16) & 0xff]); 329 pm3fb_init_palette(sc); 330 331 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 332 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 333 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 334 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 335 336 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 337 uimin(2047, (sc->sc_fbsize / sc->sc_stride)) 338 - sc->sc_height - 5, 339 sc->sc_width, 340 ri->ri_font->fontwidth, 341 ri->ri_font->fontheight, 342 defattr); 343 344 if (is_console) { 345 346 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 347 defattr); 348 vcons_replay_msgbuf(&sc->sc_console_screen); 349 } 350 351 352 aa.console = is_console; 353 aa.scrdata = &sc->sc_screenlist; 354 aa.accessops = &pm3fb_accessops; 355 aa.accesscookie = &sc->vd; 356 357 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 358 } 359 360 static int 361 pm3fb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 362 struct lwp *l) 363 { 364 struct vcons_data *vd = v; 365 struct pm3fb_softc *sc = vd->cookie; 366 struct wsdisplay_fbinfo *wdf; 367 struct vcons_screen *ms = vd->active; 368 369 switch (cmd) { 370 case WSDISPLAYIO_GTYPE: 371 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 372 return 0; 373 374 /* PCI config read/write passthrough. */ 375 case PCI_IOC_CFGREAD: 376 case PCI_IOC_CFGWRITE: 377 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 378 cmd, data, flag, l); 379 380 case WSDISPLAYIO_GET_BUSID: 381 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 382 sc->sc_pcitag, data); 383 384 case WSDISPLAYIO_GINFO: 385 if (ms == NULL) 386 return ENODEV; 387 wdf = (void *)data; 388 wdf->height = ms->scr_ri.ri_height; 389 wdf->width = ms->scr_ri.ri_width; 390 wdf->depth = ms->scr_ri.ri_depth; 391 wdf->cmsize = 256; 392 return 0; 393 394 case WSDISPLAYIO_GETCMAP: 395 return pm3fb_getcmap(sc, 396 (struct wsdisplay_cmap *)data); 397 398 case WSDISPLAYIO_PUTCMAP: 399 return pm3fb_putcmap(sc, 400 (struct wsdisplay_cmap *)data); 401 402 case WSDISPLAYIO_LINEBYTES: 403 *(u_int *)data = sc->sc_stride; 404 return 0; 405 406 case WSDISPLAYIO_SMODE: { 407 int new_mode = *(int*)data; 408 if (new_mode != sc->sc_mode) { 409 sc->sc_mode = new_mode; 410 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 411 /* first set the video mode */ 412 if (sc->sc_videomode != NULL) { 413 pm3fb_set_mode(sc, sc->sc_videomode); 414 } 415 /* then initialize the drawing engine */ 416 pm3fb_init(sc); 417 pm3fb_init_palette(sc); 418 vcons_redraw_screen(ms); 419 } else 420 pm3fb_flush_engine(sc); 421 } 422 } 423 return 0; 424 case WSDISPLAYIO_GET_EDID: { 425 struct wsdisplayio_edid_info *d = data; 426 d->data_size = 128; 427 if (d->buffer_size < 128) 428 return EAGAIN; 429 return copyout(sc->sc_edid_data, d->edid_data, 128); 430 } 431 432 case WSDISPLAYIO_GET_FBINFO: { 433 struct wsdisplayio_fbinfo *fbi = data; 434 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 435 } 436 } 437 return EPASSTHROUGH; 438 } 439 440 static paddr_t 441 pm3fb_mmap(void *v, void *vs, off_t offset, int prot) 442 { 443 struct vcons_data *vd = v; 444 struct pm3fb_softc *sc = vd->cookie; 445 paddr_t pa; 446 447 /* 'regular' framebuffer mmap()ing */ 448 if (offset < sc->sc_fbsize) { 449 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset, 0, prot, 450 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE); 451 return pa; 452 } 453 454 /* 455 * restrict all other mappings to processes with superuser privileges 456 * or the kernel itself 457 */ 458 if (kauth_authorize_machdep(kauth_cred_get(), 459 KAUTH_MACHDEP_UNMANAGEDMEM, 460 NULL, NULL, NULL, NULL) != 0) { 461 aprint_normal("%s: mmap() rejected.\n", 462 device_xname(sc->sc_dev)); 463 return -1; 464 } 465 466 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 467 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 468 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE); 469 return pa; 470 } 471 472 if ((offset >= sc->sc_reg) && 473 (offset < (sc->sc_reg + sc->sc_regsize))) { 474 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 475 BUS_SPACE_MAP_LINEAR); 476 return pa; 477 } 478 479 #ifdef PCI_MAGIC_IO_RANGE 480 /* allow mapping of IO space */ 481 if ((offset >= PCI_MAGIC_IO_RANGE) && 482 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 483 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 484 0, prot, BUS_SPACE_MAP_LINEAR); 485 return pa; 486 } 487 #endif 488 return -1; 489 } 490 491 static void 492 pm3fb_init_screen(void *cookie, struct vcons_screen *scr, 493 int existing, long *defattr) 494 { 495 struct pm3fb_softc *sc = cookie; 496 struct rasops_info *ri = &scr->scr_ri; 497 498 ri->ri_depth = sc->sc_depth; 499 ri->ri_width = sc->sc_width; 500 ri->ri_height = sc->sc_height; 501 ri->ri_stride = sc->sc_stride; 502 ri->ri_flg = RI_CENTER | RI_ENABLE_ALPHA; 503 if (sc->sc_depth == 8) 504 ri->ri_flg |= RI_8BIT_IS_RGB; 505 506 scr->scr_flags |= VCONS_LOADFONT; 507 508 rasops_init(ri, 0, 0); 509 ri->ri_caps = WSSCREEN_WSCOLORS | WSSCREEN_UNDERLINE | WSSCREEN_RESIZE; 510 511 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 512 sc->sc_width / ri->ri_font->fontwidth); 513 514 ri->ri_hw = scr; 515 ri->ri_ops.copyrows = pm3fb_copyrows; 516 ri->ri_ops.copycols = pm3fb_copycols; 517 ri->ri_ops.cursor = pm3fb_cursor; 518 ri->ri_ops.eraserows = pm3fb_eraserows; 519 ri->ri_ops.erasecols = pm3fb_erasecols; 520 if (FONT_IS_ALPHA(ri->ri_font)) { 521 ri->ri_ops.putchar = pm3fb_putchar_aa; 522 } else 523 ri->ri_ops.putchar = pm3fb_putchar; 524 } 525 526 static int 527 pm3fb_putcmap(struct pm3fb_softc *sc, struct wsdisplay_cmap *cm) 528 { 529 u_char *r, *g, *b; 530 u_int index = cm->index; 531 u_int count = cm->count; 532 int i, error; 533 u_char rbuf[256], gbuf[256], bbuf[256]; 534 535 if (cm->index >= 256 || cm->count > 256 || 536 (cm->index + cm->count) > 256) 537 return EINVAL; 538 error = copyin(cm->red, &rbuf[index], count); 539 if (error) 540 return error; 541 error = copyin(cm->green, &gbuf[index], count); 542 if (error) 543 return error; 544 error = copyin(cm->blue, &bbuf[index], count); 545 if (error) 546 return error; 547 548 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 549 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 550 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 551 552 r = &sc->sc_cmap_red[index]; 553 g = &sc->sc_cmap_green[index]; 554 b = &sc->sc_cmap_blue[index]; 555 556 for (i = 0; i < count; i++) { 557 pm3fb_putpalreg(sc, index, *r, *g, *b); 558 index++; 559 r++, g++, b++; 560 } 561 return 0; 562 } 563 564 static int 565 pm3fb_getcmap(struct pm3fb_softc *sc, struct wsdisplay_cmap *cm) 566 { 567 u_int index = cm->index; 568 u_int count = cm->count; 569 int error; 570 571 if (index >= 255 || count > 256 || index + count > 256) 572 return EINVAL; 573 574 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 575 if (error) 576 return error; 577 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 578 if (error) 579 return error; 580 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 581 if (error) 582 return error; 583 584 return 0; 585 } 586 587 static void 588 pm3fb_init_palette(struct pm3fb_softc *sc) 589 { 590 struct rasops_info *ri = &sc->sc_console_screen.scr_ri; 591 int i, j = 0; 592 uint8_t cmap[768]; 593 594 rasops_get_cmap(ri, cmap, sizeof(cmap)); 595 596 for (i = 0; i < 256; i++) { 597 sc->sc_cmap_red[i] = cmap[j]; 598 sc->sc_cmap_green[i] = cmap[j + 1]; 599 sc->sc_cmap_blue[i] = cmap[j + 2]; 600 pm3fb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 601 j += 3; 602 } 603 } 604 605 static int 606 pm3fb_putpalreg(struct pm3fb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, uint8_t b) 607 { 608 609 pm3fb_wait(sc, 4); 610 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_WRITE_IDX, idx); 611 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, r); 612 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, g); 613 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, b); 614 return 0; 615 } 616 617 static void 618 pm3fb_write_dac(struct pm3fb_softc *sc, int reg, uint8_t data) 619 { 620 621 pm3fb_wait(sc, 3); 622 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_LOW, reg & 0xff); 623 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_HIGH, (reg >> 8) & 0xff); 624 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_DATA, data); 625 } 626 627 static void 628 pm3fb_init(struct pm3fb_softc *sc) 629 { 630 631 pm3fb_wait(sc, 16); 632 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_DESTREAD_MODE, 0); 633 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_DESTREAD_ENABLES, 0); 634 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_SOURCEREAD_MODE, 0); 635 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_WRITE_MODE, 0); 636 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FILTER_MODE, PM3_FM_PASS_SYNC); 637 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STATISTIC_MODE, 0); 638 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DELTA_MODE, 0); 639 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RASTERIZER_MODE, 0); 640 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSOR_MODE, 0); 641 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LINESTIPPLE_MODE, 0); 642 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_AREASTIPPLE_MODE, 0); 643 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_GID_MODE, 0); 644 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DEPTH_MODE, 0); 645 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STENCIL_MODE, 0); 646 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STENCIL_DATA, 0); 647 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_COLORDDA_MODE, 0); 648 649 pm3fb_wait(sc, 16); 650 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREADDRESS_MODE, 0); 651 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREINDEX_MODE0, 0); 652 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREINDEX_MODE1, 0); 653 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREREAD_MODE, 0); 654 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXELLUT_MODE, 0); 655 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREFILTER_MODE, 0); 656 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITE_MODE, 0); 657 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOLOR_MODE, 0); 658 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITECOLOR_MODE1, 0); 659 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITEALPHA_MODE1, 0); 660 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITECOLOR_MODE0, 0); 661 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITEALPHA_MODE0, 0); 662 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FOG_MODE, 0); 663 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CHROMATEST_MODE, 0); 664 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHATEST_MODE, 0); 665 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ANTIALIAS_MODE, 0); 666 667 pm3fb_wait(sc, 16); 668 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_YUV_MODE, 0); 669 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHABLENDCOLOR_MODE, 0); 670 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHABLENDALPHA_MODE, 0); 671 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DITHER_MODE, 0); 672 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOGICALOP_MODE, 0); 673 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ROUTER_MODE, 0); 674 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_WINDOW, 0); 675 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 0); 676 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SPANCOLORMASK, 0xffffffff); 677 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_XBIAS, 0); 678 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_YBIAS, 0); 679 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DELTACONTROL, 0); 680 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_BITMASKPATTERN, 0xffffffff); 681 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_ENABLE, 682 PM3_FBDESTREAD_SET(0xff, 0xff, 0xff)); 683 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFERADDRESS0, 0); 684 685 pm3fb_wait(sc, 16); 686 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFEROFFSET0, 0); 687 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFERWIDTH0, 688 PM3_FBDESTREAD_BUFFERWIDTH_WIDTH(sc->sc_stride)); 689 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FB_DESTREAD_MODE, 690 PM3_FBDRM_ENABLE | PM3_FBDRM_ENABLE0); 691 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFERADDRESS, 0); 692 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFEROFFSET, 0); 693 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFERWIDTH, 694 PM3_FBSOURCEREAD_BUFFERWIDTH_WIDTH(sc->sc_stride)); 695 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_MODE, 696 PM3_FBSOURCEREAD_MODE_BLOCKING | PM3_FBSOURCEREAD_MODE_ENABLE); 697 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_PIXEL_SIZE, PM3_PS_8BIT); 698 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOFTWAREWRITEMASK, 0xffffffff); 699 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBHARDWAREWRITEMASK, 0xffffffff); 700 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITE_MODE, 701 PM3_FBWRITEMODE_WRITEENABLE | PM3_FBWRITEMODE_OPAQUESPAN | PM3_FBWRITEMODE_ENABLE0); 702 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFERADDRESS0, 0); 703 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFEROFFSET0, 0); 704 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFERWIDTH0, 705 PM3_FBWRITEBUFFERWIDTH_WIDTH(sc->sc_stride)); 706 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SIZEOF_FRAMEBUFFER, 4095); 707 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DITHER_MODE, PM3_CF_TO_DIM_CF(4)); 708 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DXDOM, 0); 709 710 pm3fb_wait(sc, 6); 711 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DXSUB, 0); 712 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DY, 1 << 16); 713 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTXDOM, 0); 714 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTXSUB, 0); 715 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTY, 0); 716 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_COUNT, 0); 717 } 718 719 static void 720 pm3fb_rectfill(struct pm3fb_softc *sc, int x, int y, int wi, int he, 721 uint32_t colour) 722 { 723 pm3fb_wait(sc, 4); 724 725 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 726 PM3_CONFIG2D_USECONSTANTSOURCE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | 727 (PM3_CONFIG2D_FOREGROUNDROP(0x3)) | PM3_CONFIG2D_FBWRITE_ENABLE); 728 729 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FOREGROUNDCOLOR, colour); 730 731 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 732 (((y) & 0xffff) << 16) | ((x) & 0xffff) ); 733 734 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 735 PM3_RENDER2D_XPOSITIVE | PM3_RENDER2D_YPOSITIVE | 736 PM3_RENDER2D_OPERATION_NORMAL | PM3_RENDER2D_SPANOPERATION | 737 (((he) & 0x0fff) << 16) | ((wi) & 0x0fff)); 738 739 #ifdef PM3FB_DEBUG 740 pm3fb_flush_engine(sc); 741 #endif 742 } 743 744 static void 745 pm3fb_rectfill_a(void *cookie, int x, int y, int wi, int he, long attr) 746 { 747 struct pm3fb_softc *sc = cookie; 748 749 pm3fb_rectfill(sc, x, y, wi, he, 750 sc->vd.active->scr_ri.ri_devcmap[(attr >> 24 & 0xf)]); 751 } 752 753 static void 754 pm3fb_bitblt(void *cookie, int srcx, int srcy, int dstx, int dsty, 755 int width, int height, int rop) 756 { 757 struct pm3fb_softc *sc = cookie; 758 int x_align, offset_x, offset_y; 759 uint32_t dir = 0; 760 761 offset_x = srcx - dstx; 762 offset_y = srcy - dsty; 763 764 if (dsty <= srcy) { 765 dir |= PM3_RENDER2D_YPOSITIVE; 766 } 767 768 if (dstx <= srcx) { 769 dir |= PM3_RENDER2D_XPOSITIVE; 770 } 771 772 x_align = (srcx & 0x1f); 773 774 pm3fb_wait(sc, 6); 775 776 if (rop == 3){ 777 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 778 PM3_CONFIG2D_USERSCISSOR_ENABLE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | PM3_CONFIG2D_BLOCKING | 779 PM3_CONFIG2D_FOREGROUNDROP(rop) | PM3_CONFIG2D_FBWRITE_ENABLE); 780 } else { 781 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 782 PM3_CONFIG2D_USERSCISSOR_ENABLE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | PM3_CONFIG2D_BLOCKING | 783 PM3_CONFIG2D_FOREGROUNDROP(rop) | PM3_CONFIG2D_FBWRITE_ENABLE | PM3_CONFIG2D_FBDESTREAD_ENABLE); 784 } 785 786 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSORMINXY, 787 ((dsty & 0x0fff) << 16) | (dstx & 0x0fff)); 788 789 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSORMAXXY, 790 (((dsty + height) & 0x0fff) << 16) | ((dstx + width) & 0x0fff)); 791 792 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFEROFFSET, 793 (((offset_y) & 0xffff) << 16) | ((offset_x) & 0xffff)); 794 795 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 796 (((dsty) & 0xffff) << 16) | ((dstx - x_align) & 0xffff)); 797 798 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 799 dir | 800 PM3_RENDER2D_OPERATION_NORMAL | PM3_RENDER2D_SPANOPERATION | PM3_RENDER2D_FBSOURCEREADENABLE | 801 (((height) & 0x0fff) << 16) | ((width + x_align) & 0x0fff)); 802 803 #ifdef PM3FB_DEBUG 804 pm3fb_flush_engine(sc); 805 #endif 806 } 807 808 static void 809 pm3fb_cursor(void *cookie, int on, int row, int col) 810 { 811 struct rasops_info *ri = cookie; 812 struct vcons_screen *scr = ri->ri_hw; 813 struct pm3fb_softc *sc = scr->scr_cookie; 814 int x, y, wi, he; 815 816 wi = ri->ri_font->fontwidth; 817 he = ri->ri_font->fontheight; 818 819 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 820 x = ri->ri_ccol * wi + ri->ri_xorigin; 821 y = ri->ri_crow * he + ri->ri_yorigin; 822 if (ri->ri_flg & RI_CURSOR) { 823 pm3fb_bitblt(sc, x, y, x, y, wi, he, 12); 824 ri->ri_flg &= ~RI_CURSOR; 825 } 826 ri->ri_crow = row; 827 ri->ri_ccol = col; 828 if (on) { 829 x = ri->ri_ccol * wi + ri->ri_xorigin; 830 y = ri->ri_crow * he + ri->ri_yorigin; 831 pm3fb_bitblt(sc, x, y, x, y, wi, he, 12); 832 ri->ri_flg |= RI_CURSOR; 833 } 834 } else { 835 scr->scr_ri.ri_crow = row; 836 scr->scr_ri.ri_ccol = col; 837 scr->scr_ri.ri_flg &= ~RI_CURSOR; 838 } 839 } 840 841 static void 842 pm3fb_putchar(void *cookie, int row, int col, u_int c, long attr) 843 { 844 struct rasops_info *ri = cookie; 845 struct wsdisplay_font *font = PICK_FONT(ri, c); 846 struct vcons_screen *scr = ri->ri_hw; 847 struct pm3fb_softc *sc = scr->scr_cookie; 848 uint32_t mode; 849 850 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 851 void *data; 852 uint32_t fg, bg; 853 int uc, i; 854 int x, y, wi, he; 855 856 wi = font->fontwidth; 857 he = font->fontheight; 858 859 if (!CHAR_IN_FONT(c, font)) 860 return; 861 862 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 863 fg = ri->ri_devcmap[(attr >> 24) & 0xf]; 864 x = ri->ri_xorigin + col * wi; 865 y = ri->ri_yorigin + row * he; 866 if (c == 0x20) { 867 pm3fb_rectfill(sc, x, y, wi, he, bg); 868 } else { 869 uc = c - font->firstchar; 870 data = (uint8_t *)font->data + uc * ri->ri_fontscale; 871 mode = PM3_RM_MASK_MIRROR; 872 873 #if BYTE_ORDER == LITTLE_ENDIAN 874 switch (ri->ri_font->stride) { 875 case 1: 876 mode |= 4 << 7; 877 break; 878 case 2: 879 mode |= 3 << 7; 880 break; 881 } 882 #else 883 switch (ri->ri_font->stride) { 884 case 1: 885 mode |= 3 << 7; 886 break; 887 case 2: 888 mode |= 2 << 7; 889 break; 890 } 891 #endif 892 pm3fb_wait(sc, 6); 893 bus_space_write_4(sc->sc_memt, sc->sc_regh, 894 PM3_FOREGROUNDCOLOR, fg); 895 bus_space_write_4(sc->sc_memt, sc->sc_regh, 896 PM3_BACKGROUNDCOLOR, bg); 897 898 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RASTERIZER_MODE, mode); 899 900 bus_space_write_4(sc->sc_memt, sc->sc_regh, 901 PM3_CONFIG2D, 902 PM3_CONFIG2D_USECONSTANTSOURCE | 903 PM3_CONFIG2D_FOREGROUNDROP_ENABLE | 904 PM3_CONFIG2D_FOREGROUNDROP(0x03) | 905 PM3_CONFIG2D_OPAQUESPAN | 906 PM3_CONFIG2D_FBWRITE_ENABLE); 907 908 bus_space_write_4(sc->sc_memt, sc->sc_regh, 909 PM3_RECTANGLEPOSITION, (((y) & 0xffff)<<16) | ((x) & 0xffff)); 910 911 bus_space_write_4(sc->sc_memt, sc->sc_regh, 912 PM3_RENDER2D, 913 PM3_RENDER2D_XPOSITIVE | 914 PM3_RENDER2D_YPOSITIVE | 915 PM3_RENDER2D_OPERATION_SYNCONBITMASK | 916 PM3_RENDER2D_SPANOPERATION | 917 ((wi) & 0x0fff) | (((he) & 0x0fff) << 16)); 918 919 pm3fb_wait(sc, he); 920 921 switch (ri->ri_font->stride) { 922 case 1: { 923 uint8_t *data8 = data; 924 uint32_t reg; 925 for (i = 0; i < he; i++) { 926 reg = *data8; 927 bus_space_write_4(sc->sc_memt, 928 sc->sc_regh, 929 PM3_BITMASKPATTERN, reg); 930 data8++; 931 } 932 break; 933 } 934 case 2: { 935 uint16_t *data16 = data; 936 uint32_t reg; 937 for (i = 0; i < he; i++) { 938 reg = *data16; 939 bus_space_write_4(sc->sc_memt, 940 sc->sc_regh, 941 PM3_BITMASKPATTERN, reg); 942 data16++; 943 } 944 break; 945 } 946 } 947 } 948 } 949 } 950 951 static void 952 pm3fb_putchar_aa(void *cookie, int row, int col, u_int c, long attr) 953 { 954 struct rasops_info *ri = cookie; 955 struct wsdisplay_font *font = PICK_FONT(ri, c); 956 struct vcons_screen *scr = ri->ri_hw; 957 struct pm3fb_softc *sc = scr->scr_cookie; 958 uint32_t bg, fg, pixel, latch, aval; 959 int i, j, x, y, wi, he, r, g, b; 960 int r1, g1, b1, r0, g0, b0, fgo, bgo, shift; 961 uint8_t *data8; 962 int rv = GC_NOPE, cnt = 0; 963 964 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 965 return; 966 967 if (!CHAR_IN_FONT(c, font)) 968 return; 969 970 wi = font->fontwidth; 971 he = font->fontheight; 972 973 bg = ri->ri_devcmap[(attr >> 16) & 0xf] & 0xff; 974 fg = ri->ri_devcmap[(attr >> 24) & 0xf] & 0xff; 975 x = ri->ri_xorigin + col * wi; 976 y = ri->ri_yorigin + row * he; 977 978 /* if we draw a whitespace we're done here */ 979 if (c == 0x20) { 980 pm3fb_rectfill(sc, x, y, wi, he, bg); 981 if (attr & 1) 982 pm3fb_rectfill(sc, x, y + he - 2, wi, 1, fg); 983 return; 984 } 985 986 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 987 if (rv == GC_OK) 988 return; 989 990 data8 = WSFONT_GLYPH(c, font); 991 992 pm3fb_wait(sc, 3); 993 994 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 995 PM3_CONFIG2D_OPAQUESPAN | 996 PM3_CONFIG2D_EXTERNALSOURCEDATA | 997 PM3_CONFIG2D_FBWRITE_ENABLE); 998 999 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 1000 (((y) & 0xffff) << 16) | ((x) & 0xffff) ); 1001 1002 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 1003 PM3_RENDER2D_XPOSITIVE | PM3_RENDER2D_YPOSITIVE | 1004 PM3_RENDER2D_OPERATION_SYNCONHOSTDATA | PM3_RENDER2D_SPANOPERATION | 1005 (((he) & 0x0fff) << 16) | ((wi) & 0x0fff)); 1006 1007 /* 1008 * we need the RGB colours here, so get offsets into rasops_cmap 1009 */ 1010 fgo = ((attr >> 24) & 0xf) * 3; 1011 bgo = ((attr >> 16) & 0xf) * 3; 1012 1013 r0 = rasops_cmap[bgo]; 1014 g0 = rasops_cmap[bgo + 1]; 1015 b0 = rasops_cmap[bgo + 2]; 1016 r1 = rasops_cmap[fgo]; 1017 g1 = rasops_cmap[fgo + 1]; 1018 b1 = rasops_cmap[fgo + 2]; 1019 1020 pm3fb_wait(sc, 20); 1021 1022 /* 1023 * we need two loops here because lines have to be padded to full 32bit 1024 */ 1025 for (i = 0; i < he; i++) { 1026 shift = 24; 1027 latch = 0; 1028 for (j = 0; j < wi; j++) { 1029 aval = *data8; 1030 if (aval == 0) { 1031 pixel = bg; 1032 } else if (aval == 255) { 1033 pixel = fg; 1034 } else { 1035 r = aval * r1 + (255 - aval) * r0; 1036 g = aval * g1 + (255 - aval) * g0; 1037 b = aval * b1 + (255 - aval) * b0; 1038 pixel = ((r & 0xe000) >> 8) | 1039 ((g & 0xe000) >> 11) | 1040 ((b & 0xc000) >> 14); 1041 } 1042 latch |= pixel << shift; 1043 shift -= 8; 1044 if (shift < 0) { 1045 bus_space_write_stream_4(sc->sc_memt, sc->sc_regh, 1046 PM3_SOURCE_DATA, latch); 1047 cnt++; 1048 if (cnt > 18) { 1049 pm3fb_wait(sc, 20); 1050 cnt = 0; 1051 } 1052 latch = 0; 1053 shift = 24; 1054 } 1055 data8++; 1056 } 1057 if (shift != 24) 1058 bus_space_write_stream_4(sc->sc_memt, sc->sc_regh, 1059 PM3_SOURCE_DATA, latch); 1060 } 1061 1062 if (rv == GC_ADD) { 1063 glyphcache_add(&sc->sc_gc, c, x, y); 1064 } 1065 1066 if (attr & 1) 1067 pm3fb_rectfill(sc, x, y + he - 2, wi, 1, fg); 1068 } 1069 1070 static void 1071 pm3fb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1072 { 1073 struct rasops_info *ri = cookie; 1074 struct vcons_screen *scr = ri->ri_hw; 1075 struct pm3fb_softc *sc = scr->scr_cookie; 1076 int32_t xs, xd, y, width, height; 1077 1078 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1079 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1080 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1081 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1082 width = ri->ri_font->fontwidth * ncols; 1083 height = ri->ri_font->fontheight; 1084 pm3fb_bitblt(sc, xs, y, xd, y, width, height, 3); 1085 } 1086 } 1087 1088 static void 1089 pm3fb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1090 { 1091 struct rasops_info *ri = cookie; 1092 struct vcons_screen *scr = ri->ri_hw; 1093 struct pm3fb_softc *sc = scr->scr_cookie; 1094 int32_t x, y, width, height, fg, bg, ul; 1095 1096 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1097 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1098 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1099 width = ri->ri_font->fontwidth * ncols; 1100 height = ri->ri_font->fontheight; 1101 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1102 1103 pm3fb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1104 } 1105 } 1106 1107 static void 1108 pm3fb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1109 { 1110 struct rasops_info *ri = cookie; 1111 struct vcons_screen *scr = ri->ri_hw; 1112 struct pm3fb_softc *sc = scr->scr_cookie; 1113 int32_t x, ys, yd, width, height; 1114 1115 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1116 x = ri->ri_xorigin; 1117 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1118 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1119 width = ri->ri_emuwidth; 1120 height = ri->ri_font->fontheight*nrows; 1121 pm3fb_bitblt(sc, x, ys, x, yd, width, height, 3); 1122 } 1123 } 1124 1125 static void 1126 pm3fb_eraserows(void *cookie, int row, int nrows, long fillattr) 1127 { 1128 struct rasops_info *ri = cookie; 1129 struct vcons_screen *scr = ri->ri_hw; 1130 struct pm3fb_softc *sc = scr->scr_cookie; 1131 int32_t x, y, width, height, fg, bg, ul; 1132 1133 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1134 x = ri->ri_xorigin; 1135 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1136 width = ri->ri_emuwidth; 1137 height = ri->ri_font->fontheight * nrows; 1138 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1139 1140 pm3fb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1141 } 1142 } 1143 1144 /* should be enough */ 1145 #define MODE_IS_VALID(m) (((m)->hdisplay < 2048)) 1146 1147 static void 1148 pm3_setup_i2c(struct pm3fb_softc *sc) 1149 { 1150 int i; 1151 1152 /* Fill in the i2c tag */ 1153 iic_tag_init(&sc->sc_i2c); 1154 sc->sc_i2c.ic_cookie = sc; 1155 sc->sc_i2c.ic_send_start = pm3fb_i2c_send_start; 1156 sc->sc_i2c.ic_send_stop = pm3fb_i2c_send_stop; 1157 sc->sc_i2c.ic_initiate_xfer = pm3fb_i2c_initiate_xfer; 1158 sc->sc_i2c.ic_read_byte = pm3fb_i2c_read_byte; 1159 sc->sc_i2c.ic_write_byte = pm3fb_i2c_write_byte; 1160 sc->sc_i2c.ic_exec = NULL; 1161 1162 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA, 0); 1163 1164 /* zero out the EDID buffer */ 1165 memset(sc->sc_edid_data, 0, 128); 1166 1167 /* Some monitors don't respond first time */ 1168 i = 0; 1169 while (sc->sc_edid_data[1] == 0 && i < 10) { 1170 ddc_read_edid(&sc->sc_i2c, sc->sc_edid_data, 128); 1171 i++; 1172 } 1173 1174 if (edid_parse(&sc->sc_edid_data[0], &sc->sc_ei) != -1) { 1175 /* 1176 * Now pick a mode. 1177 */ 1178 #ifdef PM3FB_DEBUG 1179 edid_print(&sc->sc_ei); 1180 #endif 1181 if ((sc->sc_ei.edid_preferred_mode != NULL)) { 1182 struct videomode *m = sc->sc_ei.edid_preferred_mode; 1183 if (MODE_IS_VALID(m)) { 1184 sc->sc_videomode = m; 1185 } else { 1186 aprint_error_dev(sc->sc_dev, 1187 "unable to use preferred mode\n"); 1188 } 1189 } 1190 /* 1191 * if we can't use the preferred mode go look for the 1192 * best one we can support 1193 */ 1194 if (sc->sc_videomode == NULL) { 1195 struct videomode *m = sc->sc_ei.edid_modes; 1196 1197 sort_modes(sc->sc_ei.edid_modes, 1198 &sc->sc_ei.edid_preferred_mode, 1199 sc->sc_ei.edid_nmodes); 1200 if (sc->sc_videomode == NULL) 1201 for (int n = 0; n < sc->sc_ei.edid_nmodes; n++) 1202 if (MODE_IS_VALID(&m[n])) { 1203 sc->sc_videomode = &m[n]; 1204 break; 1205 } 1206 } 1207 } 1208 if (sc->sc_videomode == NULL) { 1209 /* no EDID data? */ 1210 sc->sc_videomode = pick_mode_by_ref(sc->sc_width, 1211 sc->sc_height, 60); 1212 } 1213 if (sc->sc_videomode != NULL) { 1214 pm3fb_set_mode(sc, sc->sc_videomode); 1215 } 1216 } 1217 1218 /* I2C bitbanging */ 1219 static void pm3fb_i2cbb_set_bits(void *cookie, uint32_t bits) 1220 { 1221 struct pm3fb_softc *sc = cookie; 1222 uint32_t out; 1223 1224 out = bits << 2; /* bitmasks match the IN bits */ 1225 1226 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA, out); 1227 delay(100); 1228 } 1229 1230 static void pm3fb_i2cbb_set_dir(void *cookie, uint32_t dir) 1231 { 1232 /* Nothing to do */ 1233 } 1234 1235 static uint32_t pm3fb_i2cbb_read(void *cookie) 1236 { 1237 struct pm3fb_softc *sc = cookie; 1238 uint32_t bits; 1239 1240 bits = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA); 1241 return bits; 1242 } 1243 1244 /* higher level I2C stuff */ 1245 static int 1246 pm3fb_i2c_send_start(void *cookie, int flags) 1247 { 1248 1249 return (i2c_bitbang_send_start(cookie, flags, &pm3fb_i2cbb_ops)); 1250 } 1251 1252 static int 1253 pm3fb_i2c_send_stop(void *cookie, int flags) 1254 { 1255 1256 return (i2c_bitbang_send_stop(cookie, flags, &pm3fb_i2cbb_ops)); 1257 } 1258 1259 static int 1260 pm3fb_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 1261 { 1262 1263 return (i2c_bitbang_initiate_xfer(cookie, addr, flags, 1264 &pm3fb_i2cbb_ops)); 1265 } 1266 1267 static int 1268 pm3fb_i2c_read_byte(void *cookie, uint8_t *valp, int flags) 1269 { 1270 1271 return (i2c_bitbang_read_byte(cookie, valp, flags, &pm3fb_i2cbb_ops)); 1272 } 1273 1274 static int 1275 pm3fb_i2c_write_byte(void *cookie, uint8_t val, int flags) 1276 { 1277 return (i2c_bitbang_write_byte(cookie, val, flags, &pm3fb_i2cbb_ops)); 1278 } 1279 1280 static int 1281 pm3fb_set_pll(struct pm3fb_softc *sc, int freq) 1282 { 1283 uint8_t bf = 0, bpre = 0, bpost = 0; 1284 int count; 1285 unsigned long feedback, prescale, postscale, IntRef, VCO, out_freq, diff, VCOlow, VCOhigh, bdiff = 1000000; 1286 1287 freq *= 10; /* convert into 100Hz units */ 1288 1289 for (postscale = 0; postscale <= 5; postscale++) { 1290 /* 1291 * It is pointless going through the main loop if all values of 1292 * prescale produce an VCO outside the acceptable range 1293 */ 1294 prescale = 1; 1295 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1296 VCOlow = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1297 if (VCOlow > PM3_VCO_FREQ_MAX) 1298 continue; 1299 1300 prescale = 255; 1301 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1302 VCOhigh = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1303 if (VCOhigh < PM3_VCO_FREQ_MIN) 1304 continue; 1305 1306 for (prescale = 1; prescale <= 255; prescale++) { 1307 IntRef = PM3_EXT_CLOCK_FREQ / prescale; 1308 if (IntRef < PM3_INTREF_MIN || IntRef > PM3_INTREF_MAX) { 1309 if (IntRef > PM3_INTREF_MAX) { 1310 /* 1311 * Hopefully we will get into range as the prescale 1312 * value increases 1313 */ 1314 continue; 1315 } else { 1316 /* 1317 * already below minimum and it will only get worse 1318 * move to the next postscale value 1319 */ 1320 break; 1321 } 1322 } 1323 1324 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1325 1326 if (feedback > 255) { 1327 /* 1328 * prescale, feedbackscale & postscale registers 1329 * are only 8 bits wide 1330 */ 1331 break; 1332 } else if (feedback == 255) { 1333 count = 1; 1334 } else { 1335 count = 2; 1336 } 1337 1338 do { 1339 VCO = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1340 if (VCO >= PM3_VCO_FREQ_MIN && VCO <= PM3_VCO_FREQ_MAX) { 1341 out_freq = VCO / (1UL << postscale); 1342 diff = abs(out_freq - freq); 1343 if (diff < bdiff) { 1344 bdiff = diff; 1345 bf = feedback; 1346 bpre = prescale; 1347 bpost = postscale; 1348 if (diff == 0) 1349 goto out; 1350 } 1351 } 1352 feedback++; 1353 } while (--count >= 0); 1354 } 1355 } 1356 out: 1357 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_PRE_SCALE, bpre); 1358 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_FEEDBACK_SCALE, bf); 1359 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_POST_SCALE, bpost); 1360 return 0; 1361 } 1362 1363 static void 1364 pm3fb_set_mode(struct pm3fb_softc *sc, const struct videomode *mode) 1365 { 1366 int t1, t2, t3, t4, stride; 1367 uint32_t vclk, tmp1; 1368 uint8_t sync = 0; 1369 1370 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_BYPASS_MASK, 0xffffffff); 1371 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_APERTURE1_CONTROL, 0x00000000); 1372 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_APERTURE2_CONTROL, 0x00000000); 1373 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FIFODISCONNECT, 0x00000007); 1374 1375 t1 = mode->hsync_start - mode->hdisplay; 1376 t2 = mode->vsync_start - mode->vdisplay; 1377 t3 = mode->hsync_end - mode->hsync_start; 1378 t4 = mode->vsync_end - mode->vsync_start; 1379 stride = (mode->hdisplay + 31) & ~31; 1380 1381 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_TOTAL, 1382 (mode->htotal >> 4) - 1); 1383 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_SYNC_END, 1384 (t1 + t3) >> 4); 1385 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_SYNC_START, 1386 (t1 >> 4)); 1387 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_BLANK_END, 1388 (mode->htotal - mode->hdisplay) >> 4); 1389 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_GATE_END, 1390 (mode->htotal - mode->hdisplay) >> 4); 1391 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCREEN_STRIDE, 1392 (stride >> 4)); 1393 1394 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1395 PM3_VERT_TOTAL, mode->vtotal - 1); 1396 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1397 PM3_VERT_SYNC_END, t2 + t4 - 1); 1398 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1399 PM3_VERT_SYNC_START, t2 - 1); 1400 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1401 PM3_VERT_BLANK_END, mode->vtotal - mode->vdisplay); 1402 1403 /*8bpp*/ 1404 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1405 PM3_BYAPERTURE1MODE, PM3_BYAPERTUREMODE_PIXELSIZE_8BIT); 1406 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1407 PM3_BYAPERTURE2MODE, PM3_BYAPERTUREMODE_PIXELSIZE_8BIT); 1408 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_VIDEO_CONTROL, 1409 (PM3_VC_ENABLE | PM3_VC_HSC_ACTIVE_HIGH | PM3_VC_VSC_ACTIVE_HIGH | PM3_VC_PIXELSIZE_8BIT)); 1410 1411 vclk = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_V_CLOCK_CTL); 1412 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_V_CLOCK_CTL, (vclk & 0xFFFFFFFC)); 1413 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCREEN_BASE, 0x0); 1414 1415 tmp1 = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_CHIP_CONFIG); 1416 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CHIP_CONFIG, tmp1 & 0xFFFFFFFD); 1417 1418 pm3fb_set_pll(sc, mode->dot_clock); 1419 1420 if (mode->flags & VID_PHSYNC) 1421 sync |= PM3_SC_HSYNC_ACTIVE_HIGH; 1422 if (mode->flags & VID_PVSYNC) 1423 sync |= PM3_SC_VSYNC_ACTIVE_HIGH; 1424 1425 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1426 PM3_RD_PM3_INDEX_CONTROL, PM3_INCREMENT_DISABLE); 1427 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_SYNC_CONTROL, sync); 1428 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_DAC_CONTROL, 0x00); 1429 1430 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_PIXEL_SIZE, PM3_DACPS_8BIT); 1431 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_COLOR_FORMAT, 1432 (PM3_CF_ORDER_RGB | PM3_CF_VISUAL_256_COLOR)); 1433 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_MISC_CONTROL, PM3_MC_DAC_SIZE_8BIT); 1434 1435 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FIFOCONTROL, 0x00000905); 1436 1437 sc->sc_width = mode->hdisplay; 1438 sc->sc_height = mode->vdisplay; 1439 sc->sc_depth = 8; 1440 sc->sc_stride = stride; 1441 aprint_normal_dev(sc->sc_dev, "pm3 using %d x %d in 8 bit, stride %d\n", 1442 sc->sc_width, sc->sc_height, stride); 1443 } 1444
Indexes created Mon Sep 29 21:09:56 GMT 2025