pm3fb.c revision 1.14
1 /* $NetBSD: pm3fb.c,v 1.14 2025/06/16 08:39:01 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2015 Naruaki Etomi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for Permedia 3 graphics controllers 30 * most of the following was adapted from the xf86-video-glint driver's 31 * pm3_accel.c, pm3_dac.c and pm2fb framebuffer console driver 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: pm3fb.c,v 1.14 2025/06/16 08:39:01 macallan Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/lwp.h> 42 #include <sys/kauth.h> 43 #include <sys/atomic.h> 44 45 #include <dev/videomode/videomode.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcidevs.h> 50 #include <dev/pci/pciio.h> 51 #include <dev/pci/pm3reg.h> 52 53 #include <dev/wscons/wsdisplayvar.h> 54 #include <dev/wscons/wsconsio.h> 55 #include <dev/wsfont/wsfont.h> 56 #include <dev/rasops/rasops.h> 57 #include <dev/wscons/wsdisplay_vconsvar.h> 58 #include <dev/wscons/wsdisplay_glyphcachevar.h> 59 #include <dev/pci/wsdisplay_pci.h> 60 61 #include <dev/i2c/i2cvar.h> 62 #include <dev/i2c/i2c_bitbang.h> 63 #include <dev/i2c/ddcvar.h> 64 #include <dev/videomode/videomode.h> 65 #include <dev/videomode/edidvar.h> 66 #include <dev/videomode/edidreg.h> 67 68 #include "opt_pm3fb.h" 69 70 struct pm3fb_softc { 71 device_t sc_dev; 72 73 pci_chipset_tag_t sc_pc; 74 pcitag_t sc_pcitag; 75 76 bus_space_tag_t sc_memt; 77 bus_space_tag_t sc_iot; 78 79 bus_space_handle_t sc_regh; 80 bus_addr_t sc_fb, sc_reg; 81 bus_size_t sc_fbsize, sc_regsize; 82 83 int sc_width, sc_height, sc_depth, sc_stride; 84 int sc_locked; 85 struct vcons_screen sc_console_screen; 86 struct wsscreen_descr sc_defaultscreen_descr; 87 const struct wsscreen_descr *sc_screens[1]; 88 struct wsscreen_list sc_screenlist; 89 struct vcons_data vd; 90 int sc_mode; 91 u_char sc_cmap_red[256]; 92 u_char sc_cmap_green[256]; 93 u_char sc_cmap_blue[256]; 94 /* i2c stuff */ 95 struct i2c_controller sc_i2c; 96 uint8_t sc_edid_data[128]; 97 struct edid_info sc_ei; 98 const struct videomode *sc_videomode; 99 glyphcache sc_gc; 100 }; 101 102 static int pm3fb_match(device_t, cfdata_t, void *); 103 static void pm3fb_attach(device_t, device_t, void *); 104 105 CFATTACH_DECL_NEW(pm3fb, sizeof(struct pm3fb_softc), 106 pm3fb_match, pm3fb_attach, NULL, NULL); 107 108 extern const u_char rasops_cmap[768]; 109 110 static int pm3fb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 111 static paddr_t pm3fb_mmap(void *, void *, off_t, int); 112 static void pm3fb_init_screen(void *, struct vcons_screen *, int, long *); 113 114 static int pm3fb_putcmap(struct pm3fb_softc *, struct wsdisplay_cmap *); 115 static int pm3fb_getcmap(struct pm3fb_softc *, struct wsdisplay_cmap *); 116 static void pm3fb_init_palette(struct pm3fb_softc *); 117 static int pm3fb_putpalreg(struct pm3fb_softc *, uint8_t, uint8_t, uint8_t, uint8_t); 118 119 static void pm3fb_init(struct pm3fb_softc *); 120 static inline void pm3fb_wait(struct pm3fb_softc *, int); 121 static void pm3fb_flush_engine(struct pm3fb_softc *); 122 static void pm3fb_rectfill(struct pm3fb_softc *, int, int, int, int, uint32_t); 123 static void pm3fb_rectfill_a(void *, int, int, int, int, long); 124 static void pm3fb_bitblt(void *, int, int, int, int, int, int, int); 125 126 static void pm3fb_cursor(void *, int, int, int); 127 static void pm3fb_putchar(void *, int, int, u_int, long); 128 static void pm3fb_putchar_aa(void *, int, int, u_int, long); 129 static void pm3fb_copycols(void *, int, int, int, int); 130 static void pm3fb_erasecols(void *, int, int, int, long); 131 static void pm3fb_copyrows(void *, int, int, int); 132 static void pm3fb_eraserows(void *, int, int, long); 133 134 struct wsdisplay_accessops pm3fb_accessops = { 135 pm3fb_ioctl, 136 pm3fb_mmap, 137 NULL, /* alloc_screen */ 138 NULL, /* free_screen */ 139 NULL, /* show_screen */ 140 NULL, /* load_font */ 141 NULL, /* pollc */ 142 NULL /* scroll */ 143 }; 144 145 /* I2C glue */ 146 static int pm3fb_i2c_send_start(void *, int); 147 static int pm3fb_i2c_send_stop(void *, int); 148 static int pm3fb_i2c_initiate_xfer(void *, i2c_addr_t, int); 149 static int pm3fb_i2c_read_byte(void *, uint8_t *, int); 150 static int pm3fb_i2c_write_byte(void *, uint8_t, int); 151 152 /* I2C bitbang glue */ 153 static void pm3fb_i2cbb_set_bits(void *, uint32_t); 154 static void pm3fb_i2cbb_set_dir(void *, uint32_t); 155 static uint32_t pm3fb_i2cbb_read(void *); 156 157 static void pm3_setup_i2c(struct pm3fb_softc *); 158 159 static const struct i2c_bitbang_ops pm3fb_i2cbb_ops = { 160 pm3fb_i2cbb_set_bits, 161 pm3fb_i2cbb_set_dir, 162 pm3fb_i2cbb_read, 163 { 164 PM3_DD_SDA_IN, 165 PM3_DD_SCL_IN, 166 0, 167 0 168 } 169 }; 170 171 /* mode setting stuff */ 172 static int pm3fb_set_pll(struct pm3fb_softc *, int); 173 static void pm3fb_write_dac(struct pm3fb_softc *, int, uint8_t); 174 static void pm3fb_set_mode(struct pm3fb_softc *, const struct videomode *); 175 176 static inline void 177 pm3fb_wait(struct pm3fb_softc *sc, int slots) 178 { 179 uint32_t reg; 180 181 do { 182 reg = bus_space_read_4(sc->sc_memt, sc->sc_regh, 183 PM3_INPUT_FIFO_SPACE); 184 } while (reg <= slots); 185 } 186 187 static void 188 pm3fb_flush_engine(struct pm3fb_softc *sc) 189 { 190 191 pm3fb_wait(sc, 2); 192 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FILTER_MODE, PM3_FM_PASS_SYNC); 193 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SYNC, 0); 194 195 do { 196 while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_OUTPUT_FIFO_WORDS) == 0); 197 } while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_OUTPUT_FIFO) != 198 PM3_SYNC_TAG); 199 } 200 201 static int 202 pm3fb_match(device_t parent, cfdata_t match, void *aux) 203 { 204 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 205 206 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 207 return 0; 208 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_3DLABS) 209 return 0; 210 211 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3DLABS_PERMEDIA3) 212 return 100; 213 return (0); 214 } 215 216 static void 217 pm3fb_attach(device_t parent, device_t self, void *aux) 218 { 219 struct pm3fb_softc *sc = device_private(self); 220 struct pci_attach_args *pa = aux; 221 struct rasops_info *ri; 222 struct wsemuldisplaydev_attach_args aa; 223 prop_dictionary_t dict; 224 unsigned long defattr; 225 bool is_console; 226 uint32_t flags; 227 228 sc->sc_pc = pa->pa_pc; 229 sc->sc_pcitag = pa->pa_tag; 230 sc->sc_memt = pa->pa_memt; 231 sc->sc_iot = pa->pa_iot; 232 sc->sc_dev = self; 233 234 pci_aprint_devinfo(pa, NULL); 235 236 /* 237 * fill in parameters from properties 238 * if we can't get a usable mode via DDC2 we'll use this to pick one, 239 * which is why we fill them in with some conservative values that 240 * hopefully work as a last resort 241 */ 242 dict = device_properties(self); 243 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 244 aprint_error("%s: no width property\n", device_xname(self)); 245 sc->sc_width = 1280; 246 } 247 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 248 aprint_error("%s: no height property\n", device_xname(self)); 249 sc->sc_height = 1024; 250 } 251 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 252 aprint_error("%s: no depth property\n", device_xname(self)); 253 sc->sc_depth = 8; 254 } 255 256 sc->sc_stride = sc->sc_width * (sc->sc_depth >> 3); 257 258 prop_dictionary_get_bool(dict, "is_console", &is_console); 259 260 pci_mapreg_info(pa->pa_pc, pa->pa_tag, 0x14, PCI_MAPREG_TYPE_MEM, 261 &sc->sc_fb, &sc->sc_fbsize, &flags); 262 263 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 264 &sc->sc_memt, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 265 aprint_error("%s: failed to map registers.\n", 266 device_xname(sc->sc_dev)); 267 } 268 269 /* 270 * Permedia 3 always return 64MB fbsize 271 * 16 MB should be enough -- more just wastes map entries 272 */ 273 if (sc->sc_fbsize != 0) 274 sc->sc_fbsize = (16 << 20); 275 276 /* 277 * Some Power Mac G4 model could not initialize these registers, 278 * Power Mac G4 (Mirrored Drive Doors), for example 279 */ 280 #if defined(__powerpc__) 281 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMCAPS, 0x02e311B8); 282 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMTIMINGS, 0x07424905); 283 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOCALMEMCONTROL, 0x0c000003); 284 #endif 285 286 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 287 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 288 289 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 290 "default", 291 0, 0, 292 NULL, 293 8, 16, 294 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 295 NULL 296 }; 297 298 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 299 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 300 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 301 sc->sc_locked = 0; 302 303 pm3_setup_i2c(sc); 304 305 #ifdef PM3FB_DEBUG 306 sc->sc_height -= 200; 307 #endif 308 309 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 310 &pm3fb_accessops); 311 312 sc->vd.init_screen = pm3fb_init_screen; 313 sc->vd.show_screen_cookie = &sc->sc_gc; 314 sc->vd.show_screen_cb = glyphcache_adapt; 315 316 /* init engine here */ 317 pm3fb_init(sc); 318 319 sc->sc_gc.gc_bitblt = pm3fb_bitblt; 320 sc->sc_gc.gc_rectfill = pm3fb_rectfill_a; 321 sc->sc_gc.gc_blitcookie = sc; 322 sc->sc_gc.gc_rop = 3; 323 324 ri = &sc->sc_console_screen.scr_ri; 325 326 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, &defattr); 327 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 328 329 pm3fb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 330 ri->ri_devcmap[(defattr >> 16) & 0xff]); 331 pm3fb_init_palette(sc); 332 333 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 334 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 335 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 336 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 337 338 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 339 uimin(2047, (sc->sc_fbsize / sc->sc_stride)) 340 - sc->sc_height - 5, 341 sc->sc_width, 342 ri->ri_font->fontwidth, 343 ri->ri_font->fontheight, 344 defattr); 345 346 if (is_console) { 347 348 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 349 defattr); 350 vcons_replay_msgbuf(&sc->sc_console_screen); 351 } 352 353 354 aa.console = is_console; 355 aa.scrdata = &sc->sc_screenlist; 356 aa.accessops = &pm3fb_accessops; 357 aa.accesscookie = &sc->vd; 358 359 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint, CFARGS_NONE); 360 } 361 362 static int 363 pm3fb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 364 struct lwp *l) 365 { 366 struct vcons_data *vd = v; 367 struct pm3fb_softc *sc = vd->cookie; 368 struct wsdisplay_fbinfo *wdf; 369 struct vcons_screen *ms = vd->active; 370 371 switch (cmd) { 372 case WSDISPLAYIO_GTYPE: 373 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 374 return 0; 375 376 /* PCI config read/write passthrough. */ 377 case PCI_IOC_CFGREAD: 378 case PCI_IOC_CFGWRITE: 379 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 380 cmd, data, flag, l); 381 382 case WSDISPLAYIO_GET_BUSID: 383 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 384 sc->sc_pcitag, data); 385 386 case WSDISPLAYIO_GINFO: 387 if (ms == NULL) 388 return ENODEV; 389 wdf = (void *)data; 390 wdf->height = ms->scr_ri.ri_height; 391 wdf->width = ms->scr_ri.ri_width; 392 wdf->depth = ms->scr_ri.ri_depth; 393 wdf->cmsize = 256; 394 return 0; 395 396 case WSDISPLAYIO_GETCMAP: 397 return pm3fb_getcmap(sc, 398 (struct wsdisplay_cmap *)data); 399 400 case WSDISPLAYIO_PUTCMAP: 401 return pm3fb_putcmap(sc, 402 (struct wsdisplay_cmap *)data); 403 404 case WSDISPLAYIO_LINEBYTES: 405 *(u_int *)data = sc->sc_stride; 406 return 0; 407 408 case WSDISPLAYIO_SMODE: { 409 int new_mode = *(int*)data; 410 if (new_mode != sc->sc_mode) { 411 sc->sc_mode = new_mode; 412 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 413 /* first set the video mode */ 414 if (sc->sc_videomode != NULL) { 415 pm3fb_set_mode(sc, sc->sc_videomode); 416 } 417 /* then initialize the drawing engine */ 418 pm3fb_init(sc); 419 pm3fb_init_palette(sc); 420 /* clean out the glyph cache */ 421 glyphcache_wipe(&sc->sc_gc); 422 vcons_redraw_screen(ms); 423 } else 424 pm3fb_flush_engine(sc); 425 } 426 } 427 return 0; 428 case WSDISPLAYIO_GET_EDID: { 429 struct wsdisplayio_edid_info *d = data; 430 d->data_size = 128; 431 if (d->buffer_size < 128) 432 return EAGAIN; 433 return copyout(sc->sc_edid_data, d->edid_data, 128); 434 } 435 436 case WSDISPLAYIO_GET_FBINFO: { 437 struct wsdisplayio_fbinfo *fbi = data; 438 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 439 } 440 } 441 return EPASSTHROUGH; 442 } 443 444 static paddr_t 445 pm3fb_mmap(void *v, void *vs, off_t offset, int prot) 446 { 447 struct vcons_data *vd = v; 448 struct pm3fb_softc *sc = vd->cookie; 449 paddr_t pa; 450 451 /* 'regular' framebuffer mmap()ing */ 452 if (offset < sc->sc_fbsize) { 453 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset, 0, prot, 454 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE); 455 return pa; 456 } 457 458 /* 459 * restrict all other mappings to processes with superuser privileges 460 * or the kernel itself 461 */ 462 if (kauth_authorize_machdep(kauth_cred_get(), 463 KAUTH_MACHDEP_UNMANAGEDMEM, 464 NULL, NULL, NULL, NULL) != 0) { 465 aprint_normal("%s: mmap() rejected.\n", 466 device_xname(sc->sc_dev)); 467 return -1; 468 } 469 470 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 471 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 472 BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE); 473 return pa; 474 } 475 476 if ((offset >= sc->sc_reg) && 477 (offset < (sc->sc_reg + sc->sc_regsize))) { 478 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 479 BUS_SPACE_MAP_LINEAR); 480 return pa; 481 } 482 483 #ifdef PCI_MAGIC_IO_RANGE 484 /* allow mapping of IO space */ 485 if ((offset >= PCI_MAGIC_IO_RANGE) && 486 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 487 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 488 0, prot, BUS_SPACE_MAP_LINEAR); 489 return pa; 490 } 491 #endif 492 return -1; 493 } 494 495 static void 496 pm3fb_init_screen(void *cookie, struct vcons_screen *scr, 497 int existing, long *defattr) 498 { 499 struct pm3fb_softc *sc = cookie; 500 struct rasops_info *ri = &scr->scr_ri; 501 502 ri->ri_depth = sc->sc_depth; 503 ri->ri_width = sc->sc_width; 504 ri->ri_height = sc->sc_height; 505 ri->ri_stride = sc->sc_stride; 506 ri->ri_flg = RI_CENTER | RI_ENABLE_ALPHA | RI_FULLCLEAR; 507 if (sc->sc_depth == 8) 508 ri->ri_flg |= RI_8BIT_IS_RGB; 509 510 scr->scr_flags |= VCONS_LOADFONT; 511 512 rasops_init(ri, 0, 0); 513 ri->ri_caps = WSSCREEN_WSCOLORS | WSSCREEN_UNDERLINE | WSSCREEN_RESIZE; 514 515 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 516 sc->sc_width / ri->ri_font->fontwidth); 517 518 ri->ri_hw = scr; 519 ri->ri_ops.copyrows = pm3fb_copyrows; 520 ri->ri_ops.copycols = pm3fb_copycols; 521 ri->ri_ops.cursor = pm3fb_cursor; 522 ri->ri_ops.eraserows = pm3fb_eraserows; 523 ri->ri_ops.erasecols = pm3fb_erasecols; 524 if (FONT_IS_ALPHA(ri->ri_font)) { 525 ri->ri_ops.putchar = pm3fb_putchar_aa; 526 } else 527 ri->ri_ops.putchar = pm3fb_putchar; 528 } 529 530 static int 531 pm3fb_putcmap(struct pm3fb_softc *sc, struct wsdisplay_cmap *cm) 532 { 533 u_char *r, *g, *b; 534 u_int index = cm->index; 535 u_int count = cm->count; 536 int i, error; 537 u_char rbuf[256], gbuf[256], bbuf[256]; 538 539 if (cm->index >= 256 || cm->count > 256 || 540 (cm->index + cm->count) > 256) 541 return EINVAL; 542 error = copyin(cm->red, &rbuf[index], count); 543 if (error) 544 return error; 545 error = copyin(cm->green, &gbuf[index], count); 546 if (error) 547 return error; 548 error = copyin(cm->blue, &bbuf[index], count); 549 if (error) 550 return error; 551 552 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 553 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 554 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 555 556 r = &sc->sc_cmap_red[index]; 557 g = &sc->sc_cmap_green[index]; 558 b = &sc->sc_cmap_blue[index]; 559 560 for (i = 0; i < count; i++) { 561 pm3fb_putpalreg(sc, index, *r, *g, *b); 562 index++; 563 r++, g++, b++; 564 } 565 return 0; 566 } 567 568 static int 569 pm3fb_getcmap(struct pm3fb_softc *sc, struct wsdisplay_cmap *cm) 570 { 571 u_int index = cm->index; 572 u_int count = cm->count; 573 int error; 574 575 if (index >= 255 || count > 256 || index + count > 256) 576 return EINVAL; 577 578 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 579 if (error) 580 return error; 581 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 582 if (error) 583 return error; 584 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 585 if (error) 586 return error; 587 588 return 0; 589 } 590 591 static void 592 pm3fb_init_palette(struct pm3fb_softc *sc) 593 { 594 struct rasops_info *ri = &sc->sc_console_screen.scr_ri; 595 int i, j = 0; 596 uint8_t cmap[768]; 597 598 rasops_get_cmap(ri, cmap, sizeof(cmap)); 599 600 for (i = 0; i < 256; i++) { 601 sc->sc_cmap_red[i] = cmap[j]; 602 sc->sc_cmap_green[i] = cmap[j + 1]; 603 sc->sc_cmap_blue[i] = cmap[j + 2]; 604 pm3fb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 605 j += 3; 606 } 607 } 608 609 static int 610 pm3fb_putpalreg(struct pm3fb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, uint8_t b) 611 { 612 613 pm3fb_wait(sc, 4); 614 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_WRITE_IDX, idx); 615 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, r); 616 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, g); 617 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_PAL_DATA, b); 618 return 0; 619 } 620 621 static void 622 pm3fb_write_dac(struct pm3fb_softc *sc, int reg, uint8_t data) 623 { 624 625 pm3fb_wait(sc, 3); 626 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_LOW, reg & 0xff); 627 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_HIGH, (reg >> 8) & 0xff); 628 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM3_DAC_INDEX_DATA, data); 629 } 630 631 static void 632 pm3fb_init(struct pm3fb_softc *sc) 633 { 634 635 pm3fb_wait(sc, 16); 636 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_DESTREAD_MODE, 0); 637 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_DESTREAD_ENABLES, 0); 638 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_SOURCEREAD_MODE, 0); 639 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LB_WRITE_MODE, 0); 640 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FILTER_MODE, PM3_FM_PASS_SYNC); 641 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STATISTIC_MODE, 0); 642 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DELTA_MODE, 0); 643 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RASTERIZER_MODE, 0); 644 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSOR_MODE, 0); 645 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LINESTIPPLE_MODE, 0); 646 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_AREASTIPPLE_MODE, 0); 647 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_GID_MODE, 0); 648 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DEPTH_MODE, 0); 649 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STENCIL_MODE, 0); 650 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STENCIL_DATA, 0); 651 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_COLORDDA_MODE, 0); 652 653 pm3fb_wait(sc, 16); 654 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREADDRESS_MODE, 0); 655 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREINDEX_MODE0, 0); 656 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREINDEX_MODE1, 0); 657 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREREAD_MODE, 0); 658 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXELLUT_MODE, 0); 659 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTUREFILTER_MODE, 0); 660 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITE_MODE, 0); 661 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOLOR_MODE, 0); 662 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITECOLOR_MODE1, 0); 663 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITEALPHA_MODE1, 0); 664 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITECOLOR_MODE0, 0); 665 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_TEXTURECOMPOSITEALPHA_MODE0, 0); 666 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FOG_MODE, 0); 667 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CHROMATEST_MODE, 0); 668 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHATEST_MODE, 0); 669 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ANTIALIAS_MODE, 0); 670 671 pm3fb_wait(sc, 16); 672 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_YUV_MODE, 0); 673 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHABLENDCOLOR_MODE, 0); 674 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ALPHABLENDALPHA_MODE, 0); 675 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DITHER_MODE, 0); 676 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_LOGICALOP_MODE, 0); 677 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_ROUTER_MODE, 0); 678 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_WINDOW, 0); 679 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 0); 680 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SPANCOLORMASK, 0xffffffff); 681 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_XBIAS, 0); 682 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_YBIAS, 0); 683 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DELTACONTROL, 0); 684 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_BITMASKPATTERN, 0xffffffff); 685 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_ENABLE, 686 PM3_FBDESTREAD_SET(0xff, 0xff, 0xff)); 687 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFERADDRESS0, 0); 688 689 pm3fb_wait(sc, 16); 690 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFEROFFSET0, 0); 691 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBDESTREAD_BUFFERWIDTH0, 692 PM3_FBDESTREAD_BUFFERWIDTH_WIDTH(sc->sc_stride)); 693 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FB_DESTREAD_MODE, 694 PM3_FBDRM_ENABLE | PM3_FBDRM_ENABLE0); 695 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFERADDRESS, 0); 696 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFEROFFSET, 0); 697 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFERWIDTH, 698 PM3_FBSOURCEREAD_BUFFERWIDTH_WIDTH(sc->sc_stride)); 699 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_MODE, 700 PM3_FBSOURCEREAD_MODE_BLOCKING | PM3_FBSOURCEREAD_MODE_ENABLE); 701 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_PIXEL_SIZE, PM3_PS_8BIT); 702 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOFTWAREWRITEMASK, 0xffffffff); 703 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBHARDWAREWRITEMASK, 0xffffffff); 704 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITE_MODE, 705 PM3_FBWRITEMODE_WRITEENABLE | PM3_FBWRITEMODE_OPAQUESPAN | PM3_FBWRITEMODE_ENABLE0); 706 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFERADDRESS0, 0); 707 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFEROFFSET0, 0); 708 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBWRITEBUFFERWIDTH0, 709 PM3_FBWRITEBUFFERWIDTH_WIDTH(sc->sc_stride)); 710 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SIZEOF_FRAMEBUFFER, 4095); 711 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DITHER_MODE, PM3_CF_TO_DIM_CF(4)); 712 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DXDOM, 0); 713 714 pm3fb_wait(sc, 6); 715 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DXSUB, 0); 716 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DY, 1 << 16); 717 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTXDOM, 0); 718 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTXSUB, 0); 719 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_STARTY, 0); 720 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_COUNT, 0); 721 } 722 723 static void 724 pm3fb_rectfill(struct pm3fb_softc *sc, int x, int y, int wi, int he, 725 uint32_t colour) 726 { 727 pm3fb_wait(sc, 4); 728 729 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 730 PM3_CONFIG2D_USECONSTANTSOURCE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | 731 (PM3_CONFIG2D_FOREGROUNDROP(0x3)) | PM3_CONFIG2D_FBWRITE_ENABLE); 732 733 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FOREGROUNDCOLOR, colour); 734 735 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 736 (((y) & 0xffff) << 16) | ((x) & 0xffff) ); 737 738 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 739 PM3_RENDER2D_XPOSITIVE | PM3_RENDER2D_YPOSITIVE | 740 PM3_RENDER2D_OPERATION_NORMAL | PM3_RENDER2D_SPANOPERATION | 741 (((he) & 0x0fff) << 16) | ((wi) & 0x0fff)); 742 743 #ifdef PM3FB_DEBUG 744 pm3fb_flush_engine(sc); 745 #endif 746 } 747 748 static void 749 pm3fb_rectfill_a(void *cookie, int x, int y, int wi, int he, long attr) 750 { 751 struct pm3fb_softc *sc = cookie; 752 753 pm3fb_rectfill(sc, x, y, wi, he, 754 sc->vd.active->scr_ri.ri_devcmap[(attr >> 24 & 0xf)]); 755 } 756 757 static void 758 pm3fb_bitblt(void *cookie, int srcx, int srcy, int dstx, int dsty, 759 int width, int height, int rop) 760 { 761 struct pm3fb_softc *sc = cookie; 762 int x_align, offset_x, offset_y; 763 uint32_t dir = 0; 764 765 offset_x = srcx - dstx; 766 offset_y = srcy - dsty; 767 768 if (dsty <= srcy) { 769 dir |= PM3_RENDER2D_YPOSITIVE; 770 } 771 772 if (dstx <= srcx) { 773 dir |= PM3_RENDER2D_XPOSITIVE; 774 } 775 776 x_align = (srcx & 0x1f); 777 778 pm3fb_wait(sc, 6); 779 780 if (rop == 3){ 781 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 782 PM3_CONFIG2D_USERSCISSOR_ENABLE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | PM3_CONFIG2D_BLOCKING | 783 PM3_CONFIG2D_FOREGROUNDROP(rop) | PM3_CONFIG2D_FBWRITE_ENABLE); 784 } else { 785 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 786 PM3_CONFIG2D_USERSCISSOR_ENABLE | PM3_CONFIG2D_FOREGROUNDROP_ENABLE | PM3_CONFIG2D_BLOCKING | 787 PM3_CONFIG2D_FOREGROUNDROP(rop) | PM3_CONFIG2D_FBWRITE_ENABLE | PM3_CONFIG2D_FBDESTREAD_ENABLE); 788 } 789 790 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSORMINXY, 791 ((dsty & 0x0fff) << 16) | (dstx & 0x0fff)); 792 793 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCISSORMAXXY, 794 (((dsty + height) & 0x0fff) << 16) | ((dstx + width) & 0x0fff)); 795 796 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FBSOURCEREAD_BUFFEROFFSET, 797 (((offset_y) & 0xffff) << 16) | ((offset_x) & 0xffff)); 798 799 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 800 (((dsty) & 0xffff) << 16) | ((dstx - x_align) & 0xffff)); 801 802 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 803 dir | 804 PM3_RENDER2D_OPERATION_NORMAL | PM3_RENDER2D_SPANOPERATION | PM3_RENDER2D_FBSOURCEREADENABLE | 805 (((height) & 0x0fff) << 16) | ((width + x_align) & 0x0fff)); 806 807 #ifdef PM3FB_DEBUG 808 pm3fb_flush_engine(sc); 809 #endif 810 } 811 812 static void 813 pm3fb_cursor(void *cookie, int on, int row, int col) 814 { 815 struct rasops_info *ri = cookie; 816 struct vcons_screen *scr = ri->ri_hw; 817 struct pm3fb_softc *sc = scr->scr_cookie; 818 int x, y, wi, he; 819 820 wi = ri->ri_font->fontwidth; 821 he = ri->ri_font->fontheight; 822 823 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 824 x = ri->ri_ccol * wi + ri->ri_xorigin; 825 y = ri->ri_crow * he + ri->ri_yorigin; 826 if (ri->ri_flg & RI_CURSOR) { 827 pm3fb_bitblt(sc, x, y, x, y, wi, he, 12); 828 ri->ri_flg &= ~RI_CURSOR; 829 } 830 ri->ri_crow = row; 831 ri->ri_ccol = col; 832 if (on) { 833 x = ri->ri_ccol * wi + ri->ri_xorigin; 834 y = ri->ri_crow * he + ri->ri_yorigin; 835 pm3fb_bitblt(sc, x, y, x, y, wi, he, 12); 836 ri->ri_flg |= RI_CURSOR; 837 } 838 } else { 839 scr->scr_ri.ri_crow = row; 840 scr->scr_ri.ri_ccol = col; 841 scr->scr_ri.ri_flg &= ~RI_CURSOR; 842 } 843 } 844 845 static void 846 pm3fb_putchar(void *cookie, int row, int col, u_int c, long attr) 847 { 848 struct rasops_info *ri = cookie; 849 struct wsdisplay_font *font = PICK_FONT(ri, c); 850 struct vcons_screen *scr = ri->ri_hw; 851 struct pm3fb_softc *sc = scr->scr_cookie; 852 uint32_t mode; 853 854 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 855 void *data; 856 uint32_t fg, bg; 857 int uc, i; 858 int x, y, wi, he; 859 860 wi = font->fontwidth; 861 he = font->fontheight; 862 863 if (!CHAR_IN_FONT(c, font)) 864 return; 865 866 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 867 fg = ri->ri_devcmap[(attr >> 24) & 0xf]; 868 x = ri->ri_xorigin + col * wi; 869 y = ri->ri_yorigin + row * he; 870 if (c == 0x20) { 871 pm3fb_rectfill(sc, x, y, wi, he, bg); 872 } else { 873 uc = c - font->firstchar; 874 data = (uint8_t *)font->data + uc * ri->ri_fontscale; 875 mode = PM3_RM_MASK_MIRROR; 876 877 #if BYTE_ORDER == LITTLE_ENDIAN 878 switch (ri->ri_font->stride) { 879 case 1: 880 mode |= 4 << 7; 881 break; 882 case 2: 883 mode |= 3 << 7; 884 break; 885 } 886 #else 887 switch (ri->ri_font->stride) { 888 case 1: 889 mode |= 3 << 7; 890 break; 891 case 2: 892 mode |= 2 << 7; 893 break; 894 } 895 #endif 896 pm3fb_wait(sc, 6); 897 bus_space_write_4(sc->sc_memt, sc->sc_regh, 898 PM3_FOREGROUNDCOLOR, fg); 899 bus_space_write_4(sc->sc_memt, sc->sc_regh, 900 PM3_BACKGROUNDCOLOR, bg); 901 902 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RASTERIZER_MODE, mode); 903 904 bus_space_write_4(sc->sc_memt, sc->sc_regh, 905 PM3_CONFIG2D, 906 PM3_CONFIG2D_USECONSTANTSOURCE | 907 PM3_CONFIG2D_FOREGROUNDROP_ENABLE | 908 PM3_CONFIG2D_FOREGROUNDROP(0x03) | 909 PM3_CONFIG2D_OPAQUESPAN | 910 PM3_CONFIG2D_FBWRITE_ENABLE); 911 912 bus_space_write_4(sc->sc_memt, sc->sc_regh, 913 PM3_RECTANGLEPOSITION, (((y) & 0xffff)<<16) | ((x) & 0xffff)); 914 915 bus_space_write_4(sc->sc_memt, sc->sc_regh, 916 PM3_RENDER2D, 917 PM3_RENDER2D_XPOSITIVE | 918 PM3_RENDER2D_YPOSITIVE | 919 PM3_RENDER2D_OPERATION_SYNCONBITMASK | 920 PM3_RENDER2D_SPANOPERATION | 921 ((wi) & 0x0fff) | (((he) & 0x0fff) << 16)); 922 923 pm3fb_wait(sc, he); 924 925 switch (ri->ri_font->stride) { 926 case 1: { 927 uint8_t *data8 = data; 928 uint32_t reg; 929 for (i = 0; i < he; i++) { 930 reg = *data8; 931 bus_space_write_4(sc->sc_memt, 932 sc->sc_regh, 933 PM3_BITMASKPATTERN, reg); 934 data8++; 935 } 936 break; 937 } 938 case 2: { 939 uint16_t *data16 = data; 940 uint32_t reg; 941 for (i = 0; i < he; i++) { 942 reg = *data16; 943 bus_space_write_4(sc->sc_memt, 944 sc->sc_regh, 945 PM3_BITMASKPATTERN, reg); 946 data16++; 947 } 948 break; 949 } 950 } 951 } 952 } 953 } 954 955 static void 956 pm3fb_putchar_aa(void *cookie, int row, int col, u_int c, long attr) 957 { 958 struct rasops_info *ri = cookie; 959 struct wsdisplay_font *font = PICK_FONT(ri, c); 960 struct vcons_screen *scr = ri->ri_hw; 961 struct pm3fb_softc *sc = scr->scr_cookie; 962 uint32_t bg, fg, pixel, latch, aval; 963 int i, j, x, y, wi, he, r, g, b; 964 int r1, g1, b1, r0, g0, b0, fgo, bgo, shift; 965 uint8_t *data8; 966 int rv = GC_NOPE, cnt = 0; 967 968 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 969 return; 970 971 if (!CHAR_IN_FONT(c, font)) 972 return; 973 974 wi = font->fontwidth; 975 he = font->fontheight; 976 977 bg = ri->ri_devcmap[(attr >> 16) & 0xf] & 0xff; 978 fg = ri->ri_devcmap[(attr >> 24) & 0xf] & 0xff; 979 x = ri->ri_xorigin + col * wi; 980 y = ri->ri_yorigin + row * he; 981 982 /* if we draw a whitespace we're done here */ 983 if (c == 0x20) { 984 pm3fb_rectfill(sc, x, y, wi, he, bg); 985 if (attr & 1) 986 pm3fb_rectfill(sc, x, y + he - 2, wi, 1, fg); 987 return; 988 } 989 990 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 991 if (rv == GC_OK) 992 return; 993 994 data8 = WSFONT_GLYPH(c, font); 995 996 pm3fb_wait(sc, 3); 997 998 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CONFIG2D, 999 PM3_CONFIG2D_OPAQUESPAN | 1000 PM3_CONFIG2D_EXTERNALSOURCEDATA | 1001 PM3_CONFIG2D_FBWRITE_ENABLE); 1002 1003 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RECTANGLEPOSITION, 1004 (((y) & 0xffff) << 16) | ((x) & 0xffff) ); 1005 1006 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_RENDER2D, 1007 PM3_RENDER2D_XPOSITIVE | PM3_RENDER2D_YPOSITIVE | 1008 PM3_RENDER2D_OPERATION_SYNCONHOSTDATA | PM3_RENDER2D_SPANOPERATION | 1009 (((he) & 0x0fff) << 16) | ((wi) & 0x0fff)); 1010 1011 /* 1012 * we need the RGB colours here, so get offsets into rasops_cmap 1013 */ 1014 fgo = ((attr >> 24) & 0xf) * 3; 1015 bgo = ((attr >> 16) & 0xf) * 3; 1016 1017 r0 = rasops_cmap[bgo]; 1018 g0 = rasops_cmap[bgo + 1]; 1019 b0 = rasops_cmap[bgo + 2]; 1020 r1 = rasops_cmap[fgo]; 1021 g1 = rasops_cmap[fgo + 1]; 1022 b1 = rasops_cmap[fgo + 2]; 1023 1024 pm3fb_wait(sc, 20); 1025 1026 /* 1027 * we need two loops here because lines have to be padded to full 32bit 1028 */ 1029 for (i = 0; i < he; i++) { 1030 shift = 24; 1031 latch = 0; 1032 for (j = 0; j < wi; j++) { 1033 aval = *data8; 1034 if (aval == 0) { 1035 pixel = bg; 1036 } else if (aval == 255) { 1037 pixel = fg; 1038 } else { 1039 r = aval * r1 + (255 - aval) * r0; 1040 g = aval * g1 + (255 - aval) * g0; 1041 b = aval * b1 + (255 - aval) * b0; 1042 pixel = ((r & 0xe000) >> 8) | 1043 ((g & 0xe000) >> 11) | 1044 ((b & 0xc000) >> 14); 1045 } 1046 latch |= pixel << shift; 1047 shift -= 8; 1048 if (shift < 0) { 1049 bus_space_write_stream_4(sc->sc_memt, sc->sc_regh, 1050 PM3_SOURCE_DATA, latch); 1051 cnt++; 1052 if (cnt > 18) { 1053 pm3fb_wait(sc, 20); 1054 cnt = 0; 1055 } 1056 latch = 0; 1057 shift = 24; 1058 } 1059 data8++; 1060 } 1061 if (shift != 24) 1062 bus_space_write_stream_4(sc->sc_memt, sc->sc_regh, 1063 PM3_SOURCE_DATA, latch); 1064 } 1065 1066 if (rv == GC_ADD) { 1067 glyphcache_add(&sc->sc_gc, c, x, y); 1068 } 1069 1070 if (attr & 1) 1071 pm3fb_rectfill(sc, x, y + he - 2, wi, 1, fg); 1072 } 1073 1074 static void 1075 pm3fb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1076 { 1077 struct rasops_info *ri = cookie; 1078 struct vcons_screen *scr = ri->ri_hw; 1079 struct pm3fb_softc *sc = scr->scr_cookie; 1080 int32_t xs, xd, y, width, height; 1081 1082 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1083 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1084 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1085 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1086 width = ri->ri_font->fontwidth * ncols; 1087 height = ri->ri_font->fontheight; 1088 pm3fb_bitblt(sc, xs, y, xd, y, width, height, 3); 1089 } 1090 } 1091 1092 static void 1093 pm3fb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1094 { 1095 struct rasops_info *ri = cookie; 1096 struct vcons_screen *scr = ri->ri_hw; 1097 struct pm3fb_softc *sc = scr->scr_cookie; 1098 int32_t x, y, width, height, fg, bg, ul; 1099 1100 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1101 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1102 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1103 width = ri->ri_font->fontwidth * ncols; 1104 height = ri->ri_font->fontheight; 1105 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1106 1107 pm3fb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1108 } 1109 } 1110 1111 static void 1112 pm3fb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1113 { 1114 struct rasops_info *ri = cookie; 1115 struct vcons_screen *scr = ri->ri_hw; 1116 struct pm3fb_softc *sc = scr->scr_cookie; 1117 int32_t x, ys, yd, width, height; 1118 1119 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1120 x = ri->ri_xorigin; 1121 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1122 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1123 width = ri->ri_emuwidth; 1124 height = ri->ri_font->fontheight*nrows; 1125 pm3fb_bitblt(sc, x, ys, x, yd, width, height, 3); 1126 } 1127 } 1128 1129 static void 1130 pm3fb_eraserows(void *cookie, int row, int nrows, long fillattr) 1131 { 1132 struct rasops_info *ri = cookie; 1133 struct vcons_screen *scr = ri->ri_hw; 1134 struct pm3fb_softc *sc = scr->scr_cookie; 1135 int32_t x, y, width, height, fg, bg, ul; 1136 1137 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1138 if (row == 0 && nrows == ri->ri_rows) { 1139 x = 0; 1140 y = 0; 1141 width = sc->sc_width; 1142 height = sc->sc_height; 1143 } else { 1144 x = ri->ri_xorigin; 1145 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1146 width = ri->ri_emuwidth; 1147 height = ri->ri_font->fontheight * nrows; 1148 } 1149 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1150 1151 pm3fb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1152 } 1153 } 1154 1155 /* should be enough */ 1156 #define MODE_IS_VALID(m) (((m)->hdisplay < 2048)) 1157 1158 static void 1159 pm3_setup_i2c(struct pm3fb_softc *sc) 1160 { 1161 int i; 1162 1163 /* Fill in the i2c tag */ 1164 iic_tag_init(&sc->sc_i2c); 1165 sc->sc_i2c.ic_cookie = sc; 1166 sc->sc_i2c.ic_send_start = pm3fb_i2c_send_start; 1167 sc->sc_i2c.ic_send_stop = pm3fb_i2c_send_stop; 1168 sc->sc_i2c.ic_initiate_xfer = pm3fb_i2c_initiate_xfer; 1169 sc->sc_i2c.ic_read_byte = pm3fb_i2c_read_byte; 1170 sc->sc_i2c.ic_write_byte = pm3fb_i2c_write_byte; 1171 sc->sc_i2c.ic_exec = NULL; 1172 1173 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA, 0); 1174 1175 /* zero out the EDID buffer */ 1176 memset(sc->sc_edid_data, 0, 128); 1177 1178 /* Some monitors don't respond first time */ 1179 i = 0; 1180 while (sc->sc_edid_data[1] == 0 && i < 10) { 1181 ddc_read_edid(&sc->sc_i2c, sc->sc_edid_data, 128); 1182 i++; 1183 } 1184 1185 if (edid_parse(&sc->sc_edid_data[0], &sc->sc_ei) != -1) { 1186 /* 1187 * Now pick a mode. 1188 */ 1189 #ifdef PM3FB_DEBUG 1190 edid_print(&sc->sc_ei); 1191 #endif 1192 if ((sc->sc_ei.edid_preferred_mode != NULL)) { 1193 struct videomode *m = sc->sc_ei.edid_preferred_mode; 1194 if (MODE_IS_VALID(m)) { 1195 sc->sc_videomode = m; 1196 } else { 1197 aprint_error_dev(sc->sc_dev, 1198 "unable to use preferred mode\n"); 1199 } 1200 } 1201 /* 1202 * if we can't use the preferred mode go look for the 1203 * best one we can support 1204 */ 1205 if (sc->sc_videomode == NULL) { 1206 struct videomode *m = sc->sc_ei.edid_modes; 1207 1208 sort_modes(sc->sc_ei.edid_modes, 1209 &sc->sc_ei.edid_preferred_mode, 1210 sc->sc_ei.edid_nmodes); 1211 if (sc->sc_videomode == NULL) 1212 for (int n = 0; n < sc->sc_ei.edid_nmodes; n++) 1213 if (MODE_IS_VALID(&m[n])) { 1214 sc->sc_videomode = &m[n]; 1215 break; 1216 } 1217 } 1218 } 1219 if (sc->sc_videomode == NULL) { 1220 /* no EDID data? */ 1221 sc->sc_videomode = pick_mode_by_ref(sc->sc_width, 1222 sc->sc_height, 60); 1223 } 1224 if (sc->sc_videomode != NULL) { 1225 pm3fb_set_mode(sc, sc->sc_videomode); 1226 } 1227 } 1228 1229 /* I2C bitbanging */ 1230 static void pm3fb_i2cbb_set_bits(void *cookie, uint32_t bits) 1231 { 1232 struct pm3fb_softc *sc = cookie; 1233 uint32_t out; 1234 1235 out = bits << 2; /* bitmasks match the IN bits */ 1236 1237 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA, out); 1238 delay(100); 1239 } 1240 1241 static void pm3fb_i2cbb_set_dir(void *cookie, uint32_t dir) 1242 { 1243 /* Nothing to do */ 1244 } 1245 1246 static uint32_t pm3fb_i2cbb_read(void *cookie) 1247 { 1248 struct pm3fb_softc *sc = cookie; 1249 uint32_t bits; 1250 1251 bits = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_DISPLAY_DATA); 1252 return bits; 1253 } 1254 1255 /* higher level I2C stuff */ 1256 static int 1257 pm3fb_i2c_send_start(void *cookie, int flags) 1258 { 1259 1260 return (i2c_bitbang_send_start(cookie, flags, &pm3fb_i2cbb_ops)); 1261 } 1262 1263 static int 1264 pm3fb_i2c_send_stop(void *cookie, int flags) 1265 { 1266 1267 return (i2c_bitbang_send_stop(cookie, flags, &pm3fb_i2cbb_ops)); 1268 } 1269 1270 static int 1271 pm3fb_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 1272 { 1273 1274 return (i2c_bitbang_initiate_xfer(cookie, addr, flags, 1275 &pm3fb_i2cbb_ops)); 1276 } 1277 1278 static int 1279 pm3fb_i2c_read_byte(void *cookie, uint8_t *valp, int flags) 1280 { 1281 1282 return (i2c_bitbang_read_byte(cookie, valp, flags, &pm3fb_i2cbb_ops)); 1283 } 1284 1285 static int 1286 pm3fb_i2c_write_byte(void *cookie, uint8_t val, int flags) 1287 { 1288 return (i2c_bitbang_write_byte(cookie, val, flags, &pm3fb_i2cbb_ops)); 1289 } 1290 1291 static int 1292 pm3fb_set_pll(struct pm3fb_softc *sc, int freq) 1293 { 1294 uint8_t bf = 0, bpre = 0, bpost = 0; 1295 int count; 1296 unsigned long feedback, prescale, postscale, IntRef, VCO, out_freq, diff, VCOlow, VCOhigh, bdiff = 1000000; 1297 1298 freq *= 10; /* convert into 100Hz units */ 1299 1300 for (postscale = 0; postscale <= 5; postscale++) { 1301 /* 1302 * It is pointless going through the main loop if all values of 1303 * prescale produce an VCO outside the acceptable range 1304 */ 1305 prescale = 1; 1306 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1307 VCOlow = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1308 if (VCOlow > PM3_VCO_FREQ_MAX) 1309 continue; 1310 1311 prescale = 255; 1312 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1313 VCOhigh = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1314 if (VCOhigh < PM3_VCO_FREQ_MIN) 1315 continue; 1316 1317 for (prescale = 1; prescale <= 255; prescale++) { 1318 IntRef = PM3_EXT_CLOCK_FREQ / prescale; 1319 if (IntRef < PM3_INTREF_MIN || IntRef > PM3_INTREF_MAX) { 1320 if (IntRef > PM3_INTREF_MAX) { 1321 /* 1322 * Hopefully we will get into range as the prescale 1323 * value increases 1324 */ 1325 continue; 1326 } else { 1327 /* 1328 * already below minimum and it will only get worse 1329 * move to the next postscale value 1330 */ 1331 break; 1332 } 1333 } 1334 1335 feedback = (prescale * (1UL << postscale) * freq) / (2 * PM3_EXT_CLOCK_FREQ); 1336 1337 if (feedback > 255) { 1338 /* 1339 * prescale, feedbackscale & postscale registers 1340 * are only 8 bits wide 1341 */ 1342 break; 1343 } else if (feedback == 255) { 1344 count = 1; 1345 } else { 1346 count = 2; 1347 } 1348 1349 do { 1350 VCO = (2 * PM3_EXT_CLOCK_FREQ * feedback) / prescale; 1351 if (VCO >= PM3_VCO_FREQ_MIN && VCO <= PM3_VCO_FREQ_MAX) { 1352 out_freq = VCO / (1UL << postscale); 1353 diff = abs(out_freq - freq); 1354 if (diff < bdiff) { 1355 bdiff = diff; 1356 bf = feedback; 1357 bpre = prescale; 1358 bpost = postscale; 1359 if (diff == 0) 1360 goto out; 1361 } 1362 } 1363 feedback++; 1364 } while (--count >= 0); 1365 } 1366 } 1367 out: 1368 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_PRE_SCALE, bpre); 1369 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_FEEDBACK_SCALE, bf); 1370 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_CLOCK0_POST_SCALE, bpost); 1371 return 0; 1372 } 1373 1374 static void 1375 pm3fb_set_mode(struct pm3fb_softc *sc, const struct videomode *mode) 1376 { 1377 int t1, t2, t3, t4, stride; 1378 uint32_t vclk, tmp1; 1379 uint8_t sync = 0; 1380 1381 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_BYPASS_MASK, 0xffffffff); 1382 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_APERTURE1_CONTROL, 0x00000000); 1383 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_APERTURE2_CONTROL, 0x00000000); 1384 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FIFODISCONNECT, 0x00000007); 1385 1386 t1 = mode->hsync_start - mode->hdisplay; 1387 t2 = mode->vsync_start - mode->vdisplay; 1388 t3 = mode->hsync_end - mode->hsync_start; 1389 t4 = mode->vsync_end - mode->vsync_start; 1390 stride = (mode->hdisplay + 31) & ~31; 1391 1392 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_TOTAL, 1393 (mode->htotal >> 4) - 1); 1394 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_SYNC_END, 1395 (t1 + t3) >> 4); 1396 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_SYNC_START, 1397 (t1 >> 4)); 1398 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_BLANK_END, 1399 (mode->htotal - mode->hdisplay) >> 4); 1400 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_HORIZ_GATE_END, 1401 (mode->htotal - mode->hdisplay) >> 4); 1402 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCREEN_STRIDE, 1403 (stride >> 4)); 1404 1405 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1406 PM3_VERT_TOTAL, mode->vtotal - 1); 1407 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1408 PM3_VERT_SYNC_END, t2 + t4 - 1); 1409 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1410 PM3_VERT_SYNC_START, t2 - 1); 1411 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1412 PM3_VERT_BLANK_END, mode->vtotal - mode->vdisplay); 1413 1414 /*8bpp*/ 1415 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1416 PM3_BYAPERTURE1MODE, PM3_BYAPERTUREMODE_PIXELSIZE_8BIT); 1417 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1418 PM3_BYAPERTURE2MODE, PM3_BYAPERTUREMODE_PIXELSIZE_8BIT); 1419 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_VIDEO_CONTROL, 1420 (PM3_VC_ENABLE | PM3_VC_HSC_ACTIVE_HIGH | PM3_VC_VSC_ACTIVE_HIGH | PM3_VC_PIXELSIZE_8BIT)); 1421 1422 vclk = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_V_CLOCK_CTL); 1423 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_V_CLOCK_CTL, (vclk & 0xFFFFFFFC)); 1424 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_SCREEN_BASE, 0x0); 1425 1426 tmp1 = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM3_CHIP_CONFIG); 1427 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_CHIP_CONFIG, tmp1 & 0xFFFFFFFD); 1428 1429 pm3fb_set_pll(sc, mode->dot_clock); 1430 1431 if (mode->flags & VID_PHSYNC) 1432 sync |= PM3_SC_HSYNC_ACTIVE_HIGH; 1433 if (mode->flags & VID_PVSYNC) 1434 sync |= PM3_SC_VSYNC_ACTIVE_HIGH; 1435 1436 bus_space_write_4(sc->sc_memt, sc->sc_regh, 1437 PM3_RD_PM3_INDEX_CONTROL, PM3_INCREMENT_DISABLE); 1438 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_SYNC_CONTROL, sync); 1439 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_DAC_CONTROL, 0x00); 1440 1441 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_PIXEL_SIZE, PM3_DACPS_8BIT); 1442 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_COLOR_FORMAT, 1443 (PM3_CF_ORDER_RGB | PM3_CF_VISUAL_256_COLOR)); 1444 pm3fb_write_dac(sc, PM3_RAMDAC_CMD_MISC_CONTROL, PM3_MC_DAC_SIZE_8BIT); 1445 1446 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM3_FIFOCONTROL, 0x00000905); 1447 1448 sc->sc_width = mode->hdisplay; 1449 sc->sc_height = mode->vdisplay; 1450 sc->sc_depth = 8; 1451 sc->sc_stride = stride; 1452 aprint_normal_dev(sc->sc_dev, "pm3 using %d x %d in 8 bit, stride %d\n", 1453 sc->sc_width, sc->sc_height, stride); 1454 } 1455
Indexes created Tue Sep 30 06:09:59 GMT 2025