pm3reg.h revision 1.1.2.2
1 1.1.2.2 skrll /* 2 1.1.2.2 skrll * Copyright (c) 2015 Naruaki Etomi 3 1.1.2.2 skrll * All rights reserved. 4 1.1.2.2 skrll * 5 1.1.2.2 skrll * Redistribution and use in source and binary forms, with or without 6 1.1.2.2 skrll * modification, are permitted provided that the following conditions 7 1.1.2.2 skrll * are met: 8 1.1.2.2 skrll * 1. Redistributions of source code must retain the above copyright 9 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer. 10 1.1.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 11 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer in the 12 1.1.2.2 skrll * documentation and/or other materials provided with the distribution. 13 1.1.2.2 skrll * 14 1.1.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 1.1.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 1.1.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 1.1.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 1.1.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 1.1.2.2 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 1.1.2.2 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 1.1.2.2 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 1.1.2.2 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 1.1.2.2 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 1.1.2.2 skrll */ 25 1.1.2.2 skrll 26 1.1.2.2 skrll /* 27 1.1.2.2 skrll * register definitions for Permedia 3 graphics controllers 28 1.1.2.2 skrll */ 29 1.1.2.2 skrll 30 1.1.2.2 skrll 31 1.1.2.2 skrll #ifndef PM3_REG_H 32 1.1.2.2 skrll #define PM3_REG_H 33 1.1.2.2 skrll 34 1.1.2.2 skrll #define PM3_EXT_CLOCK_FREQ 143180 /*in 100Hz units*/ 35 1.1.2.2 skrll #define PM3_VCO_FREQ_MIN 2000000 /*in 100Hz units*/ 36 1.1.2.2 skrll #define PM3_VCO_FREQ_MAX 6220000 /*in 100Hz units*/ 37 1.1.2.2 skrll #define PM3_INTREF_MIN 10000 /*in 100Hz units*/ 38 1.1.2.2 skrll #define PM3_INTREF_MAX 20000 /*in 100Hz units*/ 39 1.1.2.2 skrll 40 1.1.2.2 skrll /* 41 1.1.2.2 skrll * PM3 RAMDAC Indirect Commands 42 1.1.2.2 skrll */ 43 1.1.2.2 skrll 44 1.1.2.2 skrll #define PM3_RAMDAC_CMD_MISC_CONTROL 0x000 45 1.1.2.2 skrll #define PM3_RAMDAC_CMD_SYNC_CONTROL 0x001 46 1.1.2.2 skrll #define PM3_RAMDAC_CMD_DAC_CONTROL 0x002 47 1.1.2.2 skrll #define PM3_RAMDAC_CMD_PIXEL_SIZE 0x003 48 1.1.2.2 skrll #define PM3_RAMDAC_CMD_COLOR_FORMAT 0x004 49 1.1.2.2 skrll #define PM3_RAMDAC_CMD_CLOCK0_PRE_SCALE 0x201 50 1.1.2.2 skrll #define PM3_RAMDAC_CMD_CLOCK0_FEEDBACK_SCALE 0x202 51 1.1.2.2 skrll #define PM3_RAMDAC_CMD_CLOCK0_POST_SCALE 0x203 52 1.1.2.2 skrll 53 1.1.2.2 skrll /* 54 1.1.2.2 skrll * PM3 RAMDAC Indirect Command SYNC_CONTROL 55 1.1.2.2 skrll */ 56 1.1.2.2 skrll 57 1.1.2.2 skrll #define PM3_SC_HSYNC_ACTIVE_LOW 0x000 58 1.1.2.2 skrll #define PM3_SC_HSYNC_ACTIVE_HIGH 0x001 59 1.1.2.2 skrll #define PM3_SC_HSYNC_FORCE_ACTIVE 0x003 60 1.1.2.2 skrll #define PM3_SC_HSYNC_FORCE_INACTIVE 0x004 61 1.1.2.2 skrll #define PM3_SC_VSYNC_ACTIVE_LOW 0x000 62 1.1.2.2 skrll #define PM3_SC_VSYNC_ACTIVE_HIGH 0x008 63 1.1.2.2 skrll #define PM3_SC_VSYNC_FORCE_ACTIVE 0x018 64 1.1.2.2 skrll #define PM3_SC_VSYNC_FORCE_INACTIVE 0x020 65 1.1.2.2 skrll 66 1.1.2.2 skrll /* 67 1.1.2.2 skrll * PM3 RAMDAC Indirect Command DAC_CONTROL 68 1.1.2.2 skrll */ 69 1.1.2.2 skrll 70 1.1.2.2 skrll #define PM3_DC_NORMAL_POWER 0x000 71 1.1.2.2 skrll #define PM3_DC_LOW_POWER 0x001 72 1.1.2.2 skrll #define PM3_DC_SYNC_ON_GREEN_ENABLE 0x008 73 1.1.2.2 skrll #define PM3_DC_SYNC_ON_GREEN_DISABLE 0x000 74 1.1.2.2 skrll #define PM3_DC_BLANK_PEDESTAL_ENABLE 0x080 75 1.1.2.2 skrll #define PM3_DC_BLANK_PEDESTAL_DISABLE 0x000 76 1.1.2.2 skrll 77 1.1.2.2 skrll /* 78 1.1.2.2 skrll * PM3 RAMDAC Indirect Command PIXEL_SIZE 79 1.1.2.2 skrll */ 80 1.1.2.2 skrll 81 1.1.2.2 skrll #define PM3_DACPS_8BIT 0x000 82 1.1.2.2 skrll #define PM3_DACPS_16BIT 0x001 83 1.1.2.2 skrll #define PM3_DACPS_32BIT 0x002 84 1.1.2.2 skrll #define PM3_DACPS_24BIT 0x004 85 1.1.2.2 skrll 86 1.1.2.2 skrll /* 87 1.1.2.2 skrll * PM3 RAMDAC Indirect Command COLOR_FORMAT 88 1.1.2.2 skrll */ 89 1.1.2.2 skrll 90 1.1.2.2 skrll #define PM3_CF_VISUAL_256_COLOR 0x00e 91 1.1.2.2 skrll #define PM3_CF_VISUAL_HIGH_COLOR 0x010 92 1.1.2.2 skrll #define PM3_CF_VISUAL_TRUE_COLOR 0x000 93 1.1.2.2 skrll #define PM3_CF_ORDER_BGR 0x020 94 1.1.2.2 skrll #define PM3_CF_ORDER_RGB 0x000 95 1.1.2.2 skrll #define PM3_CF_LINEAR_COLOR_EXT_ENABLE 0x040 96 1.1.2.2 skrll #define PM3_CF_LINEAR_COLOR_EXT_DISABLE 0x000 97 1.1.2.2 skrll 98 1.1.2.2 skrll /* 99 1.1.2.2 skrll * PM3 RAMDAC Indirect Command MISC_CONTROL 100 1.1.2.2 skrll */ 101 1.1.2.2 skrll 102 1.1.2.2 skrll #define PM3_MC_DAC_SIZE_8BIT 0x001 103 1.1.2.2 skrll #define PM3_MC_DAC_SIZE_6BIT 0x000 104 1.1.2.2 skrll #define PM3_MC_PIXEL_DOUBLE_ENABLE 0x002 105 1.1.2.2 skrll #define PM3_MC_PIXEL_DOUBLE_DISABLE 0x000 106 1.1.2.2 skrll #define PM3_MC_LAST_READ_ADDR_ENABLE 0x004 107 1.1.2.2 skrll #define PM3_MC_LAST_READ_ADDR_DISABLE 0x000 108 1.1.2.2 skrll #define PM3_MC_DIRECT_COLOR_ENABLE 0x008 109 1.1.2.2 skrll #define PM3_MC_DIRECT_COLOR_DISABLE 0x000 110 1.1.2.2 skrll #define PM3_MC_OVERLAY_ENABLE 0x010 111 1.1.2.2 skrll #define PM3_MC_OVERLAY_DISABLE 0x000 112 1.1.2.2 skrll #define PM3_MC_PIXEL_DB_ENABLE 0x020 113 1.1.2.2 skrll #define PM3_MC_PIXEL_DB_DISABLE 0x000 114 1.1.2.2 skrll #define PM3_MC_STEREO_DB_ENABLE 0x040 115 1.1.2.2 skrll #define PM3_MC_STEREO_DB_DISABLE 0x000 116 1.1.2.2 skrll 117 1.1.2.2 skrll /* 118 1.1.2.2 skrll * PM3 Registers 119 1.1.2.2 skrll */ 120 1.1.2.2 skrll 121 1.1.2.2 skrll #define PM3_INPUT_FIFO_SPACE 0x00000018 122 1.1.2.2 skrll #define PM3_OUTPUT_FIFO_WORDS 0x00000020 123 1.1.2.2 skrll #define PM3_V_CLOCK_CTL 0x00000040 124 1.1.2.2 skrll #define PM3_APERTURE1_CONTROL 0x00000050 125 1.1.2.2 skrll #define PM3_APERTURE2_CONTROL 0x00000058 126 1.1.2.2 skrll #define PM3_AP_MEMORY_BYTE_STANDARD 0x00000000 127 1.1.2.2 skrll #define PM3_AP_MEMORY_BYTE_SWAPPED 0x00000001 128 1.1.2.2 skrll #define PM3_FIFODISCONNECT 0x00000068 129 1.1.2.2 skrll #define PM3_CHIP_CONFIG 0x00000070 130 1.1.2.2 skrll #define PM3_BYAPERTURE1MODE 0x00000300 131 1.1.2.2 skrll #define PM3_BYAPERTURE2MODE 0x00000328 132 1.1.2.2 skrll #define PM3_BYAPERTUREMODE_PIXELSIZE_8BIT 0x00000000 133 1.1.2.2 skrll #define PM3_BYAPERTUREMODE_PIXELSIZE_16BIT 0x00000020 134 1.1.2.2 skrll #define PM3_BYAPERTUREMODE_PIXELSIZE_32BIT 0x00000040 135 1.1.2.2 skrll 136 1.1.2.2 skrll #define PM3_BYPASS_MASK 0x00001008 137 1.1.2.2 skrll #define PM3_LOCALMEMCAPS 0x00001018 138 1.1.2.2 skrll #define PM3_LOCALMEMTIMINGS 0x00001020 139 1.1.2.2 skrll #define PM3_LOCALMEMCONTROL 0x00001028 140 1.1.2.2 skrll 141 1.1.2.2 skrll #define PM3_OUTPUT_FIFO 0x00002000 142 1.1.2.2 skrll 143 1.1.2.2 skrll #define PM3_SCREEN_BASE 0x00003000 144 1.1.2.2 skrll #define PM3_SCREEN_STRIDE 0x00003008 145 1.1.2.2 skrll #define PM3_HORIZ_TOTAL 0x00003010 146 1.1.2.2 skrll #define PM3_HORIZ_GATE_END 0x00003018 147 1.1.2.2 skrll #define PM3_HORIZ_BLANK_END 0x00003020 148 1.1.2.2 skrll #define PM3_HORIZ_SYNC_START 0x00003028 149 1.1.2.2 skrll #define PM3_HORIZ_SYNC_END 0x00003030 150 1.1.2.2 skrll #define PM3_VERT_TOTAL 0x00003038 151 1.1.2.2 skrll #define PM3_VERT_BLANK_END 0x00003040 152 1.1.2.2 skrll #define PM3_VERT_SYNC_START 0x00003048 153 1.1.2.2 skrll #define PM3_VERT_SYNC_END 0x00003050 154 1.1.2.2 skrll #define PM3_VIDEO_CONTROL 0x00003058 155 1.1.2.2 skrll #define M3_VC_DISABLE 0x00000000 156 1.1.2.2 skrll #define PM3_VC_ENABLE 0x00000001 157 1.1.2.2 skrll #define PM3_VC_BL_ACTIVE_HIGH 0x00000000 158 1.1.2.2 skrll #define PM3_VC_BL_ACTIVE_LOW 0x00000002 159 1.1.2.2 skrll #define PM3_VC_LD_DISABLE 0x00000000 160 1.1.2.2 skrll #define PM3_VC_LD_ENABLE 0x00000004 161 1.1.2.2 skrll #define PM3_VC_HSC_FORCE_HIGH 0x00000000 162 1.1.2.2 skrll #define PM3_VC_HSC_ACTIVE_HIGH 0x00000008 163 1.1.2.2 skrll #define PM3_VC_HSC_FORCE_LOW 0x00000010 164 1.1.2.2 skrll #define PM3_VC_HSC_ACTIVE_LOW 0x00000018 165 1.1.2.2 skrll #define PM3_VC_VSC_FORCE_HIGH 0x00000000 166 1.1.2.2 skrll #define PM3_VC_VSC_ACTIVE_HIGH 0x00000020 167 1.1.2.2 skrll #define PM3_VC_VSC_FORCE_LOW 0x00000040 168 1.1.2.2 skrll #define PM3_VC_VSC_ACTIVE_LOW 0x00000060 169 1.1.2.2 skrll #define PM3_VC_PIXELSIZE_8BIT 0x00000000 170 1.1.2.2 skrll #define PM3_VC_PIXELSIZE_16BIT 0x00080000 171 1.1.2.2 skrll #define PM3_VC_PIXELSIZE_32BIT 0x00B00000 172 1.1.2.2 skrll #define PM3_VC_DISPLAY_ENABLE 0x00010000 173 1.1.2.2 skrll #define PM3_VC_DISPLAY_DISABLE 0x00000000 174 1.1.2.2 skrll #define PM3_DISPLAY_DATA 0x00003068 175 1.1.2.2 skrll #define PM3_DD_SDA_IN 0x00000001 176 1.1.2.2 skrll #define PM3_DD_SCL_IN 0x00000002 177 1.1.2.2 skrll #define PM3_FIFOCONTROL 0x00003078 178 1.1.2.2 skrll #define PM3_RD_PM3_INDEX_CONTROL 0x00004038 179 1.1.2.2 skrll #define PM3_INCREMENT_ENABLE 0x00000001 180 1.1.2.2 skrll #define PM3_INCREMENT_DISABLE 0x00000000 181 1.1.2.2 skrll #define PM3_DAC_PAL_WRITE_IDX 0x00004000 182 1.1.2.2 skrll #define PM3_DAC_PAL_DATA 0x00004008 183 1.1.2.2 skrll #define PM3_DAC_INDEX_LOW 0x00004020 184 1.1.2.2 skrll #define PM3_DAC_INDEX_HIGH 0x00004028 185 1.1.2.2 skrll #define PM3_DAC_INDEX_DATA 0x00004030 186 1.1.2.2 skrll #define PM3_DAC_INDEX_CONTROL 0x00004038 187 1.1.2.2 skrll 188 1.1.2.2 skrll #define PM3_STARTXDOM 0x00008000 189 1.1.2.2 skrll #define PM3_STARTXSUB 0x00008010 190 1.1.2.2 skrll #define PM3_STARTY 0x00008020 191 1.1.2.2 skrll #define PM3_COUNT 0x00008030 192 1.1.2.2 skrll #define PM3_DXDOM 0x00008008 193 1.1.2.2 skrll #define PM3_DXSUB 0x00008018 194 1.1.2.2 skrll #define PM3_DY 0x00008028 195 1.1.2.2 skrll #define PM3_BITMASKPATTERN 0x00008068 196 1.1.2.2 skrll #define PM3_RASTERIZER_MODE 0x000080a0 197 1.1.2.2 skrll #define PM3_RM_MASK_MIRROR 0x00000001 /* mask is right-to-left */ 198 1.1.2.2 skrll #define PM3_PIXEL_SIZE 0x000080c0 199 1.1.2.2 skrll #define PM3_PS_8BIT 0x00000002 200 1.1.2.2 skrll #define PM3_PS_16BIT 0x00000001 201 1.1.2.2 skrll #define PM3_PS_32BIT 0x00000000 202 1.1.2.2 skrll #define PM3_SPANCOLORMASK 0x00008168 203 1.1.2.2 skrll #define PM3_SCISSOR_MODE 0x00008180 204 1.1.2.2 skrll #define PM3_SCISSORMAXXY 0x00008190 205 1.1.2.2 skrll #define PM3_SCISSORMINXY 0x00008188 206 1.1.2.2 skrll #define PM3_AREASTIPPLE_MODE 0x000081a0 207 1.1.2.2 skrll #define PM3_LINESTIPPLE_MODE 0x000081a8 208 1.1.2.2 skrll #define PM3_TEXTUREADDRESS_MODE 0x00008380 209 1.1.2.2 skrll #define PM3_TEXTUREFILTER_MODE 0x000084e0 210 1.1.2.2 skrll #define PM3_TEXTUREREAD_MODE 0x00008670 211 1.1.2.2 skrll #define PM3_TEXTURECOLOR_MODE 0x00008680 212 1.1.2.2 skrll #define PM3_FOG_MODE 0x00008690 213 1.1.2.2 skrll #define PM3_COLORDDA_MODE 0x000087e0 214 1.1.2.2 skrll #define PM3_ALPHATEST_MODE 0x00008800 215 1.1.2.2 skrll #define PM3_ANTIALIAS_MODE 0x00008808 216 1.1.2.2 skrll #define PM3_DITHER_MODE 0x00008818 217 1.1.2.2 skrll #define PM3_CF_TO_DIM_CF(_cf) ((((_cf) & 0x0f) << 2) | ( 1 << 10)) 218 1.1.2.2 skrll #define PM3_FBSOFTWAREWRITEMASK 0x00008820 219 1.1.2.2 skrll #define PM3_LOGICALOP_MODE 0x00008828 220 1.1.2.2 skrll #define PM3_ROUTER_MODE 0x00008840 221 1.1.2.2 skrll #define PM3_LB_WRITE_MODE 0x000088c0 222 1.1.2.2 skrll #define PM3_LB_DISABLE 0x00000000 223 1.1.2.2 skrll #define PM3_WINDOW 0x00008980 224 1.1.2.2 skrll #define PM3_STENCIL_MODE 0x00008988 225 1.1.2.2 skrll #define PM3_STENCIL_DATA 0x00008990 226 1.1.2.2 skrll #define PM3_DEPTH_MODE 0x000089a0 227 1.1.2.2 skrll #define PM3_FBWRITE_MODE 0x00008ab8 228 1.1.2.2 skrll #define PM3_FBWRITEMODE_WRITEENABLE 0x00000001 229 1.1.2.2 skrll #define PM3_FBWRITEMODE_OPAQUESPAN 0x00000020 230 1.1.2.2 skrll #define PM3_FBWRITEMODE_ENABLE0 0x00001000 231 1.1.2.2 skrll #define PM3_FBHARDWAREWRITEMASK 0x00008ac0 232 1.1.2.2 skrll #define PM3_FILTER_MODE 0x00008c00 233 1.1.2.2 skrll #define PM3_FM_PASS_SYNC 0x00000400 234 1.1.2.2 skrll #define PM3_STATISTIC_MODE 0x00008c08 235 1.1.2.2 skrll #define PM3_SYNC 0x00008c40 236 1.1.2.2 skrll #define PM3_SYNC_TAG 0x188 237 1.1.2.2 skrll #define PM3_YUV_MODE 0x00008f00 238 1.1.2.2 skrll #define PM3_CHROMATEST_MODE 0x00008f18 239 1.1.2.2 skrll #define PM3_DELTA_MODE 0x00009300 240 1.1.2.2 skrll #define PM3_DELTACONTROL 0x00009350 241 1.1.2.2 skrll #define PM3_XBIAS 0x00009480 242 1.1.2.2 skrll #define PM3_YBIAS 0x00009488 243 1.1.2.2 skrll #define PM3_FBDESTREAD_BUFFERADDRESS0 0x0000ae80 244 1.1.2.2 skrll #define PM3_FBDESTREAD_BUFFEROFFSET0 0x0000aea0 245 1.1.2.2 skrll #define PM3_FBDESTREAD_BUFFERWIDTH0 0x0000aec0 246 1.1.2.2 skrll #define PM3_FBDESTREAD_BUFFERWIDTH_WIDTH(_w) ((_w) & 0x0fff) 247 1.1.2.2 skrll #define PM3_FB_DESTREAD_MODE 0x0000aee0 248 1.1.2.2 skrll #define PM3_FBDRM_ENABLE 0x00000001 249 1.1.2.2 skrll #define PM3_FBDRM_ENABLE0 0x00000100 250 1.1.2.2 skrll #define PM3_FBDESTREAD_ENABLE 0x0000aee8 251 1.1.2.2 skrll #define PM3_FBDESTREAD_SET(_e, _r, _a) (((_e) & 0xff) | (((_r) & 0xff) << 8) | (((_a) & 0xff) << 24)) 252 1.1.2.2 skrll #define PM3_FBSOURCEREAD_MODE 0x0000af00 253 1.1.2.2 skrll #define PM3_FBSOURCEREAD_MODE_ENABLE 0x00000001 254 1.1.2.2 skrll #define PM3_FBSOURCEREAD_MODE_BLOCKING 0x00000800 255 1.1.2.2 skrll #define PM3_FBSOURCEREAD_BUFFERADDRESS 0x0000af08 256 1.1.2.2 skrll #define PM3_FBSOURCEREAD_BUFFEROFFSET 0x0000af10 257 1.1.2.2 skrll #define PM3_FBSOURCEREAD_BUFFERWIDTH 0x0000af18 258 1.1.2.2 skrll #define PM3_FBSOURCEREAD_BUFFERWIDTH_WIDTH(_w) ((_w) & 0x0fff) 259 1.1.2.2 skrll #define PM3_ALPHABLENDCOLOR_MODE 0x0000afa0 260 1.1.2.2 skrll #define PM3_ALPHABLENDALPHA_MODE 0x0000afa8 261 1.1.2.2 skrll #define PM3_FBWRITEBUFFERADDRESS0 0x0000b000 262 1.1.2.2 skrll #define PM3_FBWRITEBUFFEROFFSET0 0x0000b020 263 1.1.2.2 skrll #define PM3_FBWRITEBUFFERWIDTH0 0x0000b040 264 1.1.2.2 skrll #define PM3_FBWRITEBUFFERWIDTH_WIDTH(_w) ((_w) & 0x0fff) 265 1.1.2.2 skrll #define PM3_SIZEOF_FRAMEBUFFER 0x0000b0a8 266 1.1.2.2 skrll #define PM3_FOREGROUNDCOLOR 0x0000b0c0 267 1.1.2.2 skrll #define PM3_BACKGROUNDCOLOR 0x0000b0c8 268 1.1.2.2 skrll #define PM3_TEXTURECOMPOSITE_MODE 0x0000b300 269 1.1.2.2 skrll #define PM3_TEXTURECOMPOSITECOLOR_MODE0 0x0000b308 270 1.1.2.2 skrll #define PM3_TEXTURECOMPOSITEALPHA_MODE0 0x0000b310 271 1.1.2.2 skrll #define PM3_TEXTURECOMPOSITECOLOR_MODE1 0x0000b318 272 1.1.2.2 skrll #define PM3_TEXTURECOMPOSITEALPHA_MODE1 0x0000b320 273 1.1.2.2 skrll #define PM3_TEXTUREINDEX_MODE0 0x0000b338 274 1.1.2.2 skrll #define PM3_TEXTUREINDEX_MODE1 0x0000b340 275 1.1.2.2 skrll #define PM3_TEXELLUT_MODE 0x0000b378 276 1.1.2.2 skrll #define PM3_LB_DESTREAD_MODE 0x0000b500 277 1.1.2.2 skrll #define PM3_LB_DESTREAD_ENABLES 0x0000b508 278 1.1.2.2 skrll #define PM3_LB_SOURCEREAD_MODE 0x0000b520 279 1.1.2.2 skrll #define PM3_GID_MODE 0x0000b538 280 1.1.2.2 skrll #define PM3_RECTANGLEPOSITION 0x0000b600 281 1.1.2.2 skrll #define PM3_CONFIG2D 0x0000b618 282 1.1.2.2 skrll #define PM3_CONFIG2D_OPAQUESPAN 0x00000001 283 1.1.2.2 skrll #define PM3_CONFIG2D_MULTIRXBLIT 0x00000002 284 1.1.2.2 skrll #define PM3_CONFIG2D_USERSCISSOR_ENABLE 0x00000004 285 1.1.2.2 skrll #define PM3_CONFIG2D_FBDESTREAD_ENABLE 0x00000008 286 1.1.2.2 skrll #define PM3_CONFIG2D_ALPHABLEND_ENABLE 0x00000010 287 1.1.2.2 skrll #define PM3_CONFIG2D_DITHER_ENABLE 0x00000020 288 1.1.2.2 skrll #define PM3_CONFIG2D_FOREGROUNDROP_ENABLE 0x00000040 289 1.1.2.2 skrll #define PM3_CONFIG2D_FOREGROUNDROP(_rop) (((_rop) & 0xF) << 7) 290 1.1.2.2 skrll #define PM3_CONFIG2D_BACKGROUNDROP_ENABLE 0x00000800 291 1.1.2.2 skrll #define PM3_CONFIG2D_BACKGROUNDROP(_rop) (((_rop) & 0xF) << 12) 292 1.1.2.2 skrll #define PM3_CONFIG2D_USECONSTANTSOURCE 0x00010000 293 1.1.2.2 skrll #define PM3_CONFIG2D_FBWRITE_ENABLE 0x00020000 294 1.1.2.2 skrll #define PM3_CONFIG2D_BLOCKING 0x00040000 295 1.1.2.2 skrll #define PM3_CONFIG2D_EXTERNALSOURCEDATA 0x00080000 296 1.1.2.2 skrll #define PM3_CONFIG2D_LUTMODE_ENABLE 0x00100000 297 1.1.2.2 skrll #define PM3_RENDER2D 0x0000b640 298 1.1.2.2 skrll #define PM3_RENDER2D_OPERATION_NORMAL 0x00000000 299 1.1.2.2 skrll #define PM3_RENDER2D_OPERATION_SYNCONHOSTDATA 0x00001000 300 1.1.2.2 skrll #define PM3_RENDER2D_OPERATION_SYNCONBITMASK 0x00002000 301 1.1.2.2 skrll #define PM3_RENDER2D_OPERATION_PATCHORDERRENDERING 0x00003000 302 1.1.2.2 skrll #define PM3_RENDER2D_FBSOURCEREADENABLE 0x00004000 303 1.1.2.2 skrll #define PM3_RENDER2D_SPANOPERATION 0x00008000 304 1.1.2.2 skrll #define PM3_RENDER2D_XPOSITIVE 0x10000000 305 1.1.2.2 skrll #define PM3_RENDER2D_YPOSITIVE 0x20000000 306 1.1.2.2 skrll #define PM3_RENDER2D_AREASTIPPLEENABLE 0x40000000 307 1.1.2.2 skrll #define PM3_RENDER2D_TEXTUREENABLE 0x80000000 308 1.1.2.2 skrll 309 1.1.2.2 skrll #endif /* PM3_REG_H */ 310
Indexes created Mon Oct 20 16:09:52 GMT 2025