puc.c revision 1.32 1 1.32 ryo /* $NetBSD: puc.c,v 1.32 2011/05/28 10:48:50 ryo Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.3 cgd * Copyright (c) 1996, 1998, 1999
5 1.3 cgd * Christopher G. Demetriou. All rights reserved.
6 1.1 cgd *
7 1.1 cgd * Redistribution and use in source and binary forms, with or without
8 1.1 cgd * modification, are permitted provided that the following conditions
9 1.1 cgd * are met:
10 1.1 cgd * 1. Redistributions of source code must retain the above copyright
11 1.1 cgd * notice, this list of conditions and the following disclaimer.
12 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 cgd * notice, this list of conditions and the following disclaimer in the
14 1.1 cgd * documentation and/or other materials provided with the distribution.
15 1.1 cgd * 3. All advertising materials mentioning features or use of this software
16 1.1 cgd * must display the following acknowledgement:
17 1.1 cgd * This product includes software developed by Christopher G. Demetriou
18 1.1 cgd * for the NetBSD Project.
19 1.1 cgd * 4. The name of the author may not be used to endorse or promote products
20 1.1 cgd * derived from this software without specific prior written permission
21 1.1 cgd *
22 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 cgd * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 cgd * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 cgd * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 cgd * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 cgd * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 cgd * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 cgd * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 cgd * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 cgd * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 cgd */
33 1.1 cgd
34 1.1 cgd /*
35 1.1 cgd * PCI "universal" communication card device driver, glues com, lpt,
36 1.1 cgd * and similar ports to PCI via bridge chip often much larger than
37 1.1 cgd * the devices being glued.
38 1.1 cgd *
39 1.1 cgd * Author: Christopher G. Demetriou, May 14, 1998 (derived from NetBSD
40 1.1 cgd * sys/dev/pci/pciide.c, revision 1.6).
41 1.1 cgd *
42 1.1 cgd * These devices could be (and some times are) described as
43 1.1 cgd * communications/{serial,parallel}, etc. devices with known
44 1.1 cgd * programming interfaces, but those programming interfaces (in
45 1.1 cgd * particular the BAR assignments for devices, etc.) in fact are not
46 1.1 cgd * particularly well defined.
47 1.1 cgd *
48 1.1 cgd * After I/we have seen more of these devices, it may be possible
49 1.1 cgd * to generalize some of these bits. In particular, devices which
50 1.1 cgd * describe themselves as communications/serial/16[45]50, and
51 1.1 cgd * communications/parallel/??? might be attached via direct
52 1.1 cgd * 'com' and 'lpt' attachments to pci.
53 1.1 cgd */
54 1.12 lukem
55 1.12 lukem #include <sys/cdefs.h>
56 1.32 ryo __KERNEL_RCSID(0, "$NetBSD: puc.c,v 1.32 2011/05/28 10:48:50 ryo Exp $");
57 1.1 cgd
58 1.1 cgd #include <sys/param.h>
59 1.1 cgd #include <sys/systm.h>
60 1.1 cgd #include <sys/device.h>
61 1.1 cgd
62 1.1 cgd #include <dev/pci/pcireg.h>
63 1.1 cgd #include <dev/pci/pcivar.h>
64 1.1 cgd #include <dev/pci/pucvar.h>
65 1.32 ryo #include <dev/pci/pcidevs.h>
66 1.5 jeffs #include <sys/termios.h>
67 1.5 jeffs #include <dev/ic/comreg.h>
68 1.5 jeffs #include <dev/ic/comvar.h>
69 1.1 cgd
70 1.18 christos #include "locators.h"
71 1.6 castor #include "opt_puccn.h"
72 1.6 castor
73 1.1 cgd struct puc_softc {
74 1.1 cgd /* static configuration data */
75 1.1 cgd const struct puc_device_description *sc_desc;
76 1.1 cgd
77 1.1 cgd /* card-global dynamic data */
78 1.1 cgd void *sc_ih;
79 1.1 cgd struct {
80 1.1 cgd int mapped;
81 1.1 cgd bus_addr_t a;
82 1.1 cgd bus_size_t s;
83 1.1 cgd bus_space_tag_t t;
84 1.1 cgd bus_space_handle_t h;
85 1.1 cgd } sc_bar_mappings[6]; /* XXX constant */
86 1.1 cgd
87 1.1 cgd /* per-port dynamic data */
88 1.1 cgd struct {
89 1.31 joerg device_t dev;
90 1.1 cgd
91 1.1 cgd /* filled in by port attachments */
92 1.22 perry int (*ihand)(void *);
93 1.1 cgd void *ihandarg;
94 1.1 cgd } sc_ports[PUC_MAX_PORTS];
95 1.1 cgd };
96 1.1 cgd
97 1.24 thorpej static int puc_print(void *, const char *);
98 1.1 cgd
99 1.24 thorpej static const char *puc_port_type_name(int);
100 1.1 cgd
101 1.24 thorpej static int
102 1.31 joerg puc_match(device_t parent, cfdata_t match, void *aux)
103 1.1 cgd {
104 1.1 cgd struct pci_attach_args *pa = aux;
105 1.1 cgd const struct puc_device_description *desc;
106 1.1 cgd pcireg_t bhlc, subsys;
107 1.1 cgd
108 1.1 cgd bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
109 1.1 cgd if (PCI_HDRTYPE_TYPE(bhlc) != 0)
110 1.1 cgd return (0);
111 1.1 cgd
112 1.2 drochner subsys = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
113 1.1 cgd
114 1.1 cgd desc = puc_find_description(PCI_VENDOR(pa->pa_id),
115 1.1 cgd PCI_PRODUCT(pa->pa_id), PCI_VENDOR(subsys), PCI_PRODUCT(subsys));
116 1.1 cgd if (desc != NULL)
117 1.1 cgd return (10);
118 1.1 cgd
119 1.4 cgd #if 0
120 1.4 cgd /*
121 1.4 cgd * XXX this is obviously bogus. eventually, we might want
122 1.4 cgd * XXX to match communications/modem, etc., but that needs some
123 1.4 cgd * XXX special work in the match fn.
124 1.4 cgd */
125 1.1 cgd /*
126 1.1 cgd * Match class/subclass, so we can tell people to compile kernel
127 1.1 cgd * with options that cause this driver to spew.
128 1.1 cgd */
129 1.11 thorpej if (PCI_CLASS(pa->pa_class) == PCI_CLASS_COMMUNICATIONS) {
130 1.11 thorpej switch (PCI_SUBCLASS(pa->pa_class)) {
131 1.11 thorpej case PCI_SUBCLASS_COMMUNICATIONS_SERIAL:
132 1.11 thorpej case PCI_SUBCLASS_COMMUNICATIONS_MODEM:
133 1.11 thorpej return (1);
134 1.11 thorpej }
135 1.11 thorpej }
136 1.4 cgd #endif
137 1.1 cgd
138 1.1 cgd return (0);
139 1.1 cgd }
140 1.1 cgd
141 1.24 thorpej static void
142 1.31 joerg puc_attach(device_t parent, device_t self, void *aux)
143 1.1 cgd {
144 1.31 joerg struct puc_softc *sc = device_private(self);
145 1.1 cgd struct pci_attach_args *pa = aux;
146 1.1 cgd struct puc_attach_args paa;
147 1.1 cgd pci_intr_handle_t intrhandle;
148 1.1 cgd pcireg_t subsys;
149 1.1 cgd int i, barindex;
150 1.5 jeffs bus_addr_t base;
151 1.5 jeffs bus_space_tag_t tag;
152 1.7 jlam #ifdef PUCCN
153 1.5 jeffs bus_space_handle_t ioh;
154 1.7 jlam #endif
155 1.25 drochner int locs[PUCCF_NLOCS];
156 1.1 cgd
157 1.2 drochner subsys = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
158 1.1 cgd sc->sc_desc = puc_find_description(PCI_VENDOR(pa->pa_id),
159 1.1 cgd PCI_PRODUCT(pa->pa_id), PCI_VENDOR(subsys), PCI_PRODUCT(subsys));
160 1.1 cgd if (sc->sc_desc == NULL) {
161 1.1 cgd /*
162 1.1 cgd * This was a class/subclass match, so tell people to compile
163 1.1 cgd * kernel with options that cause this driver to spew.
164 1.1 cgd */
165 1.1 cgd #ifdef PUC_PRINT_REGS
166 1.1 cgd printf(":\n");
167 1.1 cgd pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
168 1.1 cgd #else
169 1.1 cgd printf(": unknown PCI communications device\n");
170 1.1 cgd printf("%s: compile kernel with PUC_PRINT_REGS and larger\n",
171 1.31 joerg device_xname(self));
172 1.1 cgd printf("%s: mesage buffer (via 'options MSGBUFSIZE=...'),\n",
173 1.31 joerg device_xname(self));
174 1.1 cgd printf("%s: and report the result with send-pr\n",
175 1.31 joerg device_xname(self));
176 1.1 cgd #endif
177 1.1 cgd return;
178 1.1 cgd }
179 1.1 cgd
180 1.1 cgd printf(": %s (", sc->sc_desc->name);
181 1.1 cgd for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++)
182 1.1 cgd printf("%s%s", i ? ", " : "",
183 1.1 cgd puc_port_type_name(sc->sc_desc->ports[i].type));
184 1.1 cgd printf(")\n");
185 1.1 cgd
186 1.1 cgd for (i = 0; i < 6; i++) {
187 1.1 cgd pcireg_t bar, type;
188 1.1 cgd
189 1.1 cgd sc->sc_bar_mappings[i].mapped = 0;
190 1.1 cgd
191 1.1 cgd bar = pci_conf_read(pa->pa_pc, pa->pa_tag,
192 1.1 cgd PCI_MAPREG_START + 4 * i); /* XXX const */
193 1.1 cgd if (bar == 0) /* BAR not implemented(?) */
194 1.1 cgd continue;
195 1.1 cgd
196 1.1 cgd type = (PCI_MAPREG_TYPE(bar) == PCI_MAPREG_TYPE_IO ?
197 1.1 cgd PCI_MAPREG_TYPE_IO : PCI_MAPREG_MEM_TYPE(bar));
198 1.1 cgd
199 1.5 jeffs if (type == PCI_MAPREG_TYPE_IO) {
200 1.5 jeffs tag = pa->pa_iot;
201 1.5 jeffs base = PCI_MAPREG_IO_ADDR(bar);
202 1.5 jeffs } else {
203 1.5 jeffs tag = pa->pa_memt;
204 1.5 jeffs base = PCI_MAPREG_MEM_ADDR(bar);
205 1.5 jeffs }
206 1.7 jlam #ifdef PUCCN
207 1.5 jeffs if (com_is_console(tag, base, &ioh)) {
208 1.5 jeffs sc->sc_bar_mappings[i].mapped = 1;
209 1.5 jeffs sc->sc_bar_mappings[i].a = base;
210 1.5 jeffs sc->sc_bar_mappings[i].s = COM_NPORTS;
211 1.5 jeffs sc->sc_bar_mappings[i].t = tag;
212 1.5 jeffs sc->sc_bar_mappings[i].h = ioh;
213 1.5 jeffs continue;
214 1.5 jeffs }
215 1.6 castor #endif
216 1.1 cgd sc->sc_bar_mappings[i].mapped = (pci_mapreg_map(pa,
217 1.1 cgd PCI_MAPREG_START + 4 * i, type, 0,
218 1.1 cgd &sc->sc_bar_mappings[i].t, &sc->sc_bar_mappings[i].h,
219 1.1 cgd &sc->sc_bar_mappings[i].a, &sc->sc_bar_mappings[i].s)
220 1.1 cgd == 0);
221 1.1 cgd if (sc->sc_bar_mappings[i].mapped)
222 1.1 cgd continue;
223 1.1 cgd
224 1.31 joerg aprint_error_dev(self, "couldn't map BAR at offset 0x%lx\n",
225 1.30 cegger (long)(PCI_MAPREG_START + 4 * i));
226 1.1 cgd }
227 1.1 cgd
228 1.1 cgd /* Map interrupt. */
229 1.9 sommerfe if (pci_intr_map(pa, &intrhandle)) {
230 1.31 joerg aprint_error_dev(self, "couldn't map interrupt\n");
231 1.1 cgd return;
232 1.1 cgd }
233 1.1 cgd /*
234 1.1 cgd * XXX the sub-devices establish the interrupts, for the
235 1.1 cgd * XXX following reasons:
236 1.1 cgd * XXX
237 1.1 cgd * XXX * we can't really know what IPLs they'd want
238 1.1 cgd * XXX
239 1.1 cgd * XXX * the MD dispatching code can ("should") dispatch
240 1.1 cgd * XXX chained interrupts better than we can.
241 1.1 cgd * XXX
242 1.1 cgd * XXX It would be nice if we could indicate to the MD interrupt
243 1.1 cgd * XXX handling code that the interrupt line used by the device
244 1.1 cgd * XXX was a PCI (level triggered) interrupt.
245 1.1 cgd * XXX
246 1.1 cgd * XXX It's not pretty, but hey, what is?
247 1.1 cgd */
248 1.1 cgd
249 1.32 ryo /* SB16C10xx board specific initialization */
250 1.32 ryo if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYSTEMBASE &&
251 1.32 ryo (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SYSTEMBASE_SB16C1054 ||
252 1.32 ryo PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SYSTEMBASE_SB16C1058)) {
253 1.32 ryo if (!sc->sc_bar_mappings[1].mapped) {
254 1.32 ryo aprint_error_dev(self,
255 1.32 ryo "optional register is not mapped\n");
256 1.32 ryo return;
257 1.32 ryo }
258 1.32 ryo #define SB16C105X_OPT_IMRREG0 0x0000000c
259 1.32 ryo /* enable port 0-7 interrupt */
260 1.32 ryo bus_space_write_1(sc->sc_bar_mappings[1].t,
261 1.32 ryo sc->sc_bar_mappings[1].h, SB16C105X_OPT_IMRREG0, 0xff);
262 1.32 ryo }
263 1.32 ryo
264 1.1 cgd /* Configure each port. */
265 1.1 cgd for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
266 1.3 cgd bus_space_handle_t subregion_handle;
267 1.1 cgd
268 1.1 cgd /* make sure the base address register is mapped */
269 1.1 cgd barindex = PUC_PORT_BAR_INDEX(sc->sc_desc->ports[i].bar);
270 1.1 cgd if (!sc->sc_bar_mappings[barindex].mapped) {
271 1.1 cgd printf("%s: %s port uses unmapped BAR (0x%x)\n",
272 1.31 joerg device_xname(self),
273 1.1 cgd puc_port_type_name(sc->sc_desc->ports[i].type),
274 1.1 cgd sc->sc_desc->ports[i].bar);
275 1.1 cgd continue;
276 1.1 cgd }
277 1.1 cgd
278 1.1 cgd /* set up to configure the child device */
279 1.1 cgd paa.port = i;
280 1.1 cgd paa.type = sc->sc_desc->ports[i].type;
281 1.10 bouyer paa.flags = sc->sc_desc->ports[i].flags;
282 1.1 cgd paa.pc = pa->pa_pc;
283 1.20 fredb paa.tag = pa->pa_tag;
284 1.1 cgd paa.intrhandle = intrhandle;
285 1.1 cgd paa.a = sc->sc_bar_mappings[barindex].a;
286 1.1 cgd paa.t = sc->sc_bar_mappings[barindex].t;
287 1.19 jdolecek paa.dmat = pa->pa_dmat;
288 1.19 jdolecek paa.dmat64 = pa->pa_dmat64;
289 1.3 cgd
290 1.6 castor if (
291 1.8 jhawk #ifdef PUCCN
292 1.6 castor !com_is_console(sc->sc_bar_mappings[barindex].t,
293 1.5 jeffs sc->sc_bar_mappings[barindex].a, &subregion_handle)
294 1.23 perry &&
295 1.6 castor #endif
296 1.6 castor bus_space_subregion(sc->sc_bar_mappings[barindex].t,
297 1.3 cgd sc->sc_bar_mappings[barindex].h,
298 1.3 cgd sc->sc_desc->ports[i].offset,
299 1.23 perry sc->sc_bar_mappings[barindex].s -
300 1.3 cgd sc->sc_desc->ports[i].offset,
301 1.5 jeffs &subregion_handle) != 0) {
302 1.31 joerg aprint_error_dev(self, "couldn't get subregion for port %d\n", i);
303 1.3 cgd continue;
304 1.3 cgd }
305 1.3 cgd paa.h = subregion_handle;
306 1.1 cgd
307 1.1 cgd #if 0
308 1.3 cgd printf("%s: port %d: %s @ (index %d) 0x%x (0x%lx, 0x%lx)\n",
309 1.31 joerg device_xname(self), paa.port,
310 1.1 cgd puc_port_type_name(paa.type), barindex, (int)paa.a,
311 1.3 cgd (long)paa.t, (long)paa.h);
312 1.1 cgd #endif
313 1.1 cgd
314 1.25 drochner locs[PUCCF_PORT] = i;
315 1.21 drochner
316 1.1 cgd /* and configure it */
317 1.25 drochner sc->sc_ports[i].dev = config_found_sm_loc(self, "puc", locs,
318 1.26 drochner &paa, puc_print, config_stdsubmatch);
319 1.1 cgd }
320 1.1 cgd }
321 1.1 cgd
322 1.31 joerg CFATTACH_DECL_NEW(puc, sizeof(struct puc_softc),
323 1.24 thorpej puc_match, puc_attach, NULL, NULL);
324 1.24 thorpej
325 1.24 thorpej static int
326 1.24 thorpej puc_print(void *aux, const char *pnp)
327 1.1 cgd {
328 1.1 cgd struct puc_attach_args *paa = aux;
329 1.23 perry
330 1.1 cgd if (pnp)
331 1.17 thorpej aprint_normal("%s at %s", puc_port_type_name(paa->type), pnp);
332 1.17 thorpej aprint_normal(" port %d", paa->port);
333 1.1 cgd return (UNCONF);
334 1.1 cgd }
335 1.1 cgd
336 1.5 jeffs const struct puc_device_description *
337 1.24 thorpej puc_find_description(pcireg_t vend, pcireg_t prod, pcireg_t svend,
338 1.24 thorpej pcireg_t sprod)
339 1.1 cgd {
340 1.1 cgd int i;
341 1.1 cgd
342 1.1 cgd #define checkreg(val, index) \
343 1.1 cgd (((val) & puc_devices[i].rmask[(index)]) == puc_devices[i].rval[(index)])
344 1.1 cgd
345 1.1 cgd for (i = 0; puc_devices[i].name != NULL; i++) {
346 1.1 cgd if (checkreg(vend, PUC_REG_VEND) &&
347 1.1 cgd checkreg(prod, PUC_REG_PROD) &&
348 1.1 cgd checkreg(svend, PUC_REG_SVEND) &&
349 1.1 cgd checkreg(sprod, PUC_REG_SPROD))
350 1.1 cgd return (&puc_devices[i]);
351 1.1 cgd }
352 1.1 cgd
353 1.1 cgd #undef checkreg
354 1.1 cgd
355 1.1 cgd return (NULL);
356 1.1 cgd }
357 1.1 cgd
358 1.1 cgd static const char *
359 1.24 thorpej puc_port_type_name(int type)
360 1.1 cgd {
361 1.1 cgd
362 1.1 cgd switch (type) {
363 1.1 cgd case PUC_PORT_TYPE_COM:
364 1.1 cgd return "com";
365 1.1 cgd case PUC_PORT_TYPE_LPT:
366 1.1 cgd return "lpt";
367 1.1 cgd default:
368 1.1 cgd panic("puc_port_type_name %d", type);
369 1.1 cgd }
370 1.1 cgd }
371