siisata_pci.c revision 1.3 
1/* $NetBSD: siisata_pci.c,v 1.3 2009/06/17 04:37:57 jakllsch Exp $ */
2/* Id: siisata_pci.c,v 1.11 2008/05/21 16:20:11 jakllsch Exp  */
3
4/*
5 * Copyright (c) 2006 Manuel Bouyer.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *	This product includes software developed by Manuel Bouyer.
18 * 4. The name of the author may not be used to endorse or promote products
19 *    derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
33
34/*-
35 * Copyright (c) 2007, 2008 Jonathan A. Kollasch.
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 *    notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 *    notice, this list of conditions and the following disclaimer in the
45 *    documentation and/or other materials provided with the distribution.
46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
52 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
56 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57 *
58 */
59
60#include <sys/cdefs.h>
61
62
63#include <sys/types.h>
64#include <sys/malloc.h>
65#include <sys/param.h>
66#include <sys/kernel.h>
67#include <sys/systm.h>
68
69#include <uvm/uvm_extern.h>
70
71#include <dev/pci/pcivar.h>
72#include <dev/pci/pcidevs.h>
73#include <dev/ic/siisatavar.h>
74
75struct siisata_pci_softc {
76	struct siisata_softc si_sc;
77	pci_chipset_tag_t sc_pc;
78	pcitag_t sc_pcitag;
79	void * sc_ih;
80};
81
82static int siisata_pci_match(device_t, cfdata_t, void *);
83static void siisata_pci_attach(device_t, device_t, void *);
84static int siisata_pci_detach(device_t, int);
85static bool siisata_pci_resume(device_t PMF_FN_PROTO);
86
87static const struct siisata_pci_product {
88	pci_vendor_id_t spp_vendor;
89	pci_product_id_t spp_product;
90	int spp_ports;
91	int spp_chip;
92
93}                   siisata_pci_products[] = {
94	{
95		PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124,
96		4, 3124
97	},
98	{
99		PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3132,
100		2, 3132
101	},
102	{
103		PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3531,
104		1, 3531
105	},
106	{
107		0, 0,
108		0, 0
109	},
110};
111
112CFATTACH_DECL_NEW(siisata_pci, sizeof(struct siisata_pci_softc),
113    siisata_pci_match, siisata_pci_attach, siisata_pci_detach, NULL);
114
115static const struct siisata_pci_product *
116siisata_pci_lookup(const struct pci_attach_args * pa)
117{
118	const struct siisata_pci_product *spp;
119
120	for (spp = siisata_pci_products; spp->spp_ports > 0; spp++) {
121		if (PCI_VENDOR(pa->pa_id) == spp->spp_vendor &&
122		    PCI_PRODUCT(pa->pa_id) == spp->spp_product)
123			return spp;
124	}
125	return NULL;
126}
127
128static int
129siisata_pci_match(device_t parent, cfdata_t match, void *aux)
130{
131	struct pci_attach_args *pa = aux;
132
133	if (siisata_pci_lookup(pa) != NULL)
134		return 3;
135
136	return 0;
137}
138
139static void
140siisata_pci_attach(device_t parent, device_t self, void *aux)
141{
142	struct pci_attach_args *pa = aux;
143	struct siisata_pci_softc *psc = device_private(self);
144	struct siisata_softc *sc = &psc->si_sc;
145	char devinfo[256];
146	const char *intrstr;
147	pcireg_t csr, memtype;
148	const struct siisata_pci_product *spp;
149	pci_intr_handle_t intrhandle;
150	bus_space_tag_t memt;
151	bus_space_handle_t memh;
152	uint32_t gcreg;
153	int memh_valid;
154	bus_size_t grsize, prsize;
155
156	sc->sc_atac.atac_dev = self;
157
158	psc->sc_pc = pa->pa_pc;
159	psc->sc_pcitag = pa->pa_tag;
160
161	pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo, sizeof(devinfo));
162	aprint_naive(": SATA-II HBA\n");
163	aprint_normal(": %s\n", devinfo);
164
165	/* map bar0 */
166#if 1
167	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR0);
168#else
169	memtype = PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT;
170#endif
171	switch (memtype) {
172	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
173	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
174		memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR0,
175			memtype, 0, &memt, &memh, NULL, &grsize) == 0);
176		break;
177	default:
178		memh_valid = 0;
179	}
180	if (memh_valid) {
181		sc->sc_grt = memt;
182		sc->sc_grh = memh;
183		sc->sc_grs = grsize;
184	} else {
185		aprint_error("%s: unable to map device global registers\n",
186		    SIISATANAME(sc));
187		return;
188	}
189
190	/* map bar1 */
191#if 1
192	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, SIISATA_PCI_BAR1);
193#else
194	memtype = PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT;
195#endif
196	switch (memtype) {
197	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT:
198	case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT:
199		memh_valid = (pci_mapreg_map(pa, SIISATA_PCI_BAR1,
200			memtype, 0, &memt, &memh, NULL, &prsize) == 0);
201		break;
202	default:
203		memh_valid = 0;
204	}
205	if (memh_valid) {
206		sc->sc_prt = memt;
207		sc->sc_prh = memh;
208		sc->sc_prs = prsize;
209	} else {
210		bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
211		aprint_error("%s: unable to map device port registers\n",
212		    SIISATANAME(sc));
213		return;
214	}
215
216	if (pci_dma64_available(pa)) {
217		sc->sc_dmat = pa->pa_dmat64;
218		sc->sc_have_dma64 = 1;
219		aprint_debug("64-bit PCI DMA available\n");
220	} else {
221		sc->sc_dmat = pa->pa_dmat;
222		sc->sc_have_dma64 = 0;
223	}
224
225	/* map interrupt */
226	if (pci_intr_map(pa, &intrhandle) != 0) {
227		bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
228		bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize);
229		aprint_error("%s: couldn't map interrupt\n", SIISATANAME(sc));
230		return;
231	}
232	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
233	psc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle,
234	    IPL_BIO, siisata_intr, sc);
235	if (psc->sc_ih == NULL) {
236		bus_space_unmap(sc->sc_grt, sc->sc_grh, grsize);
237		bus_space_unmap(sc->sc_prt, sc->sc_prh, prsize);
238		aprint_error("%s: couldn't establish interrupt"
239		    "at %s\n", SIISATANAME(sc), intrstr);
240		return;
241	}
242	aprint_normal("%s: interrupting at %s\n", SIISATANAME(sc),
243	    intrstr ? intrstr : "unknown interrupt");
244
245	/* fill in number of ports on this device */
246	spp = siisata_pci_lookup(pa);
247	if (spp != NULL) {
248		sc->sc_atac.atac_nchannels = spp->spp_ports;
249		sc->sc_chip = spp->spp_chip;
250	} else
251		/* _match() should prevent us from getting here */
252		panic("siisata: the universe might be falling apart!\n");
253
254	/* set the necessary bits in case the firmware didn't */
255	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
256	csr |= PCI_COMMAND_MASTER_ENABLE;
257	csr |= PCI_COMMAND_MEM_ENABLE;
258	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
259
260	gcreg = GRREAD(sc, GR_GC);
261
262	aprint_normal("%s: SiI%d on ", SIISATANAME(sc), sc->sc_chip);
263	if (sc->sc_chip == 3124) {
264		aprint_normal("%d-bit, ", (gcreg & GR_GC_REQ64) ? 64 : 32);
265		switch (gcreg & (GR_GC_DEVSEL | GR_GC_STOP | GR_GC_TRDY)) {
266		case 0:
267			aprint_normal("%d", (gcreg & GR_GC_M66EN) ? 66 : 33);
268			break;
269		case GR_GC_TRDY:
270			aprint_normal("%d", 66);
271			break;
272		case GR_GC_STOP:
273			aprint_normal("%d", 100);
274			break;
275		case GR_GC_STOP | GR_GC_TRDY:
276			aprint_normal("%d", 133);
277			break;
278		default:
279			break;
280		}
281		aprint_normal("MHz PCI%s bus.", (gcreg & (GR_GC_DEVSEL | GR_GC_STOP | GR_GC_TRDY)) ? "-X" : "");
282	} else {
283		/* XXX - but only x1 devices so far */
284		aprint_normal("PCI-Express x1 port.");
285	}
286	if (gcreg & GR_GC_3GBPS)
287		aprint_normal(" 3.0Gb/s capable.\n");
288	else
289		aprint_normal("\n");
290
291	siisata_attach(sc);
292
293	if (!pmf_device_register(self, NULL, siisata_pci_resume))
294		aprint_error_dev(self, "couldn't establish power handler\n");
295}
296
297static int
298siisata_pci_detach(device_t dv, int flags)
299{
300	struct siisata_pci_softc *psc = device_private(dv);
301	struct siisata_softc *sc = &psc->si_sc;
302	int rv;
303
304	rv = siisata_detach(sc, flags);
305	if (rv)
306		return rv;
307
308	if (psc->sc_ih != NULL) {
309		pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
310	}
311
312	bus_space_unmap(sc->sc_prt, sc->sc_prh, sc->sc_prs);
313	bus_space_unmap(sc->sc_grt, sc->sc_grh, sc->sc_grs);
314
315	return 0;
316}
317
318static bool
319siisata_pci_resume(device_t dv PMF_FN_ARGS)
320{
321	struct siisata_pci_softc *psc = device_private(dv);
322	struct siisata_softc *sc = &psc->si_sc;
323	int s;
324
325	s = splbio();
326	siisata_resume(sc);
327	splx(s);
328
329	return true;
330}
331