siop_pci.c revision 1.2 1 1.2 bouyer /* $NetBSD: siop_pci.c,v 1.2 2000/04/27 14:06:59 bouyer Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 2000 Manuel Bouyer.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer * 3. All advertising materials mentioning features or use of this software
15 1.1 bouyer * must display the following acknowledgement:
16 1.2 bouyer * This product includes software developed by Manuel Bouyer
17 1.2 bouyer * 4. The name of the author may not be used to endorse or promote products
18 1.2 bouyer * derived from this software without specific prior written permission.
19 1.1 bouyer *
20 1.2 bouyer * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
21 1.2 bouyer * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
22 1.2 bouyer * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
23 1.2 bouyer * AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
24 1.2 bouyer * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.2 bouyer * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.2 bouyer * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.2 bouyer * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.2 bouyer * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.2 bouyer * POSSIBILITY OF SUCH DAMAGE.
30 1.1 bouyer *
31 1.1 bouyer */
32 1.1 bouyer
33 1.1 bouyer /* SYM53c8xx PCI-SCSI I/O Processors driver: PCI front-end */
34 1.1 bouyer
35 1.1 bouyer #include <sys/param.h>
36 1.1 bouyer #include <sys/systm.h>
37 1.1 bouyer #include <sys/device.h>
38 1.1 bouyer #include <sys/malloc.h>
39 1.1 bouyer #include <sys/buf.h>
40 1.1 bouyer #include <sys/kernel.h>
41 1.1 bouyer
42 1.1 bouyer #include <machine/endian.h>
43 1.1 bouyer
44 1.1 bouyer #include <dev/pci/pcireg.h>
45 1.1 bouyer #include <dev/pci/pcivar.h>
46 1.1 bouyer #include <dev/pci/pcidevs.h>
47 1.1 bouyer
48 1.1 bouyer #include <dev/scsipi/scsipi_all.h>
49 1.1 bouyer #include <dev/scsipi/scsipiconf.h>
50 1.1 bouyer
51 1.1 bouyer #include <dev/ic/siopvar.h>
52 1.1 bouyer
53 1.1 bouyer /* structure describing each chip */
54 1.1 bouyer struct siop_product_desc {
55 1.1 bouyer u_int32_t product;
56 1.1 bouyer int revision;
57 1.1 bouyer const char *name;
58 1.1 bouyer int features; /* features are defined in siopvar.h */
59 1.1 bouyer u_int8_t maxburst;
60 1.1 bouyer u_int8_t maxoff;
61 1.1 bouyer u_int8_t clock_div;
62 1.1 bouyer };
63 1.1 bouyer
64 1.1 bouyer /* List (array, really :) of chips we know how to handle */
65 1.1 bouyer const struct siop_product_desc siop_products[] = {
66 1.1 bouyer { PCI_PRODUCT_SYMBIOS_810,
67 1.1 bouyer 0x00,
68 1.1 bouyer "Symbios Logic 53c810 (fast scsi)",
69 1.1 bouyer SF_PCI_RL,
70 1.1 bouyer 4, 8, 4
71 1.1 bouyer },
72 1.1 bouyer { PCI_PRODUCT_SYMBIOS_810,
73 1.1 bouyer 0x10,
74 1.1 bouyer "Symbios Logic 53c810a (fast scsi)",
75 1.1 bouyer SF_PCI_RL | SF_PCI_BOF | SF_CHIP_PF,
76 1.1 bouyer 4, 8, 4
77 1.1 bouyer },
78 1.1 bouyer { PCI_PRODUCT_SYMBIOS_815,
79 1.1 bouyer 0x00,
80 1.1 bouyer "Symbios Logic 53c815 (fast scsi)",
81 1.1 bouyer SF_PCI_RL | SF_PCI_BOF,
82 1.1 bouyer 4, 8, 4
83 1.1 bouyer },
84 1.1 bouyer { PCI_PRODUCT_SYMBIOS_820,
85 1.1 bouyer 0x00,
86 1.1 bouyer "Symbios Logic 53c820 (fast wide scsi)",
87 1.1 bouyer SF_PCI_RL | SF_BUS_WIDE,
88 1.1 bouyer 4, 8, 4
89 1.1 bouyer },
90 1.1 bouyer { PCI_PRODUCT_SYMBIOS_825,
91 1.1 bouyer 0x00,
92 1.1 bouyer "Symbios Logic 53c825 (fast wide scsi)",
93 1.1 bouyer SF_PCI_RL | SF_PCI_BOF | SF_BUS_WIDE,
94 1.1 bouyer 4, 8, 4
95 1.1 bouyer },
96 1.1 bouyer { PCI_PRODUCT_SYMBIOS_825,
97 1.1 bouyer 0x10,
98 1.1 bouyer "Symbios Logic 53c825a (fast wide scsi)",
99 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
100 1.1 bouyer SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM |
101 1.1 bouyer SF_BUS_WIDE,
102 1.1 bouyer 7, 8, 4
103 1.1 bouyer },
104 1.1 bouyer { PCI_PRODUCT_SYMBIOS_860,
105 1.1 bouyer 0x00,
106 1.1 bouyer "Symbios Logic 53c860 (ultra scsi)",
107 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
108 1.1 bouyer SF_CHIP_PF | SF_CHIP_CLK80 |
109 1.1 bouyer SF_BUS_ULTRA,
110 1.1 bouyer 4, 8, 5
111 1.1 bouyer },
112 1.1 bouyer { PCI_PRODUCT_SYMBIOS_875,
113 1.1 bouyer 0x00,
114 1.1 bouyer "Symbios Logic 53c875 (ultra-wide scsi)",
115 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
116 1.1 bouyer SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_CLK80 |
117 1.1 bouyer SF_BUS_ULTRA | SF_BUS_WIDE,
118 1.1 bouyer 7, 16, 5
119 1.1 bouyer },
120 1.1 bouyer { PCI_PRODUCT_SYMBIOS_875,
121 1.1 bouyer 0x02,
122 1.1 bouyer "Symbios Logic 53c875 (ultra-wide scsi)",
123 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
124 1.1 bouyer SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
125 1.1 bouyer SF_BUS_ULTRA | SF_BUS_WIDE,
126 1.1 bouyer 7, 16, 5
127 1.1 bouyer },
128 1.1 bouyer { PCI_PRODUCT_SYMBIOS_875J,
129 1.1 bouyer 0x00,
130 1.1 bouyer "Symbios Logic 53c875j (ultra-wide scsi)",
131 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
132 1.1 bouyer SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
133 1.1 bouyer SF_BUS_ULTRA | SF_BUS_WIDE,
134 1.1 bouyer 7, 16, 5
135 1.1 bouyer },
136 1.1 bouyer { PCI_PRODUCT_SYMBIOS_885,
137 1.1 bouyer 0x00,
138 1.1 bouyer "Symbios Logic 53c885 (ultra-wide scsi)",
139 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
140 1.1 bouyer SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
141 1.1 bouyer SF_BUS_ULTRA | SF_BUS_WIDE,
142 1.1 bouyer 7, 16, 5
143 1.1 bouyer },
144 1.1 bouyer { PCI_PRODUCT_SYMBIOS_895,
145 1.1 bouyer 0x00,
146 1.1 bouyer "Symbios Logic 53c895 (ultra2-wide scsi)",
147 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
148 1.1 bouyer SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD |
149 1.1 bouyer SF_BUS_ULTRA2 | SF_BUS_WIDE,
150 1.1 bouyer 7, 31, 7
151 1.1 bouyer },
152 1.1 bouyer { PCI_PRODUCT_SYMBIOS_896,
153 1.1 bouyer 0x00,
154 1.1 bouyer "Symbios Logic 53c896 (ultra2-wide scsi)",
155 1.1 bouyer SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
156 1.1 bouyer SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD |
157 1.1 bouyer SF_BUS_ULTRA2 | SF_BUS_WIDE,
158 1.1 bouyer 7, 31, 7
159 1.1 bouyer },
160 1.1 bouyer { 0,
161 1.1 bouyer 0x00,
162 1.1 bouyer NULL,
163 1.1 bouyer 0x00,
164 1.1 bouyer 7, 31, 7
165 1.1 bouyer },
166 1.1 bouyer };
167 1.1 bouyer
168 1.1 bouyer const struct siop_product_desc * siop_lookup_product __P((u_int32_t, int));
169 1.1 bouyer
170 1.1 bouyer const struct siop_product_desc *
171 1.1 bouyer siop_lookup_product(id, rev)
172 1.1 bouyer u_int32_t id;
173 1.1 bouyer int rev;
174 1.1 bouyer {
175 1.1 bouyer const struct siop_product_desc *pp;
176 1.1 bouyer const struct siop_product_desc *rp = NULL;
177 1.1 bouyer for (pp = siop_products; pp->name != NULL; pp++) {
178 1.1 bouyer if (PCI_PRODUCT(id) == pp->product && pp->revision <= rev)
179 1.1 bouyer if (rp == NULL || pp->revision > rp->revision)
180 1.1 bouyer rp = pp;
181 1.1 bouyer }
182 1.1 bouyer return rp;
183 1.1 bouyer }
184 1.1 bouyer
185 1.1 bouyer /* Driver internal state */
186 1.1 bouyer struct siop_pci_softc {
187 1.1 bouyer struct siop_softc siop;
188 1.1 bouyer pci_chipset_tag_t sc_pc; /* PCI registers info */
189 1.1 bouyer pcitag_t sc_tag;
190 1.1 bouyer void *sc_ih; /* PCI interrupt handle */
191 1.1 bouyer const struct siop_product_desc *sc_pp; /* Adapter description */
192 1.1 bouyer };
193 1.1 bouyer
194 1.1 bouyer int siop_pci_match __P((struct device *, struct cfdata *, void *));
195 1.1 bouyer void siop_pci_attach __P((struct device *, struct device *, void *));
196 1.1 bouyer
197 1.1 bouyer struct cfattach siop_pci_ca = {
198 1.1 bouyer sizeof(struct siop_pci_softc), siop_pci_match, siop_pci_attach
199 1.1 bouyer };
200 1.1 bouyer
201 1.1 bouyer int
202 1.1 bouyer siop_pci_match(parent, match, aux)
203 1.1 bouyer struct device *parent;
204 1.1 bouyer struct cfdata *match;
205 1.1 bouyer void *aux;
206 1.1 bouyer {
207 1.1 bouyer struct pci_attach_args *pa = aux;
208 1.1 bouyer const struct siop_product_desc *pp;
209 1.1 bouyer
210 1.1 bouyer /* look if it's a known product */
211 1.1 bouyer pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class));
212 1.1 bouyer if (pp)
213 1.1 bouyer return 1;
214 1.1 bouyer return 0;
215 1.1 bouyer }
216 1.1 bouyer
217 1.1 bouyer void
218 1.1 bouyer siop_pci_attach(parent, self, aux)
219 1.1 bouyer struct device *parent, *self;
220 1.1 bouyer void *aux;
221 1.1 bouyer {
222 1.1 bouyer struct pci_attach_args *pa = aux;
223 1.1 bouyer pci_chipset_tag_t pc = pa->pa_pc;
224 1.1 bouyer pcitag_t tag = pa->pa_tag;
225 1.1 bouyer struct siop_pci_softc *sc = (struct siop_pci_softc *)self;
226 1.1 bouyer const char *intrstr;
227 1.1 bouyer pci_intr_handle_t intrhandle;
228 1.1 bouyer
229 1.1 bouyer sc->sc_pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class));
230 1.1 bouyer if (sc->sc_pp == NULL) {
231 1.1 bouyer printf("sym: broken match/attach!!\n");
232 1.1 bouyer return;
233 1.1 bouyer }
234 1.1 bouyer printf(": %s\n", sc->sc_pp->name);
235 1.1 bouyer sc->sc_pc = pc;
236 1.1 bouyer sc->sc_tag = tag;
237 1.1 bouyer sc->siop.sc_dmat = pa->pa_dmat;
238 1.1 bouyer if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0,
239 1.1 bouyer &sc->siop.sc_rt, &sc->siop.sc_rh, &sc->siop.sc_raddr, NULL) != 0) {
240 1.1 bouyer /* Try to map memory addr */
241 1.1 bouyer if (pci_mapreg_map(pa, 0x14,
242 1.1 bouyer PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
243 1.1 bouyer &sc->siop.sc_rt, &sc->siop.sc_rh,
244 1.1 bouyer &sc->siop.sc_raddr, NULL) != 0) {
245 1.1 bouyer printf("%s: unable to map device registers\n",
246 1.1 bouyer sc->siop.sc_dev.dv_xname);
247 1.1 bouyer }
248 1.1 bouyer }
249 1.1 bouyer if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
250 1.1 bouyer pa->pa_intrline, &intrhandle) != 0) {
251 1.1 bouyer printf("%s: couldn't map native-PCI interrupt\n",
252 1.1 bouyer sc->siop.sc_dev.dv_xname);
253 1.1 bouyer return;
254 1.1 bouyer }
255 1.1 bouyer intrstr = pci_intr_string(pa->pa_pc, intrhandle);
256 1.1 bouyer sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
257 1.1 bouyer siop_intr, &sc->siop);
258 1.1 bouyer if (sc->sc_ih != NULL) {
259 1.1 bouyer printf("%s: using %s for native-PCI interrupt\n",
260 1.1 bouyer sc->siop.sc_dev.dv_xname,
261 1.1 bouyer intrstr ? intrstr : "unknown interrupt");
262 1.1 bouyer } else {
263 1.1 bouyer printf("%s: couldn't establish interrupt",
264 1.1 bouyer sc->siop.sc_dev.dv_xname);
265 1.1 bouyer if (intrstr != NULL)
266 1.1 bouyer printf(" at %s", intrstr);
267 1.1 bouyer printf("\n");
268 1.1 bouyer return;
269 1.1 bouyer }
270 1.1 bouyer /* copy interesting infos about the chip */
271 1.1 bouyer sc->siop.features = sc->sc_pp->features;
272 1.1 bouyer sc->siop.maxburst = sc->sc_pp->maxburst;
273 1.1 bouyer sc->siop.maxoff = sc->sc_pp->maxoff;
274 1.1 bouyer sc->siop.clock_div = sc->sc_pp->clock_div;
275 1.1 bouyer /* attach generic code */
276 1.1 bouyer siop_attach(&sc->siop);
277 1.1 bouyer }
278