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siop_pci.c revision 1.1
      1 /*	$NetBSD: siop_pci.c,v 1.1 2000/04/21 17:57:00 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2000 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by the University of
     17  *	California, Berkeley and its contributors.
     18  * 4. Neither the name of the University nor the names of its contributors
     19  *    may be used to endorse or promote products derived from this software
     20  *    without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  */
     35 
     36 /* SYM53c8xx PCI-SCSI I/O Processors driver: PCI front-end */
     37 
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/device.h>
     41 #include <sys/malloc.h>
     42 #include <sys/buf.h>
     43 #include <sys/kernel.h>
     44 
     45 #include <machine/endian.h>
     46 
     47 #include <dev/pci/pcireg.h>
     48 #include <dev/pci/pcivar.h>
     49 #include <dev/pci/pcidevs.h>
     50 
     51 #include <dev/scsipi/scsipi_all.h>
     52 #include <dev/scsipi/scsipiconf.h>
     53 
     54 #include <dev/ic/siopvar.h>
     55 
     56 /* structure describing each chip */
     57 struct siop_product_desc {
     58 	u_int32_t product;
     59 	int	revision;
     60 	const char *name;
     61 	int	features; /* features are defined in siopvar.h */
     62 	u_int8_t maxburst;
     63 	u_int8_t maxoff;
     64 	u_int8_t clock_div;
     65 };
     66 
     67 /* List (array, really :) of chips we know how to handle */
     68 const struct siop_product_desc siop_products[] = {
     69 	{ PCI_PRODUCT_SYMBIOS_810,
     70 	0x00,
     71 	"Symbios Logic 53c810 (fast scsi)",
     72 	SF_PCI_RL,
     73 	4, 8, 4
     74 	},
     75 	{ PCI_PRODUCT_SYMBIOS_810,
     76 	0x10,
     77 	"Symbios Logic 53c810a (fast scsi)",
     78 	SF_PCI_RL | SF_PCI_BOF | SF_CHIP_PF,
     79 	4, 8, 4
     80 	},
     81 	{ PCI_PRODUCT_SYMBIOS_815,
     82 	0x00,
     83 	"Symbios Logic 53c815 (fast scsi)",
     84 	SF_PCI_RL | SF_PCI_BOF,
     85 	4, 8, 4
     86 	},
     87 	{ PCI_PRODUCT_SYMBIOS_820,
     88 	0x00,
     89 	"Symbios Logic 53c820 (fast wide scsi)",
     90 	SF_PCI_RL | SF_BUS_WIDE,
     91 	4, 8, 4
     92 	},
     93 	{ PCI_PRODUCT_SYMBIOS_825,
     94 	0x00,
     95 	"Symbios Logic 53c825 (fast wide scsi)",
     96 	SF_PCI_RL | SF_PCI_BOF | SF_BUS_WIDE,
     97 	4, 8, 4
     98 	},
     99 	{ PCI_PRODUCT_SYMBIOS_825,
    100 	0x10,
    101 	"Symbios Logic 53c825a (fast wide scsi)",
    102 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    103 	SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM |
    104 	SF_BUS_WIDE,
    105 	7, 8, 4
    106 	},
    107 	{ PCI_PRODUCT_SYMBIOS_860,
    108 	0x00,
    109 	"Symbios Logic 53c860 (ultra scsi)",
    110 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    111 	SF_CHIP_PF | SF_CHIP_CLK80 |
    112 	SF_BUS_ULTRA,
    113 	4, 8, 5
    114 	},
    115 	{ PCI_PRODUCT_SYMBIOS_875,
    116 	0x00,
    117 	"Symbios Logic 53c875 (ultra-wide scsi)",
    118 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    119 	SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_CLK80 |
    120 	SF_BUS_ULTRA | SF_BUS_WIDE,
    121 	7, 16, 5
    122 	},
    123 	{ PCI_PRODUCT_SYMBIOS_875,
    124 	0x02,
    125 	"Symbios Logic 53c875 (ultra-wide scsi)",
    126 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    127 	SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
    128 	SF_BUS_ULTRA | SF_BUS_WIDE,
    129 	7, 16, 5
    130 	},
    131 	{ PCI_PRODUCT_SYMBIOS_875J,
    132 	0x00,
    133 	"Symbios Logic 53c875j (ultra-wide scsi)",
    134 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    135 	SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
    136 	SF_BUS_ULTRA | SF_BUS_WIDE,
    137 	7, 16, 5
    138 	},
    139 	{ PCI_PRODUCT_SYMBIOS_885,
    140 	0x00,
    141 	"Symbios Logic 53c885 (ultra-wide scsi)",
    142 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    143 	SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
    144 	SF_BUS_ULTRA | SF_BUS_WIDE,
    145 	7, 16, 5
    146 	},
    147 	{ PCI_PRODUCT_SYMBIOS_895,
    148 	0x00,
    149 	"Symbios Logic 53c895 (ultra2-wide scsi)",
    150 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    151 	SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD |
    152 	SF_BUS_ULTRA2 | SF_BUS_WIDE,
    153 	7, 31, 7
    154 	},
    155 	{ PCI_PRODUCT_SYMBIOS_896,
    156 	0x00,
    157 	"Symbios Logic 53c896 (ultra2-wide scsi)",
    158 	SF_PCI_RL | SF_PCI_CLS | SF_PCI_WRI | SF_PCI_RM |
    159 	SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_QUAD |
    160 	SF_BUS_ULTRA2 | SF_BUS_WIDE,
    161 	7, 31, 7
    162 	},
    163 	{ 0,
    164 	0x00,
    165 	NULL,
    166 	0x00,
    167 	7, 31, 7
    168 	},
    169 };
    170 
    171 const struct siop_product_desc * siop_lookup_product __P((u_int32_t, int));
    172 
    173 const struct siop_product_desc *
    174 siop_lookup_product(id, rev)
    175 	u_int32_t id;
    176 	int rev;
    177 {
    178 	const struct siop_product_desc *pp;
    179 	const struct siop_product_desc *rp = NULL;
    180 	for (pp = siop_products; pp->name != NULL; pp++) {
    181 		if (PCI_PRODUCT(id) == pp->product && pp->revision <= rev)
    182 			if (rp == NULL || pp->revision > rp->revision)
    183 				rp = pp;
    184 	}
    185 	return rp;
    186 }
    187 
    188 /* Driver internal state */
    189 struct siop_pci_softc {
    190 	struct siop_softc siop;
    191 	pci_chipset_tag_t	sc_pc;	/* PCI registers info */
    192 	pcitag_t		sc_tag;
    193 	void			*sc_ih;	/* PCI interrupt handle */
    194 	const struct siop_product_desc *sc_pp; /* Adapter description */
    195 };
    196 
    197 int     siop_pci_match __P((struct device *, struct cfdata *, void *));
    198 void    siop_pci_attach __P((struct device *, struct device *, void *));
    199 
    200 struct cfattach siop_pci_ca = {
    201 	sizeof(struct siop_pci_softc), siop_pci_match, siop_pci_attach
    202 };
    203 
    204 int
    205 siop_pci_match(parent, match, aux)
    206 	struct device *parent;
    207 	struct cfdata *match;
    208 	void *aux;
    209 {
    210 	struct pci_attach_args *pa = aux;
    211 	const struct siop_product_desc *pp;
    212 
    213 	/* look if it's a known product */
    214 	pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class));
    215 	if (pp)
    216 		return 1;
    217 	return 0;
    218 }
    219 
    220 void
    221 siop_pci_attach(parent, self, aux)
    222 	struct device *parent, *self;
    223 	void *aux;
    224 {
    225 	struct pci_attach_args *pa = aux;
    226 	pci_chipset_tag_t pc = pa->pa_pc;
    227 	pcitag_t tag = pa->pa_tag;
    228 	struct siop_pci_softc *sc = (struct siop_pci_softc *)self;
    229 	const char *intrstr;
    230 	pci_intr_handle_t intrhandle;
    231 
    232 	sc->sc_pp = siop_lookup_product(pa->pa_id, PCI_REVISION(pa->pa_class));
    233 	if (sc->sc_pp == NULL) {
    234 		printf("sym: broken match/attach!!\n");
    235 		return;
    236 	}
    237 	printf(": %s\n", sc->sc_pp->name);
    238 	sc->sc_pc = pc;
    239 	sc->sc_tag = tag;
    240 	sc->siop.sc_dmat = pa->pa_dmat;
    241 	if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0,
    242 	    &sc->siop.sc_rt, &sc->siop.sc_rh, &sc->siop.sc_raddr, NULL) != 0) {
    243 		/* Try to map memory addr */
    244 		if (pci_mapreg_map(pa, 0x14,
    245 		    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
    246 		    &sc->siop.sc_rt, &sc->siop.sc_rh,
    247 			&sc->siop.sc_raddr, NULL) != 0) {
    248 			printf("%s: unable to map device registers\n",
    249 			    sc->siop.sc_dev.dv_xname);
    250 		}
    251 	}
    252 	if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
    253 	    pa->pa_intrline, &intrhandle) != 0) {
    254 		printf("%s: couldn't map native-PCI interrupt\n",
    255 		    sc->siop.sc_dev.dv_xname);
    256 		return;
    257 	}
    258 	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    259 	sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
    260 	    siop_intr, &sc->siop);
    261 	if (sc->sc_ih != NULL) {
    262 		printf("%s: using %s for native-PCI interrupt\n",
    263 		    sc->siop.sc_dev.dv_xname,
    264 		    intrstr ? intrstr : "unknown interrupt");
    265 	} else {
    266 		printf("%s: couldn't establish interrupt",
    267 		    sc->siop.sc_dev.dv_xname);
    268 		if (intrstr != NULL)
    269 			printf(" at %s", intrstr);
    270 		printf("\n");
    271 		return;
    272 	}
    273 	/* copy interesting infos about the chip */
    274 	sc->siop.features = sc->sc_pp->features;
    275 	sc->siop.maxburst = sc->sc_pp->maxburst;
    276 	sc->siop.maxoff = sc->sc_pp->maxoff;
    277 	sc->siop.clock_div = sc->sc_pp->clock_div;
    278 	/* attach generic code */
    279 	siop_attach(&sc->siop);
    280 }
    281