slide.c revision 1.4.4.6 1 1.4.4.6 skrll /* $NetBSD: slide.c,v 1.4.4.6 2005/03/04 16:45:26 skrll Exp $ */
2 1.4.4.2 skrll
3 1.4.4.2 skrll /*-
4 1.4.4.2 skrll * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 1.4.4.2 skrll * All rights reserved.
6 1.4.4.2 skrll *
7 1.4.4.2 skrll * This code is derived from software contributed to The NetBSD Foundation
8 1.4.4.2 skrll * by Jason R. Thorpe.
9 1.4.4.2 skrll *
10 1.4.4.2 skrll * Redistribution and use in source and binary forms, with or without
11 1.4.4.2 skrll * modification, are permitted provided that the following conditions
12 1.4.4.2 skrll * are met:
13 1.4.4.2 skrll * 1. Redistributions of source code must retain the above copyright
14 1.4.4.2 skrll * notice, this list of conditions and the following disclaimer.
15 1.4.4.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
16 1.4.4.2 skrll * notice, this list of conditions and the following disclaimer in the
17 1.4.4.2 skrll * documentation and/or other materials provided with the distribution.
18 1.4.4.2 skrll * 3. All advertising materials mentioning features or use of this software
19 1.4.4.2 skrll * must display the following acknowledgement:
20 1.4.4.2 skrll * This product includes software developed by the NetBSD
21 1.4.4.2 skrll * Foundation, Inc. and its contributors.
22 1.4.4.2 skrll * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.4.4.2 skrll * contributors may be used to endorse or promote products derived
24 1.4.4.2 skrll * from this software without specific prior written permission.
25 1.4.4.2 skrll *
26 1.4.4.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.4.4.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.4.4.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.4.4.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.4.4.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.4.4.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.4.4.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.4.4.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.4.4.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.4.4.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.4.4.2 skrll * POSSIBILITY OF SUCH DAMAGE.
37 1.4.4.2 skrll */
38 1.4.4.2 skrll
39 1.4.4.2 skrll #include <sys/param.h>
40 1.4.4.2 skrll #include <sys/systm.h>
41 1.4.4.2 skrll
42 1.4.4.2 skrll #include <dev/pci/pcivar.h>
43 1.4.4.2 skrll #include <dev/pci/pcidevs.h>
44 1.4.4.2 skrll #include <dev/pci/pciidereg.h>
45 1.4.4.2 skrll #include <dev/pci/pciidevar.h>
46 1.4.4.2 skrll #include <dev/pci/pciide_sl82c105_reg.h>
47 1.4.4.2 skrll
48 1.4.4.2 skrll static void sl82c105_chip_map(struct pciide_softc*, struct pci_attach_args*);
49 1.4.4.3 skrll static void sl82c105_setup_channel(struct ata_channel*);
50 1.4.4.2 skrll
51 1.4.4.2 skrll static int slide_match(struct device *, struct cfdata *, void *);
52 1.4.4.2 skrll static void slide_attach(struct device *, struct device *, void *);
53 1.4.4.2 skrll
54 1.4.4.2 skrll CFATTACH_DECL(slide, sizeof(struct pciide_softc),
55 1.4.4.2 skrll slide_match, slide_attach, NULL, NULL);
56 1.4.4.2 skrll
57 1.4.4.2 skrll static const struct pciide_product_desc pciide_symphony_products[] = {
58 1.4.4.2 skrll { PCI_PRODUCT_SYMPHONY_82C105,
59 1.4.4.2 skrll 0,
60 1.4.4.2 skrll "Symphony Labs 82C105 IDE controller",
61 1.4.4.2 skrll sl82c105_chip_map,
62 1.4.4.2 skrll },
63 1.4.4.2 skrll { 0,
64 1.4.4.2 skrll 0,
65 1.4.4.2 skrll NULL,
66 1.4.4.2 skrll }
67 1.4.4.2 skrll };
68 1.4.4.2 skrll
69 1.4.4.2 skrll static const struct pciide_product_desc pciide_winbond_products[] = {
70 1.4.4.2 skrll { PCI_PRODUCT_WINBOND_W83C553F_1,
71 1.4.4.2 skrll 0,
72 1.4.4.2 skrll "Winbond W83C553F IDE controller",
73 1.4.4.2 skrll sl82c105_chip_map,
74 1.4.4.2 skrll },
75 1.4.4.2 skrll { 0,
76 1.4.4.2 skrll 0,
77 1.4.4.2 skrll NULL,
78 1.4.4.2 skrll }
79 1.4.4.2 skrll };
80 1.4.4.2 skrll
81 1.4.4.2 skrll static int
82 1.4.4.2 skrll slide_match(struct device *parent, struct cfdata *match, void *aux)
83 1.4.4.2 skrll {
84 1.4.4.2 skrll struct pci_attach_args *pa = aux;
85 1.4.4.2 skrll
86 1.4.4.2 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) {
87 1.4.4.2 skrll if (pciide_lookup_product(pa->pa_id, pciide_symphony_products))
88 1.4.4.2 skrll return (2);
89 1.4.4.2 skrll }
90 1.4.4.2 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) {
91 1.4.4.2 skrll if (pciide_lookup_product(pa->pa_id, pciide_winbond_products))
92 1.4.4.2 skrll return (2);
93 1.4.4.2 skrll }
94 1.4.4.2 skrll return (0);
95 1.4.4.2 skrll }
96 1.4.4.2 skrll
97 1.4.4.2 skrll static void
98 1.4.4.2 skrll slide_attach(struct device *parent, struct device *self, void *aux)
99 1.4.4.2 skrll {
100 1.4.4.2 skrll struct pci_attach_args *pa = aux;
101 1.4.4.2 skrll struct pciide_softc *sc = (struct pciide_softc *)self;
102 1.4.4.2 skrll const struct pciide_product_desc *pp = NULL;
103 1.4.4.2 skrll
104 1.4.4.2 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY)
105 1.4.4.2 skrll pp = pciide_lookup_product(pa->pa_id, pciide_symphony_products);
106 1.4.4.2 skrll if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND)
107 1.4.4.2 skrll pp = pciide_lookup_product(pa->pa_id, pciide_winbond_products);
108 1.4.4.2 skrll if (pp == NULL)
109 1.4.4.2 skrll panic("slide_attach");
110 1.4.4.2 skrll pciide_common_attach(sc, pa, pp);
111 1.4.4.2 skrll }
112 1.4.4.2 skrll
113 1.4.4.2 skrll static int
114 1.4.4.2 skrll sl82c105_bugchk(struct pci_attach_args *pa)
115 1.4.4.2 skrll {
116 1.4.4.2 skrll
117 1.4.4.2 skrll if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_WINBOND ||
118 1.4.4.2 skrll PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_WINBOND_W83C553F_0)
119 1.4.4.2 skrll return (0);
120 1.4.4.2 skrll
121 1.4.4.2 skrll if (PCI_REVISION(pa->pa_class) <= 0x05)
122 1.4.4.2 skrll return (1);
123 1.4.4.2 skrll
124 1.4.4.2 skrll return (0);
125 1.4.4.2 skrll }
126 1.4.4.2 skrll
127 1.4.4.2 skrll static void
128 1.4.4.2 skrll sl82c105_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
129 1.4.4.2 skrll {
130 1.4.4.2 skrll struct pciide_channel *cp;
131 1.4.4.2 skrll bus_size_t cmdsize, ctlsize;
132 1.4.4.2 skrll pcireg_t interface, idecr;
133 1.4.4.2 skrll int channel;
134 1.4.4.2 skrll
135 1.4.4.2 skrll if (pciide_chipen(sc, pa) == 0)
136 1.4.4.2 skrll return;
137 1.4.4.2 skrll
138 1.4.4.2 skrll aprint_normal("%s: bus-master DMA support present",
139 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
140 1.4.4.2 skrll
141 1.4.4.2 skrll /*
142 1.4.4.2 skrll * Check to see if we're part of the Winbond 83c553 Southbridge.
143 1.4.4.2 skrll * If so, we need to disable DMA on rev. <= 5 of that chip.
144 1.4.4.2 skrll */
145 1.4.4.2 skrll if (pci_find_device(pa, sl82c105_bugchk)) {
146 1.4.4.2 skrll aprint_normal(" but disabled due to 83c553 rev. <= 0x05");
147 1.4.4.2 skrll sc->sc_dma_ok = 0;
148 1.4.4.2 skrll } else
149 1.4.4.2 skrll pciide_mapreg_dma(sc, pa);
150 1.4.4.2 skrll aprint_normal("\n");
151 1.4.4.2 skrll
152 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16;
153 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
154 1.4.4.2 skrll if (sc->sc_dma_ok) {
155 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
156 1.4.4.2 skrll sc->sc_wdcdev.irqack = pciide_irqack;
157 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
158 1.4.4.2 skrll }
159 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel;
160 1.4.4.2 skrll
161 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
162 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
163 1.4.4.2 skrll
164 1.4.4.2 skrll idecr = pci_conf_read(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR);
165 1.4.4.2 skrll
166 1.4.4.2 skrll interface = PCI_INTERFACE(pa->pa_class);
167 1.4.4.2 skrll
168 1.4.4.3 skrll wdc_allocate_regs(&sc->sc_wdcdev);
169 1.4.4.3 skrll
170 1.4.4.3 skrll for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
171 1.4.4.3 skrll channel++) {
172 1.4.4.2 skrll cp = &sc->pciide_channels[channel];
173 1.4.4.6 skrll if (pciide_chansetup(sc, channel, interface) == 0)
174 1.4.4.2 skrll continue;
175 1.4.4.2 skrll if ((channel == 0 && (idecr & IDECR_P0EN) == 0) ||
176 1.4.4.2 skrll (channel == 1 && (idecr & IDECR_P1EN) == 0)) {
177 1.4.4.2 skrll aprint_normal("%s: %s channel ignored (disabled)\n",
178 1.4.4.3 skrll sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
179 1.4.4.3 skrll cp->ata_channel.ch_flags |= ATACH_DISABLED;
180 1.4.4.2 skrll continue;
181 1.4.4.2 skrll }
182 1.4.4.2 skrll pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
183 1.4.4.2 skrll pciide_pci_intr);
184 1.4.4.2 skrll }
185 1.4.4.2 skrll }
186 1.4.4.2 skrll
187 1.4.4.2 skrll static void
188 1.4.4.3 skrll sl82c105_setup_channel(struct ata_channel *chp)
189 1.4.4.2 skrll {
190 1.4.4.2 skrll struct ata_drive_datas *drvp;
191 1.4.4.3 skrll struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
192 1.4.4.3 skrll struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
193 1.4.4.3 skrll int pxdx_reg, drive, s;
194 1.4.4.2 skrll pcireg_t pxdx;
195 1.4.4.2 skrll
196 1.4.4.2 skrll /* Set up DMA if needed. */
197 1.4.4.2 skrll pciide_channel_dma_setup(cp);
198 1.4.4.2 skrll
199 1.4.4.2 skrll for (drive = 0; drive < 2; drive++) {
200 1.4.4.2 skrll pxdx_reg = ((chp->ch_channel == 0) ? SYMPH_P0D0CR
201 1.4.4.2 skrll : SYMPH_P1D0CR) +
202 1.4.4.2 skrll (drive * 4);
203 1.4.4.2 skrll
204 1.4.4.2 skrll pxdx = pci_conf_read(sc->sc_pc, sc->sc_tag, pxdx_reg);
205 1.4.4.2 skrll
206 1.4.4.2 skrll pxdx &= ~(PxDx_CMD_ON_MASK|PxDx_CMD_OFF_MASK);
207 1.4.4.2 skrll pxdx &= ~(PxDx_PWEN|PxDx_RDYEN|PxDx_RAEN);
208 1.4.4.2 skrll
209 1.4.4.2 skrll drvp = &chp->ch_drive[drive];
210 1.4.4.2 skrll /* If no drive, skip. */
211 1.4.4.2 skrll if ((drvp->drive_flags & DRIVE) == 0) {
212 1.4.4.2 skrll pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
213 1.4.4.2 skrll continue;
214 1.4.4.2 skrll }
215 1.4.4.2 skrll
216 1.4.4.2 skrll if (drvp->drive_flags & DRIVE_DMA) {
217 1.4.4.2 skrll /*
218 1.4.4.2 skrll * Timings will be used for both PIO and DMA,
219 1.4.4.2 skrll * so adjust DMA mode if needed.
220 1.4.4.2 skrll */
221 1.4.4.2 skrll if (drvp->PIO_mode >= 3) {
222 1.4.4.2 skrll if ((drvp->DMA_mode + 2) > drvp->PIO_mode)
223 1.4.4.2 skrll drvp->DMA_mode = drvp->PIO_mode - 2;
224 1.4.4.2 skrll if (drvp->DMA_mode < 1) {
225 1.4.4.2 skrll /*
226 1.4.4.2 skrll * Can't mix both PIO and DMA.
227 1.4.4.2 skrll * Disable DMA.
228 1.4.4.2 skrll */
229 1.4.4.3 skrll s = splbio();
230 1.4.4.2 skrll drvp->drive_flags &= ~DRIVE_DMA;
231 1.4.4.3 skrll splx(s);
232 1.4.4.2 skrll }
233 1.4.4.2 skrll } else {
234 1.4.4.2 skrll /*
235 1.4.4.2 skrll * Can't mix both PIO and DMA. Disable
236 1.4.4.2 skrll * DMA.
237 1.4.4.2 skrll */
238 1.4.4.3 skrll s = splbio();
239 1.4.4.2 skrll drvp->drive_flags &= ~DRIVE_DMA;
240 1.4.4.3 skrll splx(s);
241 1.4.4.2 skrll }
242 1.4.4.2 skrll }
243 1.4.4.2 skrll
244 1.4.4.2 skrll if (drvp->drive_flags & DRIVE_DMA) {
245 1.4.4.2 skrll /* Use multi-word DMA. */
246 1.4.4.2 skrll pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_on <<
247 1.4.4.2 skrll PxDx_CMD_ON_SHIFT;
248 1.4.4.2 skrll pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_off;
249 1.4.4.2 skrll } else {
250 1.4.4.2 skrll pxdx |= symph_pio_times[drvp->PIO_mode].cmd_on <<
251 1.4.4.2 skrll PxDx_CMD_ON_SHIFT;
252 1.4.4.2 skrll pxdx |= symph_pio_times[drvp->PIO_mode].cmd_off;
253 1.4.4.2 skrll }
254 1.4.4.2 skrll
255 1.4.4.2 skrll /* XXX PxDx_PWEN? PxDx_RDYEN? PxDx_RAEN? */
256 1.4.4.2 skrll
257 1.4.4.2 skrll /* ...and set the mode for this drive. */
258 1.4.4.2 skrll pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
259 1.4.4.2 skrll }
260 1.4.4.2 skrll }
261